4 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
5 * Copyright (c) 2016 NXP. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_memcpy.h>
41 #include <rte_string_fns.h>
42 #include <rte_cycles.h>
43 #include <rte_kvargs.h>
45 #include <rte_ethdev.h>
46 #include <rte_fslmc.h>
48 #include <fslmc_logs.h>
49 #include <fslmc_vfio.h>
50 #include <dpaa2_hw_pvt.h>
51 #include <dpaa2_hw_mempool.h>
52 #include <dpaa2_hw_dpio.h>
53 #include <mc/fsl_dpmng.h>
54 #include "dpaa2_ethdev.h"
56 static struct rte_dpaa2_driver rte_dpaa2_pmd;
57 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
58 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
59 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
60 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
63 * Atomically reads the link status information from global
64 * structure rte_eth_dev.
67 * - Pointer to the structure rte_eth_dev to read from.
68 * - Pointer to the buffer to be saved with the link status.
72 * - On failure, negative value.
75 dpaa2_dev_atomic_read_link_status(struct rte_eth_dev *dev,
76 struct rte_eth_link *link)
78 struct rte_eth_link *dst = link;
79 struct rte_eth_link *src = &dev->data->dev_link;
81 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
82 *(uint64_t *)src) == 0)
89 * Atomically writes the link status information into global
90 * structure rte_eth_dev.
93 * - Pointer to the structure rte_eth_dev to read from.
94 * - Pointer to the buffer to be saved with the link status.
98 * - On failure, negative value.
101 dpaa2_dev_atomic_write_link_status(struct rte_eth_dev *dev,
102 struct rte_eth_link *link)
104 struct rte_eth_link *dst = &dev->data->dev_link;
105 struct rte_eth_link *src = link;
107 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
108 *(uint64_t *)src) == 0)
115 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
118 struct dpaa2_dev_priv *priv = dev->data->dev_private;
119 struct fsl_mc_io *dpni = priv->hw;
121 PMD_INIT_FUNC_TRACE();
124 RTE_LOG(ERR, PMD, "dpni is NULL");
129 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
130 priv->token, vlan_id);
132 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
133 priv->token, vlan_id);
136 PMD_DRV_LOG(ERR, "ret = %d Unable to add/rem vlan %d hwid =%d",
137 ret, vlan_id, priv->hw_id);
143 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
145 struct dpaa2_dev_priv *priv = dev->data->dev_private;
146 struct fsl_mc_io *dpni = priv->hw;
149 PMD_INIT_FUNC_TRACE();
151 if (mask & ETH_VLAN_FILTER_MASK) {
152 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
153 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
156 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
159 RTE_LOG(ERR, PMD, "Unable to set vlan filter ret = %d",
165 dpaa2_fw_version_get(struct rte_eth_dev *dev,
170 struct dpaa2_dev_priv *priv = dev->data->dev_private;
171 struct fsl_mc_io *dpni = priv->hw;
172 struct mc_soc_version mc_plat_info = {0};
173 struct mc_version mc_ver_info = {0};
175 PMD_INIT_FUNC_TRACE();
177 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
178 RTE_LOG(WARNING, PMD, "\tmc_get_soc_version failed\n");
180 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
181 RTE_LOG(WARNING, PMD, "\tmc_get_version failed\n");
183 ret = snprintf(fw_version, fw_size,
188 mc_ver_info.revision);
190 ret += 1; /* add the size of '\0' */
191 if (fw_size < (uint32_t)ret)
198 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
200 struct dpaa2_dev_priv *priv = dev->data->dev_private;
202 PMD_INIT_FUNC_TRACE();
204 dev_info->if_index = priv->hw_id;
206 dev_info->max_mac_addrs = priv->max_mac_filters;
207 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
208 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
209 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
210 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
211 dev_info->rx_offload_capa =
212 DEV_RX_OFFLOAD_IPV4_CKSUM |
213 DEV_RX_OFFLOAD_UDP_CKSUM |
214 DEV_RX_OFFLOAD_TCP_CKSUM |
215 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
216 dev_info->tx_offload_capa =
217 DEV_TX_OFFLOAD_IPV4_CKSUM |
218 DEV_TX_OFFLOAD_UDP_CKSUM |
219 DEV_TX_OFFLOAD_TCP_CKSUM |
220 DEV_TX_OFFLOAD_SCTP_CKSUM |
221 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
222 dev_info->speed_capa = ETH_LINK_SPEED_1G |
223 ETH_LINK_SPEED_2_5G |
228 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
230 struct dpaa2_dev_priv *priv = dev->data->dev_private;
233 struct dpaa2_queue *mc_q, *mcq;
236 struct dpaa2_queue *dpaa2_q;
238 PMD_INIT_FUNC_TRACE();
240 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
241 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
242 RTE_CACHE_LINE_SIZE);
244 PMD_INIT_LOG(ERR, "malloc failed for rx/tx queues\n");
248 for (i = 0; i < priv->nb_rx_queues; i++) {
250 priv->rx_vq[i] = mc_q++;
251 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
252 dpaa2_q->q_storage = rte_malloc("dq_storage",
253 sizeof(struct queue_storage_info_t),
254 RTE_CACHE_LINE_SIZE);
255 if (!dpaa2_q->q_storage)
258 memset(dpaa2_q->q_storage, 0,
259 sizeof(struct queue_storage_info_t));
260 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
264 for (i = 0; i < priv->nb_tx_queues; i++) {
266 mc_q->flow_id = 0xffff;
267 priv->tx_vq[i] = mc_q++;
268 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
269 dpaa2_q->cscn = rte_malloc(NULL,
270 sizeof(struct qbman_result), 16);
276 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
277 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
278 mcq->tc_index = DPAA2_DEF_TC;
279 mcq->flow_id = dist_idx;
287 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
288 rte_free(dpaa2_q->cscn);
289 priv->tx_vq[i--] = NULL;
291 i = priv->nb_rx_queues;
294 mc_q = priv->rx_vq[0];
296 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
297 dpaa2_free_dq_storage(dpaa2_q->q_storage);
298 rte_free(dpaa2_q->q_storage);
299 priv->rx_vq[i--] = NULL;
306 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
308 struct rte_eth_dev_data *data = dev->data;
309 struct rte_eth_conf *eth_conf = &data->dev_conf;
312 PMD_INIT_FUNC_TRACE();
314 if (eth_conf->rxmode.jumbo_frame == 1) {
315 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
316 ret = dpaa2_dev_mtu_set(dev,
317 eth_conf->rxmode.max_rx_pkt_len);
320 "unable to set mtu. check config\n");
328 /* Check for correct configuration */
329 if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS &&
330 data->nb_rx_queues > 1) {
331 PMD_INIT_LOG(ERR, "Distribution is not enabled, "
332 "but Rx queues more than 1\n");
336 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
337 /* Return in case number of Rx queues is 1 */
338 if (data->nb_rx_queues == 1)
340 ret = dpaa2_setup_flow_dist(dev,
341 eth_conf->rx_adv_conf.rss_conf.rss_hf);
343 PMD_INIT_LOG(ERR, "unable to set flow distribution."
344 "please check queue config\n");
351 /* Function to setup RX flow information. It contains traffic class ID,
352 * flow ID, destination configuration etc.
355 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
356 uint16_t rx_queue_id,
357 uint16_t nb_rx_desc __rte_unused,
358 unsigned int socket_id __rte_unused,
359 const struct rte_eth_rxconf *rx_conf __rte_unused,
360 struct rte_mempool *mb_pool)
362 struct dpaa2_dev_priv *priv = dev->data->dev_private;
363 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
364 struct dpaa2_queue *dpaa2_q;
365 struct dpni_queue cfg;
371 PMD_INIT_FUNC_TRACE();
373 PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
374 dev, rx_queue_id, mb_pool, rx_conf);
376 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
377 bpid = mempool_to_bpid(mb_pool);
378 ret = dpaa2_attach_bp_list(priv,
379 rte_dpaa2_bpid_info[bpid].bp_list);
383 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
384 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
386 /*Get the flow id from given VQ id*/
387 flow_id = rx_queue_id % priv->nb_rx_queues;
388 memset(&cfg, 0, sizeof(struct dpni_queue));
390 options = options | DPNI_QUEUE_OPT_USER_CTX;
391 cfg.user_context = (uint64_t)(dpaa2_q);
393 /*if ls2088 or rev2 device, enable the stashing */
394 if ((qbman_get_version() & 0xFFFF0000) > QMAN_REV_4000) {
395 options |= DPNI_QUEUE_OPT_FLC;
396 cfg.flc.stash_control = true;
397 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
398 /* 00 00 00 - last 6 bit represent annotation, context stashing,
399 * data stashing setting 01 01 00 (0x14) to enable
400 * 1 line data, 1 line annotation
402 cfg.flc.value |= 0x14;
404 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
405 dpaa2_q->tc_index, flow_id, options, &cfg);
407 PMD_INIT_LOG(ERR, "Error in setting the rx flow: = %d\n", ret);
411 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
412 struct dpni_taildrop taildrop;
415 /*enabling per rx queue congestion control */
416 taildrop.threshold = CONG_THRESHOLD_RX_Q;
417 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
418 PMD_INIT_LOG(DEBUG, "Enabling Early Drop on queue = %d",
420 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
421 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
422 dpaa2_q->tc_index, flow_id, &taildrop);
424 PMD_INIT_LOG(ERR, "Error in setting the rx flow"
425 " err : = %d\n", ret);
430 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
435 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
436 uint16_t tx_queue_id,
437 uint16_t nb_tx_desc __rte_unused,
438 unsigned int socket_id __rte_unused,
439 const struct rte_eth_txconf *tx_conf __rte_unused)
441 struct dpaa2_dev_priv *priv = dev->data->dev_private;
442 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
443 priv->tx_vq[tx_queue_id];
444 struct fsl_mc_io *dpni = priv->hw;
445 struct dpni_queue tx_conf_cfg;
446 struct dpni_queue tx_flow_cfg;
447 uint8_t options = 0, flow_id;
451 PMD_INIT_FUNC_TRACE();
453 /* Return if queue already configured */
454 if (dpaa2_q->flow_id != 0xffff)
457 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
458 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
463 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
464 tc_id, flow_id, options, &tx_flow_cfg);
466 PMD_INIT_LOG(ERR, "Error in setting the tx flow: "
467 "tc_id=%d, flow =%d ErrorCode = %x\n",
468 tc_id, flow_id, -ret);
472 dpaa2_q->flow_id = flow_id;
474 if (tx_queue_id == 0) {
475 /*Set tx-conf and error configuration*/
476 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
480 PMD_INIT_LOG(ERR, "Error in set tx conf mode settings"
481 " ErrorCode = %x", ret);
485 dpaa2_q->tc_index = tc_id;
487 if (priv->flags & DPAA2_TX_CGR_SUPPORT) {
488 struct dpni_congestion_notification_cfg cong_notif_cfg;
490 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_BYTES;
491 /* Notify about congestion when the queue size is 32 KB */
492 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
493 /* Notify that the queue is not congested when the data in
494 * the queue is below this thershold.
496 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
497 cong_notif_cfg.message_ctx = 0;
498 cong_notif_cfg.message_iova = (uint64_t)dpaa2_q->cscn;
499 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
500 cong_notif_cfg.notification_mode =
501 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
502 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
503 DPNI_CONG_OPT_COHERENT_WRITE;
505 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
512 "Error in setting tx congestion notification: = %d",
517 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
522 dpaa2_dev_rx_queue_release(void *q __rte_unused)
524 PMD_INIT_FUNC_TRACE();
528 dpaa2_dev_tx_queue_release(void *q __rte_unused)
530 PMD_INIT_FUNC_TRACE();
533 static const uint32_t *
534 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
536 static const uint32_t ptypes[] = {
537 /*todo -= add more types */
540 RTE_PTYPE_L3_IPV4_EXT,
542 RTE_PTYPE_L3_IPV6_EXT,
550 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx)
556 dpaa2_dev_start(struct rte_eth_dev *dev)
558 struct rte_eth_dev_data *data = dev->data;
559 struct dpaa2_dev_priv *priv = data->dev_private;
560 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
561 struct dpni_queue cfg;
562 struct dpni_error_cfg err_cfg;
564 struct dpni_queue_id qid;
565 struct dpaa2_queue *dpaa2_q;
568 PMD_INIT_FUNC_TRACE();
570 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
572 PMD_INIT_LOG(ERR, "Failure %d in enabling dpni %d device\n",
577 /* Power up the phy. Needed to make the link go Up */
578 dpaa2_dev_set_link_up(dev);
580 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
581 DPNI_QUEUE_TX, &qdid);
583 PMD_INIT_LOG(ERR, "Error to get qdid:ErrorCode = %d\n", ret);
588 for (i = 0; i < data->nb_rx_queues; i++) {
589 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
590 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
591 DPNI_QUEUE_RX, dpaa2_q->tc_index,
592 dpaa2_q->flow_id, &cfg, &qid);
594 PMD_INIT_LOG(ERR, "Error to get flow "
595 "information Error code = %d\n", ret);
598 dpaa2_q->fqid = qid.fqid;
601 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
602 DPNI_OFF_RX_L3_CSUM, true);
604 PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
608 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
609 DPNI_OFF_RX_L4_CSUM, true);
611 PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
615 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
616 DPNI_OFF_TX_L3_CSUM, true);
618 PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
622 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
623 DPNI_OFF_TX_L4_CSUM, true);
625 PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
629 /*checksum errors, send them to normal path and set it in annotation */
630 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
632 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
633 err_cfg.set_frame_annotation = true;
635 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
636 priv->token, &err_cfg);
638 PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:"
642 /* VLAN Offload Settings */
643 if (priv->max_vlan_filters)
644 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
650 * This routine disables all traffic on the adapter by issuing a
651 * global reset on the MAC.
654 dpaa2_dev_stop(struct rte_eth_dev *dev)
656 struct dpaa2_dev_priv *priv = dev->data->dev_private;
657 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
659 struct rte_eth_link link;
661 PMD_INIT_FUNC_TRACE();
663 dpaa2_dev_set_link_down(dev);
665 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
667 PMD_INIT_LOG(ERR, "Failure (ret %d) in disabling dpni %d dev\n",
672 /* clear the recorded link status */
673 memset(&link, 0, sizeof(link));
674 dpaa2_dev_atomic_write_link_status(dev, &link);
678 dpaa2_dev_close(struct rte_eth_dev *dev)
680 struct rte_eth_dev_data *data = dev->data;
681 struct dpaa2_dev_priv *priv = dev->data->dev_private;
682 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
684 struct rte_eth_link link;
685 struct dpaa2_queue *dpaa2_q;
687 PMD_INIT_FUNC_TRACE();
689 for (i = 0; i < data->nb_tx_queues; i++) {
690 dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
691 if (!dpaa2_q->cscn) {
692 rte_free(dpaa2_q->cscn);
693 dpaa2_q->cscn = NULL;
697 /* Clean the device first */
698 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
700 PMD_INIT_LOG(ERR, "Failure cleaning dpni device with"
701 " error code %d\n", ret);
705 memset(&link, 0, sizeof(link));
706 dpaa2_dev_atomic_write_link_status(dev, &link);
710 dpaa2_dev_promiscuous_enable(
711 struct rte_eth_dev *dev)
714 struct dpaa2_dev_priv *priv = dev->data->dev_private;
715 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
717 PMD_INIT_FUNC_TRACE();
720 RTE_LOG(ERR, PMD, "dpni is NULL");
724 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
726 RTE_LOG(ERR, PMD, "Unable to enable U promisc mode %d", ret);
728 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
730 RTE_LOG(ERR, PMD, "Unable to enable M promisc mode %d", ret);
734 dpaa2_dev_promiscuous_disable(
735 struct rte_eth_dev *dev)
738 struct dpaa2_dev_priv *priv = dev->data->dev_private;
739 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
741 PMD_INIT_FUNC_TRACE();
744 RTE_LOG(ERR, PMD, "dpni is NULL");
748 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
750 RTE_LOG(ERR, PMD, "Unable to disable U promisc mode %d", ret);
752 if (dev->data->all_multicast == 0) {
753 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
756 RTE_LOG(ERR, PMD, "Unable to disable M promisc mode %d",
762 dpaa2_dev_allmulticast_enable(
763 struct rte_eth_dev *dev)
766 struct dpaa2_dev_priv *priv = dev->data->dev_private;
767 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
769 PMD_INIT_FUNC_TRACE();
772 RTE_LOG(ERR, PMD, "dpni is NULL");
776 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
778 RTE_LOG(ERR, PMD, "Unable to enable multicast mode %d", ret);
782 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
785 struct dpaa2_dev_priv *priv = dev->data->dev_private;
786 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
788 PMD_INIT_FUNC_TRACE();
791 RTE_LOG(ERR, PMD, "dpni is NULL");
795 /* must remain on for all promiscuous */
796 if (dev->data->promiscuous == 1)
799 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
801 RTE_LOG(ERR, PMD, "Unable to disable multicast mode %d", ret);
805 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
808 struct dpaa2_dev_priv *priv = dev->data->dev_private;
809 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
810 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
812 PMD_INIT_FUNC_TRACE();
815 RTE_LOG(ERR, PMD, "dpni is NULL");
819 /* check that mtu is within the allowed range */
820 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
823 if (frame_size > ETHER_MAX_LEN)
824 dev->data->dev_conf.rxmode.jumbo_frame = 1;
826 dev->data->dev_conf.rxmode.jumbo_frame = 0;
828 /* Set the Max Rx frame length as 'mtu' +
829 * Maximum Ethernet header length
831 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
832 mtu + ETH_VLAN_HLEN);
834 PMD_DRV_LOG(ERR, "setting the max frame length failed");
837 PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
842 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
843 struct ether_addr *addr,
844 __rte_unused uint32_t index,
845 __rte_unused uint32_t pool)
848 struct dpaa2_dev_priv *priv = dev->data->dev_private;
849 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
851 PMD_INIT_FUNC_TRACE();
854 RTE_LOG(ERR, PMD, "dpni is NULL");
858 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
859 priv->token, addr->addr_bytes);
861 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
867 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
871 struct dpaa2_dev_priv *priv = dev->data->dev_private;
872 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
873 struct rte_eth_dev_data *data = dev->data;
874 struct ether_addr *macaddr;
876 PMD_INIT_FUNC_TRACE();
878 macaddr = &data->mac_addrs[index];
881 RTE_LOG(ERR, PMD, "dpni is NULL");
885 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
886 priv->token, macaddr->addr_bytes);
888 RTE_LOG(ERR, PMD, "error: Removing the MAC ADDR failed:"
893 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
894 struct ether_addr *addr)
897 struct dpaa2_dev_priv *priv = dev->data->dev_private;
898 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
900 PMD_INIT_FUNC_TRACE();
903 RTE_LOG(ERR, PMD, "dpni is NULL");
907 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
908 priv->token, addr->addr_bytes);
911 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
914 void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
915 struct rte_eth_stats *stats)
917 struct dpaa2_dev_priv *priv = dev->data->dev_private;
918 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
920 uint8_t page0 = 0, page1 = 1, page2 = 2;
921 union dpni_statistics value;
923 memset(&value, 0, sizeof(union dpni_statistics));
925 PMD_INIT_FUNC_TRACE();
928 RTE_LOG(ERR, PMD, "dpni is NULL");
933 RTE_LOG(ERR, PMD, "stats is NULL");
937 /*Get Counters from page_0*/
938 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
943 stats->ipackets = value.page_0.ingress_all_frames;
944 stats->ibytes = value.page_0.ingress_all_bytes;
946 /*Get Counters from page_1*/
947 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
952 stats->opackets = value.page_1.egress_all_frames;
953 stats->obytes = value.page_1.egress_all_bytes;
955 /*Get Counters from page_2*/
956 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
961 /* Ingress drop frame count due to configured rules */
962 stats->ierrors = value.page_2.ingress_filtered_frames;
963 /* Ingress drop frame count due to error */
964 stats->ierrors += value.page_2.ingress_discarded_frames;
966 stats->oerrors = value.page_2.egress_discarded_frames;
967 stats->imissed = value.page_2.ingress_nobuffer_discards;
972 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
977 void dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
979 struct dpaa2_dev_priv *priv = dev->data->dev_private;
980 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
983 PMD_INIT_FUNC_TRACE();
986 RTE_LOG(ERR, PMD, "dpni is NULL");
990 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
997 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
1001 /* return 0 means link status changed, -1 means not changed */
1003 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1004 int wait_to_complete __rte_unused)
1007 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1008 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1009 struct rte_eth_link link, old;
1010 struct dpni_link_state state = {0};
1012 PMD_INIT_FUNC_TRACE();
1015 RTE_LOG(ERR, PMD, "error : dpni is NULL");
1018 memset(&old, 0, sizeof(old));
1019 dpaa2_dev_atomic_read_link_status(dev, &old);
1021 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1023 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d", ret);
1027 if ((old.link_status == state.up) && (old.link_speed == state.rate)) {
1028 RTE_LOG(DEBUG, PMD, "No change in status\n");
1032 memset(&link, 0, sizeof(struct rte_eth_link));
1033 link.link_status = state.up;
1034 link.link_speed = state.rate;
1036 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1037 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1039 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1041 dpaa2_dev_atomic_write_link_status(dev, &link);
1043 if (link.link_status)
1044 PMD_DRV_LOG(INFO, "Port %d Link is Up\n", dev->data->port_id);
1046 PMD_DRV_LOG(INFO, "Port %d Link is Down\n", dev->data->port_id);
1051 * Toggle the DPNI to enable, if not already enabled.
1052 * This is not strictly PHY up/down - it is more of logical toggling.
1055 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1058 struct dpaa2_dev_priv *priv;
1059 struct fsl_mc_io *dpni;
1062 PMD_INIT_FUNC_TRACE();
1064 priv = dev->data->dev_private;
1065 dpni = (struct fsl_mc_io *)priv->hw;
1068 RTE_LOG(ERR, PMD, "Device has not yet been configured");
1072 /* Check if DPNI is currently enabled */
1073 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1075 /* Unable to obtain dpni status; Not continuing */
1076 PMD_DRV_LOG(ERR, "Interface Link UP failed (%d)", ret);
1080 /* Enable link if not already enabled */
1082 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1084 PMD_DRV_LOG(ERR, "Interface Link UP failed (%d)", ret);
1088 /* changing tx burst function to start enqueues */
1089 dev->tx_pkt_burst = dpaa2_dev_tx;
1090 dev->data->dev_link.link_status = 1;
1092 PMD_DRV_LOG(INFO, "Port %d Link UP successful", dev->data->port_id);
1097 * Toggle the DPNI to disable, if not already disabled.
1098 * This is not strictly PHY up/down - it is more of logical toggling.
1101 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1104 struct dpaa2_dev_priv *priv;
1105 struct fsl_mc_io *dpni;
1106 int dpni_enabled = 0;
1109 PMD_INIT_FUNC_TRACE();
1111 priv = dev->data->dev_private;
1112 dpni = (struct fsl_mc_io *)priv->hw;
1115 RTE_LOG(ERR, PMD, "Device has not yet been configured");
1119 /*changing tx burst function to avoid any more enqueues */
1120 dev->tx_pkt_burst = dummy_dev_tx;
1122 /* Loop while dpni_disable() attempts to drain the egress FQs
1123 * and confirm them back to us.
1126 ret = dpni_disable(dpni, 0, priv->token);
1128 PMD_DRV_LOG(ERR, "dpni disable failed (%d)", ret);
1131 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1133 PMD_DRV_LOG(ERR, "dpni_is_enabled failed (%d)", ret);
1137 /* Allow the MC some slack */
1138 rte_delay_us(100 * 1000);
1139 } while (dpni_enabled && --retries);
1142 PMD_DRV_LOG(WARNING, "Retry count exceeded disabling DPNI\n");
1143 /* todo- we may have to manually cleanup queues.
1146 PMD_DRV_LOG(INFO, "Port %d Link DOWN successful",
1147 dev->data->port_id);
1150 dev->data->dev_link.link_status = 0;
1156 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1159 struct dpaa2_dev_priv *priv;
1160 struct fsl_mc_io *dpni;
1161 struct dpni_link_state state = {0};
1163 PMD_INIT_FUNC_TRACE();
1165 priv = dev->data->dev_private;
1166 dpni = (struct fsl_mc_io *)priv->hw;
1168 if (dpni == NULL || fc_conf == NULL) {
1169 RTE_LOG(ERR, PMD, "device not configured");
1173 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1175 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d", ret);
1179 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1180 if (state.options & DPNI_LINK_OPT_PAUSE) {
1181 /* DPNI_LINK_OPT_PAUSE set
1182 * if ASYM_PAUSE not set,
1183 * RX Side flow control (handle received Pause frame)
1184 * TX side flow control (send Pause frame)
1185 * if ASYM_PAUSE set,
1186 * RX Side flow control (handle received Pause frame)
1187 * No TX side flow control (send Pause frame disabled)
1189 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1190 fc_conf->mode = RTE_FC_FULL;
1192 fc_conf->mode = RTE_FC_RX_PAUSE;
1194 /* DPNI_LINK_OPT_PAUSE not set
1195 * if ASYM_PAUSE set,
1196 * TX side flow control (send Pause frame)
1197 * No RX side flow control (No action on pause frame rx)
1198 * if ASYM_PAUSE not set,
1199 * Flow control disabled
1201 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1202 fc_conf->mode = RTE_FC_TX_PAUSE;
1204 fc_conf->mode = RTE_FC_NONE;
1211 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1214 struct dpaa2_dev_priv *priv;
1215 struct fsl_mc_io *dpni;
1216 struct dpni_link_state state = {0};
1217 struct dpni_link_cfg cfg = {0};
1219 PMD_INIT_FUNC_TRACE();
1221 priv = dev->data->dev_private;
1222 dpni = (struct fsl_mc_io *)priv->hw;
1225 RTE_LOG(ERR, PMD, "dpni is NULL");
1229 /* It is necessary to obtain the current state before setting fc_conf
1230 * as MC would return error in case rate, autoneg or duplex values are
1233 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1235 RTE_LOG(ERR, PMD, "Unable to get link state (err=%d)", ret);
1239 /* Disable link before setting configuration */
1240 dpaa2_dev_set_link_down(dev);
1242 /* Based on fc_conf, update cfg */
1243 cfg.rate = state.rate;
1244 cfg.options = state.options;
1246 /* update cfg with fc_conf */
1247 switch (fc_conf->mode) {
1249 /* Full flow control;
1250 * OPT_PAUSE set, ASYM_PAUSE not set
1252 cfg.options |= DPNI_LINK_OPT_PAUSE;
1253 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1254 case RTE_FC_TX_PAUSE:
1255 /* Enable RX flow control
1256 * OPT_PAUSE not set;
1259 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1260 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1262 case RTE_FC_RX_PAUSE:
1263 /* Enable TX Flow control
1267 cfg.options |= DPNI_LINK_OPT_PAUSE;
1268 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1271 /* Disable Flow control
1273 * ASYM_PAUSE not set
1275 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1276 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1279 RTE_LOG(ERR, PMD, "Incorrect Flow control flag (%d)",
1284 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1286 RTE_LOG(ERR, PMD, "Unable to set Link configuration (err=%d)",
1290 dpaa2_dev_set_link_up(dev);
1295 static struct eth_dev_ops dpaa2_ethdev_ops = {
1296 .dev_configure = dpaa2_eth_dev_configure,
1297 .dev_start = dpaa2_dev_start,
1298 .dev_stop = dpaa2_dev_stop,
1299 .dev_close = dpaa2_dev_close,
1300 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
1301 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
1302 .allmulticast_enable = dpaa2_dev_allmulticast_enable,
1303 .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1304 .dev_set_link_up = dpaa2_dev_set_link_up,
1305 .dev_set_link_down = dpaa2_dev_set_link_down,
1306 .link_update = dpaa2_dev_link_update,
1307 .stats_get = dpaa2_dev_stats_get,
1308 .stats_reset = dpaa2_dev_stats_reset,
1309 .fw_version_get = dpaa2_fw_version_get,
1310 .dev_infos_get = dpaa2_dev_info_get,
1311 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1312 .mtu_set = dpaa2_dev_mtu_set,
1313 .vlan_filter_set = dpaa2_vlan_filter_set,
1314 .vlan_offload_set = dpaa2_vlan_offload_set,
1315 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
1316 .rx_queue_release = dpaa2_dev_rx_queue_release,
1317 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
1318 .tx_queue_release = dpaa2_dev_tx_queue_release,
1319 .flow_ctrl_get = dpaa2_flow_ctrl_get,
1320 .flow_ctrl_set = dpaa2_flow_ctrl_set,
1321 .mac_addr_add = dpaa2_dev_add_mac_addr,
1322 .mac_addr_remove = dpaa2_dev_remove_mac_addr,
1323 .mac_addr_set = dpaa2_dev_set_mac_addr,
1327 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
1329 struct rte_device *dev = eth_dev->device;
1330 struct rte_dpaa2_device *dpaa2_dev;
1331 struct fsl_mc_io *dpni_dev;
1332 struct dpni_attr attr;
1333 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1334 struct dpni_buffer_layout layout;
1337 PMD_INIT_FUNC_TRACE();
1339 /* For secondary processes, the primary has done all the work */
1340 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1343 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1345 hw_id = dpaa2_dev->object_id;
1347 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
1349 PMD_INIT_LOG(ERR, "malloc failed for dpni device\n");
1353 dpni_dev->regs = rte_mcp_ptr_list[0];
1354 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
1357 "Failure in opening dpni@%d with err code %d\n",
1363 /* Clean the device first */
1364 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
1367 "Failure cleaning dpni@%d with err code %d\n",
1372 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
1375 "Failure in get dpni@%d attribute, err code %d\n",
1380 priv->num_tc = attr.num_tcs;
1382 /* Resetting the "num_rx_vqueues" to equal number of queues in first TC
1383 * as only one TC is supported on Rx Side. Once Multiple TCs will be
1384 * in use for Rx processing then this will be changed or removed.
1386 priv->nb_rx_queues = attr.num_queues;
1388 /* TODO:Using hard coded value for number of TX queues due to dependency
1391 priv->nb_tx_queues = 8;
1393 PMD_INIT_LOG(DEBUG, "num TC - RX %d", priv->num_tc);
1394 PMD_INIT_LOG(DEBUG, "nb_tx_queues %d", priv->nb_tx_queues);
1395 PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
1397 priv->hw = dpni_dev;
1398 priv->hw_id = hw_id;
1399 priv->options = attr.options;
1400 priv->max_mac_filters = attr.mac_filter_entries;
1401 priv->max_vlan_filters = attr.vlan_filter_entries;
1404 priv->flags |= DPAA2_TX_CGR_SUPPORT;
1405 PMD_INIT_LOG(INFO, "Enable the tx congestion control support");
1407 /* Allocate memory for hardware structure for queues */
1408 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
1410 PMD_INIT_LOG(ERR, "dpaa2_alloc_rx_tx_queuesFailed\n");
1414 /* Allocate memory for storing MAC addresses */
1415 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
1416 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
1417 if (eth_dev->data->mac_addrs == NULL) {
1419 "Failed to allocate %d bytes needed to store MAC addresses",
1420 ETHER_ADDR_LEN * attr.mac_filter_entries);
1425 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1427 (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
1429 PMD_INIT_LOG(ERR, "DPNI get mac address failed:Err Code = %d\n",
1434 /* ... tx buffer layout ... */
1435 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1436 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1437 layout.pass_frame_status = 1;
1438 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1439 DPNI_QUEUE_TX, &layout);
1441 PMD_INIT_LOG(ERR, "Error (%d) in setting tx buffer layout",
1446 /* ... tx-conf and error buffer layout ... */
1447 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1448 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1449 layout.pass_frame_status = 1;
1450 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1451 DPNI_QUEUE_TX_CONFIRM, &layout);
1453 PMD_INIT_LOG(ERR, "Error (%d) in setting tx-conf buffer layout",
1458 eth_dev->dev_ops = &dpaa2_ethdev_ops;
1460 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
1461 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
1462 rte_fslmc_vfio_dmamap();
1466 dpaa2_dev_uninit(eth_dev);
1471 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
1473 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1474 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1476 struct dpaa2_queue *dpaa2_q;
1478 PMD_INIT_FUNC_TRACE();
1480 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1484 PMD_INIT_LOG(WARNING, "Already closed or not started");
1488 dpaa2_dev_close(eth_dev);
1490 if (priv->rx_vq[0]) {
1491 /* cleaning up queue storage */
1492 for (i = 0; i < priv->nb_rx_queues; i++) {
1493 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1494 if (dpaa2_q->q_storage)
1495 rte_free(dpaa2_q->q_storage);
1497 /*free the all queue memory */
1498 rte_free(priv->rx_vq[0]);
1499 priv->rx_vq[0] = NULL;
1502 /* free memory for storing MAC addresses */
1503 if (eth_dev->data->mac_addrs) {
1504 rte_free(eth_dev->data->mac_addrs);
1505 eth_dev->data->mac_addrs = NULL;
1508 /* Close the device at underlying layer*/
1509 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
1512 "Failure closing dpni device with err code %d\n",
1516 /* Free the allocated memory for ethernet private data and dpni*/
1520 eth_dev->dev_ops = NULL;
1521 eth_dev->rx_pkt_burst = NULL;
1522 eth_dev->tx_pkt_burst = NULL;
1528 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
1529 struct rte_dpaa2_device *dpaa2_dev)
1531 struct rte_eth_dev *eth_dev;
1532 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
1536 sprintf(ethdev_name, "dpni-%d", dpaa2_dev->object_id);
1538 eth_dev = rte_eth_dev_allocate(ethdev_name);
1539 if (eth_dev == NULL)
1542 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1543 eth_dev->data->dev_private = rte_zmalloc(
1544 "ethdev private structure",
1545 sizeof(struct dpaa2_dev_priv),
1546 RTE_CACHE_LINE_SIZE);
1547 if (eth_dev->data->dev_private == NULL) {
1548 PMD_INIT_LOG(CRIT, "Cannot allocate memzone for"
1549 " private port data\n");
1550 rte_eth_dev_release_port(eth_dev);
1554 eth_dev->device = &dpaa2_dev->device;
1555 eth_dev->device->driver = &dpaa2_drv->driver;
1557 dpaa2_dev->eth_dev = eth_dev;
1558 eth_dev->data->rx_mbuf_alloc_failed = 0;
1560 /* Invoke PMD device initialization function */
1561 diag = dpaa2_dev_init(eth_dev);
1565 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1566 rte_free(eth_dev->data->dev_private);
1567 rte_eth_dev_release_port(eth_dev);
1572 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
1574 struct rte_eth_dev *eth_dev;
1576 eth_dev = dpaa2_dev->eth_dev;
1577 dpaa2_dev_uninit(eth_dev);
1579 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1580 rte_free(eth_dev->data->dev_private);
1581 rte_eth_dev_release_port(eth_dev);
1586 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
1587 .drv_type = DPAA2_MC_DPNI_DEVID,
1588 .probe = rte_dpaa2_probe,
1589 .remove = rte_dpaa2_remove,
1592 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);