drivers/net/dpaa2/dpaa2_ethdev.c

   1 /* * SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016 NXP
   5  *
   6  */
   7
   8 #include <time.h>
   9 #include <net/if.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_malloc.h>
  14 #include <rte_memcpy.h>
  15 #include <rte_string_fns.h>
  16 #include <rte_cycles.h>
  17 #include <rte_kvargs.h>
  18 #include <rte_dev.h>
  19 #include <rte_fslmc.h>
  20 #include <rte_flow_driver.h>
  21
  22 #include "dpaa2_pmd_logs.h"
  23 #include <fslmc_vfio.h>
  24 #include <dpaa2_hw_pvt.h>
  25 #include <dpaa2_hw_mempool.h>
  26 #include <dpaa2_hw_dpio.h>
  27 #include <mc/fsl_dpmng.h>
  28 #include "dpaa2_ethdev.h"
  29 #include "dpaa2_sparser.h"
  30 #include <fsl_qbman_debug.h>
  31
  32 #define DRIVER_LOOPBACK_MODE "drv_loopback"
  33 #define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
  34
  35 /* Supported Rx offloads */
  36 static uint64_t dev_rx_offloads_sup =
  37                 DEV_RX_OFFLOAD_CHECKSUM |
  38                 DEV_RX_OFFLOAD_SCTP_CKSUM |
  39                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  40                 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
  41                 DEV_RX_OFFLOAD_VLAN_STRIP |
  42                 DEV_RX_OFFLOAD_VLAN_FILTER |
  43                 DEV_RX_OFFLOAD_JUMBO_FRAME |
  44                 DEV_RX_OFFLOAD_TIMESTAMP;
  45
  46 /* Rx offloads which cannot be disabled */
  47 static uint64_t dev_rx_offloads_nodis =
  48                 DEV_RX_OFFLOAD_RSS_HASH |
  49                 DEV_RX_OFFLOAD_SCATTER;
  50
  51 /* Supported Tx offloads */
  52 static uint64_t dev_tx_offloads_sup =
  53                 DEV_TX_OFFLOAD_VLAN_INSERT |
  54                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  55                 DEV_TX_OFFLOAD_UDP_CKSUM |
  56                 DEV_TX_OFFLOAD_TCP_CKSUM |
  57                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  58                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  59                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  60                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  61
  62 /* Tx offloads which cannot be disabled */
  63 static uint64_t dev_tx_offloads_nodis =
  64                 DEV_TX_OFFLOAD_MULTI_SEGS;
  65
  66 /* enable timestamp in mbuf */
  67 enum pmd_dpaa2_ts dpaa2_enable_ts;
  68
  69 struct rte_dpaa2_xstats_name_off {
  70         char name[RTE_ETH_XSTATS_NAME_SIZE];
  71         uint8_t page_id; /* dpni statistics page id */
  72         uint8_t stats_id; /* stats id in the given page */
  73 };
  74
  75 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
  76         {"ingress_multicast_frames", 0, 2},
  77         {"ingress_multicast_bytes", 0, 3},
  78         {"ingress_broadcast_frames", 0, 4},
  79         {"ingress_broadcast_bytes", 0, 5},
  80         {"egress_multicast_frames", 1, 2},
  81         {"egress_multicast_bytes", 1, 3},
  82         {"egress_broadcast_frames", 1, 4},
  83         {"egress_broadcast_bytes", 1, 5},
  84         {"ingress_filtered_frames", 2, 0},
  85         {"ingress_discarded_frames", 2, 1},
  86         {"ingress_nobuffer_discards", 2, 2},
  87         {"egress_discarded_frames", 2, 3},
  88         {"egress_confirmed_frames", 2, 4},
  89         {"cgr_reject_frames", 4, 0},
  90         {"cgr_reject_bytes", 4, 1},
  91 };
  92
  93 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
  94         RTE_ETH_FILTER_ADD,
  95         RTE_ETH_FILTER_DELETE,
  96         RTE_ETH_FILTER_UPDATE,
  97         RTE_ETH_FILTER_FLUSH,
  98         RTE_ETH_FILTER_GET
  99 };
 100
 101 static struct rte_dpaa2_driver rte_dpaa2_pmd;
 102 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
 103 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
 104                                  int wait_to_complete);
 105 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
 106 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
 107 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 108
 109 int dpaa2_logtype_pmd;
 110
 111 void
 112 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
 113 {
 114         dpaa2_enable_ts = enable;
 115 }
 116
 117 static int
 118 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 119 {
 120         int ret;
 121         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 122         struct fsl_mc_io *dpni = dev->process_private;
 123
 124         PMD_INIT_FUNC_TRACE();
 125
 126         if (dpni == NULL) {
 127                 DPAA2_PMD_ERR("dpni is NULL");
 128                 return -1;
 129         }
 130
 131         if (on)
 132                 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW, priv->token,
 133                                        vlan_id, 0, 0, 0);
 134         else
 135                 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
 136                                           priv->token, vlan_id);
 137
 138         if (ret < 0)
 139                 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
 140                               ret, vlan_id, priv->hw_id);
 141
 142         return ret;
 143 }
 144
 145 static int
 146 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 147 {
 148         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 149         struct fsl_mc_io *dpni = dev->process_private;
 150         int ret;
 151
 152         PMD_INIT_FUNC_TRACE();
 153
 154         if (mask & ETH_VLAN_FILTER_MASK) {
 155                 /* VLAN Filter not avaialble */
 156                 if (!priv->max_vlan_filters) {
 157                         DPAA2_PMD_INFO("VLAN filter not available");
 158                         goto next_mask;
 159                 }
 160
 161                 if (dev->data->dev_conf.rxmode.offloads &
 162                         DEV_RX_OFFLOAD_VLAN_FILTER)
 163                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 164                                                       priv->token, true);
 165                 else
 166                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 167                                                       priv->token, false);
 168                 if (ret < 0)
 169                         DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
 170         }
 171 next_mask:
 172         if (mask & ETH_VLAN_EXTEND_MASK) {
 173                 if (dev->data->dev_conf.rxmode.offloads &
 174                         DEV_RX_OFFLOAD_VLAN_EXTEND)
 175                         DPAA2_PMD_INFO("VLAN extend offload not supported");
 176         }
 177
 178         return 0;
 179 }
 180
 181 static int
 182 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 183                       enum rte_vlan_type vlan_type __rte_unused,
 184                       uint16_t tpid)
 185 {
 186         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 187         struct fsl_mc_io *dpni = dev->process_private;
 188         int ret = -ENOTSUP;
 189
 190         PMD_INIT_FUNC_TRACE();
 191
 192         /* nothing to be done for standard vlan tpids */
 193         if (tpid == 0x8100 || tpid == 0x88A8)
 194                 return 0;
 195
 196         ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 197                                    priv->token, tpid);
 198         if (ret < 0)
 199                 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
 200         /* if already configured tpids, remove them first */
 201         if (ret == -EBUSY) {
 202                 struct dpni_custom_tpid_cfg tpid_list = {0};
 203
 204                 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
 205                                    priv->token, &tpid_list);
 206                 if (ret < 0)
 207                         goto fail;
 208                 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
 209                                    priv->token, tpid_list.tpid1);
 210                 if (ret < 0)
 211                         goto fail;
 212                 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 213                                            priv->token, tpid);
 214         }
 215 fail:
 216         return ret;
 217 }
 218
 219 static int
 220 dpaa2_fw_version_get(struct rte_eth_dev *dev,
 221                      char *fw_version,
 222                      size_t fw_size)
 223 {
 224         int ret;
 225         struct fsl_mc_io *dpni = dev->process_private;
 226         struct mc_soc_version mc_plat_info = {0};
 227         struct mc_version mc_ver_info = {0};
 228
 229         PMD_INIT_FUNC_TRACE();
 230
 231         if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
 232                 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
 233
 234         if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
 235                 DPAA2_PMD_WARN("\tmc_get_version failed");
 236
 237         ret = snprintf(fw_version, fw_size,
 238                        "%x-%d.%d.%d",
 239                        mc_plat_info.svr,
 240                        mc_ver_info.major,
 241                        mc_ver_info.minor,
 242                        mc_ver_info.revision);
 243
 244         ret += 1; /* add the size of '\0' */
 245         if (fw_size < (uint32_t)ret)
 246                 return ret;
 247         else
 248                 return 0;
 249 }
 250
 251 static int
 252 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 253 {
 254         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 255
 256         PMD_INIT_FUNC_TRACE();
 257
 258         dev_info->if_index = priv->hw_id;
 259
 260         dev_info->max_mac_addrs = priv->max_mac_filters;
 261         dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
 262         dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 263         dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 264         dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
 265         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 266                                         dev_rx_offloads_nodis;
 267         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 268                                         dev_tx_offloads_nodis;
 269         dev_info->speed_capa = ETH_LINK_SPEED_1G |
 270                         ETH_LINK_SPEED_2_5G |
 271                         ETH_LINK_SPEED_10G;
 272
 273         dev_info->max_hash_mac_addrs = 0;
 274         dev_info->max_vfs = 0;
 275         dev_info->max_vmdq_pools = ETH_16_POOLS;
 276         dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
 277
 278         return 0;
 279 }
 280
 281 static int
 282 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 283 {
 284         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 285         uint16_t dist_idx;
 286         uint32_t vq_id;
 287         uint8_t num_rxqueue_per_tc;
 288         struct dpaa2_queue *mc_q, *mcq;
 289         uint32_t tot_queues;
 290         int i;
 291         struct dpaa2_queue *dpaa2_q;
 292
 293         PMD_INIT_FUNC_TRACE();
 294
 295         num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
 296         if (priv->tx_conf_en)
 297                 tot_queues = priv->nb_rx_queues + 2 * priv->nb_tx_queues;
 298         else
 299                 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 300         mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 301                           RTE_CACHE_LINE_SIZE);
 302         if (!mc_q) {
 303                 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
 304                 return -1;
 305         }
 306
 307         for (i = 0; i < priv->nb_rx_queues; i++) {
 308                 mc_q->eth_data = dev->data;
 309                 priv->rx_vq[i] = mc_q++;
 310                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 311                 dpaa2_q->q_storage = rte_malloc("dq_storage",
 312                                         sizeof(struct queue_storage_info_t),
 313                                         RTE_CACHE_LINE_SIZE);
 314                 if (!dpaa2_q->q_storage)
 315                         goto fail;
 316
 317                 memset(dpaa2_q->q_storage, 0,
 318                        sizeof(struct queue_storage_info_t));
 319                 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 320                         goto fail;
 321         }
 322
 323         for (i = 0; i < priv->nb_tx_queues; i++) {
 324                 mc_q->eth_data = dev->data;
 325                 mc_q->flow_id = 0xffff;
 326                 priv->tx_vq[i] = mc_q++;
 327                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 328                 dpaa2_q->cscn = rte_malloc(NULL,
 329                                            sizeof(struct qbman_result), 16);
 330                 if (!dpaa2_q->cscn)
 331                         goto fail_tx;
 332         }
 333
 334         if (priv->tx_conf_en) {
 335                 /*Setup tx confirmation queues*/
 336                 for (i = 0; i < priv->nb_tx_queues; i++) {
 337                         mc_q->eth_data = dev->data;
 338                         mc_q->tc_index = i;
 339                         mc_q->flow_id = 0;
 340                         priv->tx_conf_vq[i] = mc_q++;
 341                         dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 342                         dpaa2_q->q_storage =
 343                                 rte_malloc("dq_storage",
 344                                         sizeof(struct queue_storage_info_t),
 345                                         RTE_CACHE_LINE_SIZE);
 346                         if (!dpaa2_q->q_storage)
 347                                 goto fail_tx_conf;
 348
 349                         memset(dpaa2_q->q_storage, 0,
 350                                sizeof(struct queue_storage_info_t));
 351                         if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 352                                 goto fail_tx_conf;
 353                 }
 354         }
 355
 356         vq_id = 0;
 357         for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 358                 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
 359                 mcq->tc_index = dist_idx / num_rxqueue_per_tc;
 360                 mcq->flow_id = dist_idx % num_rxqueue_per_tc;
 361                 vq_id++;
 362         }
 363
 364         return 0;
 365 fail_tx_conf:
 366         i -= 1;
 367         while (i >= 0) {
 368                 dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 369                 rte_free(dpaa2_q->q_storage);
 370                 priv->tx_conf_vq[i--] = NULL;
 371         }
 372         i = priv->nb_tx_queues;
 373 fail_tx:
 374         i -= 1;
 375         while (i >= 0) {
 376                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 377                 rte_free(dpaa2_q->cscn);
 378                 priv->tx_vq[i--] = NULL;
 379         }
 380         i = priv->nb_rx_queues;
 381 fail:
 382         i -= 1;
 383         mc_q = priv->rx_vq[0];
 384         while (i >= 0) {
 385                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 386                 dpaa2_free_dq_storage(dpaa2_q->q_storage);
 387                 rte_free(dpaa2_q->q_storage);
 388                 priv->rx_vq[i--] = NULL;
 389         }
 390         rte_free(mc_q);
 391         return -1;
 392 }
 393
 394 static void
 395 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 396 {
 397         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 398         struct dpaa2_queue *dpaa2_q;
 399         int i;
 400
 401         PMD_INIT_FUNC_TRACE();
 402
 403         /* Queue allocation base */
 404         if (priv->rx_vq[0]) {
 405                 /* cleaning up queue storage */
 406                 for (i = 0; i < priv->nb_rx_queues; i++) {
 407                         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 408                         if (dpaa2_q->q_storage)
 409                                 rte_free(dpaa2_q->q_storage);
 410                 }
 411                 /* cleanup tx queue cscn */
 412                 for (i = 0; i < priv->nb_tx_queues; i++) {
 413                         dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 414                         rte_free(dpaa2_q->cscn);
 415                 }
 416                 if (priv->tx_conf_en) {
 417                         /* cleanup tx conf queue storage */
 418                         for (i = 0; i < priv->nb_tx_queues; i++) {
 419                                 dpaa2_q = (struct dpaa2_queue *)
 420                                                 priv->tx_conf_vq[i];
 421                                 rte_free(dpaa2_q->q_storage);
 422                         }
 423                 }
 424                 /*free memory for all queues (RX+TX) */
 425                 rte_free(priv->rx_vq[0]);
 426                 priv->rx_vq[0] = NULL;
 427         }
 428 }
 429
 430 static int
 431 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 432 {
 433         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 434         struct fsl_mc_io *dpni = dev->process_private;
 435         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 436         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 437         uint64_t tx_offloads = eth_conf->txmode.offloads;
 438         int rx_l3_csum_offload = false;
 439         int rx_l4_csum_offload = false;
 440         int tx_l3_csum_offload = false;
 441         int tx_l4_csum_offload = false;
 442         int ret;
 443
 444         PMD_INIT_FUNC_TRACE();
 445
 446         /* Rx offloads which are enabled by default */
 447         if (dev_rx_offloads_nodis & ~rx_offloads) {
 448                 DPAA2_PMD_INFO(
 449                 "Some of rx offloads enabled by default - requested 0x%" PRIx64
 450                 " fixed are 0x%" PRIx64,
 451                 rx_offloads, dev_rx_offloads_nodis);
 452         }
 453
 454         /* Tx offloads which are enabled by default */
 455         if (dev_tx_offloads_nodis & ~tx_offloads) {
 456                 DPAA2_PMD_INFO(
 457                 "Some of tx offloads enabled by default - requested 0x%" PRIx64
 458                 " fixed are 0x%" PRIx64,
 459                 tx_offloads, dev_tx_offloads_nodis);
 460         }
 461
 462         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 463                 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 464                         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
 465                                 priv->token, eth_conf->rxmode.max_rx_pkt_len
 466                                 - RTE_ETHER_CRC_LEN);
 467                         if (ret) {
 468                                 DPAA2_PMD_ERR(
 469                                         "Unable to set mtu. check config");
 470                                 return ret;
 471                         }
 472                         dev->data->mtu =
 473                                 dev->data->dev_conf.rxmode.max_rx_pkt_len -
 474                                 RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
 475                                 VLAN_TAG_SIZE;
 476                 } else {
 477                         return -1;
 478                 }
 479         }
 480
 481         if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
 482                 ret = dpaa2_setup_flow_dist(dev,
 483                                 eth_conf->rx_adv_conf.rss_conf.rss_hf);
 484                 if (ret) {
 485                         DPAA2_PMD_ERR("Unable to set flow distribution."
 486                                       "Check queue config");
 487                         return ret;
 488                 }
 489         }
 490
 491         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 492                 rx_l3_csum_offload = true;
 493
 494         if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
 495                 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
 496                 (rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 497                 rx_l4_csum_offload = true;
 498
 499         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 500                                DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
 501         if (ret) {
 502                 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
 503                 return ret;
 504         }
 505
 506         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 507                                DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
 508         if (ret) {
 509                 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
 510                 return ret;
 511         }
 512
 513         if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
 514                 dpaa2_enable_ts = true;
 515
 516         if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 517                 tx_l3_csum_offload = true;
 518
 519         if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
 520                 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
 521                 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
 522                 tx_l4_csum_offload = true;
 523
 524         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 525                                DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
 526         if (ret) {
 527                 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
 528                 return ret;
 529         }
 530
 531         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 532                                DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
 533         if (ret) {
 534                 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
 535                 return ret;
 536         }
 537
 538         /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
 539          * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
 540          * to 0 for LS2 in the hardware thus disabling data/annotation
 541          * stashing. For LX2 this is fixed in hardware and thus hash result and
 542          * parse results can be received in FD using this option.
 543          */
 544         if (dpaa2_svr_family == SVR_LX2160A) {
 545                 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 546                                        DPNI_FLCTYPE_HASH, true);
 547                 if (ret) {
 548                         DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
 549                         return ret;
 550                 }
 551         }
 552
 553         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 554                 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
 555
 556         return 0;
 557 }
 558
 559 /* Function to setup RX flow information. It contains traffic class ID,
 560  * flow ID, destination configuration etc.
 561  */
 562 static int
 563 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 564                          uint16_t rx_queue_id,
 565                          uint16_t nb_rx_desc,
 566                          unsigned int socket_id __rte_unused,
 567                          const struct rte_eth_rxconf *rx_conf __rte_unused,
 568                          struct rte_mempool *mb_pool)
 569 {
 570         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 571         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 572         struct dpaa2_queue *dpaa2_q;
 573         struct dpni_queue cfg;
 574         uint8_t options = 0;
 575         uint8_t flow_id;
 576         uint32_t bpid;
 577         int i, ret;
 578
 579         PMD_INIT_FUNC_TRACE();
 580
 581         DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
 582                         dev, rx_queue_id, mb_pool, rx_conf);
 583
 584         if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
 585                 bpid = mempool_to_bpid(mb_pool);
 586                 ret = dpaa2_attach_bp_list(priv,
 587                                            rte_dpaa2_bpid_info[bpid].bp_list);
 588                 if (ret)
 589                         return ret;
 590         }
 591         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 592         dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
 593         dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 594
 595         /*Get the flow id from given VQ id*/
 596         flow_id = dpaa2_q->flow_id;
 597         memset(&cfg, 0, sizeof(struct dpni_queue));
 598
 599         options = options | DPNI_QUEUE_OPT_USER_CTX;
 600         cfg.user_context = (size_t)(dpaa2_q);
 601
 602         /* check if a private cgr available. */
 603         for (i = 0; i < priv->max_cgs; i++) {
 604                 if (!priv->cgid_in_use[i]) {
 605                         priv->cgid_in_use[i] = 1;
 606                         break;
 607                 }
 608         }
 609
 610         if (i < priv->max_cgs) {
 611                 options |= DPNI_QUEUE_OPT_SET_CGID;
 612                 cfg.cgid = i;
 613                 dpaa2_q->cgid = cfg.cgid;
 614         } else {
 615                 dpaa2_q->cgid = 0xff;
 616         }
 617
 618         /*if ls2088 or rev2 device, enable the stashing */
 619
 620         if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
 621                 options |= DPNI_QUEUE_OPT_FLC;
 622                 cfg.flc.stash_control = true;
 623                 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
 624                 /* 00 00 00 - last 6 bit represent annotation, context stashing,
 625                  * data stashing setting 01 01 00 (0x14)
 626                  * (in following order ->DS AS CS)
 627                  * to enable 1 line data, 1 line annotation.
 628                  * For LX2, this setting should be 01 00 00 (0x10)
 629                  */
 630                 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
 631                         cfg.flc.value |= 0x10;
 632                 else
 633                         cfg.flc.value |= 0x14;
 634         }
 635         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 636                              dpaa2_q->tc_index, flow_id, options, &cfg);
 637         if (ret) {
 638                 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
 639                 return -1;
 640         }
 641
 642         if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
 643                 struct dpni_taildrop taildrop;
 644
 645                 taildrop.enable = 1;
 646
 647                 /* Private CGR will use tail drop length as nb_rx_desc.
 648                  * for rest cases we can use standard byte based tail drop.
 649                  * There is no HW restriction, but number of CGRs are limited,
 650                  * hence this restriction is placed.
 651                  */
 652                 if (dpaa2_q->cgid != 0xff) {
 653                         /*enabling per rx queue congestion control */
 654                         taildrop.threshold = nb_rx_desc;
 655                         taildrop.units = DPNI_CONGESTION_UNIT_FRAMES;
 656                         taildrop.oal = 0;
 657                         DPAA2_PMD_DEBUG("Enabling CG Tail Drop on queue = %d",
 658                                         rx_queue_id);
 659                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 660                                                 DPNI_CP_CONGESTION_GROUP,
 661                                                 DPNI_QUEUE_RX,
 662                                                 dpaa2_q->tc_index,
 663                                                 flow_id, &taildrop);
 664                 } else {
 665                         /*enabling per rx queue congestion control */
 666                         taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
 667                         taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
 668                         taildrop.oal = CONG_RX_OAL;
 669                         DPAA2_PMD_DEBUG("Enabling Byte based Drop on queue= %d",
 670                                         rx_queue_id);
 671                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 672                                                 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 673                                                 dpaa2_q->tc_index, flow_id,
 674                                                 &taildrop);
 675                 }
 676                 if (ret) {
 677                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 678                                       ret);
 679                         return -1;
 680                 }
 681         } else { /* Disable tail Drop */
 682                 struct dpni_taildrop taildrop = {0};
 683                 DPAA2_PMD_INFO("Tail drop is disabled on queue");
 684
 685                 taildrop.enable = 0;
 686                 if (dpaa2_q->cgid != 0xff) {
 687                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 688                                         DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
 689                                         dpaa2_q->tc_index,
 690                                         flow_id, &taildrop);
 691                 } else {
 692                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 693                                         DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 694                                         dpaa2_q->tc_index, flow_id, &taildrop);
 695                 }
 696                 if (ret) {
 697                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 698                                       ret);
 699                         return -1;
 700                 }
 701         }
 702
 703         dev->data->rx_queues[rx_queue_id] = dpaa2_q;
 704         return 0;
 705 }
 706
 707 static int
 708 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 709                          uint16_t tx_queue_id,
 710                          uint16_t nb_tx_desc __rte_unused,
 711                          unsigned int socket_id __rte_unused,
 712                          const struct rte_eth_txconf *tx_conf __rte_unused)
 713 {
 714         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 715         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 716                 priv->tx_vq[tx_queue_id];
 717         struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
 718                 priv->tx_conf_vq[tx_queue_id];
 719         struct fsl_mc_io *dpni = dev->process_private;
 720         struct dpni_queue tx_conf_cfg;
 721         struct dpni_queue tx_flow_cfg;
 722         uint8_t options = 0, flow_id;
 723         struct dpni_queue_id qid;
 724         uint32_t tc_id;
 725         int ret;
 726
 727         PMD_INIT_FUNC_TRACE();
 728
 729         /* Return if queue already configured */
 730         if (dpaa2_q->flow_id != 0xffff) {
 731                 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 732                 return 0;
 733         }
 734
 735         memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 736         memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 737
 738         tc_id = tx_queue_id;
 739         flow_id = 0;
 740
 741         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
 742                              tc_id, flow_id, options, &tx_flow_cfg);
 743         if (ret) {
 744                 DPAA2_PMD_ERR("Error in setting the tx flow: "
 745                               "tc_id=%d, flow=%d err=%d",
 746                               tc_id, flow_id, ret);
 747                         return -1;
 748         }
 749
 750         dpaa2_q->flow_id = flow_id;
 751
 752         if (tx_queue_id == 0) {
 753                 /*Set tx-conf and error configuration*/
 754                 if (priv->tx_conf_en)
 755                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 756                                                             priv->token,
 757                                                             DPNI_CONF_AFFINE);
 758                 else
 759                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 760                                                             priv->token,
 761                                                             DPNI_CONF_DISABLE);
 762                 if (ret) {
 763                         DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 764                                       "err=%d", ret);
 765                         return -1;
 766                 }
 767         }
 768         dpaa2_q->tc_index = tc_id;
 769
 770         ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 771                              DPNI_QUEUE_TX, dpaa2_q->tc_index,
 772                              dpaa2_q->flow_id, &tx_flow_cfg, &qid);
 773         if (ret) {
 774                 DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 775                 return -1;
 776         }
 777         dpaa2_q->fqid = qid.fqid;
 778
 779         if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 780                 struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 781
 782                 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 783                 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
 784                 /* Notify that the queue is not congested when the data in
 785                  * the queue is below this thershold.
 786                  */
 787                 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
 788                 cong_notif_cfg.message_ctx = 0;
 789                 cong_notif_cfg.message_iova =
 790                                 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
 791                 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
 792                 cong_notif_cfg.notification_mode =
 793                                          DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
 794                                          DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
 795                                          DPNI_CONG_OPT_COHERENT_WRITE;
 796                 cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
 797
 798                 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
 799                                                        priv->token,
 800                                                        DPNI_QUEUE_TX,
 801                                                        tc_id,
 802                                                        &cong_notif_cfg);
 803                 if (ret) {
 804                         DPAA2_PMD_ERR(
 805                            "Error in setting tx congestion notification: "
 806                            "err=%d", ret);
 807                         return -ret;
 808                 }
 809         }
 810         dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 811         dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 812
 813         if (priv->tx_conf_en) {
 814                 dpaa2_q->tx_conf_queue = dpaa2_tx_conf_q;
 815                 options = options | DPNI_QUEUE_OPT_USER_CTX;
 816                 tx_conf_cfg.user_context = (size_t)(dpaa2_q);
 817                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 818                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 819                              dpaa2_tx_conf_q->flow_id, options, &tx_conf_cfg);
 820                 if (ret) {
 821                         DPAA2_PMD_ERR("Error in setting the tx conf flow: "
 822                               "tc_index=%d, flow=%d err=%d",
 823                               dpaa2_tx_conf_q->tc_index,
 824                               dpaa2_tx_conf_q->flow_id, ret);
 825                         return -1;
 826                 }
 827
 828                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 829                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 830                              dpaa2_tx_conf_q->flow_id, &tx_conf_cfg, &qid);
 831                 if (ret) {
 832                         DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 833                         return -1;
 834                 }
 835                 dpaa2_tx_conf_q->fqid = qid.fqid;
 836         }
 837         return 0;
 838 }
 839
 840 static void
 841 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 842 {
 843         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
 844         struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
 845         struct fsl_mc_io *dpni =
 846                 (struct fsl_mc_io *)priv->eth_dev->process_private;
 847         uint8_t options = 0;
 848         int ret;
 849         struct dpni_queue cfg;
 850
 851         memset(&cfg, 0, sizeof(struct dpni_queue));
 852         PMD_INIT_FUNC_TRACE();
 853         if (dpaa2_q->cgid != 0xff) {
 854                 options = DPNI_QUEUE_OPT_CLEAR_CGID;
 855                 cfg.cgid = dpaa2_q->cgid;
 856
 857                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 858                                      DPNI_QUEUE_RX,
 859                                      dpaa2_q->tc_index, dpaa2_q->flow_id,
 860                                      options, &cfg);
 861                 if (ret)
 862                         DPAA2_PMD_ERR("Unable to clear CGR from q=%u err=%d",
 863                                         dpaa2_q->fqid, ret);
 864                 priv->cgid_in_use[dpaa2_q->cgid] = 0;
 865                 dpaa2_q->cgid = 0xff;
 866         }
 867 }
 868
 869 static void
 870 dpaa2_dev_tx_queue_release(void *q __rte_unused)
 871 {
 872         PMD_INIT_FUNC_TRACE();
 873 }
 874
 875 static uint32_t
 876 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 877 {
 878         int32_t ret;
 879         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 880         struct dpaa2_queue *dpaa2_q;
 881         struct qbman_swp *swp;
 882         struct qbman_fq_query_np_rslt state;
 883         uint32_t frame_cnt = 0;
 884
 885         PMD_INIT_FUNC_TRACE();
 886
 887         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 888                 ret = dpaa2_affine_qbman_swp();
 889                 if (ret) {
 890                         DPAA2_PMD_ERR("Failure in affining portal");
 891                         return -EINVAL;
 892                 }
 893         }
 894         swp = DPAA2_PER_LCORE_PORTAL;
 895
 896         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 897
 898         if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
 899                 frame_cnt = qbman_fq_state_frame_count(&state);
 900                 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
 901                                 rx_queue_id, frame_cnt);
 902         }
 903         return frame_cnt;
 904 }
 905
 906 static const uint32_t *
 907 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 908 {
 909         static const uint32_t ptypes[] = {
 910                 /*todo -= add more types */
 911                 RTE_PTYPE_L2_ETHER,
 912                 RTE_PTYPE_L3_IPV4,
 913                 RTE_PTYPE_L3_IPV4_EXT,
 914                 RTE_PTYPE_L3_IPV6,
 915                 RTE_PTYPE_L3_IPV6_EXT,
 916                 RTE_PTYPE_L4_TCP,
 917                 RTE_PTYPE_L4_UDP,
 918                 RTE_PTYPE_L4_SCTP,
 919                 RTE_PTYPE_L4_ICMP,
 920                 RTE_PTYPE_UNKNOWN
 921         };
 922
 923         if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
 924                 dev->rx_pkt_burst == dpaa2_dev_rx ||
 925                 dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 926                 return ptypes;
 927         return NULL;
 928 }
 929
 930 /**
 931  * Dpaa2 link Interrupt handler
 932  *
 933  * @param param
 934  *  The address of parameter (struct rte_eth_dev *) regsitered before.
 935  *
 936  * @return
 937  *  void
 938  */
 939 static void
 940 dpaa2_interrupt_handler(void *param)
 941 {
 942         struct rte_eth_dev *dev = param;
 943         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 944         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 945         int ret;
 946         int irq_index = DPNI_IRQ_INDEX;
 947         unsigned int status = 0, clear = 0;
 948
 949         PMD_INIT_FUNC_TRACE();
 950
 951         if (dpni == NULL) {
 952                 DPAA2_PMD_ERR("dpni is NULL");
 953                 return;
 954         }
 955
 956         ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
 957                                   irq_index, &status);
 958         if (unlikely(ret)) {
 959                 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
 960                 clear = 0xffffffff;
 961                 goto out;
 962         }
 963
 964         if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
 965                 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
 966                 dpaa2_dev_link_update(dev, 0);
 967                 /* calling all the apps registered for link status event */
 968                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
 969                                               NULL);
 970         }
 971 out:
 972         ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
 973                                     irq_index, clear);
 974         if (unlikely(ret))
 975                 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
 976 }
 977
 978 static int
 979 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 980 {
 981         int err = 0;
 982         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 983         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 984         int irq_index = DPNI_IRQ_INDEX;
 985         unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 986
 987         PMD_INIT_FUNC_TRACE();
 988
 989         err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
 990                                 irq_index, mask);
 991         if (err < 0) {
 992                 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
 993                               strerror(-err));
 994                 return err;
 995         }
 996
 997         err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
 998                                   irq_index, enable);
 999         if (err < 0)
1000                 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
1001                               strerror(-err));
1002
1003         return err;
1004 }
1005
1006 static int
1007 dpaa2_dev_start(struct rte_eth_dev *dev)
1008 {
1009         struct rte_device *rdev = dev->device;
1010         struct rte_dpaa2_device *dpaa2_dev;
1011         struct rte_eth_dev_data *data = dev->data;
1012         struct dpaa2_dev_priv *priv = data->dev_private;
1013         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1014         struct dpni_queue cfg;
1015         struct dpni_error_cfg   err_cfg;
1016         uint16_t qdid;
1017         struct dpni_queue_id qid;
1018         struct dpaa2_queue *dpaa2_q;
1019         int ret, i;
1020         struct rte_intr_handle *intr_handle;
1021
1022         dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
1023         intr_handle = &dpaa2_dev->intr_handle;
1024
1025         PMD_INIT_FUNC_TRACE();
1026
1027         ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1028         if (ret) {
1029                 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
1030                               priv->hw_id, ret);
1031                 return ret;
1032         }
1033
1034         /* Power up the phy. Needed to make the link go UP */
1035         dpaa2_dev_set_link_up(dev);
1036
1037         ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
1038                             DPNI_QUEUE_TX, &qdid);
1039         if (ret) {
1040                 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
1041                 return ret;
1042         }
1043         priv->qdid = qdid;
1044
1045         for (i = 0; i < data->nb_rx_queues; i++) {
1046                 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
1047                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
1048                                      DPNI_QUEUE_RX, dpaa2_q->tc_index,
1049                                        dpaa2_q->flow_id, &cfg, &qid);
1050                 if (ret) {
1051                         DPAA2_PMD_ERR("Error in getting flow information: "
1052                                       "err=%d", ret);
1053                         return ret;
1054                 }
1055                 dpaa2_q->fqid = qid.fqid;
1056         }
1057
1058         /*checksum errors, send them to normal path and set it in annotation */
1059         err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
1060         err_cfg.errors |= DPNI_ERROR_PHE;
1061
1062         err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
1063         err_cfg.set_frame_annotation = true;
1064
1065         ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
1066                                        priv->token, &err_cfg);
1067         if (ret) {
1068                 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
1069                               ret);
1070                 return ret;
1071         }
1072
1073         /* if the interrupts were configured on this devices*/
1074         if (intr_handle && (intr_handle->fd) &&
1075             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1076                 /* Registering LSC interrupt handler */
1077                 rte_intr_callback_register(intr_handle,
1078                                            dpaa2_interrupt_handler,
1079                                            (void *)dev);
1080
1081                 /* enable vfio intr/eventfd mapping
1082                  * Interrupt index 0 is required, so we can not use
1083                  * rte_intr_enable.
1084                  */
1085                 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
1086
1087                 /* enable dpni_irqs */
1088                 dpaa2_eth_setup_irqs(dev, 1);
1089         }
1090
1091         /* Change the tx burst function if ordered queues are used */
1092         if (priv->en_ordered)
1093                 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
1094
1095         return 0;
1096 }
1097
1098 /**
1099  *  This routine disables all traffic on the adapter by issuing a
1100  *  global reset on the MAC.
1101  */
1102 static void
1103 dpaa2_dev_stop(struct rte_eth_dev *dev)
1104 {
1105         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1106         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1107         int ret;
1108         struct rte_eth_link link;
1109         struct rte_intr_handle *intr_handle = dev->intr_handle;
1110
1111         PMD_INIT_FUNC_TRACE();
1112
1113         /* reset interrupt callback  */
1114         if (intr_handle && (intr_handle->fd) &&
1115             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1116                 /*disable dpni irqs */
1117                 dpaa2_eth_setup_irqs(dev, 0);
1118
1119                 /* disable vfio intr before callback unregister */
1120                 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
1121
1122                 /* Unregistering LSC interrupt handler */
1123                 rte_intr_callback_unregister(intr_handle,
1124                                              dpaa2_interrupt_handler,
1125                                              (void *)dev);
1126         }
1127
1128         dpaa2_dev_set_link_down(dev);
1129
1130         ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
1131         if (ret) {
1132                 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
1133                               ret, priv->hw_id);
1134                 return;
1135         }
1136
1137         /* clear the recorded link status */
1138         memset(&link, 0, sizeof(link));
1139         rte_eth_linkstatus_set(dev, &link);
1140 }
1141
1142 static void
1143 dpaa2_dev_close(struct rte_eth_dev *dev)
1144 {
1145         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1146         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1147         int ret;
1148         struct rte_eth_link link;
1149
1150         PMD_INIT_FUNC_TRACE();
1151
1152         dpaa2_flow_clean(dev);
1153
1154         /* Clean the device first */
1155         ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
1156         if (ret) {
1157                 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
1158                 return;
1159         }
1160
1161         memset(&link, 0, sizeof(link));
1162         rte_eth_linkstatus_set(dev, &link);
1163 }
1164
1165 static int
1166 dpaa2_dev_promiscuous_enable(
1167                 struct rte_eth_dev *dev)
1168 {
1169         int ret;
1170         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1171         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1172
1173         PMD_INIT_FUNC_TRACE();
1174
1175         if (dpni == NULL) {
1176                 DPAA2_PMD_ERR("dpni is NULL");
1177                 return -ENODEV;
1178         }
1179
1180         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1181         if (ret < 0)
1182                 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
1183
1184         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1185         if (ret < 0)
1186                 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1187
1188         return ret;
1189 }
1190
1191 static int
1192 dpaa2_dev_promiscuous_disable(
1193                 struct rte_eth_dev *dev)
1194 {
1195         int ret;
1196         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1197         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1198
1199         PMD_INIT_FUNC_TRACE();
1200
1201         if (dpni == NULL) {
1202                 DPAA2_PMD_ERR("dpni is NULL");
1203                 return -ENODEV;
1204         }
1205
1206         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1207         if (ret < 0)
1208                 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1209
1210         if (dev->data->all_multicast == 0) {
1211                 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1212                                                  priv->token, false);
1213                 if (ret < 0)
1214                         DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1215                                       ret);
1216         }
1217
1218         return ret;
1219 }
1220
1221 static int
1222 dpaa2_dev_allmulticast_enable(
1223                 struct rte_eth_dev *dev)
1224 {
1225         int ret;
1226         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1227         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1228
1229         PMD_INIT_FUNC_TRACE();
1230
1231         if (dpni == NULL) {
1232                 DPAA2_PMD_ERR("dpni is NULL");
1233                 return -ENODEV;
1234         }
1235
1236         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1237         if (ret < 0)
1238                 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1239
1240         return ret;
1241 }
1242
1243 static int
1244 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1245 {
1246         int ret;
1247         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1248         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1249
1250         PMD_INIT_FUNC_TRACE();
1251
1252         if (dpni == NULL) {
1253                 DPAA2_PMD_ERR("dpni is NULL");
1254                 return -ENODEV;
1255         }
1256
1257         /* must remain on for all promiscuous */
1258         if (dev->data->promiscuous == 1)
1259                 return 0;
1260
1261         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1262         if (ret < 0)
1263                 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1264
1265         return ret;
1266 }
1267
1268 static int
1269 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1270 {
1271         int ret;
1272         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1273         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1274         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1275                                 + VLAN_TAG_SIZE;
1276
1277         PMD_INIT_FUNC_TRACE();
1278
1279         if (dpni == NULL) {
1280                 DPAA2_PMD_ERR("dpni is NULL");
1281                 return -EINVAL;
1282         }
1283
1284         /* check that mtu is within the allowed range */
1285         if (mtu < RTE_ETHER_MIN_MTU || frame_size > DPAA2_MAX_RX_PKT_LEN)
1286                 return -EINVAL;
1287
1288         if (frame_size > RTE_ETHER_MAX_LEN)
1289                 dev->data->dev_conf.rxmode.offloads |=
1290                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
1291         else
1292                 dev->data->dev_conf.rxmode.offloads &=
1293                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1294
1295         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1296
1297         /* Set the Max Rx frame length as 'mtu' +
1298          * Maximum Ethernet header length
1299          */
1300         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1301                                         frame_size - RTE_ETHER_CRC_LEN);
1302         if (ret) {
1303                 DPAA2_PMD_ERR("Setting the max frame length failed");
1304                 return -1;
1305         }
1306         DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1307         return 0;
1308 }
1309
1310 static int
1311 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1312                        struct rte_ether_addr *addr,
1313                        __rte_unused uint32_t index,
1314                        __rte_unused uint32_t pool)
1315 {
1316         int ret;
1317         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1318         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1319
1320         PMD_INIT_FUNC_TRACE();
1321
1322         if (dpni == NULL) {
1323                 DPAA2_PMD_ERR("dpni is NULL");
1324                 return -1;
1325         }
1326
1327         ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW, priv->token,
1328                                 addr->addr_bytes, 0, 0, 0);
1329         if (ret)
1330                 DPAA2_PMD_ERR(
1331                         "error: Adding the MAC ADDR failed: err = %d", ret);
1332         return 0;
1333 }
1334
1335 static void
1336 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1337                           uint32_t index)
1338 {
1339         int ret;
1340         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1341         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1342         struct rte_eth_dev_data *data = dev->data;
1343         struct rte_ether_addr *macaddr;
1344
1345         PMD_INIT_FUNC_TRACE();
1346
1347         macaddr = &data->mac_addrs[index];
1348
1349         if (dpni == NULL) {
1350                 DPAA2_PMD_ERR("dpni is NULL");
1351                 return;
1352         }
1353
1354         ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1355                                    priv->token, macaddr->addr_bytes);
1356         if (ret)
1357                 DPAA2_PMD_ERR(
1358                         "error: Removing the MAC ADDR failed: err = %d", ret);
1359 }
1360
1361 static int
1362 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1363                        struct rte_ether_addr *addr)
1364 {
1365         int ret;
1366         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1367         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1368
1369         PMD_INIT_FUNC_TRACE();
1370
1371         if (dpni == NULL) {
1372                 DPAA2_PMD_ERR("dpni is NULL");
1373                 return -EINVAL;
1374         }
1375
1376         ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1377                                         priv->token, addr->addr_bytes);
1378
1379         if (ret)
1380                 DPAA2_PMD_ERR(
1381                         "error: Setting the MAC ADDR failed %d", ret);
1382
1383         return ret;
1384 }
1385
1386 static
1387 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1388                          struct rte_eth_stats *stats)
1389 {
1390         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1391         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1392         int32_t  retcode;
1393         uint8_t page0 = 0, page1 = 1, page2 = 2;
1394         union dpni_statistics value;
1395         int i;
1396         struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1397
1398         memset(&value, 0, sizeof(union dpni_statistics));
1399
1400         PMD_INIT_FUNC_TRACE();
1401
1402         if (!dpni) {
1403                 DPAA2_PMD_ERR("dpni is NULL");
1404                 return -EINVAL;
1405         }
1406
1407         if (!stats) {
1408                 DPAA2_PMD_ERR("stats is NULL");
1409                 return -EINVAL;
1410         }
1411
1412         /*Get Counters from page_0*/
1413         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1414                                       page0, 0, &value);
1415         if (retcode)
1416                 goto err;
1417
1418         stats->ipackets = value.page_0.ingress_all_frames;
1419         stats->ibytes = value.page_0.ingress_all_bytes;
1420
1421         /*Get Counters from page_1*/
1422         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1423                                       page1, 0, &value);
1424         if (retcode)
1425                 goto err;
1426
1427         stats->opackets = value.page_1.egress_all_frames;
1428         stats->obytes = value.page_1.egress_all_bytes;
1429
1430         /*Get Counters from page_2*/
1431         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1432                                       page2, 0, &value);
1433         if (retcode)
1434                 goto err;
1435
1436         /* Ingress drop frame count due to configured rules */
1437         stats->ierrors = value.page_2.ingress_filtered_frames;
1438         /* Ingress drop frame count due to error */
1439         stats->ierrors += value.page_2.ingress_discarded_frames;
1440
1441         stats->oerrors = value.page_2.egress_discarded_frames;
1442         stats->imissed = value.page_2.ingress_nobuffer_discards;
1443
1444         /* Fill in per queue stats */
1445         for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1446                 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1447                 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1448                 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1449                 if (dpaa2_rxq)
1450                         stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1451                 if (dpaa2_txq)
1452                         stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1453
1454                 /* Byte counting is not implemented */
1455                 stats->q_ibytes[i]   = 0;
1456                 stats->q_obytes[i]   = 0;
1457         }
1458
1459         return 0;
1460
1461 err:
1462         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1463         return retcode;
1464 };
1465
1466 static int
1467 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1468                      unsigned int n)
1469 {
1470         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1471         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1472         int32_t  retcode;
1473         union dpni_statistics value[5] = {};
1474         unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1475
1476         if (n < num)
1477                 return num;
1478
1479         if (xstats == NULL)
1480                 return 0;
1481
1482         /* Get Counters from page_0*/
1483         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1484                                       0, 0, &value[0]);
1485         if (retcode)
1486                 goto err;
1487
1488         /* Get Counters from page_1*/
1489         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1490                                       1, 0, &value[1]);
1491         if (retcode)
1492                 goto err;
1493
1494         /* Get Counters from page_2*/
1495         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1496                                       2, 0, &value[2]);
1497         if (retcode)
1498                 goto err;
1499
1500         for (i = 0; i < priv->max_cgs; i++) {
1501                 if (!priv->cgid_in_use[i]) {
1502                         /* Get Counters from page_4*/
1503                         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
1504                                                       priv->token,
1505                                                       4, 0, &value[4]);
1506                         if (retcode)
1507                                 goto err;
1508                         break;
1509                 }
1510         }
1511
1512         for (i = 0; i < num; i++) {
1513                 xstats[i].id = i;
1514                 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1515                         raw.counter[dpaa2_xstats_strings[i].stats_id];
1516         }
1517         return i;
1518 err:
1519         DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1520         return retcode;
1521 }
1522
1523 static int
1524 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1525                        struct rte_eth_xstat_name *xstats_names,
1526                        unsigned int limit)
1527 {
1528         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1529
1530         if (limit < stat_cnt)
1531                 return stat_cnt;
1532
1533         if (xstats_names != NULL)
1534                 for (i = 0; i < stat_cnt; i++)
1535                         strlcpy(xstats_names[i].name,
1536                                 dpaa2_xstats_strings[i].name,
1537                                 sizeof(xstats_names[i].name));
1538
1539         return stat_cnt;
1540 }
1541
1542 static int
1543 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1544                        uint64_t *values, unsigned int n)
1545 {
1546         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1547         uint64_t values_copy[stat_cnt];
1548
1549         if (!ids) {
1550                 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1551                 struct fsl_mc_io *dpni =
1552                         (struct fsl_mc_io *)dev->process_private;
1553                 int32_t  retcode;
1554                 union dpni_statistics value[5] = {};
1555
1556                 if (n < stat_cnt)
1557                         return stat_cnt;
1558
1559                 if (!values)
1560                         return 0;
1561
1562                 /* Get Counters from page_0*/
1563                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1564                                               0, 0, &value[0]);
1565                 if (retcode)
1566                         return 0;
1567
1568                 /* Get Counters from page_1*/
1569                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1570                                               1, 0, &value[1]);
1571                 if (retcode)
1572                         return 0;
1573
1574                 /* Get Counters from page_2*/
1575                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1576                                               2, 0, &value[2]);
1577                 if (retcode)
1578                         return 0;
1579
1580                 /* Get Counters from page_4*/
1581                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1582                                               4, 0, &value[4]);
1583                 if (retcode)
1584                         return 0;
1585
1586                 for (i = 0; i < stat_cnt; i++) {
1587                         values[i] = value[dpaa2_xstats_strings[i].page_id].
1588                                 raw.counter[dpaa2_xstats_strings[i].stats_id];
1589                 }
1590                 return stat_cnt;
1591         }
1592
1593         dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1594
1595         for (i = 0; i < n; i++) {
1596                 if (ids[i] >= stat_cnt) {
1597                         DPAA2_PMD_ERR("xstats id value isn't valid");
1598                         return -1;
1599                 }
1600                 values[i] = values_copy[ids[i]];
1601         }
1602         return n;
1603 }
1604
1605 static int
1606 dpaa2_xstats_get_names_by_id(
1607         struct rte_eth_dev *dev,
1608         struct rte_eth_xstat_name *xstats_names,
1609         const uint64_t *ids,
1610         unsigned int limit)
1611 {
1612         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1613         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1614
1615         if (!ids)
1616                 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1617
1618         dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1619
1620         for (i = 0; i < limit; i++) {
1621                 if (ids[i] >= stat_cnt) {
1622                         DPAA2_PMD_ERR("xstats id value isn't valid");
1623                         return -1;
1624                 }
1625                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1626         }
1627         return limit;
1628 }
1629
1630 static int
1631 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1632 {
1633         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1634         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1635         int retcode;
1636         int i;
1637         struct dpaa2_queue *dpaa2_q;
1638
1639         PMD_INIT_FUNC_TRACE();
1640
1641         if (dpni == NULL) {
1642                 DPAA2_PMD_ERR("dpni is NULL");
1643                 return -EINVAL;
1644         }
1645
1646         retcode =  dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1647         if (retcode)
1648                 goto error;
1649
1650         /* Reset the per queue stats in dpaa2_queue structure */
1651         for (i = 0; i < priv->nb_rx_queues; i++) {
1652                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1653                 if (dpaa2_q)
1654                         dpaa2_q->rx_pkts = 0;
1655         }
1656
1657         for (i = 0; i < priv->nb_tx_queues; i++) {
1658                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1659                 if (dpaa2_q)
1660                         dpaa2_q->tx_pkts = 0;
1661         }
1662
1663         return 0;
1664
1665 error:
1666         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1667         return retcode;
1668 };
1669
1670 /* return 0 means link status changed, -1 means not changed */
1671 static int
1672 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1673                         int wait_to_complete __rte_unused)
1674 {
1675         int ret;
1676         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1677         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1678         struct rte_eth_link link;
1679         struct dpni_link_state state = {0};
1680
1681         if (dpni == NULL) {
1682                 DPAA2_PMD_ERR("dpni is NULL");
1683                 return 0;
1684         }
1685
1686         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1687         if (ret < 0) {
1688                 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1689                 return -1;
1690         }
1691
1692         memset(&link, 0, sizeof(struct rte_eth_link));
1693         link.link_status = state.up;
1694         link.link_speed = state.rate;
1695
1696         if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1697                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1698         else
1699                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1700
1701         ret = rte_eth_linkstatus_set(dev, &link);
1702         if (ret == -1)
1703                 DPAA2_PMD_DEBUG("No change in status");
1704         else
1705                 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1706                                link.link_status ? "Up" : "Down");
1707
1708         return ret;
1709 }
1710
1711 /**
1712  * Toggle the DPNI to enable, if not already enabled.
1713  * This is not strictly PHY up/down - it is more of logical toggling.
1714  */
1715 static int
1716 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1717 {
1718         int ret = -EINVAL;
1719         struct dpaa2_dev_priv *priv;
1720         struct fsl_mc_io *dpni;
1721         int en = 0;
1722         struct dpni_link_state state = {0};
1723
1724         priv = dev->data->dev_private;
1725         dpni = (struct fsl_mc_io *)dev->process_private;
1726
1727         if (dpni == NULL) {
1728                 DPAA2_PMD_ERR("dpni is NULL");
1729                 return ret;
1730         }
1731
1732         /* Check if DPNI is currently enabled */
1733         ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1734         if (ret) {
1735                 /* Unable to obtain dpni status; Not continuing */
1736                 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1737                 return -EINVAL;
1738         }
1739
1740         /* Enable link if not already enabled */
1741         if (!en) {
1742                 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1743                 if (ret) {
1744                         DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1745                         return -EINVAL;
1746                 }
1747         }
1748         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1749         if (ret < 0) {
1750                 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1751                 return -1;
1752         }
1753
1754         /* changing tx burst function to start enqueues */
1755         dev->tx_pkt_burst = dpaa2_dev_tx;
1756         dev->data->dev_link.link_status = state.up;
1757         dev->data->dev_link.link_speed = state.rate;
1758
1759         if (state.up)
1760                 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1761         else
1762                 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1763         return ret;
1764 }
1765
1766 /**
1767  * Toggle the DPNI to disable, if not already disabled.
1768  * This is not strictly PHY up/down - it is more of logical toggling.
1769  */
1770 static int
1771 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1772 {
1773         int ret = -EINVAL;
1774         struct dpaa2_dev_priv *priv;
1775         struct fsl_mc_io *dpni;
1776         int dpni_enabled = 0;
1777         int retries = 10;
1778
1779         PMD_INIT_FUNC_TRACE();
1780
1781         priv = dev->data->dev_private;
1782         dpni = (struct fsl_mc_io *)dev->process_private;
1783
1784         if (dpni == NULL) {
1785                 DPAA2_PMD_ERR("Device has not yet been configured");
1786                 return ret;
1787         }
1788
1789         /*changing  tx burst function to avoid any more enqueues */
1790         dev->tx_pkt_burst = dummy_dev_tx;
1791
1792         /* Loop while dpni_disable() attempts to drain the egress FQs
1793          * and confirm them back to us.
1794          */
1795         do {
1796                 ret = dpni_disable(dpni, 0, priv->token);
1797                 if (ret) {
1798                         DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1799                         return ret;
1800                 }
1801                 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1802                 if (ret) {
1803                         DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1804                         return ret;
1805                 }
1806                 if (dpni_enabled)
1807                         /* Allow the MC some slack */
1808                         rte_delay_us(100 * 1000);
1809         } while (dpni_enabled && --retries);
1810
1811         if (!retries) {
1812                 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1813                 /* todo- we may have to manually cleanup queues.
1814                  */
1815         } else {
1816                 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1817                                dev->data->port_id);
1818         }
1819
1820         dev->data->dev_link.link_status = 0;
1821
1822         return ret;
1823 }
1824
1825 static int
1826 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1827 {
1828         int ret = -EINVAL;
1829         struct dpaa2_dev_priv *priv;
1830         struct fsl_mc_io *dpni;
1831         struct dpni_link_state state = {0};
1832
1833         PMD_INIT_FUNC_TRACE();
1834
1835         priv = dev->data->dev_private;
1836         dpni = (struct fsl_mc_io *)dev->process_private;
1837
1838         if (dpni == NULL || fc_conf == NULL) {
1839                 DPAA2_PMD_ERR("device not configured");
1840                 return ret;
1841         }
1842
1843         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1844         if (ret) {
1845                 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1846                 return ret;
1847         }
1848
1849         memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1850         if (state.options & DPNI_LINK_OPT_PAUSE) {
1851                 /* DPNI_LINK_OPT_PAUSE set
1852                  *  if ASYM_PAUSE not set,
1853                  *      RX Side flow control (handle received Pause frame)
1854                  *      TX side flow control (send Pause frame)
1855                  *  if ASYM_PAUSE set,
1856                  *      RX Side flow control (handle received Pause frame)
1857                  *      No TX side flow control (send Pause frame disabled)
1858                  */
1859                 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1860                         fc_conf->mode = RTE_FC_FULL;
1861                 else
1862                         fc_conf->mode = RTE_FC_RX_PAUSE;
1863         } else {
1864                 /* DPNI_LINK_OPT_PAUSE not set
1865                  *  if ASYM_PAUSE set,
1866                  *      TX side flow control (send Pause frame)
1867                  *      No RX side flow control (No action on pause frame rx)
1868                  *  if ASYM_PAUSE not set,
1869                  *      Flow control disabled
1870                  */
1871                 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1872                         fc_conf->mode = RTE_FC_TX_PAUSE;
1873                 else
1874                         fc_conf->mode = RTE_FC_NONE;
1875         }
1876
1877         return ret;
1878 }
1879
1880 static int
1881 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1882 {
1883         int ret = -EINVAL;
1884         struct dpaa2_dev_priv *priv;
1885         struct fsl_mc_io *dpni;
1886         struct dpni_link_state state = {0};
1887         struct dpni_link_cfg cfg = {0};
1888
1889         PMD_INIT_FUNC_TRACE();
1890
1891         priv = dev->data->dev_private;
1892         dpni = (struct fsl_mc_io *)dev->process_private;
1893
1894         if (dpni == NULL) {
1895                 DPAA2_PMD_ERR("dpni is NULL");
1896                 return ret;
1897         }
1898
1899         /* It is necessary to obtain the current state before setting fc_conf
1900          * as MC would return error in case rate, autoneg or duplex values are
1901          * different.
1902          */
1903         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1904         if (ret) {
1905                 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1906                 return -1;
1907         }
1908
1909         /* Disable link before setting configuration */
1910         dpaa2_dev_set_link_down(dev);
1911
1912         /* Based on fc_conf, update cfg */
1913         cfg.rate = state.rate;
1914         cfg.options = state.options;
1915
1916         /* update cfg with fc_conf */
1917         switch (fc_conf->mode) {
1918         case RTE_FC_FULL:
1919                 /* Full flow control;
1920                  * OPT_PAUSE set, ASYM_PAUSE not set
1921                  */
1922                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1923                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1924                 break;
1925         case RTE_FC_TX_PAUSE:
1926                 /* Enable RX flow control
1927                  * OPT_PAUSE not set;
1928                  * ASYM_PAUSE set;
1929                  */
1930                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1931                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1932                 break;
1933         case RTE_FC_RX_PAUSE:
1934                 /* Enable TX Flow control
1935                  * OPT_PAUSE set
1936                  * ASYM_PAUSE set
1937                  */
1938                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1939                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1940                 break;
1941         case RTE_FC_NONE:
1942                 /* Disable Flow control
1943                  * OPT_PAUSE not set
1944                  * ASYM_PAUSE not set
1945                  */
1946                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1947                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1948                 break;
1949         default:
1950                 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1951                               fc_conf->mode);
1952                 return -1;
1953         }
1954
1955         ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1956         if (ret)
1957                 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1958                               ret);
1959
1960         /* Enable link */
1961         dpaa2_dev_set_link_up(dev);
1962
1963         return ret;
1964 }
1965
1966 static int
1967 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1968                           struct rte_eth_rss_conf *rss_conf)
1969 {
1970         struct rte_eth_dev_data *data = dev->data;
1971         struct rte_eth_conf *eth_conf = &data->dev_conf;
1972         int ret;
1973
1974         PMD_INIT_FUNC_TRACE();
1975
1976         if (rss_conf->rss_hf) {
1977                 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1978                 if (ret) {
1979                         DPAA2_PMD_ERR("Unable to set flow dist");
1980                         return ret;
1981                 }
1982         } else {
1983                 ret = dpaa2_remove_flow_dist(dev, 0);
1984                 if (ret) {
1985                         DPAA2_PMD_ERR("Unable to remove flow dist");
1986                         return ret;
1987                 }
1988         }
1989         eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1990         return 0;
1991 }
1992
1993 static int
1994 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1995                             struct rte_eth_rss_conf *rss_conf)
1996 {
1997         struct rte_eth_dev_data *data = dev->data;
1998         struct rte_eth_conf *eth_conf = &data->dev_conf;
1999
2000         /* dpaa2 does not support rss_key, so length should be 0*/
2001         rss_conf->rss_key_len = 0;
2002         rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
2003         return 0;
2004 }
2005
2006 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
2007                 int eth_rx_queue_id,
2008                 struct dpaa2_dpcon_dev *dpcon,
2009                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
2010 {
2011         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2012         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2013         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2014         uint8_t flow_id = dpaa2_ethq->flow_id;
2015         struct dpni_queue cfg;
2016         uint8_t options, priority;
2017         int ret;
2018
2019         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
2020                 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
2021         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
2022                 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
2023         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
2024                 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
2025         else
2026                 return -EINVAL;
2027
2028         priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / queue_conf->ev.priority) *
2029                    (dpcon->num_priorities - 1);
2030
2031         memset(&cfg, 0, sizeof(struct dpni_queue));
2032         options = DPNI_QUEUE_OPT_DEST;
2033         cfg.destination.type = DPNI_DEST_DPCON;
2034         cfg.destination.id = dpcon->dpcon_id;
2035         cfg.destination.priority = priority;
2036
2037         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
2038                 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
2039                 cfg.destination.hold_active = 1;
2040         }
2041
2042         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
2043                         !eth_priv->en_ordered) {
2044                 struct opr_cfg ocfg;
2045
2046                 /* Restoration window size = 256 frames */
2047                 ocfg.oprrws = 3;
2048                 /* Restoration window size = 512 frames for LX2 */
2049                 if (dpaa2_svr_family == SVR_LX2160A)
2050                         ocfg.oprrws = 4;
2051                 /* Auto advance NESN window enabled */
2052                 ocfg.oa = 1;
2053                 /* Late arrival window size disabled */
2054                 ocfg.olws = 0;
2055                 /* ORL resource exhaustaion advance NESN disabled */
2056                 ocfg.oeane = 0;
2057                 /* Loose ordering enabled */
2058                 ocfg.oloe = 1;
2059                 eth_priv->en_loose_ordered = 1;
2060                 /* Strict ordering enabled if explicitly set */
2061                 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
2062                         ocfg.oloe = 0;
2063                         eth_priv->en_loose_ordered = 0;
2064                 }
2065
2066                 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
2067                                    dpaa2_ethq->tc_index, flow_id,
2068                                    OPR_OPT_CREATE, &ocfg);
2069                 if (ret) {
2070                         DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
2071                         return ret;
2072                 }
2073
2074                 eth_priv->en_ordered = 1;
2075         }
2076
2077         options |= DPNI_QUEUE_OPT_USER_CTX;
2078         cfg.user_context = (size_t)(dpaa2_ethq);
2079
2080         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2081                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2082         if (ret) {
2083                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2084                 return ret;
2085         }
2086
2087         memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
2088
2089         return 0;
2090 }
2091
2092 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
2093                 int eth_rx_queue_id)
2094 {
2095         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2096         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2097         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2098         uint8_t flow_id = dpaa2_ethq->flow_id;
2099         struct dpni_queue cfg;
2100         uint8_t options;
2101         int ret;
2102
2103         memset(&cfg, 0, sizeof(struct dpni_queue));
2104         options = DPNI_QUEUE_OPT_DEST;
2105         cfg.destination.type = DPNI_DEST_NONE;
2106
2107         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2108                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2109         if (ret)
2110                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2111
2112         return ret;
2113 }
2114
2115 static inline int
2116 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op)
2117 {
2118         unsigned int i;
2119
2120         for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) {
2121                 if (dpaa2_supported_filter_ops[i] == filter_op)
2122                         return 0;
2123         }
2124         return -ENOTSUP;
2125 }
2126
2127 static int
2128 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
2129                     enum rte_filter_type filter_type,
2130                                  enum rte_filter_op filter_op,
2131                                  void *arg)
2132 {
2133         int ret = 0;
2134
2135         if (!dev)
2136                 return -ENODEV;
2137
2138         switch (filter_type) {
2139         case RTE_ETH_FILTER_GENERIC:
2140                 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) {
2141                         ret = -ENOTSUP;
2142                         break;
2143                 }
2144                 *(const void **)arg = &dpaa2_flow_ops;
2145                 dpaa2_filter_type |= filter_type;
2146                 break;
2147         default:
2148                 RTE_LOG(ERR, PMD, "Filter type (%d) not supported",
2149                         filter_type);
2150                 ret = -ENOTSUP;
2151                 break;
2152         }
2153         return ret;
2154 }
2155
2156 static struct eth_dev_ops dpaa2_ethdev_ops = {
2157         .dev_configure    = dpaa2_eth_dev_configure,
2158         .dev_start            = dpaa2_dev_start,
2159         .dev_stop             = dpaa2_dev_stop,
2160         .dev_close            = dpaa2_dev_close,
2161         .promiscuous_enable   = dpaa2_dev_promiscuous_enable,
2162         .promiscuous_disable  = dpaa2_dev_promiscuous_disable,
2163         .allmulticast_enable  = dpaa2_dev_allmulticast_enable,
2164         .allmulticast_disable = dpaa2_dev_allmulticast_disable,
2165         .dev_set_link_up      = dpaa2_dev_set_link_up,
2166         .dev_set_link_down    = dpaa2_dev_set_link_down,
2167         .link_update       = dpaa2_dev_link_update,
2168         .stats_get             = dpaa2_dev_stats_get,
2169         .xstats_get            = dpaa2_dev_xstats_get,
2170         .xstats_get_by_id     = dpaa2_xstats_get_by_id,
2171         .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
2172         .xstats_get_names      = dpaa2_xstats_get_names,
2173         .stats_reset       = dpaa2_dev_stats_reset,
2174         .xstats_reset         = dpaa2_dev_stats_reset,
2175         .fw_version_get    = dpaa2_fw_version_get,
2176         .dev_infos_get     = dpaa2_dev_info_get,
2177         .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
2178         .mtu_set           = dpaa2_dev_mtu_set,
2179         .vlan_filter_set      = dpaa2_vlan_filter_set,
2180         .vlan_offload_set     = dpaa2_vlan_offload_set,
2181         .vlan_tpid_set        = dpaa2_vlan_tpid_set,
2182         .rx_queue_setup    = dpaa2_dev_rx_queue_setup,
2183         .rx_queue_release  = dpaa2_dev_rx_queue_release,
2184         .tx_queue_setup    = dpaa2_dev_tx_queue_setup,
2185         .tx_queue_release  = dpaa2_dev_tx_queue_release,
2186         .rx_queue_count       = dpaa2_dev_rx_queue_count,
2187         .flow_ctrl_get        = dpaa2_flow_ctrl_get,
2188         .flow_ctrl_set        = dpaa2_flow_ctrl_set,
2189         .mac_addr_add         = dpaa2_dev_add_mac_addr,
2190         .mac_addr_remove      = dpaa2_dev_remove_mac_addr,
2191         .mac_addr_set         = dpaa2_dev_set_mac_addr,
2192         .rss_hash_update      = dpaa2_dev_rss_hash_update,
2193         .rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
2194         .filter_ctrl          = dpaa2_dev_flow_ctrl,
2195 #if defined(RTE_LIBRTE_IEEE1588)
2196         .timesync_enable      = dpaa2_timesync_enable,
2197         .timesync_disable     = dpaa2_timesync_disable,
2198         .timesync_read_time   = dpaa2_timesync_read_time,
2199         .timesync_write_time  = dpaa2_timesync_write_time,
2200         .timesync_adjust_time = dpaa2_timesync_adjust_time,
2201         .timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
2202         .timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
2203 #endif
2204 };
2205
2206 /* Populate the mac address from physically available (u-boot/firmware) and/or
2207  * one set by higher layers like MC (restool) etc.
2208  * Returns the table of MAC entries (multiple entries)
2209  */
2210 static int
2211 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
2212                   struct rte_ether_addr *mac_entry)
2213 {
2214         int ret;
2215         struct rte_ether_addr phy_mac, prime_mac;
2216
2217         memset(&phy_mac, 0, sizeof(struct rte_ether_addr));
2218         memset(&prime_mac, 0, sizeof(struct rte_ether_addr));
2219
2220         /* Get the physical device MAC address */
2221         ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2222                                      phy_mac.addr_bytes);
2223         if (ret) {
2224                 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
2225                 goto cleanup;
2226         }
2227
2228         ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2229                                         prime_mac.addr_bytes);
2230         if (ret) {
2231                 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
2232                 goto cleanup;
2233         }
2234
2235         /* Now that both MAC have been obtained, do:
2236          *  if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
2237          *     and return phy
2238          *  If empty_mac(phy), return prime.
2239          *  if both are empty, create random MAC, set as prime and return
2240          */
2241         if (!rte_is_zero_ether_addr(&phy_mac)) {
2242                 /* If the addresses are not same, overwrite prime */
2243                 if (!rte_is_same_ether_addr(&phy_mac, &prime_mac)) {
2244                         ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2245                                                         priv->token,
2246                                                         phy_mac.addr_bytes);
2247                         if (ret) {
2248                                 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
2249                                               ret);
2250                                 goto cleanup;
2251                         }
2252                         memcpy(&prime_mac, &phy_mac,
2253                                 sizeof(struct rte_ether_addr));
2254                 }
2255         } else if (rte_is_zero_ether_addr(&prime_mac)) {
2256                 /* In case phys and prime, both are zero, create random MAC */
2257                 rte_eth_random_addr(prime_mac.addr_bytes);
2258                 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2259                                                 priv->token,
2260                                                 prime_mac.addr_bytes);
2261                 if (ret) {
2262                         DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
2263                         goto cleanup;
2264                 }
2265         }
2266
2267         /* prime_mac the final MAC address */
2268         memcpy(mac_entry, &prime_mac, sizeof(struct rte_ether_addr));
2269         return 0;
2270
2271 cleanup:
2272         return -1;
2273 }
2274
2275 static int
2276 check_devargs_handler(__rte_unused const char *key, const char *value,
2277                       __rte_unused void *opaque)
2278 {
2279         if (strcmp(value, "1"))
2280                 return -1;
2281
2282         return 0;
2283 }
2284
2285 static int
2286 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2287 {
2288         struct rte_kvargs *kvlist;
2289
2290         if (!devargs)
2291                 return 0;
2292
2293         kvlist = rte_kvargs_parse(devargs->args, NULL);
2294         if (!kvlist)
2295                 return 0;
2296
2297         if (!rte_kvargs_count(kvlist, key)) {
2298                 rte_kvargs_free(kvlist);
2299                 return 0;
2300         }
2301
2302         if (rte_kvargs_process(kvlist, key,
2303                                check_devargs_handler, NULL) < 0) {
2304                 rte_kvargs_free(kvlist);
2305                 return 0;
2306         }
2307         rte_kvargs_free(kvlist);
2308
2309         return 1;
2310 }
2311
2312 static int
2313 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2314 {
2315         struct rte_device *dev = eth_dev->device;
2316         struct rte_dpaa2_device *dpaa2_dev;
2317         struct fsl_mc_io *dpni_dev;
2318         struct dpni_attr attr;
2319         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2320         struct dpni_buffer_layout layout;
2321         int ret, hw_id, i;
2322
2323         PMD_INIT_FUNC_TRACE();
2324
2325         dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2326         if (!dpni_dev) {
2327                 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2328                 return -1;
2329         }
2330         dpni_dev->regs = rte_mcp_ptr_list[0];
2331         eth_dev->process_private = (void *)dpni_dev;
2332
2333         /* For secondary processes, the primary has done all the work */
2334         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2335                 /* In case of secondary, only burst and ops API need to be
2336                  * plugged.
2337                  */
2338                 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2339                 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2340                         eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2341                 else if (dpaa2_get_devargs(dev->devargs,
2342                                         DRIVER_NO_PREFETCH_MODE))
2343                         eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2344                 else
2345                         eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2346                 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2347                 return 0;
2348         }
2349
2350         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2351
2352         hw_id = dpaa2_dev->object_id;
2353         ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2354         if (ret) {
2355                 DPAA2_PMD_ERR(
2356                              "Failure in opening dpni@%d with err code %d",
2357                              hw_id, ret);
2358                 rte_free(dpni_dev);
2359                 return -1;
2360         }
2361
2362         /* Clean the device first */
2363         ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2364         if (ret) {
2365                 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2366                               hw_id, ret);
2367                 goto init_err;
2368         }
2369
2370         ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2371         if (ret) {
2372                 DPAA2_PMD_ERR(
2373                              "Failure in get dpni@%d attribute, err code %d",
2374                              hw_id, ret);
2375                 goto init_err;
2376         }
2377
2378         priv->num_rx_tc = attr.num_rx_tcs;
2379         /* only if the custom CG is enabled */
2380         if (attr.options & DPNI_OPT_CUSTOM_CG)
2381                 priv->max_cgs = attr.num_cgs;
2382         else
2383                 priv->max_cgs = 0;
2384
2385         for (i = 0; i < priv->max_cgs; i++)
2386                 priv->cgid_in_use[i] = 0;
2387
2388         for (i = 0; i < attr.num_rx_tcs; i++)
2389                 priv->nb_rx_queues += attr.num_queues;
2390
2391         /* Using number of TX queues as number of TX TCs */
2392         priv->nb_tx_queues = attr.num_tx_tcs;
2393
2394         DPAA2_PMD_DEBUG("RX-TC= %d, rx_queues= %d, tx_queues=%d, max_cgs=%d",
2395                         priv->num_rx_tc, priv->nb_rx_queues,
2396                         priv->nb_tx_queues, priv->max_cgs);
2397
2398         priv->hw = dpni_dev;
2399         priv->hw_id = hw_id;
2400         priv->options = attr.options;
2401         priv->max_mac_filters = attr.mac_filter_entries;
2402         priv->max_vlan_filters = attr.vlan_filter_entries;
2403         priv->flags = 0;
2404 #if defined(RTE_LIBRTE_IEEE1588)
2405         priv->tx_conf_en = 1;
2406 #else
2407         priv->tx_conf_en = 0;
2408 #endif
2409
2410         /* Allocate memory for hardware structure for queues */
2411         ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2412         if (ret) {
2413                 DPAA2_PMD_ERR("Queue allocation Failed");
2414                 goto init_err;
2415         }
2416
2417         /* Allocate memory for storing MAC addresses.
2418          * Table of mac_filter_entries size is allocated so that RTE ether lib
2419          * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2420          */
2421         eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2422                 RTE_ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2423         if (eth_dev->data->mac_addrs == NULL) {
2424                 DPAA2_PMD_ERR(
2425                    "Failed to allocate %d bytes needed to store MAC addresses",
2426                    RTE_ETHER_ADDR_LEN * attr.mac_filter_entries);
2427                 ret = -ENOMEM;
2428                 goto init_err;
2429         }
2430
2431         ret = populate_mac_addr(dpni_dev, priv, &eth_dev->data->mac_addrs[0]);
2432         if (ret) {
2433                 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2434                 rte_free(eth_dev->data->mac_addrs);
2435                 eth_dev->data->mac_addrs = NULL;
2436                 goto init_err;
2437         }
2438
2439         /* ... tx buffer layout ... */
2440         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2441         if (priv->tx_conf_en) {
2442                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2443                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2444                 layout.pass_timestamp = true;
2445         } else {
2446                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2447         }
2448         layout.pass_frame_status = 1;
2449         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2450                                      DPNI_QUEUE_TX, &layout);
2451         if (ret) {
2452                 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2453                 goto init_err;
2454         }
2455
2456         /* ... tx-conf and error buffer layout ... */
2457         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2458         if (priv->tx_conf_en) {
2459                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2460                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2461                 layout.pass_timestamp = true;
2462         } else {
2463                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2464         }
2465         layout.pass_frame_status = 1;
2466         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2467                                      DPNI_QUEUE_TX_CONFIRM, &layout);
2468         if (ret) {
2469                 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2470                              ret);
2471                 goto init_err;
2472         }
2473
2474         eth_dev->dev_ops = &dpaa2_ethdev_ops;
2475
2476         if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2477                 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2478                 DPAA2_PMD_INFO("Loopback mode");
2479         } else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
2480                 eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2481                 DPAA2_PMD_INFO("No Prefetch mode");
2482         } else {
2483                 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2484         }
2485         eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2486
2487         /*Init fields w.r.t. classficaition*/
2488         memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg));
2489         priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64);
2490         if (!priv->extract.qos_extract_param) {
2491                 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow "
2492                             " classificaiton ", ret);
2493                 goto init_err;
2494         }
2495         for (i = 0; i < MAX_TCS; i++) {
2496                 memset(&priv->extract.fs_key_cfg[i], 0,
2497                         sizeof(struct dpkg_profile_cfg));
2498                 priv->extract.fs_extract_param[i] =
2499                         (size_t)rte_malloc(NULL, 256, 64);
2500                 if (!priv->extract.fs_extract_param[i]) {
2501                         DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton",
2502                                      ret);
2503                         goto init_err;
2504                 }
2505         }
2506
2507         ret = dpni_set_max_frame_length(dpni_dev, CMD_PRI_LOW, priv->token,
2508                                         RTE_ETHER_MAX_LEN - RTE_ETHER_CRC_LEN
2509                                         + VLAN_TAG_SIZE);
2510         if (ret) {
2511                 DPAA2_PMD_ERR("Unable to set mtu. check config");
2512                 goto init_err;
2513         }
2514
2515         /*TODO To enable soft parser support DPAA2 driver needs to integrate
2516          * with external entity to receive byte code for software sequence
2517          * and same will be offload to the H/W using MC interface.
2518          * Currently it is assumed that DPAA2 driver has byte code by some
2519          * mean and same if offloaded to H/W.
2520          */
2521         if (getenv("DPAA2_ENABLE_SOFT_PARSER")) {
2522                 WRIOP_SS_INITIALIZER(priv);
2523                 ret = dpaa2_eth_load_wriop_soft_parser(priv, DPNI_SS_INGRESS);
2524                 if (ret < 0) {
2525                         DPAA2_PMD_ERR(" Error(%d) in loading softparser\n",
2526                                       ret);
2527                         return ret;
2528                 }
2529
2530                 ret = dpaa2_eth_enable_wriop_soft_parser(priv,
2531                                                          DPNI_SS_INGRESS);
2532                 if (ret < 0) {
2533                         DPAA2_PMD_ERR(" Error(%d) in enabling softparser\n",
2534                                       ret);
2535                         return ret;
2536                 }
2537         }
2538         RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2539         return 0;
2540 init_err:
2541         dpaa2_dev_uninit(eth_dev);
2542         return ret;
2543 }
2544
2545 static int
2546 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2547 {
2548         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2549         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_dev->process_private;
2550         int i, ret;
2551
2552         PMD_INIT_FUNC_TRACE();
2553
2554         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2555                 return 0;
2556
2557         if (!dpni) {
2558                 DPAA2_PMD_WARN("Already closed or not started");
2559                 return -1;
2560         }
2561
2562         dpaa2_dev_close(eth_dev);
2563
2564         dpaa2_free_rx_tx_queues(eth_dev);
2565
2566         /* Close the device at underlying layer*/
2567         ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2568         if (ret) {
2569                 DPAA2_PMD_ERR(
2570                              "Failure closing dpni device with err code %d",
2571                              ret);
2572         }
2573
2574         /* Free the allocated memory for ethernet private data and dpni*/
2575         priv->hw = NULL;
2576         eth_dev->process_private = NULL;
2577         rte_free(dpni);
2578
2579         for (i = 0; i < MAX_TCS; i++) {
2580                 if (priv->extract.fs_extract_param[i])
2581                         rte_free((void *)(size_t)priv->extract.fs_extract_param[i]);
2582         }
2583
2584         if (priv->extract.qos_extract_param)
2585                 rte_free((void *)(size_t)priv->extract.qos_extract_param);
2586
2587         eth_dev->dev_ops = NULL;
2588         eth_dev->rx_pkt_burst = NULL;
2589         eth_dev->tx_pkt_burst = NULL;
2590
2591         DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2592         return 0;
2593 }
2594
2595 static int
2596 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2597                 struct rte_dpaa2_device *dpaa2_dev)
2598 {
2599         struct rte_eth_dev *eth_dev;
2600         struct dpaa2_dev_priv *dev_priv;
2601         int diag;
2602
2603         if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
2604                 RTE_PKTMBUF_HEADROOM) {
2605                 DPAA2_PMD_ERR(
2606                 "RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA2 Annotation req(%d)",
2607                 RTE_PKTMBUF_HEADROOM,
2608                 DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE);
2609
2610                 return -1;
2611         }
2612
2613         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2614                 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2615                 if (!eth_dev)
2616                         return -ENODEV;
2617                 dev_priv = rte_zmalloc("ethdev private structure",
2618                                        sizeof(struct dpaa2_dev_priv),
2619                                        RTE_CACHE_LINE_SIZE);
2620                 if (dev_priv == NULL) {
2621                         DPAA2_PMD_CRIT(
2622                                 "Unable to allocate memory for private data");
2623                         rte_eth_dev_release_port(eth_dev);
2624                         return -ENOMEM;
2625                 }
2626                 eth_dev->data->dev_private = (void *)dev_priv;
2627                 /* Store a pointer to eth_dev in dev_private */
2628                 dev_priv->eth_dev = eth_dev;
2629                 dev_priv->tx_conf_en = 0;
2630         } else {
2631                 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2632                 if (!eth_dev) {
2633                         DPAA2_PMD_DEBUG("returning enodev");
2634                         return -ENODEV;
2635                 }
2636         }
2637
2638         eth_dev->device = &dpaa2_dev->device;
2639
2640         dpaa2_dev->eth_dev = eth_dev;
2641         eth_dev->data->rx_mbuf_alloc_failed = 0;
2642
2643         if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2644                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2645
2646         /* Invoke PMD device initialization function */
2647         diag = dpaa2_dev_init(eth_dev);
2648         if (diag == 0) {
2649                 rte_eth_dev_probing_finish(eth_dev);
2650                 return 0;
2651         }
2652
2653         rte_eth_dev_release_port(eth_dev);
2654         return diag;
2655 }
2656
2657 static int
2658 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2659 {
2660         struct rte_eth_dev *eth_dev;
2661
2662         eth_dev = dpaa2_dev->eth_dev;
2663         dpaa2_dev_uninit(eth_dev);
2664
2665         rte_eth_dev_release_port(eth_dev);
2666
2667         return 0;
2668 }
2669
2670 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2671         .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2672         .drv_type = DPAA2_ETH,
2673         .probe = rte_dpaa2_probe,
2674         .remove = rte_dpaa2_remove,
2675 };
2676
2677 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2678 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2679                 DRIVER_LOOPBACK_MODE "=<int> "
2680                 DRIVER_NO_PREFETCH_MODE "=<int>");
2681 RTE_INIT(dpaa2_pmd_init_log)
2682 {
2683         dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2684         if (dpaa2_logtype_pmd >= 0)
2685                 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);
2686 }