1 /* * SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
12 #include <rte_ethdev_driver.h>
13 #include <rte_malloc.h>
14 #include <rte_memcpy.h>
15 #include <rte_string_fns.h>
16 #include <rte_cycles.h>
17 #include <rte_kvargs.h>
19 #include <rte_fslmc.h>
21 #include "dpaa2_pmd_logs.h"
22 #include <fslmc_vfio.h>
23 #include <dpaa2_hw_pvt.h>
24 #include <dpaa2_hw_mempool.h>
25 #include <dpaa2_hw_dpio.h>
26 #include <mc/fsl_dpmng.h>
27 #include "dpaa2_ethdev.h"
28 #include <fsl_qbman_debug.h>
30 /* Supported Rx offloads */
31 static uint64_t dev_rx_offloads_sup =
32 DEV_RX_OFFLOAD_VLAN_STRIP |
33 DEV_RX_OFFLOAD_IPV4_CKSUM |
34 DEV_RX_OFFLOAD_UDP_CKSUM |
35 DEV_RX_OFFLOAD_TCP_CKSUM |
36 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
37 DEV_RX_OFFLOAD_VLAN_FILTER |
38 DEV_RX_OFFLOAD_JUMBO_FRAME;
40 /* Rx offloads which cannot be disabled */
41 static uint64_t dev_rx_offloads_nodis =
42 DEV_RX_OFFLOAD_SCATTER;
44 /* Supported Tx offloads */
45 static uint64_t dev_tx_offloads_sup =
46 DEV_TX_OFFLOAD_VLAN_INSERT |
47 DEV_TX_OFFLOAD_IPV4_CKSUM |
48 DEV_TX_OFFLOAD_UDP_CKSUM |
49 DEV_TX_OFFLOAD_TCP_CKSUM |
50 DEV_TX_OFFLOAD_SCTP_CKSUM |
51 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
53 /* Tx offloads which cannot be disabled */
54 static uint64_t dev_tx_offloads_nodis =
55 DEV_TX_OFFLOAD_MULTI_SEGS |
56 DEV_TX_OFFLOAD_MT_LOCKFREE |
57 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
59 struct rte_dpaa2_xstats_name_off {
60 char name[RTE_ETH_XSTATS_NAME_SIZE];
61 uint8_t page_id; /* dpni statistics page id */
62 uint8_t stats_id; /* stats id in the given page */
65 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
66 {"ingress_multicast_frames", 0, 2},
67 {"ingress_multicast_bytes", 0, 3},
68 {"ingress_broadcast_frames", 0, 4},
69 {"ingress_broadcast_bytes", 0, 5},
70 {"egress_multicast_frames", 1, 2},
71 {"egress_multicast_bytes", 1, 3},
72 {"egress_broadcast_frames", 1, 4},
73 {"egress_broadcast_bytes", 1, 5},
74 {"ingress_filtered_frames", 2, 0},
75 {"ingress_discarded_frames", 2, 1},
76 {"ingress_nobuffer_discards", 2, 2},
77 {"egress_discarded_frames", 2, 3},
78 {"egress_confirmed_frames", 2, 4},
81 static struct rte_dpaa2_driver rte_dpaa2_pmd;
82 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
83 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
84 int wait_to_complete);
85 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
86 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
87 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
89 int dpaa2_logtype_pmd;
92 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
95 struct dpaa2_dev_priv *priv = dev->data->dev_private;
96 struct fsl_mc_io *dpni = priv->hw;
98 PMD_INIT_FUNC_TRACE();
101 DPAA2_PMD_ERR("dpni is NULL");
106 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
107 priv->token, vlan_id);
109 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
110 priv->token, vlan_id);
113 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
114 ret, vlan_id, priv->hw_id);
120 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
122 struct dpaa2_dev_priv *priv = dev->data->dev_private;
123 struct fsl_mc_io *dpni = priv->hw;
126 PMD_INIT_FUNC_TRACE();
128 if (mask & ETH_VLAN_FILTER_MASK) {
129 /* VLAN Filter not avaialble */
130 if (!priv->max_vlan_filters) {
131 DPAA2_PMD_INFO("VLAN filter not available");
135 if (dev->data->dev_conf.rxmode.offloads &
136 DEV_RX_OFFLOAD_VLAN_FILTER)
137 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
140 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
143 DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
146 if (mask & ETH_VLAN_EXTEND_MASK) {
147 if (dev->data->dev_conf.rxmode.offloads &
148 DEV_RX_OFFLOAD_VLAN_EXTEND)
149 DPAA2_PMD_INFO("VLAN extend offload not supported");
156 dpaa2_fw_version_get(struct rte_eth_dev *dev,
161 struct dpaa2_dev_priv *priv = dev->data->dev_private;
162 struct fsl_mc_io *dpni = priv->hw;
163 struct mc_soc_version mc_plat_info = {0};
164 struct mc_version mc_ver_info = {0};
166 PMD_INIT_FUNC_TRACE();
168 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
169 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
171 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
172 DPAA2_PMD_WARN("\tmc_get_version failed");
174 ret = snprintf(fw_version, fw_size,
179 mc_ver_info.revision);
181 ret += 1; /* add the size of '\0' */
182 if (fw_size < (uint32_t)ret)
189 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
191 struct dpaa2_dev_priv *priv = dev->data->dev_private;
193 PMD_INIT_FUNC_TRACE();
195 dev_info->if_index = priv->hw_id;
197 dev_info->max_mac_addrs = priv->max_mac_filters;
198 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
199 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
200 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
201 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
202 dev_info->rx_offload_capa = dev_rx_offloads_sup |
203 dev_rx_offloads_nodis;
204 dev_info->tx_offload_capa = dev_tx_offloads_sup |
205 dev_tx_offloads_nodis;
206 dev_info->speed_capa = ETH_LINK_SPEED_1G |
207 ETH_LINK_SPEED_2_5G |
210 dev_info->max_hash_mac_addrs = 0;
211 dev_info->max_vfs = 0;
212 dev_info->max_vmdq_pools = ETH_16_POOLS;
213 dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
217 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
219 struct dpaa2_dev_priv *priv = dev->data->dev_private;
222 struct dpaa2_queue *mc_q, *mcq;
225 struct dpaa2_queue *dpaa2_q;
227 PMD_INIT_FUNC_TRACE();
229 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
230 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
231 RTE_CACHE_LINE_SIZE);
233 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
237 for (i = 0; i < priv->nb_rx_queues; i++) {
239 priv->rx_vq[i] = mc_q++;
240 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
241 dpaa2_q->q_storage = rte_malloc("dq_storage",
242 sizeof(struct queue_storage_info_t),
243 RTE_CACHE_LINE_SIZE);
244 if (!dpaa2_q->q_storage)
247 memset(dpaa2_q->q_storage, 0,
248 sizeof(struct queue_storage_info_t));
249 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
253 for (i = 0; i < priv->nb_tx_queues; i++) {
255 mc_q->flow_id = 0xffff;
256 priv->tx_vq[i] = mc_q++;
257 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
258 dpaa2_q->cscn = rte_malloc(NULL,
259 sizeof(struct qbman_result), 16);
265 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
266 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
267 mcq->tc_index = DPAA2_DEF_TC;
268 mcq->flow_id = dist_idx;
276 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
277 rte_free(dpaa2_q->cscn);
278 priv->tx_vq[i--] = NULL;
280 i = priv->nb_rx_queues;
283 mc_q = priv->rx_vq[0];
285 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
286 dpaa2_free_dq_storage(dpaa2_q->q_storage);
287 rte_free(dpaa2_q->q_storage);
288 priv->rx_vq[i--] = NULL;
295 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
297 struct dpaa2_dev_priv *priv = dev->data->dev_private;
298 struct fsl_mc_io *dpni = priv->hw;
299 struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
300 uint64_t rx_offloads = eth_conf->rxmode.offloads;
301 uint64_t tx_offloads = eth_conf->txmode.offloads;
302 int rx_l3_csum_offload = false;
303 int rx_l4_csum_offload = false;
304 int tx_l3_csum_offload = false;
305 int tx_l4_csum_offload = false;
308 PMD_INIT_FUNC_TRACE();
310 /* Rx offloads validation */
311 if (dev_rx_offloads_nodis & ~rx_offloads) {
313 "Rx offloads non configurable - requested 0x%" PRIx64
314 " ignored 0x%" PRIx64,
315 rx_offloads, dev_rx_offloads_nodis);
318 /* Tx offloads validation */
319 if (dev_tx_offloads_nodis & ~tx_offloads) {
321 "Tx offloads non configurable - requested 0x%" PRIx64
322 " ignored 0x%" PRIx64,
323 tx_offloads, dev_tx_offloads_nodis);
326 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
327 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
328 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
329 priv->token, eth_conf->rxmode.max_rx_pkt_len);
332 "Unable to set mtu. check config");
340 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
341 ret = dpaa2_setup_flow_dist(dev,
342 eth_conf->rx_adv_conf.rss_conf.rss_hf);
344 DPAA2_PMD_ERR("Unable to set flow distribution."
345 "Check queue config");
350 if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
351 rx_l3_csum_offload = true;
353 if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
354 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM))
355 rx_l4_csum_offload = true;
357 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
358 DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
360 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
364 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
365 DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
367 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
371 if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
372 tx_l3_csum_offload = true;
374 if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
375 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
376 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
377 tx_l4_csum_offload = true;
379 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
380 DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
382 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
386 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
387 DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
389 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
393 /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
394 * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
395 * to 0 for LS2 in the hardware thus disabling data/annotation
396 * stashing. For LX2 this is fixed in hardware and thus hash result and
397 * parse results can be received in FD using this option.
399 if (dpaa2_svr_family == SVR_LX2160A) {
400 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
401 DPNI_FLCTYPE_HASH, true);
403 DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
408 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
409 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
411 /* update the current status */
412 dpaa2_dev_link_update(dev, 0);
417 /* Function to setup RX flow information. It contains traffic class ID,
418 * flow ID, destination configuration etc.
421 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
422 uint16_t rx_queue_id,
423 uint16_t nb_rx_desc __rte_unused,
424 unsigned int socket_id __rte_unused,
425 const struct rte_eth_rxconf *rx_conf __rte_unused,
426 struct rte_mempool *mb_pool)
428 struct dpaa2_dev_priv *priv = dev->data->dev_private;
429 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
430 struct dpaa2_queue *dpaa2_q;
431 struct dpni_queue cfg;
437 PMD_INIT_FUNC_TRACE();
439 DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
440 dev, rx_queue_id, mb_pool, rx_conf);
442 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
443 bpid = mempool_to_bpid(mb_pool);
444 ret = dpaa2_attach_bp_list(priv,
445 rte_dpaa2_bpid_info[bpid].bp_list);
449 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
450 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
452 /*Get the flow id from given VQ id*/
453 flow_id = rx_queue_id % priv->nb_rx_queues;
454 memset(&cfg, 0, sizeof(struct dpni_queue));
456 options = options | DPNI_QUEUE_OPT_USER_CTX;
457 cfg.user_context = (size_t)(dpaa2_q);
459 /*if ls2088 or rev2 device, enable the stashing */
461 if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
462 options |= DPNI_QUEUE_OPT_FLC;
463 cfg.flc.stash_control = true;
464 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
465 /* 00 00 00 - last 6 bit represent annotation, context stashing,
466 * data stashing setting 01 01 00 (0x14)
467 * (in following order ->DS AS CS)
468 * to enable 1 line data, 1 line annotation.
469 * For LX2, this setting should be 01 00 00 (0x10)
471 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
472 cfg.flc.value |= 0x10;
474 cfg.flc.value |= 0x14;
476 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
477 dpaa2_q->tc_index, flow_id, options, &cfg);
479 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
483 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
484 struct dpni_taildrop taildrop;
487 /*enabling per rx queue congestion control */
488 taildrop.threshold = CONG_THRESHOLD_RX_Q;
489 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
490 taildrop.oal = CONG_RX_OAL;
491 DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d",
493 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
494 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
495 dpaa2_q->tc_index, flow_id, &taildrop);
497 DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
503 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
508 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
509 uint16_t tx_queue_id,
510 uint16_t nb_tx_desc __rte_unused,
511 unsigned int socket_id __rte_unused,
512 const struct rte_eth_txconf *tx_conf __rte_unused)
514 struct dpaa2_dev_priv *priv = dev->data->dev_private;
515 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
516 priv->tx_vq[tx_queue_id];
517 struct fsl_mc_io *dpni = priv->hw;
518 struct dpni_queue tx_conf_cfg;
519 struct dpni_queue tx_flow_cfg;
520 uint8_t options = 0, flow_id;
524 PMD_INIT_FUNC_TRACE();
526 /* Return if queue already configured */
527 if (dpaa2_q->flow_id != 0xffff) {
528 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
532 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
533 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
538 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
539 tc_id, flow_id, options, &tx_flow_cfg);
541 DPAA2_PMD_ERR("Error in setting the tx flow: "
542 "tc_id=%d, flow=%d err=%d",
543 tc_id, flow_id, ret);
547 dpaa2_q->flow_id = flow_id;
549 if (tx_queue_id == 0) {
550 /*Set tx-conf and error configuration*/
551 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
555 DPAA2_PMD_ERR("Error in set tx conf mode settings: "
560 dpaa2_q->tc_index = tc_id;
562 if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
563 struct dpni_congestion_notification_cfg cong_notif_cfg;
565 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
566 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
567 /* Notify that the queue is not congested when the data in
568 * the queue is below this thershold.
570 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
571 cong_notif_cfg.message_ctx = 0;
572 cong_notif_cfg.message_iova =
573 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
574 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
575 cong_notif_cfg.notification_mode =
576 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
577 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
578 DPNI_CONG_OPT_COHERENT_WRITE;
580 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
587 "Error in setting tx congestion notification: "
592 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
597 dpaa2_dev_rx_queue_release(void *q __rte_unused)
599 PMD_INIT_FUNC_TRACE();
603 dpaa2_dev_tx_queue_release(void *q __rte_unused)
605 PMD_INIT_FUNC_TRACE();
609 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
612 struct dpaa2_dev_priv *priv = dev->data->dev_private;
613 struct dpaa2_queue *dpaa2_q;
614 struct qbman_swp *swp;
615 struct qbman_fq_query_np_rslt state;
616 uint32_t frame_cnt = 0;
618 PMD_INIT_FUNC_TRACE();
620 if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
621 ret = dpaa2_affine_qbman_swp();
623 DPAA2_PMD_ERR("Failure in affining portal");
627 swp = DPAA2_PER_LCORE_PORTAL;
629 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
631 if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
632 frame_cnt = qbman_fq_state_frame_count(&state);
633 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
634 rx_queue_id, frame_cnt);
639 static const uint32_t *
640 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
642 static const uint32_t ptypes[] = {
643 /*todo -= add more types */
646 RTE_PTYPE_L3_IPV4_EXT,
648 RTE_PTYPE_L3_IPV6_EXT,
656 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx)
662 * Dpaa2 link Interrupt handler
665 * The address of parameter (struct rte_eth_dev *) regsitered before.
671 dpaa2_interrupt_handler(void *param)
673 struct rte_eth_dev *dev = param;
674 struct dpaa2_dev_priv *priv = dev->data->dev_private;
675 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
677 int irq_index = DPNI_IRQ_INDEX;
678 unsigned int status = 0, clear = 0;
680 PMD_INIT_FUNC_TRACE();
683 DPAA2_PMD_ERR("dpni is NULL");
687 ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
690 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
695 if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
696 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
697 dpaa2_dev_link_update(dev, 0);
698 /* calling all the apps registered for link status event */
699 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
703 ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
706 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
710 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
713 struct dpaa2_dev_priv *priv = dev->data->dev_private;
714 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
715 int irq_index = DPNI_IRQ_INDEX;
716 unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
718 PMD_INIT_FUNC_TRACE();
720 err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
723 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
728 err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
731 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
738 dpaa2_dev_start(struct rte_eth_dev *dev)
740 struct rte_device *rdev = dev->device;
741 struct rte_dpaa2_device *dpaa2_dev;
742 struct rte_eth_dev_data *data = dev->data;
743 struct dpaa2_dev_priv *priv = data->dev_private;
744 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
745 struct dpni_queue cfg;
746 struct dpni_error_cfg err_cfg;
748 struct dpni_queue_id qid;
749 struct dpaa2_queue *dpaa2_q;
751 struct rte_intr_handle *intr_handle;
753 dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
754 intr_handle = &dpaa2_dev->intr_handle;
756 PMD_INIT_FUNC_TRACE();
758 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
760 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
765 /* Power up the phy. Needed to make the link go UP */
766 dpaa2_dev_set_link_up(dev);
768 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
769 DPNI_QUEUE_TX, &qdid);
771 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
776 for (i = 0; i < data->nb_rx_queues; i++) {
777 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
778 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
779 DPNI_QUEUE_RX, dpaa2_q->tc_index,
780 dpaa2_q->flow_id, &cfg, &qid);
782 DPAA2_PMD_ERR("Error in getting flow information: "
786 dpaa2_q->fqid = qid.fqid;
789 /*checksum errors, send them to normal path and set it in annotation */
790 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
792 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
793 err_cfg.set_frame_annotation = true;
795 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
796 priv->token, &err_cfg);
798 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
803 /* if the interrupts were configured on this devices*/
804 if (intr_handle && (intr_handle->fd) &&
805 (dev->data->dev_conf.intr_conf.lsc != 0)) {
806 /* Registering LSC interrupt handler */
807 rte_intr_callback_register(intr_handle,
808 dpaa2_interrupt_handler,
811 /* enable vfio intr/eventfd mapping
812 * Interrupt index 0 is required, so we can not use
815 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
817 /* enable dpni_irqs */
818 dpaa2_eth_setup_irqs(dev, 1);
825 * This routine disables all traffic on the adapter by issuing a
826 * global reset on the MAC.
829 dpaa2_dev_stop(struct rte_eth_dev *dev)
831 struct dpaa2_dev_priv *priv = dev->data->dev_private;
832 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
834 struct rte_eth_link link;
835 struct rte_intr_handle *intr_handle = dev->intr_handle;
837 PMD_INIT_FUNC_TRACE();
839 /* reset interrupt callback */
840 if (intr_handle && (intr_handle->fd) &&
841 (dev->data->dev_conf.intr_conf.lsc != 0)) {
842 /*disable dpni irqs */
843 dpaa2_eth_setup_irqs(dev, 0);
845 /* disable vfio intr before callback unregister */
846 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
848 /* Unregistering LSC interrupt handler */
849 rte_intr_callback_unregister(intr_handle,
850 dpaa2_interrupt_handler,
854 dpaa2_dev_set_link_down(dev);
856 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
858 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
863 /* clear the recorded link status */
864 memset(&link, 0, sizeof(link));
865 rte_eth_linkstatus_set(dev, &link);
869 dpaa2_dev_close(struct rte_eth_dev *dev)
871 struct rte_eth_dev_data *data = dev->data;
872 struct dpaa2_dev_priv *priv = dev->data->dev_private;
873 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
875 struct rte_eth_link link;
876 struct dpaa2_queue *dpaa2_q;
878 PMD_INIT_FUNC_TRACE();
880 for (i = 0; i < data->nb_tx_queues; i++) {
881 dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
882 if (!dpaa2_q->cscn) {
883 rte_free(dpaa2_q->cscn);
884 dpaa2_q->cscn = NULL;
888 /* Clean the device first */
889 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
891 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
895 memset(&link, 0, sizeof(link));
896 rte_eth_linkstatus_set(dev, &link);
900 dpaa2_dev_promiscuous_enable(
901 struct rte_eth_dev *dev)
904 struct dpaa2_dev_priv *priv = dev->data->dev_private;
905 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
907 PMD_INIT_FUNC_TRACE();
910 DPAA2_PMD_ERR("dpni is NULL");
914 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
916 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
918 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
920 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
924 dpaa2_dev_promiscuous_disable(
925 struct rte_eth_dev *dev)
928 struct dpaa2_dev_priv *priv = dev->data->dev_private;
929 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
931 PMD_INIT_FUNC_TRACE();
934 DPAA2_PMD_ERR("dpni is NULL");
938 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
940 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
942 if (dev->data->all_multicast == 0) {
943 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
946 DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
952 dpaa2_dev_allmulticast_enable(
953 struct rte_eth_dev *dev)
956 struct dpaa2_dev_priv *priv = dev->data->dev_private;
957 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
959 PMD_INIT_FUNC_TRACE();
962 DPAA2_PMD_ERR("dpni is NULL");
966 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
968 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
972 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
975 struct dpaa2_dev_priv *priv = dev->data->dev_private;
976 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
978 PMD_INIT_FUNC_TRACE();
981 DPAA2_PMD_ERR("dpni is NULL");
985 /* must remain on for all promiscuous */
986 if (dev->data->promiscuous == 1)
989 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
991 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
995 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
998 struct dpaa2_dev_priv *priv = dev->data->dev_private;
999 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1000 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
1003 PMD_INIT_FUNC_TRACE();
1006 DPAA2_PMD_ERR("dpni is NULL");
1010 /* check that mtu is within the allowed range */
1011 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
1014 if (frame_size > ETHER_MAX_LEN)
1015 dev->data->dev_conf.rxmode.offloads &=
1016 DEV_RX_OFFLOAD_JUMBO_FRAME;
1018 dev->data->dev_conf.rxmode.offloads &=
1019 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1021 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1023 /* Set the Max Rx frame length as 'mtu' +
1024 * Maximum Ethernet header length
1026 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1029 DPAA2_PMD_ERR("Setting the max frame length failed");
1032 DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1037 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1038 struct ether_addr *addr,
1039 __rte_unused uint32_t index,
1040 __rte_unused uint32_t pool)
1043 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1044 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1046 PMD_INIT_FUNC_TRACE();
1049 DPAA2_PMD_ERR("dpni is NULL");
1053 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1054 priv->token, addr->addr_bytes);
1057 "error: Adding the MAC ADDR failed: err = %d", ret);
1062 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1066 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1067 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1068 struct rte_eth_dev_data *data = dev->data;
1069 struct ether_addr *macaddr;
1071 PMD_INIT_FUNC_TRACE();
1073 macaddr = &data->mac_addrs[index];
1076 DPAA2_PMD_ERR("dpni is NULL");
1080 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1081 priv->token, macaddr->addr_bytes);
1084 "error: Removing the MAC ADDR failed: err = %d", ret);
1088 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1089 struct ether_addr *addr)
1092 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1093 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1095 PMD_INIT_FUNC_TRACE();
1098 DPAA2_PMD_ERR("dpni is NULL");
1102 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1103 priv->token, addr->addr_bytes);
1107 "error: Setting the MAC ADDR failed %d", ret);
1113 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1114 struct rte_eth_stats *stats)
1116 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1117 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1119 uint8_t page0 = 0, page1 = 1, page2 = 2;
1120 union dpni_statistics value;
1122 memset(&value, 0, sizeof(union dpni_statistics));
1124 PMD_INIT_FUNC_TRACE();
1127 DPAA2_PMD_ERR("dpni is NULL");
1132 DPAA2_PMD_ERR("stats is NULL");
1136 /*Get Counters from page_0*/
1137 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1142 stats->ipackets = value.page_0.ingress_all_frames;
1143 stats->ibytes = value.page_0.ingress_all_bytes;
1145 /*Get Counters from page_1*/
1146 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1151 stats->opackets = value.page_1.egress_all_frames;
1152 stats->obytes = value.page_1.egress_all_bytes;
1154 /*Get Counters from page_2*/
1155 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1160 /* Ingress drop frame count due to configured rules */
1161 stats->ierrors = value.page_2.ingress_filtered_frames;
1162 /* Ingress drop frame count due to error */
1163 stats->ierrors += value.page_2.ingress_discarded_frames;
1165 stats->oerrors = value.page_2.egress_discarded_frames;
1166 stats->imissed = value.page_2.ingress_nobuffer_discards;
1171 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1176 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1179 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1180 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1182 union dpni_statistics value[3] = {};
1183 unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1191 /* Get Counters from page_0*/
1192 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1197 /* Get Counters from page_1*/
1198 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1203 /* Get Counters from page_2*/
1204 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1209 for (i = 0; i < num; i++) {
1211 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1212 raw.counter[dpaa2_xstats_strings[i].stats_id];
1216 DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1221 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1222 struct rte_eth_xstat_name *xstats_names,
1225 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1227 if (limit < stat_cnt)
1230 if (xstats_names != NULL)
1231 for (i = 0; i < stat_cnt; i++)
1232 snprintf(xstats_names[i].name,
1233 sizeof(xstats_names[i].name),
1235 dpaa2_xstats_strings[i].name);
1241 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1242 uint64_t *values, unsigned int n)
1244 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1245 uint64_t values_copy[stat_cnt];
1248 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1249 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1251 union dpni_statistics value[3] = {};
1259 /* Get Counters from page_0*/
1260 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1265 /* Get Counters from page_1*/
1266 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1271 /* Get Counters from page_2*/
1272 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1277 for (i = 0; i < stat_cnt; i++) {
1278 values[i] = value[dpaa2_xstats_strings[i].page_id].
1279 raw.counter[dpaa2_xstats_strings[i].stats_id];
1284 dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1286 for (i = 0; i < n; i++) {
1287 if (ids[i] >= stat_cnt) {
1288 DPAA2_PMD_ERR("xstats id value isn't valid");
1291 values[i] = values_copy[ids[i]];
1297 dpaa2_xstats_get_names_by_id(
1298 struct rte_eth_dev *dev,
1299 struct rte_eth_xstat_name *xstats_names,
1300 const uint64_t *ids,
1303 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1304 struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1307 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1309 dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1311 for (i = 0; i < limit; i++) {
1312 if (ids[i] >= stat_cnt) {
1313 DPAA2_PMD_ERR("xstats id value isn't valid");
1316 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1322 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1324 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1325 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1328 PMD_INIT_FUNC_TRACE();
1331 DPAA2_PMD_ERR("dpni is NULL");
1335 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1342 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1346 /* return 0 means link status changed, -1 means not changed */
1348 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1349 int wait_to_complete __rte_unused)
1352 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1353 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1354 struct rte_eth_link link;
1355 struct dpni_link_state state = {0};
1358 DPAA2_PMD_ERR("dpni is NULL");
1362 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1364 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1368 memset(&link, 0, sizeof(struct rte_eth_link));
1369 link.link_status = state.up;
1370 link.link_speed = state.rate;
1372 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1373 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1375 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1377 ret = rte_eth_linkstatus_set(dev, &link);
1379 DPAA2_PMD_DEBUG("No change in status");
1381 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1382 link.link_status ? "Up" : "Down");
1388 * Toggle the DPNI to enable, if not already enabled.
1389 * This is not strictly PHY up/down - it is more of logical toggling.
1392 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1395 struct dpaa2_dev_priv *priv;
1396 struct fsl_mc_io *dpni;
1398 struct dpni_link_state state = {0};
1400 priv = dev->data->dev_private;
1401 dpni = (struct fsl_mc_io *)priv->hw;
1404 DPAA2_PMD_ERR("dpni is NULL");
1408 /* Check if DPNI is currently enabled */
1409 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1411 /* Unable to obtain dpni status; Not continuing */
1412 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1416 /* Enable link if not already enabled */
1418 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1420 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1424 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1426 DPAA2_PMD_ERR("Unable to get link state (%d)", ret);
1430 /* changing tx burst function to start enqueues */
1431 dev->tx_pkt_burst = dpaa2_dev_tx;
1432 dev->data->dev_link.link_status = state.up;
1435 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1437 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1442 * Toggle the DPNI to disable, if not already disabled.
1443 * This is not strictly PHY up/down - it is more of logical toggling.
1446 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1449 struct dpaa2_dev_priv *priv;
1450 struct fsl_mc_io *dpni;
1451 int dpni_enabled = 0;
1454 PMD_INIT_FUNC_TRACE();
1456 priv = dev->data->dev_private;
1457 dpni = (struct fsl_mc_io *)priv->hw;
1460 DPAA2_PMD_ERR("Device has not yet been configured");
1464 /*changing tx burst function to avoid any more enqueues */
1465 dev->tx_pkt_burst = dummy_dev_tx;
1467 /* Loop while dpni_disable() attempts to drain the egress FQs
1468 * and confirm them back to us.
1471 ret = dpni_disable(dpni, 0, priv->token);
1473 DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1476 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1478 DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1482 /* Allow the MC some slack */
1483 rte_delay_us(100 * 1000);
1484 } while (dpni_enabled && --retries);
1487 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1488 /* todo- we may have to manually cleanup queues.
1491 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1492 dev->data->port_id);
1495 dev->data->dev_link.link_status = 0;
1501 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1504 struct dpaa2_dev_priv *priv;
1505 struct fsl_mc_io *dpni;
1506 struct dpni_link_state state = {0};
1508 PMD_INIT_FUNC_TRACE();
1510 priv = dev->data->dev_private;
1511 dpni = (struct fsl_mc_io *)priv->hw;
1513 if (dpni == NULL || fc_conf == NULL) {
1514 DPAA2_PMD_ERR("device not configured");
1518 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1520 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1524 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1525 if (state.options & DPNI_LINK_OPT_PAUSE) {
1526 /* DPNI_LINK_OPT_PAUSE set
1527 * if ASYM_PAUSE not set,
1528 * RX Side flow control (handle received Pause frame)
1529 * TX side flow control (send Pause frame)
1530 * if ASYM_PAUSE set,
1531 * RX Side flow control (handle received Pause frame)
1532 * No TX side flow control (send Pause frame disabled)
1534 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1535 fc_conf->mode = RTE_FC_FULL;
1537 fc_conf->mode = RTE_FC_RX_PAUSE;
1539 /* DPNI_LINK_OPT_PAUSE not set
1540 * if ASYM_PAUSE set,
1541 * TX side flow control (send Pause frame)
1542 * No RX side flow control (No action on pause frame rx)
1543 * if ASYM_PAUSE not set,
1544 * Flow control disabled
1546 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1547 fc_conf->mode = RTE_FC_TX_PAUSE;
1549 fc_conf->mode = RTE_FC_NONE;
1556 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1559 struct dpaa2_dev_priv *priv;
1560 struct fsl_mc_io *dpni;
1561 struct dpni_link_state state = {0};
1562 struct dpni_link_cfg cfg = {0};
1564 PMD_INIT_FUNC_TRACE();
1566 priv = dev->data->dev_private;
1567 dpni = (struct fsl_mc_io *)priv->hw;
1570 DPAA2_PMD_ERR("dpni is NULL");
1574 /* It is necessary to obtain the current state before setting fc_conf
1575 * as MC would return error in case rate, autoneg or duplex values are
1578 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1580 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1584 /* Disable link before setting configuration */
1585 dpaa2_dev_set_link_down(dev);
1587 /* Based on fc_conf, update cfg */
1588 cfg.rate = state.rate;
1589 cfg.options = state.options;
1591 /* update cfg with fc_conf */
1592 switch (fc_conf->mode) {
1594 /* Full flow control;
1595 * OPT_PAUSE set, ASYM_PAUSE not set
1597 cfg.options |= DPNI_LINK_OPT_PAUSE;
1598 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1600 case RTE_FC_TX_PAUSE:
1601 /* Enable RX flow control
1602 * OPT_PAUSE not set;
1605 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1606 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1608 case RTE_FC_RX_PAUSE:
1609 /* Enable TX Flow control
1613 cfg.options |= DPNI_LINK_OPT_PAUSE;
1614 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1617 /* Disable Flow control
1619 * ASYM_PAUSE not set
1621 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1622 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1625 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1630 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1632 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1636 dpaa2_dev_set_link_up(dev);
1642 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1643 struct rte_eth_rss_conf *rss_conf)
1645 struct rte_eth_dev_data *data = dev->data;
1646 struct rte_eth_conf *eth_conf = &data->dev_conf;
1649 PMD_INIT_FUNC_TRACE();
1651 if (rss_conf->rss_hf) {
1652 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1654 DPAA2_PMD_ERR("Unable to set flow dist");
1658 ret = dpaa2_remove_flow_dist(dev, 0);
1660 DPAA2_PMD_ERR("Unable to remove flow dist");
1664 eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1669 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1670 struct rte_eth_rss_conf *rss_conf)
1672 struct rte_eth_dev_data *data = dev->data;
1673 struct rte_eth_conf *eth_conf = &data->dev_conf;
1675 /* dpaa2 does not support rss_key, so length should be 0*/
1676 rss_conf->rss_key_len = 0;
1677 rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1681 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
1682 int eth_rx_queue_id,
1684 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
1686 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1687 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1688 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1689 uint8_t flow_id = dpaa2_ethq->flow_id;
1690 struct dpni_queue cfg;
1694 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
1695 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
1696 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
1697 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
1701 memset(&cfg, 0, sizeof(struct dpni_queue));
1702 options = DPNI_QUEUE_OPT_DEST;
1703 cfg.destination.type = DPNI_DEST_DPCON;
1704 cfg.destination.id = dpcon_id;
1705 cfg.destination.priority = queue_conf->ev.priority;
1707 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
1708 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
1709 cfg.destination.hold_active = 1;
1712 options |= DPNI_QUEUE_OPT_USER_CTX;
1713 cfg.user_context = (size_t)(dpaa2_ethq);
1715 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1716 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1718 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1722 memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
1727 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
1728 int eth_rx_queue_id)
1730 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1731 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1732 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1733 uint8_t flow_id = dpaa2_ethq->flow_id;
1734 struct dpni_queue cfg;
1738 memset(&cfg, 0, sizeof(struct dpni_queue));
1739 options = DPNI_QUEUE_OPT_DEST;
1740 cfg.destination.type = DPNI_DEST_NONE;
1742 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1743 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1745 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1750 static struct eth_dev_ops dpaa2_ethdev_ops = {
1751 .dev_configure = dpaa2_eth_dev_configure,
1752 .dev_start = dpaa2_dev_start,
1753 .dev_stop = dpaa2_dev_stop,
1754 .dev_close = dpaa2_dev_close,
1755 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
1756 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
1757 .allmulticast_enable = dpaa2_dev_allmulticast_enable,
1758 .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1759 .dev_set_link_up = dpaa2_dev_set_link_up,
1760 .dev_set_link_down = dpaa2_dev_set_link_down,
1761 .link_update = dpaa2_dev_link_update,
1762 .stats_get = dpaa2_dev_stats_get,
1763 .xstats_get = dpaa2_dev_xstats_get,
1764 .xstats_get_by_id = dpaa2_xstats_get_by_id,
1765 .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
1766 .xstats_get_names = dpaa2_xstats_get_names,
1767 .stats_reset = dpaa2_dev_stats_reset,
1768 .xstats_reset = dpaa2_dev_stats_reset,
1769 .fw_version_get = dpaa2_fw_version_get,
1770 .dev_infos_get = dpaa2_dev_info_get,
1771 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1772 .mtu_set = dpaa2_dev_mtu_set,
1773 .vlan_filter_set = dpaa2_vlan_filter_set,
1774 .vlan_offload_set = dpaa2_vlan_offload_set,
1775 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
1776 .rx_queue_release = dpaa2_dev_rx_queue_release,
1777 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
1778 .tx_queue_release = dpaa2_dev_tx_queue_release,
1779 .rx_queue_count = dpaa2_dev_rx_queue_count,
1780 .flow_ctrl_get = dpaa2_flow_ctrl_get,
1781 .flow_ctrl_set = dpaa2_flow_ctrl_set,
1782 .mac_addr_add = dpaa2_dev_add_mac_addr,
1783 .mac_addr_remove = dpaa2_dev_remove_mac_addr,
1784 .mac_addr_set = dpaa2_dev_set_mac_addr,
1785 .rss_hash_update = dpaa2_dev_rss_hash_update,
1786 .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
1789 /* Populate the mac address from physically available (u-boot/firmware) and/or
1790 * one set by higher layers like MC (restool) etc.
1791 * Returns the table of MAC entries (multiple entries)
1794 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
1795 struct ether_addr *mac_entry)
1798 struct ether_addr phy_mac = {}, prime_mac = {};
1800 /* Get the physical device MAC address */
1801 ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
1802 phy_mac.addr_bytes);
1804 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
1808 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
1809 prime_mac.addr_bytes);
1811 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
1815 /* Now that both MAC have been obtained, do:
1816 * if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
1818 * If empty_mac(phy), return prime.
1819 * if both are empty, create random MAC, set as prime and return
1821 if (!is_zero_ether_addr(&phy_mac)) {
1822 /* If the addresses are not same, overwrite prime */
1823 if (!is_same_ether_addr(&phy_mac, &prime_mac)) {
1824 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1826 phy_mac.addr_bytes);
1828 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
1832 memcpy(&prime_mac, &phy_mac, sizeof(struct ether_addr));
1834 } else if (is_zero_ether_addr(&prime_mac)) {
1835 /* In case phys and prime, both are zero, create random MAC */
1836 eth_random_addr(prime_mac.addr_bytes);
1837 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1839 prime_mac.addr_bytes);
1841 DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
1846 /* prime_mac the final MAC address */
1847 memcpy(mac_entry, &prime_mac, sizeof(struct ether_addr));
1855 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
1857 struct rte_device *dev = eth_dev->device;
1858 struct rte_dpaa2_device *dpaa2_dev;
1859 struct fsl_mc_io *dpni_dev;
1860 struct dpni_attr attr;
1861 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1862 struct dpni_buffer_layout layout;
1865 PMD_INIT_FUNC_TRACE();
1867 /* For secondary processes, the primary has done all the work */
1868 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1871 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1873 hw_id = dpaa2_dev->object_id;
1875 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
1877 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
1881 dpni_dev->regs = rte_mcp_ptr_list[0];
1882 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
1885 "Failure in opening dpni@%d with err code %d",
1891 /* Clean the device first */
1892 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
1894 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
1899 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
1902 "Failure in get dpni@%d attribute, err code %d",
1907 priv->num_rx_tc = attr.num_rx_tcs;
1909 /* Resetting the "num_rx_queues" to equal number of queues in first TC
1910 * as only one TC is supported on Rx Side. Once Multiple TCs will be
1911 * in use for Rx processing then this will be changed or removed.
1913 priv->nb_rx_queues = attr.num_queues;
1915 /* Using number of TX queues as number of TX TCs */
1916 priv->nb_tx_queues = attr.num_tx_tcs;
1918 DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
1919 priv->num_rx_tc, priv->nb_rx_queues,
1920 priv->nb_tx_queues);
1922 priv->hw = dpni_dev;
1923 priv->hw_id = hw_id;
1924 priv->options = attr.options;
1925 priv->max_mac_filters = attr.mac_filter_entries;
1926 priv->max_vlan_filters = attr.vlan_filter_entries;
1929 /* Allocate memory for hardware structure for queues */
1930 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
1932 DPAA2_PMD_ERR("Queue allocation Failed");
1936 /* Allocate memory for storing MAC addresses.
1937 * Table of mac_filter_entries size is allocated so that RTE ether lib
1938 * can add MAC entries when rte_eth_dev_mac_addr_add is called.
1940 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
1941 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
1942 if (eth_dev->data->mac_addrs == NULL) {
1944 "Failed to allocate %d bytes needed to store MAC addresses",
1945 ETHER_ADDR_LEN * attr.mac_filter_entries);
1950 ret = populate_mac_addr(dpni_dev, priv, ð_dev->data->mac_addrs[0]);
1952 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
1953 rte_free(eth_dev->data->mac_addrs);
1954 eth_dev->data->mac_addrs = NULL;
1958 /* ... tx buffer layout ... */
1959 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1960 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1961 layout.pass_frame_status = 1;
1962 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1963 DPNI_QUEUE_TX, &layout);
1965 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
1969 /* ... tx-conf and error buffer layout ... */
1970 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1971 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1972 layout.pass_frame_status = 1;
1973 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1974 DPNI_QUEUE_TX_CONFIRM, &layout);
1976 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
1981 eth_dev->dev_ops = &dpaa2_ethdev_ops;
1983 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
1984 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
1986 RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
1989 dpaa2_dev_uninit(eth_dev);
1994 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
1996 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1997 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1999 struct dpaa2_queue *dpaa2_q;
2001 PMD_INIT_FUNC_TRACE();
2003 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2007 DPAA2_PMD_WARN("Already closed or not started");
2011 dpaa2_dev_close(eth_dev);
2013 if (priv->rx_vq[0]) {
2014 /* cleaning up queue storage */
2015 for (i = 0; i < priv->nb_rx_queues; i++) {
2016 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
2017 if (dpaa2_q->q_storage)
2018 rte_free(dpaa2_q->q_storage);
2020 /*free the all queue memory */
2021 rte_free(priv->rx_vq[0]);
2022 priv->rx_vq[0] = NULL;
2025 /* free memory for storing MAC addresses */
2026 if (eth_dev->data->mac_addrs) {
2027 rte_free(eth_dev->data->mac_addrs);
2028 eth_dev->data->mac_addrs = NULL;
2031 /* Close the device at underlying layer*/
2032 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2035 "Failure closing dpni device with err code %d",
2039 /* Free the allocated memory for ethernet private data and dpni*/
2043 eth_dev->dev_ops = NULL;
2044 eth_dev->rx_pkt_burst = NULL;
2045 eth_dev->tx_pkt_burst = NULL;
2047 DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2052 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2053 struct rte_dpaa2_device *dpaa2_dev)
2055 struct rte_eth_dev *eth_dev;
2058 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2059 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2062 eth_dev->data->dev_private = rte_zmalloc(
2063 "ethdev private structure",
2064 sizeof(struct dpaa2_dev_priv),
2065 RTE_CACHE_LINE_SIZE);
2066 if (eth_dev->data->dev_private == NULL) {
2068 "Unable to allocate memory for private data");
2069 rte_eth_dev_release_port(eth_dev);
2073 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2078 eth_dev->device = &dpaa2_dev->device;
2080 dpaa2_dev->eth_dev = eth_dev;
2081 eth_dev->data->rx_mbuf_alloc_failed = 0;
2083 if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2084 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2086 /* Invoke PMD device initialization function */
2087 diag = dpaa2_dev_init(eth_dev);
2089 rte_eth_dev_probing_finish(eth_dev);
2093 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2094 rte_free(eth_dev->data->dev_private);
2095 rte_eth_dev_release_port(eth_dev);
2100 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2102 struct rte_eth_dev *eth_dev;
2104 eth_dev = dpaa2_dev->eth_dev;
2105 dpaa2_dev_uninit(eth_dev);
2107 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2108 rte_free(eth_dev->data->dev_private);
2109 rte_eth_dev_release_port(eth_dev);
2114 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2115 .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2116 .drv_type = DPAA2_ETH,
2117 .probe = rte_dpaa2_probe,
2118 .remove = rte_dpaa2_remove,
2121 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2123 RTE_INIT(dpaa2_pmd_init_log)
2125 dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2126 if (dpaa2_logtype_pmd >= 0)
2127 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);