1 /* * SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
12 #include <rte_ethdev_driver.h>
13 #include <rte_malloc.h>
14 #include <rte_memcpy.h>
15 #include <rte_string_fns.h>
16 #include <rte_cycles.h>
17 #include <rte_kvargs.h>
19 #include <rte_fslmc.h>
21 #include "dpaa2_pmd_logs.h"
22 #include <fslmc_vfio.h>
23 #include <dpaa2_hw_pvt.h>
24 #include <dpaa2_hw_mempool.h>
25 #include <dpaa2_hw_dpio.h>
26 #include <mc/fsl_dpmng.h>
27 #include "dpaa2_ethdev.h"
28 #include <fsl_qbman_debug.h>
30 /* Supported Rx offloads */
31 static uint64_t dev_rx_offloads_sup =
32 DEV_RX_OFFLOAD_VLAN_STRIP |
33 DEV_RX_OFFLOAD_IPV4_CKSUM |
34 DEV_RX_OFFLOAD_UDP_CKSUM |
35 DEV_RX_OFFLOAD_TCP_CKSUM |
36 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
37 DEV_RX_OFFLOAD_VLAN_FILTER |
38 DEV_RX_OFFLOAD_JUMBO_FRAME;
40 /* Rx offloads which cannot be disabled */
41 static uint64_t dev_rx_offloads_nodis =
42 DEV_RX_OFFLOAD_CRC_STRIP |
43 DEV_RX_OFFLOAD_SCATTER;
45 /* Supported Tx offloads */
46 static uint64_t dev_tx_offloads_sup =
47 DEV_TX_OFFLOAD_VLAN_INSERT |
48 DEV_TX_OFFLOAD_IPV4_CKSUM |
49 DEV_TX_OFFLOAD_UDP_CKSUM |
50 DEV_TX_OFFLOAD_TCP_CKSUM |
51 DEV_TX_OFFLOAD_SCTP_CKSUM |
52 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
54 /* Tx offloads which cannot be disabled */
55 static uint64_t dev_tx_offloads_nodis =
56 DEV_TX_OFFLOAD_MULTI_SEGS |
57 DEV_TX_OFFLOAD_MT_LOCKFREE |
58 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
60 struct rte_dpaa2_xstats_name_off {
61 char name[RTE_ETH_XSTATS_NAME_SIZE];
62 uint8_t page_id; /* dpni statistics page id */
63 uint8_t stats_id; /* stats id in the given page */
66 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
67 {"ingress_multicast_frames", 0, 2},
68 {"ingress_multicast_bytes", 0, 3},
69 {"ingress_broadcast_frames", 0, 4},
70 {"ingress_broadcast_bytes", 0, 5},
71 {"egress_multicast_frames", 1, 2},
72 {"egress_multicast_bytes", 1, 3},
73 {"egress_broadcast_frames", 1, 4},
74 {"egress_broadcast_bytes", 1, 5},
75 {"ingress_filtered_frames", 2, 0},
76 {"ingress_discarded_frames", 2, 1},
77 {"ingress_nobuffer_discards", 2, 2},
78 {"egress_discarded_frames", 2, 3},
79 {"egress_confirmed_frames", 2, 4},
82 static struct rte_dpaa2_driver rte_dpaa2_pmd;
83 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
84 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
85 int wait_to_complete);
86 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
87 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
88 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
90 int dpaa2_logtype_pmd;
93 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
96 struct dpaa2_dev_priv *priv = dev->data->dev_private;
97 struct fsl_mc_io *dpni = priv->hw;
99 PMD_INIT_FUNC_TRACE();
102 DPAA2_PMD_ERR("dpni is NULL");
107 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
108 priv->token, vlan_id);
110 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
111 priv->token, vlan_id);
114 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
115 ret, vlan_id, priv->hw_id);
121 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
123 struct dpaa2_dev_priv *priv = dev->data->dev_private;
124 struct fsl_mc_io *dpni = priv->hw;
127 PMD_INIT_FUNC_TRACE();
129 if (mask & ETH_VLAN_FILTER_MASK) {
130 /* VLAN Filter not avaialble */
131 if (!priv->max_vlan_filters) {
132 DPAA2_PMD_INFO("VLAN filter not available");
136 if (dev->data->dev_conf.rxmode.offloads &
137 DEV_RX_OFFLOAD_VLAN_FILTER)
138 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
141 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
144 DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
147 if (mask & ETH_VLAN_EXTEND_MASK) {
148 if (dev->data->dev_conf.rxmode.offloads &
149 DEV_RX_OFFLOAD_VLAN_EXTEND)
150 DPAA2_PMD_INFO("VLAN extend offload not supported");
157 dpaa2_fw_version_get(struct rte_eth_dev *dev,
162 struct dpaa2_dev_priv *priv = dev->data->dev_private;
163 struct fsl_mc_io *dpni = priv->hw;
164 struct mc_soc_version mc_plat_info = {0};
165 struct mc_version mc_ver_info = {0};
167 PMD_INIT_FUNC_TRACE();
169 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
170 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
172 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
173 DPAA2_PMD_WARN("\tmc_get_version failed");
175 ret = snprintf(fw_version, fw_size,
180 mc_ver_info.revision);
182 ret += 1; /* add the size of '\0' */
183 if (fw_size < (uint32_t)ret)
190 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
192 struct dpaa2_dev_priv *priv = dev->data->dev_private;
194 PMD_INIT_FUNC_TRACE();
196 dev_info->if_index = priv->hw_id;
198 dev_info->max_mac_addrs = priv->max_mac_filters;
199 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
200 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
201 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
202 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
203 dev_info->rx_offload_capa = dev_rx_offloads_sup |
204 dev_rx_offloads_nodis;
205 dev_info->tx_offload_capa = dev_tx_offloads_sup |
206 dev_tx_offloads_nodis;
207 dev_info->speed_capa = ETH_LINK_SPEED_1G |
208 ETH_LINK_SPEED_2_5G |
211 dev_info->max_hash_mac_addrs = 0;
212 dev_info->max_vfs = 0;
213 dev_info->max_vmdq_pools = ETH_16_POOLS;
214 dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
218 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
220 struct dpaa2_dev_priv *priv = dev->data->dev_private;
223 struct dpaa2_queue *mc_q, *mcq;
226 struct dpaa2_queue *dpaa2_q;
228 PMD_INIT_FUNC_TRACE();
230 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
231 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
232 RTE_CACHE_LINE_SIZE);
234 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
238 for (i = 0; i < priv->nb_rx_queues; i++) {
240 priv->rx_vq[i] = mc_q++;
241 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
242 dpaa2_q->q_storage = rte_malloc("dq_storage",
243 sizeof(struct queue_storage_info_t),
244 RTE_CACHE_LINE_SIZE);
245 if (!dpaa2_q->q_storage)
248 memset(dpaa2_q->q_storage, 0,
249 sizeof(struct queue_storage_info_t));
250 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
254 for (i = 0; i < priv->nb_tx_queues; i++) {
256 mc_q->flow_id = 0xffff;
257 priv->tx_vq[i] = mc_q++;
258 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
259 dpaa2_q->cscn = rte_malloc(NULL,
260 sizeof(struct qbman_result), 16);
266 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
267 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
268 mcq->tc_index = DPAA2_DEF_TC;
269 mcq->flow_id = dist_idx;
277 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
278 rte_free(dpaa2_q->cscn);
279 priv->tx_vq[i--] = NULL;
281 i = priv->nb_rx_queues;
284 mc_q = priv->rx_vq[0];
286 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
287 dpaa2_free_dq_storage(dpaa2_q->q_storage);
288 rte_free(dpaa2_q->q_storage);
289 priv->rx_vq[i--] = NULL;
296 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
298 struct dpaa2_dev_priv *priv = dev->data->dev_private;
299 struct fsl_mc_io *dpni = priv->hw;
300 struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
301 uint64_t rx_offloads = eth_conf->rxmode.offloads;
302 uint64_t tx_offloads = eth_conf->txmode.offloads;
303 int rx_l3_csum_offload = false;
304 int rx_l4_csum_offload = false;
305 int tx_l3_csum_offload = false;
306 int tx_l4_csum_offload = false;
309 PMD_INIT_FUNC_TRACE();
311 /* Rx offloads validation */
312 if (dev_rx_offloads_nodis & ~rx_offloads) {
314 "Rx offloads non configurable - requested 0x%" PRIx64
315 " ignored 0x%" PRIx64,
316 rx_offloads, dev_rx_offloads_nodis);
319 /* Tx offloads validation */
320 if (dev_tx_offloads_nodis & ~tx_offloads) {
322 "Tx offloads non configurable - requested 0x%" PRIx64
323 " ignored 0x%" PRIx64,
324 tx_offloads, dev_tx_offloads_nodis);
327 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
328 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
329 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
330 priv->token, eth_conf->rxmode.max_rx_pkt_len);
333 "Unable to set mtu. check config");
341 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
342 ret = dpaa2_setup_flow_dist(dev,
343 eth_conf->rx_adv_conf.rss_conf.rss_hf);
345 DPAA2_PMD_ERR("Unable to set flow distribution."
346 "Check queue config");
351 if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
352 rx_l3_csum_offload = true;
354 if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
355 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM))
356 rx_l4_csum_offload = true;
358 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
359 DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
361 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
365 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
366 DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
368 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
372 if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
373 tx_l3_csum_offload = true;
375 if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
376 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
377 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
378 tx_l4_csum_offload = true;
380 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
381 DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
383 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
387 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
388 DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
390 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
394 /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
395 * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
396 * to 0 for LS2 in the hardware thus disabling data/annotation
397 * stashing. For LX2 this is fixed in hardware and thus hash result and
398 * parse results can be received in FD using this option.
400 if (dpaa2_svr_family == SVR_LX2160A) {
401 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
402 DPNI_FLCTYPE_HASH, true);
404 DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
409 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
411 /* update the current status */
412 dpaa2_dev_link_update(dev, 0);
417 /* Function to setup RX flow information. It contains traffic class ID,
418 * flow ID, destination configuration etc.
421 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
422 uint16_t rx_queue_id,
423 uint16_t nb_rx_desc __rte_unused,
424 unsigned int socket_id __rte_unused,
425 const struct rte_eth_rxconf *rx_conf __rte_unused,
426 struct rte_mempool *mb_pool)
428 struct dpaa2_dev_priv *priv = dev->data->dev_private;
429 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
430 struct dpaa2_queue *dpaa2_q;
431 struct dpni_queue cfg;
437 PMD_INIT_FUNC_TRACE();
439 DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
440 dev, rx_queue_id, mb_pool, rx_conf);
442 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
443 bpid = mempool_to_bpid(mb_pool);
444 ret = dpaa2_attach_bp_list(priv,
445 rte_dpaa2_bpid_info[bpid].bp_list);
449 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
450 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
452 /*Get the flow id from given VQ id*/
453 flow_id = rx_queue_id % priv->nb_rx_queues;
454 memset(&cfg, 0, sizeof(struct dpni_queue));
456 options = options | DPNI_QUEUE_OPT_USER_CTX;
457 cfg.user_context = (size_t)(dpaa2_q);
459 /*if ls2088 or rev2 device, enable the stashing */
461 if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
462 options |= DPNI_QUEUE_OPT_FLC;
463 cfg.flc.stash_control = true;
464 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
465 /* 00 00 00 - last 6 bit represent annotation, context stashing,
466 * data stashing setting 01 01 00 (0x14)
467 * (in following order ->DS AS CS)
468 * to enable 1 line data, 1 line annotation.
469 * For LX2, this setting should be 01 00 00 (0x10)
471 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
472 cfg.flc.value |= 0x10;
474 cfg.flc.value |= 0x14;
476 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
477 dpaa2_q->tc_index, flow_id, options, &cfg);
479 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
483 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
484 struct dpni_taildrop taildrop;
487 /*enabling per rx queue congestion control */
488 taildrop.threshold = CONG_THRESHOLD_RX_Q;
489 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
490 taildrop.oal = CONG_RX_OAL;
491 DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d",
493 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
494 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
495 dpaa2_q->tc_index, flow_id, &taildrop);
497 DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
503 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
508 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
509 uint16_t tx_queue_id,
510 uint16_t nb_tx_desc __rte_unused,
511 unsigned int socket_id __rte_unused,
512 const struct rte_eth_txconf *tx_conf __rte_unused)
514 struct dpaa2_dev_priv *priv = dev->data->dev_private;
515 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
516 priv->tx_vq[tx_queue_id];
517 struct fsl_mc_io *dpni = priv->hw;
518 struct dpni_queue tx_conf_cfg;
519 struct dpni_queue tx_flow_cfg;
520 uint8_t options = 0, flow_id;
524 PMD_INIT_FUNC_TRACE();
526 /* Return if queue already configured */
527 if (dpaa2_q->flow_id != 0xffff) {
528 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
532 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
533 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
538 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
539 tc_id, flow_id, options, &tx_flow_cfg);
541 DPAA2_PMD_ERR("Error in setting the tx flow: "
542 "tc_id=%d, flow=%d err=%d",
543 tc_id, flow_id, ret);
547 dpaa2_q->flow_id = flow_id;
549 if (tx_queue_id == 0) {
550 /*Set tx-conf and error configuration*/
551 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
555 DPAA2_PMD_ERR("Error in set tx conf mode settings: "
560 dpaa2_q->tc_index = tc_id;
562 if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
563 struct dpni_congestion_notification_cfg cong_notif_cfg;
565 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
566 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
567 /* Notify that the queue is not congested when the data in
568 * the queue is below this thershold.
570 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
571 cong_notif_cfg.message_ctx = 0;
572 cong_notif_cfg.message_iova = (size_t)dpaa2_q->cscn;
573 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
574 cong_notif_cfg.notification_mode =
575 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
576 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
577 DPNI_CONG_OPT_COHERENT_WRITE;
579 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
586 "Error in setting tx congestion notification: "
591 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
596 dpaa2_dev_rx_queue_release(void *q __rte_unused)
598 PMD_INIT_FUNC_TRACE();
602 dpaa2_dev_tx_queue_release(void *q __rte_unused)
604 PMD_INIT_FUNC_TRACE();
608 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
611 struct dpaa2_dev_priv *priv = dev->data->dev_private;
612 struct dpaa2_queue *dpaa2_q;
613 struct qbman_swp *swp;
614 struct qbman_fq_query_np_rslt state;
615 uint32_t frame_cnt = 0;
617 PMD_INIT_FUNC_TRACE();
619 if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
620 ret = dpaa2_affine_qbman_swp();
622 DPAA2_PMD_ERR("Failure in affining portal");
626 swp = DPAA2_PER_LCORE_PORTAL;
628 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
630 if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
631 frame_cnt = qbman_fq_state_frame_count(&state);
632 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
633 rx_queue_id, frame_cnt);
638 static const uint32_t *
639 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
641 static const uint32_t ptypes[] = {
642 /*todo -= add more types */
645 RTE_PTYPE_L3_IPV4_EXT,
647 RTE_PTYPE_L3_IPV6_EXT,
655 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx)
661 * Dpaa2 link Interrupt handler
664 * The address of parameter (struct rte_eth_dev *) regsitered before.
670 dpaa2_interrupt_handler(void *param)
672 struct rte_eth_dev *dev = param;
673 struct dpaa2_dev_priv *priv = dev->data->dev_private;
674 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
676 int irq_index = DPNI_IRQ_INDEX;
677 unsigned int status = 0, clear = 0;
679 PMD_INIT_FUNC_TRACE();
682 DPAA2_PMD_ERR("dpni is NULL");
686 ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
689 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
694 if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
695 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
696 dpaa2_dev_link_update(dev, 0);
697 /* calling all the apps registered for link status event */
698 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
702 ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
705 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
709 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
712 struct dpaa2_dev_priv *priv = dev->data->dev_private;
713 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
714 int irq_index = DPNI_IRQ_INDEX;
715 unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
717 PMD_INIT_FUNC_TRACE();
719 err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
722 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
727 err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
730 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
737 dpaa2_dev_start(struct rte_eth_dev *dev)
739 struct rte_device *rdev = dev->device;
740 struct rte_dpaa2_device *dpaa2_dev;
741 struct rte_eth_dev_data *data = dev->data;
742 struct dpaa2_dev_priv *priv = data->dev_private;
743 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
744 struct dpni_queue cfg;
745 struct dpni_error_cfg err_cfg;
747 struct dpni_queue_id qid;
748 struct dpaa2_queue *dpaa2_q;
750 struct rte_intr_handle *intr_handle;
752 dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
753 intr_handle = &dpaa2_dev->intr_handle;
755 PMD_INIT_FUNC_TRACE();
757 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
759 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
764 /* Power up the phy. Needed to make the link go UP */
765 dpaa2_dev_set_link_up(dev);
767 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
768 DPNI_QUEUE_TX, &qdid);
770 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
775 for (i = 0; i < data->nb_rx_queues; i++) {
776 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
777 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
778 DPNI_QUEUE_RX, dpaa2_q->tc_index,
779 dpaa2_q->flow_id, &cfg, &qid);
781 DPAA2_PMD_ERR("Error in getting flow information: "
785 dpaa2_q->fqid = qid.fqid;
788 /*checksum errors, send them to normal path and set it in annotation */
789 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
791 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
792 err_cfg.set_frame_annotation = true;
794 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
795 priv->token, &err_cfg);
797 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
802 /* if the interrupts were configured on this devices*/
803 if (intr_handle && (intr_handle->fd) &&
804 (dev->data->dev_conf.intr_conf.lsc != 0)) {
805 /* Registering LSC interrupt handler */
806 rte_intr_callback_register(intr_handle,
807 dpaa2_interrupt_handler,
810 /* enable vfio intr/eventfd mapping
811 * Interrupt index 0 is required, so we can not use
814 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
816 /* enable dpni_irqs */
817 dpaa2_eth_setup_irqs(dev, 1);
824 * This routine disables all traffic on the adapter by issuing a
825 * global reset on the MAC.
828 dpaa2_dev_stop(struct rte_eth_dev *dev)
830 struct dpaa2_dev_priv *priv = dev->data->dev_private;
831 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
833 struct rte_eth_link link;
834 struct rte_intr_handle *intr_handle = dev->intr_handle;
836 PMD_INIT_FUNC_TRACE();
838 /* reset interrupt callback */
839 if (intr_handle && (intr_handle->fd) &&
840 (dev->data->dev_conf.intr_conf.lsc != 0)) {
841 /*disable dpni irqs */
842 dpaa2_eth_setup_irqs(dev, 0);
844 /* disable vfio intr before callback unregister */
845 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
847 /* Unregistering LSC interrupt handler */
848 rte_intr_callback_unregister(intr_handle,
849 dpaa2_interrupt_handler,
853 dpaa2_dev_set_link_down(dev);
855 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
857 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
862 /* clear the recorded link status */
863 memset(&link, 0, sizeof(link));
864 rte_eth_linkstatus_set(dev, &link);
868 dpaa2_dev_close(struct rte_eth_dev *dev)
870 struct rte_eth_dev_data *data = dev->data;
871 struct dpaa2_dev_priv *priv = dev->data->dev_private;
872 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
874 struct rte_eth_link link;
875 struct dpaa2_queue *dpaa2_q;
877 PMD_INIT_FUNC_TRACE();
879 for (i = 0; i < data->nb_tx_queues; i++) {
880 dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
881 if (!dpaa2_q->cscn) {
882 rte_free(dpaa2_q->cscn);
883 dpaa2_q->cscn = NULL;
887 /* Clean the device first */
888 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
890 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
894 memset(&link, 0, sizeof(link));
895 rte_eth_linkstatus_set(dev, &link);
899 dpaa2_dev_promiscuous_enable(
900 struct rte_eth_dev *dev)
903 struct dpaa2_dev_priv *priv = dev->data->dev_private;
904 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
906 PMD_INIT_FUNC_TRACE();
909 DPAA2_PMD_ERR("dpni is NULL");
913 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
915 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
917 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
919 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
923 dpaa2_dev_promiscuous_disable(
924 struct rte_eth_dev *dev)
927 struct dpaa2_dev_priv *priv = dev->data->dev_private;
928 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
930 PMD_INIT_FUNC_TRACE();
933 DPAA2_PMD_ERR("dpni is NULL");
937 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
939 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
941 if (dev->data->all_multicast == 0) {
942 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
945 DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
951 dpaa2_dev_allmulticast_enable(
952 struct rte_eth_dev *dev)
955 struct dpaa2_dev_priv *priv = dev->data->dev_private;
956 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
958 PMD_INIT_FUNC_TRACE();
961 DPAA2_PMD_ERR("dpni is NULL");
965 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
967 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
971 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
974 struct dpaa2_dev_priv *priv = dev->data->dev_private;
975 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
977 PMD_INIT_FUNC_TRACE();
980 DPAA2_PMD_ERR("dpni is NULL");
984 /* must remain on for all promiscuous */
985 if (dev->data->promiscuous == 1)
988 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
990 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
994 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
997 struct dpaa2_dev_priv *priv = dev->data->dev_private;
998 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
999 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
1002 PMD_INIT_FUNC_TRACE();
1005 DPAA2_PMD_ERR("dpni is NULL");
1009 /* check that mtu is within the allowed range */
1010 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
1013 if (frame_size > ETHER_MAX_LEN)
1014 dev->data->dev_conf.rxmode.offloads &=
1015 DEV_RX_OFFLOAD_JUMBO_FRAME;
1017 dev->data->dev_conf.rxmode.offloads &=
1018 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1020 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1022 /* Set the Max Rx frame length as 'mtu' +
1023 * Maximum Ethernet header length
1025 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1028 DPAA2_PMD_ERR("Setting the max frame length failed");
1031 DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1036 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1037 struct ether_addr *addr,
1038 __rte_unused uint32_t index,
1039 __rte_unused uint32_t pool)
1042 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1043 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1045 PMD_INIT_FUNC_TRACE();
1048 DPAA2_PMD_ERR("dpni is NULL");
1052 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1053 priv->token, addr->addr_bytes);
1056 "error: Adding the MAC ADDR failed: err = %d", ret);
1061 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1065 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1066 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1067 struct rte_eth_dev_data *data = dev->data;
1068 struct ether_addr *macaddr;
1070 PMD_INIT_FUNC_TRACE();
1072 macaddr = &data->mac_addrs[index];
1075 DPAA2_PMD_ERR("dpni is NULL");
1079 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1080 priv->token, macaddr->addr_bytes);
1083 "error: Removing the MAC ADDR failed: err = %d", ret);
1087 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1088 struct ether_addr *addr)
1091 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1092 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1094 PMD_INIT_FUNC_TRACE();
1097 DPAA2_PMD_ERR("dpni is NULL");
1101 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1102 priv->token, addr->addr_bytes);
1106 "error: Setting the MAC ADDR failed %d", ret);
1112 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1113 struct rte_eth_stats *stats)
1115 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1116 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1118 uint8_t page0 = 0, page1 = 1, page2 = 2;
1119 union dpni_statistics value;
1121 memset(&value, 0, sizeof(union dpni_statistics));
1123 PMD_INIT_FUNC_TRACE();
1126 DPAA2_PMD_ERR("dpni is NULL");
1131 DPAA2_PMD_ERR("stats is NULL");
1135 /*Get Counters from page_0*/
1136 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1141 stats->ipackets = value.page_0.ingress_all_frames;
1142 stats->ibytes = value.page_0.ingress_all_bytes;
1144 /*Get Counters from page_1*/
1145 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1150 stats->opackets = value.page_1.egress_all_frames;
1151 stats->obytes = value.page_1.egress_all_bytes;
1153 /*Get Counters from page_2*/
1154 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1159 /* Ingress drop frame count due to configured rules */
1160 stats->ierrors = value.page_2.ingress_filtered_frames;
1161 /* Ingress drop frame count due to error */
1162 stats->ierrors += value.page_2.ingress_discarded_frames;
1164 stats->oerrors = value.page_2.egress_discarded_frames;
1165 stats->imissed = value.page_2.ingress_nobuffer_discards;
1170 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1175 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1178 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1179 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1181 union dpni_statistics value[3] = {};
1182 unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1190 /* Get Counters from page_0*/
1191 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1196 /* Get Counters from page_1*/
1197 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1202 /* Get Counters from page_2*/
1203 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1208 for (i = 0; i < num; i++) {
1210 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1211 raw.counter[dpaa2_xstats_strings[i].stats_id];
1215 DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1220 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1221 struct rte_eth_xstat_name *xstats_names,
1224 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1226 if (limit < stat_cnt)
1229 if (xstats_names != NULL)
1230 for (i = 0; i < stat_cnt; i++)
1231 snprintf(xstats_names[i].name,
1232 sizeof(xstats_names[i].name),
1234 dpaa2_xstats_strings[i].name);
1240 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1241 uint64_t *values, unsigned int n)
1243 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1244 uint64_t values_copy[stat_cnt];
1247 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1248 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1250 union dpni_statistics value[3] = {};
1258 /* Get Counters from page_0*/
1259 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1264 /* Get Counters from page_1*/
1265 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1270 /* Get Counters from page_2*/
1271 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1276 for (i = 0; i < stat_cnt; i++) {
1277 values[i] = value[dpaa2_xstats_strings[i].page_id].
1278 raw.counter[dpaa2_xstats_strings[i].stats_id];
1283 dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1285 for (i = 0; i < n; i++) {
1286 if (ids[i] >= stat_cnt) {
1287 DPAA2_PMD_ERR("xstats id value isn't valid");
1290 values[i] = values_copy[ids[i]];
1296 dpaa2_xstats_get_names_by_id(
1297 struct rte_eth_dev *dev,
1298 struct rte_eth_xstat_name *xstats_names,
1299 const uint64_t *ids,
1302 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1303 struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1306 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1308 dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1310 for (i = 0; i < limit; i++) {
1311 if (ids[i] >= stat_cnt) {
1312 DPAA2_PMD_ERR("xstats id value isn't valid");
1315 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1321 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1323 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1324 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1327 PMD_INIT_FUNC_TRACE();
1330 DPAA2_PMD_ERR("dpni is NULL");
1334 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1341 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1345 /* return 0 means link status changed, -1 means not changed */
1347 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1348 int wait_to_complete __rte_unused)
1351 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1352 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1353 struct rte_eth_link link;
1354 struct dpni_link_state state = {0};
1357 DPAA2_PMD_ERR("dpni is NULL");
1361 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1363 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1367 memset(&link, 0, sizeof(struct rte_eth_link));
1368 link.link_status = state.up;
1369 link.link_speed = state.rate;
1371 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1372 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1374 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1376 ret = rte_eth_linkstatus_set(dev, &link);
1378 DPAA2_PMD_DEBUG("No change in status");
1380 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1381 link.link_status ? "Up" : "Down");
1387 * Toggle the DPNI to enable, if not already enabled.
1388 * This is not strictly PHY up/down - it is more of logical toggling.
1391 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1394 struct dpaa2_dev_priv *priv;
1395 struct fsl_mc_io *dpni;
1397 struct dpni_link_state state = {0};
1399 priv = dev->data->dev_private;
1400 dpni = (struct fsl_mc_io *)priv->hw;
1403 DPAA2_PMD_ERR("dpni is NULL");
1407 /* Check if DPNI is currently enabled */
1408 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1410 /* Unable to obtain dpni status; Not continuing */
1411 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1415 /* Enable link if not already enabled */
1417 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1419 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1423 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1425 DPAA2_PMD_ERR("Unable to get link state (%d)", ret);
1429 /* changing tx burst function to start enqueues */
1430 dev->tx_pkt_burst = dpaa2_dev_tx;
1431 dev->data->dev_link.link_status = state.up;
1434 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1436 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1441 * Toggle the DPNI to disable, if not already disabled.
1442 * This is not strictly PHY up/down - it is more of logical toggling.
1445 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1448 struct dpaa2_dev_priv *priv;
1449 struct fsl_mc_io *dpni;
1450 int dpni_enabled = 0;
1453 PMD_INIT_FUNC_TRACE();
1455 priv = dev->data->dev_private;
1456 dpni = (struct fsl_mc_io *)priv->hw;
1459 DPAA2_PMD_ERR("Device has not yet been configured");
1463 /*changing tx burst function to avoid any more enqueues */
1464 dev->tx_pkt_burst = dummy_dev_tx;
1466 /* Loop while dpni_disable() attempts to drain the egress FQs
1467 * and confirm them back to us.
1470 ret = dpni_disable(dpni, 0, priv->token);
1472 DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1475 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1477 DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1481 /* Allow the MC some slack */
1482 rte_delay_us(100 * 1000);
1483 } while (dpni_enabled && --retries);
1486 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1487 /* todo- we may have to manually cleanup queues.
1490 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1491 dev->data->port_id);
1494 dev->data->dev_link.link_status = 0;
1500 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1503 struct dpaa2_dev_priv *priv;
1504 struct fsl_mc_io *dpni;
1505 struct dpni_link_state state = {0};
1507 PMD_INIT_FUNC_TRACE();
1509 priv = dev->data->dev_private;
1510 dpni = (struct fsl_mc_io *)priv->hw;
1512 if (dpni == NULL || fc_conf == NULL) {
1513 DPAA2_PMD_ERR("device not configured");
1517 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1519 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1523 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1524 if (state.options & DPNI_LINK_OPT_PAUSE) {
1525 /* DPNI_LINK_OPT_PAUSE set
1526 * if ASYM_PAUSE not set,
1527 * RX Side flow control (handle received Pause frame)
1528 * TX side flow control (send Pause frame)
1529 * if ASYM_PAUSE set,
1530 * RX Side flow control (handle received Pause frame)
1531 * No TX side flow control (send Pause frame disabled)
1533 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1534 fc_conf->mode = RTE_FC_FULL;
1536 fc_conf->mode = RTE_FC_RX_PAUSE;
1538 /* DPNI_LINK_OPT_PAUSE not set
1539 * if ASYM_PAUSE set,
1540 * TX side flow control (send Pause frame)
1541 * No RX side flow control (No action on pause frame rx)
1542 * if ASYM_PAUSE not set,
1543 * Flow control disabled
1545 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1546 fc_conf->mode = RTE_FC_TX_PAUSE;
1548 fc_conf->mode = RTE_FC_NONE;
1555 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1558 struct dpaa2_dev_priv *priv;
1559 struct fsl_mc_io *dpni;
1560 struct dpni_link_state state = {0};
1561 struct dpni_link_cfg cfg = {0};
1563 PMD_INIT_FUNC_TRACE();
1565 priv = dev->data->dev_private;
1566 dpni = (struct fsl_mc_io *)priv->hw;
1569 DPAA2_PMD_ERR("dpni is NULL");
1573 /* It is necessary to obtain the current state before setting fc_conf
1574 * as MC would return error in case rate, autoneg or duplex values are
1577 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1579 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1583 /* Disable link before setting configuration */
1584 dpaa2_dev_set_link_down(dev);
1586 /* Based on fc_conf, update cfg */
1587 cfg.rate = state.rate;
1588 cfg.options = state.options;
1590 /* update cfg with fc_conf */
1591 switch (fc_conf->mode) {
1593 /* Full flow control;
1594 * OPT_PAUSE set, ASYM_PAUSE not set
1596 cfg.options |= DPNI_LINK_OPT_PAUSE;
1597 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1599 case RTE_FC_TX_PAUSE:
1600 /* Enable RX flow control
1601 * OPT_PAUSE not set;
1604 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1605 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1607 case RTE_FC_RX_PAUSE:
1608 /* Enable TX Flow control
1612 cfg.options |= DPNI_LINK_OPT_PAUSE;
1613 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1616 /* Disable Flow control
1618 * ASYM_PAUSE not set
1620 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1621 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1624 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1629 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1631 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1635 dpaa2_dev_set_link_up(dev);
1641 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1642 struct rte_eth_rss_conf *rss_conf)
1644 struct rte_eth_dev_data *data = dev->data;
1645 struct rte_eth_conf *eth_conf = &data->dev_conf;
1648 PMD_INIT_FUNC_TRACE();
1650 if (rss_conf->rss_hf) {
1651 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1653 DPAA2_PMD_ERR("Unable to set flow dist");
1657 ret = dpaa2_remove_flow_dist(dev, 0);
1659 DPAA2_PMD_ERR("Unable to remove flow dist");
1663 eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1668 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1669 struct rte_eth_rss_conf *rss_conf)
1671 struct rte_eth_dev_data *data = dev->data;
1672 struct rte_eth_conf *eth_conf = &data->dev_conf;
1674 /* dpaa2 does not support rss_key, so length should be 0*/
1675 rss_conf->rss_key_len = 0;
1676 rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1680 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
1681 int eth_rx_queue_id,
1683 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
1685 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1686 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1687 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1688 uint8_t flow_id = dpaa2_ethq->flow_id;
1689 struct dpni_queue cfg;
1693 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
1694 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
1695 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
1696 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
1700 memset(&cfg, 0, sizeof(struct dpni_queue));
1701 options = DPNI_QUEUE_OPT_DEST;
1702 cfg.destination.type = DPNI_DEST_DPCON;
1703 cfg.destination.id = dpcon_id;
1704 cfg.destination.priority = queue_conf->ev.priority;
1706 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
1707 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
1708 cfg.destination.hold_active = 1;
1711 options |= DPNI_QUEUE_OPT_USER_CTX;
1712 cfg.user_context = (size_t)(dpaa2_ethq);
1714 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1715 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1717 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1721 memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
1726 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
1727 int eth_rx_queue_id)
1729 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1730 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1731 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1732 uint8_t flow_id = dpaa2_ethq->flow_id;
1733 struct dpni_queue cfg;
1737 memset(&cfg, 0, sizeof(struct dpni_queue));
1738 options = DPNI_QUEUE_OPT_DEST;
1739 cfg.destination.type = DPNI_DEST_NONE;
1741 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1742 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1744 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1749 static struct eth_dev_ops dpaa2_ethdev_ops = {
1750 .dev_configure = dpaa2_eth_dev_configure,
1751 .dev_start = dpaa2_dev_start,
1752 .dev_stop = dpaa2_dev_stop,
1753 .dev_close = dpaa2_dev_close,
1754 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
1755 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
1756 .allmulticast_enable = dpaa2_dev_allmulticast_enable,
1757 .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1758 .dev_set_link_up = dpaa2_dev_set_link_up,
1759 .dev_set_link_down = dpaa2_dev_set_link_down,
1760 .link_update = dpaa2_dev_link_update,
1761 .stats_get = dpaa2_dev_stats_get,
1762 .xstats_get = dpaa2_dev_xstats_get,
1763 .xstats_get_by_id = dpaa2_xstats_get_by_id,
1764 .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
1765 .xstats_get_names = dpaa2_xstats_get_names,
1766 .stats_reset = dpaa2_dev_stats_reset,
1767 .xstats_reset = dpaa2_dev_stats_reset,
1768 .fw_version_get = dpaa2_fw_version_get,
1769 .dev_infos_get = dpaa2_dev_info_get,
1770 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1771 .mtu_set = dpaa2_dev_mtu_set,
1772 .vlan_filter_set = dpaa2_vlan_filter_set,
1773 .vlan_offload_set = dpaa2_vlan_offload_set,
1774 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
1775 .rx_queue_release = dpaa2_dev_rx_queue_release,
1776 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
1777 .tx_queue_release = dpaa2_dev_tx_queue_release,
1778 .rx_queue_count = dpaa2_dev_rx_queue_count,
1779 .flow_ctrl_get = dpaa2_flow_ctrl_get,
1780 .flow_ctrl_set = dpaa2_flow_ctrl_set,
1781 .mac_addr_add = dpaa2_dev_add_mac_addr,
1782 .mac_addr_remove = dpaa2_dev_remove_mac_addr,
1783 .mac_addr_set = dpaa2_dev_set_mac_addr,
1784 .rss_hash_update = dpaa2_dev_rss_hash_update,
1785 .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
1789 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
1791 struct rte_device *dev = eth_dev->device;
1792 struct rte_dpaa2_device *dpaa2_dev;
1793 struct fsl_mc_io *dpni_dev;
1794 struct dpni_attr attr;
1795 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1796 struct dpni_buffer_layout layout;
1799 PMD_INIT_FUNC_TRACE();
1801 /* For secondary processes, the primary has done all the work */
1802 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1805 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1807 hw_id = dpaa2_dev->object_id;
1809 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
1811 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
1815 dpni_dev->regs = rte_mcp_ptr_list[0];
1816 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
1819 "Failure in opening dpni@%d with err code %d",
1825 /* Clean the device first */
1826 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
1828 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
1833 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
1836 "Failure in get dpni@%d attribute, err code %d",
1841 priv->num_rx_tc = attr.num_rx_tcs;
1843 /* Resetting the "num_rx_queues" to equal number of queues in first TC
1844 * as only one TC is supported on Rx Side. Once Multiple TCs will be
1845 * in use for Rx processing then this will be changed or removed.
1847 priv->nb_rx_queues = attr.num_queues;
1849 /* Using number of TX queues as number of TX TCs */
1850 priv->nb_tx_queues = attr.num_tx_tcs;
1852 DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
1853 priv->num_rx_tc, priv->nb_rx_queues,
1854 priv->nb_tx_queues);
1856 priv->hw = dpni_dev;
1857 priv->hw_id = hw_id;
1858 priv->options = attr.options;
1859 priv->max_mac_filters = attr.mac_filter_entries;
1860 priv->max_vlan_filters = attr.vlan_filter_entries;
1863 /* Allocate memory for hardware structure for queues */
1864 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
1866 DPAA2_PMD_ERR("Queue allocation Failed");
1870 /* Allocate memory for storing MAC addresses */
1871 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
1872 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
1873 if (eth_dev->data->mac_addrs == NULL) {
1875 "Failed to allocate %d bytes needed to store MAC addresses",
1876 ETHER_ADDR_LEN * attr.mac_filter_entries);
1881 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1883 (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
1885 DPAA2_PMD_ERR("DPNI get mac address failed:Err Code = %d",
1890 /* ... tx buffer layout ... */
1891 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1892 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1893 layout.pass_frame_status = 1;
1894 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1895 DPNI_QUEUE_TX, &layout);
1897 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
1901 /* ... tx-conf and error buffer layout ... */
1902 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1903 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1904 layout.pass_frame_status = 1;
1905 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1906 DPNI_QUEUE_TX_CONFIRM, &layout);
1908 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
1913 eth_dev->dev_ops = &dpaa2_ethdev_ops;
1915 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
1916 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
1918 RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
1921 dpaa2_dev_uninit(eth_dev);
1926 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
1928 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1929 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1931 struct dpaa2_queue *dpaa2_q;
1933 PMD_INIT_FUNC_TRACE();
1935 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1939 DPAA2_PMD_WARN("Already closed or not started");
1943 dpaa2_dev_close(eth_dev);
1945 if (priv->rx_vq[0]) {
1946 /* cleaning up queue storage */
1947 for (i = 0; i < priv->nb_rx_queues; i++) {
1948 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1949 if (dpaa2_q->q_storage)
1950 rte_free(dpaa2_q->q_storage);
1952 /*free the all queue memory */
1953 rte_free(priv->rx_vq[0]);
1954 priv->rx_vq[0] = NULL;
1957 /* free memory for storing MAC addresses */
1958 if (eth_dev->data->mac_addrs) {
1959 rte_free(eth_dev->data->mac_addrs);
1960 eth_dev->data->mac_addrs = NULL;
1963 /* Close the device at underlying layer*/
1964 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
1967 "Failure closing dpni device with err code %d",
1971 /* Free the allocated memory for ethernet private data and dpni*/
1975 eth_dev->dev_ops = NULL;
1976 eth_dev->rx_pkt_burst = NULL;
1977 eth_dev->tx_pkt_burst = NULL;
1979 DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
1984 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
1985 struct rte_dpaa2_device *dpaa2_dev)
1987 struct rte_eth_dev *eth_dev;
1990 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1991 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
1994 eth_dev->data->dev_private = rte_zmalloc(
1995 "ethdev private structure",
1996 sizeof(struct dpaa2_dev_priv),
1997 RTE_CACHE_LINE_SIZE);
1998 if (eth_dev->data->dev_private == NULL) {
2000 "Unable to allocate memory for private data");
2001 rte_eth_dev_release_port(eth_dev);
2005 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2010 eth_dev->device = &dpaa2_dev->device;
2011 eth_dev->device->driver = &dpaa2_drv->driver;
2013 dpaa2_dev->eth_dev = eth_dev;
2014 eth_dev->data->rx_mbuf_alloc_failed = 0;
2016 if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2017 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2019 /* Invoke PMD device initialization function */
2020 diag = dpaa2_dev_init(eth_dev);
2022 rte_eth_dev_probing_finish(eth_dev);
2026 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2027 rte_free(eth_dev->data->dev_private);
2028 rte_eth_dev_release_port(eth_dev);
2033 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2035 struct rte_eth_dev *eth_dev;
2037 eth_dev = dpaa2_dev->eth_dev;
2038 dpaa2_dev_uninit(eth_dev);
2040 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2041 rte_free(eth_dev->data->dev_private);
2042 rte_eth_dev_release_port(eth_dev);
2047 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2048 .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2049 .drv_type = DPAA2_ETH,
2050 .probe = rte_dpaa2_probe,
2051 .remove = rte_dpaa2_remove,
2054 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2056 RTE_INIT(dpaa2_pmd_init_log);
2058 dpaa2_pmd_init_log(void)
2060 dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2061 if (dpaa2_logtype_pmd >= 0)
2062 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);