4 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
5 * Copyright (c) 2016 NXP. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
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12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Freescale Semiconductor, Inc nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include <rte_ethdev.h>
39 #include <rte_malloc.h>
40 #include <rte_memcpy.h>
41 #include <rte_string_fns.h>
42 #include <rte_cycles.h>
43 #include <rte_kvargs.h>
45 #include <rte_ethdev.h>
46 #include <rte_fslmc.h>
48 #include <fslmc_logs.h>
49 #include <fslmc_vfio.h>
50 #include <dpaa2_hw_pvt.h>
51 #include <dpaa2_hw_mempool.h>
52 #include <dpaa2_hw_dpio.h>
54 #include "dpaa2_ethdev.h"
56 static struct rte_dpaa2_driver rte_dpaa2_pmd;
57 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
58 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
59 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
62 * Atomically reads the link status information from global
63 * structure rte_eth_dev.
66 * - Pointer to the structure rte_eth_dev to read from.
67 * - Pointer to the buffer to be saved with the link status.
71 * - On failure, negative value.
74 dpaa2_dev_atomic_read_link_status(struct rte_eth_dev *dev,
75 struct rte_eth_link *link)
77 struct rte_eth_link *dst = link;
78 struct rte_eth_link *src = &dev->data->dev_link;
80 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
81 *(uint64_t *)src) == 0)
88 * Atomically writes the link status information into global
89 * structure rte_eth_dev.
92 * - Pointer to the structure rte_eth_dev to read from.
93 * - Pointer to the buffer to be saved with the link status.
97 * - On failure, negative value.
100 dpaa2_dev_atomic_write_link_status(struct rte_eth_dev *dev,
101 struct rte_eth_link *link)
103 struct rte_eth_link *dst = &dev->data->dev_link;
104 struct rte_eth_link *src = link;
106 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
107 *(uint64_t *)src) == 0)
114 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
117 struct dpaa2_dev_priv *priv = dev->data->dev_private;
118 struct fsl_mc_io *dpni = priv->hw;
120 PMD_INIT_FUNC_TRACE();
123 RTE_LOG(ERR, PMD, "dpni is NULL");
128 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
129 priv->token, vlan_id);
131 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
132 priv->token, vlan_id);
135 PMD_DRV_LOG(ERR, "ret = %d Unable to add/rem vlan %d hwid =%d",
136 ret, vlan_id, priv->hw_id);
142 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
144 struct dpaa2_dev_priv *priv = dev->data->dev_private;
145 struct fsl_mc_io *dpni = priv->hw;
148 PMD_INIT_FUNC_TRACE();
150 if (mask & ETH_VLAN_FILTER_MASK) {
151 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
152 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
155 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
158 RTE_LOG(ERR, PMD, "Unable to set vlan filter ret = %d",
164 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
166 struct dpaa2_dev_priv *priv = dev->data->dev_private;
168 PMD_INIT_FUNC_TRACE();
170 dev_info->if_index = priv->hw_id;
172 dev_info->max_mac_addrs = priv->max_mac_filters;
173 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
174 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
175 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
176 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
177 dev_info->rx_offload_capa =
178 DEV_RX_OFFLOAD_IPV4_CKSUM |
179 DEV_RX_OFFLOAD_UDP_CKSUM |
180 DEV_RX_OFFLOAD_TCP_CKSUM |
181 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
182 dev_info->tx_offload_capa =
183 DEV_TX_OFFLOAD_IPV4_CKSUM |
184 DEV_TX_OFFLOAD_UDP_CKSUM |
185 DEV_TX_OFFLOAD_TCP_CKSUM |
186 DEV_TX_OFFLOAD_SCTP_CKSUM |
187 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
188 dev_info->speed_capa = ETH_LINK_SPEED_1G |
189 ETH_LINK_SPEED_2_5G |
194 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
196 struct dpaa2_dev_priv *priv = dev->data->dev_private;
199 struct dpaa2_queue *mc_q, *mcq;
202 struct dpaa2_queue *dpaa2_q;
204 PMD_INIT_FUNC_TRACE();
206 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
207 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
208 RTE_CACHE_LINE_SIZE);
210 PMD_INIT_LOG(ERR, "malloc failed for rx/tx queues\n");
214 for (i = 0; i < priv->nb_rx_queues; i++) {
216 priv->rx_vq[i] = mc_q++;
217 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
218 dpaa2_q->q_storage = rte_malloc("dq_storage",
219 sizeof(struct queue_storage_info_t),
220 RTE_CACHE_LINE_SIZE);
221 if (!dpaa2_q->q_storage)
224 memset(dpaa2_q->q_storage, 0,
225 sizeof(struct queue_storage_info_t));
226 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
230 for (i = 0; i < priv->nb_tx_queues; i++) {
232 mc_q->flow_id = 0xffff;
233 priv->tx_vq[i] = mc_q++;
234 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
235 dpaa2_q->cscn = rte_malloc(NULL,
236 sizeof(struct qbman_result), 16);
242 for (dist_idx = 0; dist_idx < priv->num_dist_per_tc[DPAA2_DEF_TC];
244 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
245 mcq->tc_index = DPAA2_DEF_TC;
246 mcq->flow_id = dist_idx;
254 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
255 rte_free(dpaa2_q->cscn);
256 priv->tx_vq[i--] = NULL;
258 i = priv->nb_rx_queues;
261 mc_q = priv->rx_vq[0];
263 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
264 dpaa2_free_dq_storage(dpaa2_q->q_storage);
265 rte_free(dpaa2_q->q_storage);
266 priv->rx_vq[i--] = NULL;
273 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
275 struct rte_eth_dev_data *data = dev->data;
276 struct rte_eth_conf *eth_conf = &data->dev_conf;
279 PMD_INIT_FUNC_TRACE();
281 /* Check for correct configuration */
282 if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS &&
283 data->nb_rx_queues > 1) {
284 PMD_INIT_LOG(ERR, "Distribution is not enabled, "
285 "but Rx queues more than 1\n");
289 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
290 /* Return in case number of Rx queues is 1 */
291 if (data->nb_rx_queues == 1)
293 ret = dpaa2_setup_flow_dist(dev,
294 eth_conf->rx_adv_conf.rss_conf.rss_hf);
296 PMD_INIT_LOG(ERR, "unable to set flow distribution."
297 "please check queue config\n");
304 /* Function to setup RX flow information. It contains traffic class ID,
305 * flow ID, destination configuration etc.
308 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
309 uint16_t rx_queue_id,
310 uint16_t nb_rx_desc __rte_unused,
311 unsigned int socket_id __rte_unused,
312 const struct rte_eth_rxconf *rx_conf __rte_unused,
313 struct rte_mempool *mb_pool)
315 struct dpaa2_dev_priv *priv = dev->data->dev_private;
316 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
317 struct dpaa2_queue *dpaa2_q;
318 struct dpni_queue cfg;
324 PMD_INIT_FUNC_TRACE();
326 PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
327 dev, rx_queue_id, mb_pool, rx_conf);
329 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
330 bpid = mempool_to_bpid(mb_pool);
331 ret = dpaa2_attach_bp_list(priv,
332 rte_dpaa2_bpid_info[bpid].bp_list);
336 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
337 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
339 /*Get the tc id and flow id from given VQ id*/
340 flow_id = rx_queue_id % priv->num_dist_per_tc[dpaa2_q->tc_index];
341 memset(&cfg, 0, sizeof(struct dpni_queue));
343 options = options | DPNI_QUEUE_OPT_USER_CTX;
344 cfg.user_context = (uint64_t)(dpaa2_q);
346 /*if ls2088 or rev2 device, enable the stashing */
347 if ((qbman_get_version() & 0xFFFF0000) > QMAN_REV_4000) {
348 options |= DPNI_QUEUE_OPT_FLC;
349 cfg.flc.stash_control = true;
350 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
351 /* 00 00 00 - last 6 bit represent annotation, context stashing,
352 * data stashing setting 01 01 00 (0x14) to enable
353 * 1 line data, 1 line annotation
355 cfg.flc.value |= 0x14;
357 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
358 dpaa2_q->tc_index, flow_id, options, &cfg);
360 PMD_INIT_LOG(ERR, "Error in setting the rx flow: = %d\n", ret);
364 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
365 struct dpni_taildrop taildrop;
368 /*enabling per rx queue congestion control */
369 taildrop.threshold = CONG_THRESHOLD_RX_Q;
370 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
371 PMD_INIT_LOG(DEBUG, "Enabling Early Drop on queue = %d",
373 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
374 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
375 dpaa2_q->tc_index, flow_id, &taildrop);
377 PMD_INIT_LOG(ERR, "Error in setting the rx flow"
378 " err : = %d\n", ret);
383 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
388 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
389 uint16_t tx_queue_id,
390 uint16_t nb_tx_desc __rte_unused,
391 unsigned int socket_id __rte_unused,
392 const struct rte_eth_txconf *tx_conf __rte_unused)
394 struct dpaa2_dev_priv *priv = dev->data->dev_private;
395 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
396 priv->tx_vq[tx_queue_id];
397 struct fsl_mc_io *dpni = priv->hw;
398 struct dpni_queue tx_conf_cfg;
399 struct dpni_queue tx_flow_cfg;
400 uint8_t options = 0, flow_id;
404 PMD_INIT_FUNC_TRACE();
406 /* Return if queue already configured */
407 if (dpaa2_q->flow_id != 0xffff)
410 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
411 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
413 if (priv->num_tc == 1) {
415 flow_id = tx_queue_id % priv->num_dist_per_tc[tc_id];
421 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
422 tc_id, flow_id, options, &tx_flow_cfg);
424 PMD_INIT_LOG(ERR, "Error in setting the tx flow: "
425 "tc_id=%d, flow =%d ErrorCode = %x\n",
426 tc_id, flow_id, -ret);
430 dpaa2_q->flow_id = flow_id;
432 if (tx_queue_id == 0) {
433 /*Set tx-conf and error configuration*/
434 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
438 PMD_INIT_LOG(ERR, "Error in set tx conf mode settings"
439 " ErrorCode = %x", ret);
443 dpaa2_q->tc_index = tc_id;
445 if (priv->flags & DPAA2_TX_CGR_SUPPORT) {
446 struct dpni_congestion_notification_cfg cong_notif_cfg;
448 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_BYTES;
449 /* Notify about congestion when the queue size is 32 KB */
450 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
451 /* Notify that the queue is not congested when the data in
452 * the queue is below this thershold.
454 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
455 cong_notif_cfg.message_ctx = 0;
456 cong_notif_cfg.message_iova = (uint64_t)dpaa2_q->cscn;
457 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
458 cong_notif_cfg.notification_mode =
459 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
460 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
461 DPNI_CONG_OPT_COHERENT_WRITE;
463 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
470 "Error in setting tx congestion notification: = %d",
475 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
480 dpaa2_dev_rx_queue_release(void *q __rte_unused)
482 PMD_INIT_FUNC_TRACE();
486 dpaa2_dev_tx_queue_release(void *q __rte_unused)
488 PMD_INIT_FUNC_TRACE();
491 static const uint32_t *
492 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
494 static const uint32_t ptypes[] = {
495 /*todo -= add more types */
498 RTE_PTYPE_L3_IPV4_EXT,
500 RTE_PTYPE_L3_IPV6_EXT,
508 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx)
514 dpaa2_dev_start(struct rte_eth_dev *dev)
516 struct rte_eth_dev_data *data = dev->data;
517 struct dpaa2_dev_priv *priv = data->dev_private;
518 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
519 struct dpni_queue cfg;
520 struct dpni_error_cfg err_cfg;
522 struct dpni_queue_id qid;
523 struct dpaa2_queue *dpaa2_q;
526 PMD_INIT_FUNC_TRACE();
528 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
530 PMD_INIT_LOG(ERR, "Failure %d in enabling dpni %d device\n",
535 /* Power up the phy. Needed to make the link go Up */
536 dpaa2_dev_set_link_up(dev);
538 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
539 DPNI_QUEUE_TX, &qdid);
541 PMD_INIT_LOG(ERR, "Error to get qdid:ErrorCode = %d\n", ret);
546 for (i = 0; i < data->nb_rx_queues; i++) {
547 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
548 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
549 DPNI_QUEUE_RX, dpaa2_q->tc_index,
550 dpaa2_q->flow_id, &cfg, &qid);
552 PMD_INIT_LOG(ERR, "Error to get flow "
553 "information Error code = %d\n", ret);
556 dpaa2_q->fqid = qid.fqid;
559 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
560 DPNI_OFF_RX_L3_CSUM, true);
562 PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
566 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
567 DPNI_OFF_RX_L4_CSUM, true);
569 PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
573 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
574 DPNI_OFF_TX_L3_CSUM, true);
576 PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
580 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
581 DPNI_OFF_TX_L4_CSUM, true);
583 PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
587 /*checksum errors, send them to normal path and set it in annotation */
588 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
590 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
591 err_cfg.set_frame_annotation = true;
593 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
594 priv->token, &err_cfg);
596 PMD_INIT_LOG(ERR, "Error to dpni_set_errors_behavior:"
600 /* VLAN Offload Settings */
601 if (priv->max_vlan_filters)
602 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
608 * This routine disables all traffic on the adapter by issuing a
609 * global reset on the MAC.
612 dpaa2_dev_stop(struct rte_eth_dev *dev)
614 struct dpaa2_dev_priv *priv = dev->data->dev_private;
615 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
617 struct rte_eth_link link;
619 PMD_INIT_FUNC_TRACE();
621 dpaa2_dev_set_link_down(dev);
623 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
625 PMD_INIT_LOG(ERR, "Failure (ret %d) in disabling dpni %d dev\n",
630 /* clear the recorded link status */
631 memset(&link, 0, sizeof(link));
632 dpaa2_dev_atomic_write_link_status(dev, &link);
636 dpaa2_dev_close(struct rte_eth_dev *dev)
638 struct rte_eth_dev_data *data = dev->data;
639 struct dpaa2_dev_priv *priv = dev->data->dev_private;
640 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
642 struct rte_eth_link link;
643 struct dpaa2_queue *dpaa2_q;
645 PMD_INIT_FUNC_TRACE();
647 for (i = 0; i < data->nb_tx_queues; i++) {
648 dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
649 if (!dpaa2_q->cscn) {
650 rte_free(dpaa2_q->cscn);
651 dpaa2_q->cscn = NULL;
655 /* Clean the device first */
656 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
658 PMD_INIT_LOG(ERR, "Failure cleaning dpni device with"
659 " error code %d\n", ret);
663 memset(&link, 0, sizeof(link));
664 dpaa2_dev_atomic_write_link_status(dev, &link);
668 dpaa2_dev_promiscuous_enable(
669 struct rte_eth_dev *dev)
672 struct dpaa2_dev_priv *priv = dev->data->dev_private;
673 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
675 PMD_INIT_FUNC_TRACE();
678 RTE_LOG(ERR, PMD, "dpni is NULL");
682 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
684 RTE_LOG(ERR, PMD, "Unable to enable U promisc mode %d", ret);
686 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
688 RTE_LOG(ERR, PMD, "Unable to enable M promisc mode %d", ret);
692 dpaa2_dev_promiscuous_disable(
693 struct rte_eth_dev *dev)
696 struct dpaa2_dev_priv *priv = dev->data->dev_private;
697 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
699 PMD_INIT_FUNC_TRACE();
702 RTE_LOG(ERR, PMD, "dpni is NULL");
706 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
708 RTE_LOG(ERR, PMD, "Unable to disable U promisc mode %d", ret);
710 if (dev->data->all_multicast == 0) {
711 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
714 RTE_LOG(ERR, PMD, "Unable to disable M promisc mode %d",
720 dpaa2_dev_allmulticast_enable(
721 struct rte_eth_dev *dev)
724 struct dpaa2_dev_priv *priv = dev->data->dev_private;
725 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
727 PMD_INIT_FUNC_TRACE();
730 RTE_LOG(ERR, PMD, "dpni is NULL");
734 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
736 RTE_LOG(ERR, PMD, "Unable to enable multicast mode %d", ret);
740 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
743 struct dpaa2_dev_priv *priv = dev->data->dev_private;
744 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
746 PMD_INIT_FUNC_TRACE();
749 RTE_LOG(ERR, PMD, "dpni is NULL");
753 /* must remain on for all promiscuous */
754 if (dev->data->promiscuous == 1)
757 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
759 RTE_LOG(ERR, PMD, "Unable to disable multicast mode %d", ret);
763 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
766 struct dpaa2_dev_priv *priv = dev->data->dev_private;
767 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
768 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
770 PMD_INIT_FUNC_TRACE();
773 RTE_LOG(ERR, PMD, "dpni is NULL");
777 /* check that mtu is within the allowed range */
778 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
781 /* Set the Max Rx frame length as 'mtu' +
782 * Maximum Ethernet header length
784 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
785 mtu + ETH_VLAN_HLEN);
787 PMD_DRV_LOG(ERR, "setting the max frame length failed");
790 PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
795 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
796 struct ether_addr *addr,
797 __rte_unused uint32_t index,
798 __rte_unused uint32_t pool)
801 struct dpaa2_dev_priv *priv = dev->data->dev_private;
802 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
804 PMD_INIT_FUNC_TRACE();
807 RTE_LOG(ERR, PMD, "dpni is NULL");
811 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
812 priv->token, addr->addr_bytes);
814 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
820 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
824 struct dpaa2_dev_priv *priv = dev->data->dev_private;
825 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
826 struct rte_eth_dev_data *data = dev->data;
827 struct ether_addr *macaddr;
829 PMD_INIT_FUNC_TRACE();
831 macaddr = &data->mac_addrs[index];
834 RTE_LOG(ERR, PMD, "dpni is NULL");
838 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
839 priv->token, macaddr->addr_bytes);
841 RTE_LOG(ERR, PMD, "error: Removing the MAC ADDR failed:"
846 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
847 struct ether_addr *addr)
850 struct dpaa2_dev_priv *priv = dev->data->dev_private;
851 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
853 PMD_INIT_FUNC_TRACE();
856 RTE_LOG(ERR, PMD, "dpni is NULL");
860 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
861 priv->token, addr->addr_bytes);
864 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
867 void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
868 struct rte_eth_stats *stats)
870 struct dpaa2_dev_priv *priv = dev->data->dev_private;
871 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
873 uint8_t page0 = 0, page1 = 1, page2 = 2;
874 union dpni_statistics value;
876 memset(&value, 0, sizeof(union dpni_statistics));
878 PMD_INIT_FUNC_TRACE();
881 RTE_LOG(ERR, PMD, "dpni is NULL");
886 RTE_LOG(ERR, PMD, "stats is NULL");
890 /*Get Counters from page_0*/
891 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
896 stats->ipackets = value.page_0.ingress_all_frames;
897 stats->ibytes = value.page_0.ingress_all_bytes;
899 /*Get Counters from page_1*/
900 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
905 stats->opackets = value.page_1.egress_all_frames;
906 stats->obytes = value.page_1.egress_all_bytes;
908 /*Get Counters from page_2*/
909 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
914 /* Ingress drop frame count due to configured rules */
915 stats->ierrors = value.page_2.ingress_filtered_frames;
916 /* Ingress drop frame count due to error */
917 stats->ierrors += value.page_2.ingress_discarded_frames;
919 stats->oerrors = value.page_2.egress_discarded_frames;
920 stats->imissed = value.page_2.ingress_nobuffer_discards;
925 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
930 void dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
932 struct dpaa2_dev_priv *priv = dev->data->dev_private;
933 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
936 PMD_INIT_FUNC_TRACE();
939 RTE_LOG(ERR, PMD, "dpni is NULL");
943 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
950 RTE_LOG(ERR, PMD, "Operation not completed:Error Code = %d\n", retcode);
954 /* return 0 means link status changed, -1 means not changed */
956 dpaa2_dev_link_update(struct rte_eth_dev *dev,
957 int wait_to_complete __rte_unused)
960 struct dpaa2_dev_priv *priv = dev->data->dev_private;
961 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
962 struct rte_eth_link link, old;
963 struct dpni_link_state state = {0};
965 PMD_INIT_FUNC_TRACE();
968 RTE_LOG(ERR, PMD, "error : dpni is NULL");
971 memset(&old, 0, sizeof(old));
972 dpaa2_dev_atomic_read_link_status(dev, &old);
974 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
976 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d", ret);
980 if ((old.link_status == state.up) && (old.link_speed == state.rate)) {
981 RTE_LOG(DEBUG, PMD, "No change in status\n");
985 memset(&link, 0, sizeof(struct rte_eth_link));
986 link.link_status = state.up;
987 link.link_speed = state.rate;
989 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
990 link.link_duplex = ETH_LINK_HALF_DUPLEX;
992 link.link_duplex = ETH_LINK_FULL_DUPLEX;
994 dpaa2_dev_atomic_write_link_status(dev, &link);
996 if (link.link_status)
997 PMD_DRV_LOG(INFO, "Port %d Link is Up\n", dev->data->port_id);
999 PMD_DRV_LOG(INFO, "Port %d Link is Down\n", dev->data->port_id);
1004 * Toggle the DPNI to enable, if not already enabled.
1005 * This is not strictly PHY up/down - it is more of logical toggling.
1008 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1011 struct dpaa2_dev_priv *priv;
1012 struct fsl_mc_io *dpni;
1015 PMD_INIT_FUNC_TRACE();
1017 priv = dev->data->dev_private;
1018 dpni = (struct fsl_mc_io *)priv->hw;
1021 RTE_LOG(ERR, PMD, "Device has not yet been configured");
1025 /* Check if DPNI is currently enabled */
1026 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1028 /* Unable to obtain dpni status; Not continuing */
1029 PMD_DRV_LOG(ERR, "Interface Link UP failed (%d)", ret);
1033 /* Enable link if not already enabled */
1035 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1037 PMD_DRV_LOG(ERR, "Interface Link UP failed (%d)", ret);
1041 /* changing tx burst function to start enqueues */
1042 dev->tx_pkt_burst = dpaa2_dev_tx;
1043 dev->data->dev_link.link_status = 1;
1045 PMD_DRV_LOG(INFO, "Port %d Link UP successful", dev->data->port_id);
1050 * Toggle the DPNI to disable, if not already disabled.
1051 * This is not strictly PHY up/down - it is more of logical toggling.
1054 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1057 struct dpaa2_dev_priv *priv;
1058 struct fsl_mc_io *dpni;
1059 int dpni_enabled = 0;
1062 PMD_INIT_FUNC_TRACE();
1064 priv = dev->data->dev_private;
1065 dpni = (struct fsl_mc_io *)priv->hw;
1068 RTE_LOG(ERR, PMD, "Device has not yet been configured");
1072 /*changing tx burst function to avoid any more enqueues */
1073 dev->tx_pkt_burst = dummy_dev_tx;
1075 /* Loop while dpni_disable() attempts to drain the egress FQs
1076 * and confirm them back to us.
1079 ret = dpni_disable(dpni, 0, priv->token);
1081 PMD_DRV_LOG(ERR, "dpni disable failed (%d)", ret);
1084 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1086 PMD_DRV_LOG(ERR, "dpni_is_enabled failed (%d)", ret);
1090 /* Allow the MC some slack */
1091 rte_delay_us(100 * 1000);
1092 } while (dpni_enabled && --retries);
1095 PMD_DRV_LOG(WARNING, "Retry count exceeded disabling DPNI\n");
1096 /* todo- we may have to manually cleanup queues.
1099 PMD_DRV_LOG(INFO, "Port %d Link DOWN successful",
1100 dev->data->port_id);
1103 dev->data->dev_link.link_status = 0;
1109 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1112 struct dpaa2_dev_priv *priv;
1113 struct fsl_mc_io *dpni;
1114 struct dpni_link_state state = {0};
1116 PMD_INIT_FUNC_TRACE();
1118 priv = dev->data->dev_private;
1119 dpni = (struct fsl_mc_io *)priv->hw;
1121 if (dpni == NULL || fc_conf == NULL) {
1122 RTE_LOG(ERR, PMD, "device not configured");
1126 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1128 RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d", ret);
1132 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1133 if (state.options & DPNI_LINK_OPT_PAUSE) {
1134 /* DPNI_LINK_OPT_PAUSE set
1135 * if ASYM_PAUSE not set,
1136 * RX Side flow control (handle received Pause frame)
1137 * TX side flow control (send Pause frame)
1138 * if ASYM_PAUSE set,
1139 * RX Side flow control (handle received Pause frame)
1140 * No TX side flow control (send Pause frame disabled)
1142 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1143 fc_conf->mode = RTE_FC_FULL;
1145 fc_conf->mode = RTE_FC_RX_PAUSE;
1147 /* DPNI_LINK_OPT_PAUSE not set
1148 * if ASYM_PAUSE set,
1149 * TX side flow control (send Pause frame)
1150 * No RX side flow control (No action on pause frame rx)
1151 * if ASYM_PAUSE not set,
1152 * Flow control disabled
1154 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1155 fc_conf->mode = RTE_FC_TX_PAUSE;
1157 fc_conf->mode = RTE_FC_NONE;
1164 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1167 struct dpaa2_dev_priv *priv;
1168 struct fsl_mc_io *dpni;
1169 struct dpni_link_state state = {0};
1170 struct dpni_link_cfg cfg = {0};
1172 PMD_INIT_FUNC_TRACE();
1174 priv = dev->data->dev_private;
1175 dpni = (struct fsl_mc_io *)priv->hw;
1178 RTE_LOG(ERR, PMD, "dpni is NULL");
1182 /* It is necessary to obtain the current state before setting fc_conf
1183 * as MC would return error in case rate, autoneg or duplex values are
1186 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1188 RTE_LOG(ERR, PMD, "Unable to get link state (err=%d)", ret);
1192 /* Disable link before setting configuration */
1193 dpaa2_dev_set_link_down(dev);
1195 /* Based on fc_conf, update cfg */
1196 cfg.rate = state.rate;
1197 cfg.options = state.options;
1199 /* update cfg with fc_conf */
1200 switch (fc_conf->mode) {
1202 /* Full flow control;
1203 * OPT_PAUSE set, ASYM_PAUSE not set
1205 cfg.options |= DPNI_LINK_OPT_PAUSE;
1206 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1207 case RTE_FC_TX_PAUSE:
1208 /* Enable RX flow control
1209 * OPT_PAUSE not set;
1212 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1213 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1215 case RTE_FC_RX_PAUSE:
1216 /* Enable TX Flow control
1220 cfg.options |= DPNI_LINK_OPT_PAUSE;
1221 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1224 /* Disable Flow control
1226 * ASYM_PAUSE not set
1228 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1229 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1232 RTE_LOG(ERR, PMD, "Incorrect Flow control flag (%d)",
1237 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1239 RTE_LOG(ERR, PMD, "Unable to set Link configuration (err=%d)",
1243 dpaa2_dev_set_link_up(dev);
1248 static struct eth_dev_ops dpaa2_ethdev_ops = {
1249 .dev_configure = dpaa2_eth_dev_configure,
1250 .dev_start = dpaa2_dev_start,
1251 .dev_stop = dpaa2_dev_stop,
1252 .dev_close = dpaa2_dev_close,
1253 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
1254 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
1255 .allmulticast_enable = dpaa2_dev_allmulticast_enable,
1256 .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1257 .dev_set_link_up = dpaa2_dev_set_link_up,
1258 .dev_set_link_down = dpaa2_dev_set_link_down,
1259 .link_update = dpaa2_dev_link_update,
1260 .stats_get = dpaa2_dev_stats_get,
1261 .stats_reset = dpaa2_dev_stats_reset,
1262 .dev_infos_get = dpaa2_dev_info_get,
1263 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1264 .mtu_set = dpaa2_dev_mtu_set,
1265 .vlan_filter_set = dpaa2_vlan_filter_set,
1266 .vlan_offload_set = dpaa2_vlan_offload_set,
1267 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
1268 .rx_queue_release = dpaa2_dev_rx_queue_release,
1269 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
1270 .tx_queue_release = dpaa2_dev_tx_queue_release,
1271 .flow_ctrl_get = dpaa2_flow_ctrl_get,
1272 .flow_ctrl_set = dpaa2_flow_ctrl_set,
1273 .mac_addr_add = dpaa2_dev_add_mac_addr,
1274 .mac_addr_remove = dpaa2_dev_remove_mac_addr,
1275 .mac_addr_set = dpaa2_dev_set_mac_addr,
1279 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
1281 struct rte_device *dev = eth_dev->device;
1282 struct rte_dpaa2_device *dpaa2_dev;
1283 struct fsl_mc_io *dpni_dev;
1284 struct dpni_attr attr;
1285 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1286 struct dpni_buffer_layout layout;
1289 PMD_INIT_FUNC_TRACE();
1291 /* For secondary processes, the primary has done all the work */
1292 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1295 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1297 hw_id = dpaa2_dev->object_id;
1299 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
1301 PMD_INIT_LOG(ERR, "malloc failed for dpni device\n");
1305 dpni_dev->regs = rte_mcp_ptr_list[0];
1306 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
1309 "Failure in opening dpni@%d with err code %d\n",
1315 /* Clean the device first */
1316 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
1319 "Failure cleaning dpni@%d with err code %d\n",
1324 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
1327 "Failure in get dpni@%d attribute, err code %d\n",
1332 priv->num_tc = attr.num_tcs;
1333 for (i = 0; i < attr.num_tcs; i++) {
1334 priv->num_dist_per_tc[i] = attr.num_queues;
1338 /* Distribution is per Tc only,
1339 * so choosing RX queues from default TC only
1341 priv->nb_rx_queues = priv->num_dist_per_tc[DPAA2_DEF_TC];
1343 if (attr.num_tcs == 1)
1344 priv->nb_tx_queues = attr.num_queues;
1346 priv->nb_tx_queues = attr.num_tcs;
1348 PMD_INIT_LOG(DEBUG, "num_tc %d", priv->num_tc);
1349 PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
1351 priv->hw = dpni_dev;
1352 priv->hw_id = hw_id;
1353 priv->options = attr.options;
1354 priv->max_mac_filters = attr.mac_filter_entries;
1355 priv->max_vlan_filters = attr.vlan_filter_entries;
1358 priv->flags |= DPAA2_TX_CGR_SUPPORT;
1359 PMD_INIT_LOG(INFO, "Enable the tx congestion control support");
1361 /* Allocate memory for hardware structure for queues */
1362 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
1364 PMD_INIT_LOG(ERR, "dpaa2_alloc_rx_tx_queuesFailed\n");
1368 /* Allocate memory for storing MAC addresses */
1369 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
1370 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
1371 if (eth_dev->data->mac_addrs == NULL) {
1373 "Failed to allocate %d bytes needed to store MAC addresses",
1374 ETHER_ADDR_LEN * attr.mac_filter_entries);
1379 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1381 (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
1383 PMD_INIT_LOG(ERR, "DPNI get mac address failed:Err Code = %d\n",
1388 /* ... tx buffer layout ... */
1389 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1390 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1391 layout.pass_frame_status = 1;
1392 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1393 DPNI_QUEUE_TX, &layout);
1395 PMD_INIT_LOG(ERR, "Error (%d) in setting tx buffer layout",
1400 /* ... tx-conf and error buffer layout ... */
1401 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1402 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1403 layout.pass_frame_status = 1;
1404 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1405 DPNI_QUEUE_TX_CONFIRM, &layout);
1407 PMD_INIT_LOG(ERR, "Error (%d) in setting tx-conf buffer layout",
1412 eth_dev->dev_ops = &dpaa2_ethdev_ops;
1413 eth_dev->data->drv_name = rte_dpaa2_pmd.driver.name;
1415 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
1416 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
1417 rte_fslmc_vfio_dmamap();
1421 dpaa2_dev_uninit(eth_dev);
1426 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
1428 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1429 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1431 struct dpaa2_queue *dpaa2_q;
1433 PMD_INIT_FUNC_TRACE();
1435 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1439 PMD_INIT_LOG(WARNING, "Already closed or not started");
1443 dpaa2_dev_close(eth_dev);
1445 if (priv->rx_vq[0]) {
1446 /* cleaning up queue storage */
1447 for (i = 0; i < priv->nb_rx_queues; i++) {
1448 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1449 if (dpaa2_q->q_storage)
1450 rte_free(dpaa2_q->q_storage);
1452 /*free the all queue memory */
1453 rte_free(priv->rx_vq[0]);
1454 priv->rx_vq[0] = NULL;
1457 /* free memory for storing MAC addresses */
1458 if (eth_dev->data->mac_addrs) {
1459 rte_free(eth_dev->data->mac_addrs);
1460 eth_dev->data->mac_addrs = NULL;
1463 /* Close the device at underlying layer*/
1464 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
1467 "Failure closing dpni device with err code %d\n",
1471 /* Free the allocated memory for ethernet private data and dpni*/
1475 eth_dev->dev_ops = NULL;
1476 eth_dev->rx_pkt_burst = NULL;
1477 eth_dev->tx_pkt_burst = NULL;
1483 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv __rte_unused,
1484 struct rte_dpaa2_device *dpaa2_dev)
1486 struct rte_eth_dev *eth_dev;
1487 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
1491 sprintf(ethdev_name, "dpni-%d", dpaa2_dev->object_id);
1493 eth_dev = rte_eth_dev_allocate(ethdev_name);
1494 if (eth_dev == NULL)
1497 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1498 eth_dev->data->dev_private = rte_zmalloc(
1499 "ethdev private structure",
1500 sizeof(struct dpaa2_dev_priv),
1501 RTE_CACHE_LINE_SIZE);
1502 if (eth_dev->data->dev_private == NULL) {
1503 PMD_INIT_LOG(CRIT, "Cannot allocate memzone for"
1504 " private port data\n");
1505 rte_eth_dev_release_port(eth_dev);
1509 eth_dev->device = &dpaa2_dev->device;
1510 dpaa2_dev->eth_dev = eth_dev;
1511 eth_dev->data->rx_mbuf_alloc_failed = 0;
1513 /* Invoke PMD device initialization function */
1514 diag = dpaa2_dev_init(eth_dev);
1518 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1519 rte_free(eth_dev->data->dev_private);
1520 rte_eth_dev_release_port(eth_dev);
1525 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
1527 struct rte_eth_dev *eth_dev;
1529 eth_dev = dpaa2_dev->eth_dev;
1530 dpaa2_dev_uninit(eth_dev);
1532 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
1533 rte_free(eth_dev->data->dev_private);
1534 rte_eth_dev_release_port(eth_dev);
1539 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
1540 .drv_type = DPAA2_MC_DPNI_DEVID,
1541 .probe = rte_dpaa2_probe,
1542 .remove = rte_dpaa2_remove,
1545 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);