drivers/net/dpaa2/dpaa2_ethdev.c

   1 /* * SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016 NXP
   5  *
   6  */
   7
   8 #include <time.h>
   9 #include <net/if.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_malloc.h>
  14 #include <rte_memcpy.h>
  15 #include <rte_string_fns.h>
  16 #include <rte_cycles.h>
  17 #include <rte_kvargs.h>
  18 #include <rte_dev.h>
  19 #include <rte_fslmc.h>
  20 #include <rte_flow_driver.h>
  21
  22 #include "dpaa2_pmd_logs.h"
  23 #include <fslmc_vfio.h>
  24 #include <dpaa2_hw_pvt.h>
  25 #include <dpaa2_hw_mempool.h>
  26 #include <dpaa2_hw_dpio.h>
  27 #include <mc/fsl_dpmng.h>
  28 #include "dpaa2_ethdev.h"
  29 #include <fsl_qbman_debug.h>
  30
  31 #define DRIVER_LOOPBACK_MODE "drv_loopback"
  32 #define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
  33
  34 /* Supported Rx offloads */
  35 static uint64_t dev_rx_offloads_sup =
  36                 DEV_RX_OFFLOAD_CHECKSUM |
  37                 DEV_RX_OFFLOAD_SCTP_CKSUM |
  38                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  39                 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
  40                 DEV_RX_OFFLOAD_VLAN_STRIP |
  41                 DEV_RX_OFFLOAD_VLAN_FILTER |
  42                 DEV_RX_OFFLOAD_JUMBO_FRAME |
  43                 DEV_RX_OFFLOAD_TIMESTAMP;
  44
  45 /* Rx offloads which cannot be disabled */
  46 static uint64_t dev_rx_offloads_nodis =
  47                 DEV_RX_OFFLOAD_SCATTER;
  48
  49 /* Supported Tx offloads */
  50 static uint64_t dev_tx_offloads_sup =
  51                 DEV_TX_OFFLOAD_VLAN_INSERT |
  52                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  53                 DEV_TX_OFFLOAD_UDP_CKSUM |
  54                 DEV_TX_OFFLOAD_TCP_CKSUM |
  55                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  56                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  57                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  58                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  59
  60 /* Tx offloads which cannot be disabled */
  61 static uint64_t dev_tx_offloads_nodis =
  62                 DEV_TX_OFFLOAD_MULTI_SEGS;
  63
  64 /* enable timestamp in mbuf */
  65 enum pmd_dpaa2_ts dpaa2_enable_ts;
  66
  67 struct rte_dpaa2_xstats_name_off {
  68         char name[RTE_ETH_XSTATS_NAME_SIZE];
  69         uint8_t page_id; /* dpni statistics page id */
  70         uint8_t stats_id; /* stats id in the given page */
  71 };
  72
  73 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
  74         {"ingress_multicast_frames", 0, 2},
  75         {"ingress_multicast_bytes", 0, 3},
  76         {"ingress_broadcast_frames", 0, 4},
  77         {"ingress_broadcast_bytes", 0, 5},
  78         {"egress_multicast_frames", 1, 2},
  79         {"egress_multicast_bytes", 1, 3},
  80         {"egress_broadcast_frames", 1, 4},
  81         {"egress_broadcast_bytes", 1, 5},
  82         {"ingress_filtered_frames", 2, 0},
  83         {"ingress_discarded_frames", 2, 1},
  84         {"ingress_nobuffer_discards", 2, 2},
  85         {"egress_discarded_frames", 2, 3},
  86         {"egress_confirmed_frames", 2, 4},
  87 };
  88
  89 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
  90         RTE_ETH_FILTER_ADD,
  91         RTE_ETH_FILTER_DELETE,
  92         RTE_ETH_FILTER_UPDATE,
  93         RTE_ETH_FILTER_FLUSH,
  94         RTE_ETH_FILTER_GET
  95 };
  96
  97 static struct rte_dpaa2_driver rte_dpaa2_pmd;
  98 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
  99 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
 100                                  int wait_to_complete);
 101 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
 102 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
 103 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 104
 105 int dpaa2_logtype_pmd;
 106
 107 void
 108 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
 109 {
 110         dpaa2_enable_ts = enable;
 111 }
 112
 113 static int
 114 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 115 {
 116         int ret;
 117         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 118         struct fsl_mc_io *dpni = priv->hw;
 119
 120         PMD_INIT_FUNC_TRACE();
 121
 122         if (dpni == NULL) {
 123                 DPAA2_PMD_ERR("dpni is NULL");
 124                 return -1;
 125         }
 126
 127         if (on)
 128                 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
 129                                        priv->token, vlan_id);
 130         else
 131                 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
 132                                           priv->token, vlan_id);
 133
 134         if (ret < 0)
 135                 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
 136                               ret, vlan_id, priv->hw_id);
 137
 138         return ret;
 139 }
 140
 141 static int
 142 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 143 {
 144         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 145         struct fsl_mc_io *dpni = priv->hw;
 146         int ret;
 147
 148         PMD_INIT_FUNC_TRACE();
 149
 150         if (mask & ETH_VLAN_FILTER_MASK) {
 151                 /* VLAN Filter not avaialble */
 152                 if (!priv->max_vlan_filters) {
 153                         DPAA2_PMD_INFO("VLAN filter not available");
 154                         goto next_mask;
 155                 }
 156
 157                 if (dev->data->dev_conf.rxmode.offloads &
 158                         DEV_RX_OFFLOAD_VLAN_FILTER)
 159                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 160                                                       priv->token, true);
 161                 else
 162                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 163                                                       priv->token, false);
 164                 if (ret < 0)
 165                         DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
 166         }
 167 next_mask:
 168         if (mask & ETH_VLAN_EXTEND_MASK) {
 169                 if (dev->data->dev_conf.rxmode.offloads &
 170                         DEV_RX_OFFLOAD_VLAN_EXTEND)
 171                         DPAA2_PMD_INFO("VLAN extend offload not supported");
 172         }
 173
 174         return 0;
 175 }
 176
 177 static int
 178 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 179                       enum rte_vlan_type vlan_type __rte_unused,
 180                       uint16_t tpid)
 181 {
 182         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 183         struct fsl_mc_io *dpni = priv->hw;
 184         int ret = -ENOTSUP;
 185
 186         PMD_INIT_FUNC_TRACE();
 187
 188         /* nothing to be done for standard vlan tpids */
 189         if (tpid == 0x8100 || tpid == 0x88A8)
 190                 return 0;
 191
 192         ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 193                                    priv->token, tpid);
 194         if (ret < 0)
 195                 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
 196         /* if already configured tpids, remove them first */
 197         if (ret == -EBUSY) {
 198                 struct dpni_custom_tpid_cfg tpid_list = {0};
 199
 200                 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
 201                                    priv->token, &tpid_list);
 202                 if (ret < 0)
 203                         goto fail;
 204                 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
 205                                    priv->token, tpid_list.tpid1);
 206                 if (ret < 0)
 207                         goto fail;
 208                 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 209                                            priv->token, tpid);
 210         }
 211 fail:
 212         return ret;
 213 }
 214
 215 static int
 216 dpaa2_fw_version_get(struct rte_eth_dev *dev,
 217                      char *fw_version,
 218                      size_t fw_size)
 219 {
 220         int ret;
 221         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 222         struct fsl_mc_io *dpni = priv->hw;
 223         struct mc_soc_version mc_plat_info = {0};
 224         struct mc_version mc_ver_info = {0};
 225
 226         PMD_INIT_FUNC_TRACE();
 227
 228         if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
 229                 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
 230
 231         if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
 232                 DPAA2_PMD_WARN("\tmc_get_version failed");
 233
 234         ret = snprintf(fw_version, fw_size,
 235                        "%x-%d.%d.%d",
 236                        mc_plat_info.svr,
 237                        mc_ver_info.major,
 238                        mc_ver_info.minor,
 239                        mc_ver_info.revision);
 240
 241         ret += 1; /* add the size of '\0' */
 242         if (fw_size < (uint32_t)ret)
 243                 return ret;
 244         else
 245                 return 0;
 246 }
 247
 248 static int
 249 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 250 {
 251         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 252
 253         PMD_INIT_FUNC_TRACE();
 254
 255         dev_info->if_index = priv->hw_id;
 256
 257         dev_info->max_mac_addrs = priv->max_mac_filters;
 258         dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
 259         dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 260         dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 261         dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
 262         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 263                                         dev_rx_offloads_nodis;
 264         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 265                                         dev_tx_offloads_nodis;
 266         dev_info->speed_capa = ETH_LINK_SPEED_1G |
 267                         ETH_LINK_SPEED_2_5G |
 268                         ETH_LINK_SPEED_10G;
 269
 270         dev_info->max_hash_mac_addrs = 0;
 271         dev_info->max_vfs = 0;
 272         dev_info->max_vmdq_pools = ETH_16_POOLS;
 273         dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
 274
 275         return 0;
 276 }
 277
 278 static int
 279 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 280 {
 281         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 282         uint16_t dist_idx;
 283         uint32_t vq_id;
 284         uint8_t num_rxqueue_per_tc;
 285         struct dpaa2_queue *mc_q, *mcq;
 286         uint32_t tot_queues;
 287         int i;
 288         struct dpaa2_queue *dpaa2_q;
 289
 290         PMD_INIT_FUNC_TRACE();
 291
 292         num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
 293         tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 294         mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 295                           RTE_CACHE_LINE_SIZE);
 296         if (!mc_q) {
 297                 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
 298                 return -1;
 299         }
 300
 301         for (i = 0; i < priv->nb_rx_queues; i++) {
 302                 mc_q->eth_data = dev->data;
 303                 priv->rx_vq[i] = mc_q++;
 304                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 305                 dpaa2_q->q_storage = rte_malloc("dq_storage",
 306                                         sizeof(struct queue_storage_info_t),
 307                                         RTE_CACHE_LINE_SIZE);
 308                 if (!dpaa2_q->q_storage)
 309                         goto fail;
 310
 311                 memset(dpaa2_q->q_storage, 0,
 312                        sizeof(struct queue_storage_info_t));
 313                 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 314                         goto fail;
 315         }
 316
 317         for (i = 0; i < priv->nb_tx_queues; i++) {
 318                 mc_q->eth_data = dev->data;
 319                 mc_q->flow_id = 0xffff;
 320                 priv->tx_vq[i] = mc_q++;
 321                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 322                 dpaa2_q->cscn = rte_malloc(NULL,
 323                                            sizeof(struct qbman_result), 16);
 324                 if (!dpaa2_q->cscn)
 325                         goto fail_tx;
 326         }
 327
 328         vq_id = 0;
 329         for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 330                 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
 331                 mcq->tc_index = dist_idx / num_rxqueue_per_tc;
 332                 mcq->flow_id = dist_idx % num_rxqueue_per_tc;
 333                 vq_id++;
 334         }
 335
 336         return 0;
 337 fail_tx:
 338         i -= 1;
 339         while (i >= 0) {
 340                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 341                 rte_free(dpaa2_q->cscn);
 342                 priv->tx_vq[i--] = NULL;
 343         }
 344         i = priv->nb_rx_queues;
 345 fail:
 346         i -= 1;
 347         mc_q = priv->rx_vq[0];
 348         while (i >= 0) {
 349                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 350                 dpaa2_free_dq_storage(dpaa2_q->q_storage);
 351                 rte_free(dpaa2_q->q_storage);
 352                 priv->rx_vq[i--] = NULL;
 353         }
 354         rte_free(mc_q);
 355         return -1;
 356 }
 357
 358 static void
 359 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 360 {
 361         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 362         struct dpaa2_queue *dpaa2_q;
 363         int i;
 364
 365         PMD_INIT_FUNC_TRACE();
 366
 367         /* Queue allocation base */
 368         if (priv->rx_vq[0]) {
 369                 /* cleaning up queue storage */
 370                 for (i = 0; i < priv->nb_rx_queues; i++) {
 371                         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 372                         if (dpaa2_q->q_storage)
 373                                 rte_free(dpaa2_q->q_storage);
 374                 }
 375                 /* cleanup tx queue cscn */
 376                 for (i = 0; i < priv->nb_tx_queues; i++) {
 377                         dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 378                         rte_free(dpaa2_q->cscn);
 379                 }
 380                 /*free memory for all queues (RX+TX) */
 381                 rte_free(priv->rx_vq[0]);
 382                 priv->rx_vq[0] = NULL;
 383         }
 384 }
 385
 386 static int
 387 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 388 {
 389         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 390         struct fsl_mc_io *dpni = priv->hw;
 391         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 392         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 393         uint64_t tx_offloads = eth_conf->txmode.offloads;
 394         int rx_l3_csum_offload = false;
 395         int rx_l4_csum_offload = false;
 396         int tx_l3_csum_offload = false;
 397         int tx_l4_csum_offload = false;
 398         int ret;
 399
 400         PMD_INIT_FUNC_TRACE();
 401
 402         /* Rx offloads which are enabled by default */
 403         if (dev_rx_offloads_nodis & ~rx_offloads) {
 404                 DPAA2_PMD_INFO(
 405                 "Some of rx offloads enabled by default - requested 0x%" PRIx64
 406                 " fixed are 0x%" PRIx64,
 407                 rx_offloads, dev_rx_offloads_nodis);
 408         }
 409
 410         /* Tx offloads which are enabled by default */
 411         if (dev_tx_offloads_nodis & ~tx_offloads) {
 412                 DPAA2_PMD_INFO(
 413                 "Some of tx offloads enabled by default - requested 0x%" PRIx64
 414                 " fixed are 0x%" PRIx64,
 415                 tx_offloads, dev_tx_offloads_nodis);
 416         }
 417
 418         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 419                 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 420                         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
 421                                 priv->token, eth_conf->rxmode.max_rx_pkt_len);
 422                         if (ret) {
 423                                 DPAA2_PMD_ERR(
 424                                         "Unable to set mtu. check config");
 425                                 return ret;
 426                         }
 427                 } else {
 428                         return -1;
 429                 }
 430         }
 431
 432         if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
 433                 ret = dpaa2_setup_flow_dist(dev,
 434                                 eth_conf->rx_adv_conf.rss_conf.rss_hf);
 435                 if (ret) {
 436                         DPAA2_PMD_ERR("Unable to set flow distribution."
 437                                       "Check queue config");
 438                         return ret;
 439                 }
 440         }
 441
 442         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 443                 rx_l3_csum_offload = true;
 444
 445         if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
 446                 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
 447                 (rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 448                 rx_l4_csum_offload = true;
 449
 450         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 451                                DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
 452         if (ret) {
 453                 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
 454                 return ret;
 455         }
 456
 457         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 458                                DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
 459         if (ret) {
 460                 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
 461                 return ret;
 462         }
 463
 464         if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
 465                 dpaa2_enable_ts = true;
 466
 467         if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 468                 tx_l3_csum_offload = true;
 469
 470         if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
 471                 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
 472                 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
 473                 tx_l4_csum_offload = true;
 474
 475         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 476                                DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
 477         if (ret) {
 478                 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
 479                 return ret;
 480         }
 481
 482         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 483                                DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
 484         if (ret) {
 485                 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
 486                 return ret;
 487         }
 488
 489         /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
 490          * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
 491          * to 0 for LS2 in the hardware thus disabling data/annotation
 492          * stashing. For LX2 this is fixed in hardware and thus hash result and
 493          * parse results can be received in FD using this option.
 494          */
 495         if (dpaa2_svr_family == SVR_LX2160A) {
 496                 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 497                                        DPNI_FLCTYPE_HASH, true);
 498                 if (ret) {
 499                         DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
 500                         return ret;
 501                 }
 502         }
 503
 504         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 505                 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
 506
 507         /* update the current status */
 508         dpaa2_dev_link_update(dev, 0);
 509
 510         return 0;
 511 }
 512
 513 /* Function to setup RX flow information. It contains traffic class ID,
 514  * flow ID, destination configuration etc.
 515  */
 516 static int
 517 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 518                          uint16_t rx_queue_id,
 519                          uint16_t nb_rx_desc __rte_unused,
 520                          unsigned int socket_id __rte_unused,
 521                          const struct rte_eth_rxconf *rx_conf __rte_unused,
 522                          struct rte_mempool *mb_pool)
 523 {
 524         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 525         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 526         struct dpaa2_queue *dpaa2_q;
 527         struct dpni_queue cfg;
 528         uint8_t options = 0;
 529         uint8_t flow_id;
 530         uint32_t bpid;
 531         int ret;
 532
 533         PMD_INIT_FUNC_TRACE();
 534
 535         DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
 536                         dev, rx_queue_id, mb_pool, rx_conf);
 537
 538         if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
 539                 bpid = mempool_to_bpid(mb_pool);
 540                 ret = dpaa2_attach_bp_list(priv,
 541                                            rte_dpaa2_bpid_info[bpid].bp_list);
 542                 if (ret)
 543                         return ret;
 544         }
 545         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 546         dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
 547         dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 548
 549         /*Get the flow id from given VQ id*/
 550         flow_id = rx_queue_id % priv->nb_rx_queues;
 551         memset(&cfg, 0, sizeof(struct dpni_queue));
 552
 553         options = options | DPNI_QUEUE_OPT_USER_CTX;
 554         cfg.user_context = (size_t)(dpaa2_q);
 555
 556         /*if ls2088 or rev2 device, enable the stashing */
 557
 558         if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
 559                 options |= DPNI_QUEUE_OPT_FLC;
 560                 cfg.flc.stash_control = true;
 561                 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
 562                 /* 00 00 00 - last 6 bit represent annotation, context stashing,
 563                  * data stashing setting 01 01 00 (0x14)
 564                  * (in following order ->DS AS CS)
 565                  * to enable 1 line data, 1 line annotation.
 566                  * For LX2, this setting should be 01 00 00 (0x10)
 567                  */
 568                 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
 569                         cfg.flc.value |= 0x10;
 570                 else
 571                         cfg.flc.value |= 0x14;
 572         }
 573         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 574                              dpaa2_q->tc_index, flow_id, options, &cfg);
 575         if (ret) {
 576                 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
 577                 return -1;
 578         }
 579
 580         if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
 581                 struct dpni_taildrop taildrop;
 582
 583                 taildrop.enable = 1;
 584                 /*enabling per rx queue congestion control */
 585                 taildrop.threshold = CONG_THRESHOLD_RX_Q;
 586                 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
 587                 taildrop.oal = CONG_RX_OAL;
 588                 DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d",
 589                                 rx_queue_id);
 590                 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 591                                         DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 592                                         dpaa2_q->tc_index, flow_id, &taildrop);
 593                 if (ret) {
 594                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 595                                       ret);
 596                         return -1;
 597                 }
 598         }
 599
 600         dev->data->rx_queues[rx_queue_id] = dpaa2_q;
 601         return 0;
 602 }
 603
 604 static int
 605 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 606                          uint16_t tx_queue_id,
 607                          uint16_t nb_tx_desc __rte_unused,
 608                          unsigned int socket_id __rte_unused,
 609                          const struct rte_eth_txconf *tx_conf __rte_unused)
 610 {
 611         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 612         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 613                 priv->tx_vq[tx_queue_id];
 614         struct fsl_mc_io *dpni = priv->hw;
 615         struct dpni_queue tx_conf_cfg;
 616         struct dpni_queue tx_flow_cfg;
 617         uint8_t options = 0, flow_id;
 618         uint32_t tc_id;
 619         int ret;
 620
 621         PMD_INIT_FUNC_TRACE();
 622
 623         /* Return if queue already configured */
 624         if (dpaa2_q->flow_id != 0xffff) {
 625                 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 626                 return 0;
 627         }
 628
 629         memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 630         memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 631
 632         tc_id = tx_queue_id;
 633         flow_id = 0;
 634
 635         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
 636                              tc_id, flow_id, options, &tx_flow_cfg);
 637         if (ret) {
 638                 DPAA2_PMD_ERR("Error in setting the tx flow: "
 639                               "tc_id=%d, flow=%d err=%d",
 640                               tc_id, flow_id, ret);
 641                         return -1;
 642         }
 643
 644         dpaa2_q->flow_id = flow_id;
 645
 646         if (tx_queue_id == 0) {
 647                 /*Set tx-conf and error configuration*/
 648                 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 649                                                     priv->token,
 650                                                     DPNI_CONF_DISABLE);
 651                 if (ret) {
 652                         DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 653                                       "err=%d", ret);
 654                         return -1;
 655                 }
 656         }
 657         dpaa2_q->tc_index = tc_id;
 658
 659         if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 660                 struct dpni_congestion_notification_cfg cong_notif_cfg;
 661
 662                 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 663                 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
 664                 /* Notify that the queue is not congested when the data in
 665                  * the queue is below this thershold.
 666                  */
 667                 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
 668                 cong_notif_cfg.message_ctx = 0;
 669                 cong_notif_cfg.message_iova =
 670                                 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
 671                 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
 672                 cong_notif_cfg.notification_mode =
 673                                          DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
 674                                          DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
 675                                          DPNI_CONG_OPT_COHERENT_WRITE;
 676                 cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
 677
 678                 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
 679                                                        priv->token,
 680                                                        DPNI_QUEUE_TX,
 681                                                        tc_id,
 682                                                        &cong_notif_cfg);
 683                 if (ret) {
 684                         DPAA2_PMD_ERR(
 685                            "Error in setting tx congestion notification: "
 686                            "err=%d", ret);
 687                         return -ret;
 688                 }
 689         }
 690         dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 691         dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 692         return 0;
 693 }
 694
 695 static void
 696 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 697 {
 698         PMD_INIT_FUNC_TRACE();
 699 }
 700
 701 static void
 702 dpaa2_dev_tx_queue_release(void *q __rte_unused)
 703 {
 704         PMD_INIT_FUNC_TRACE();
 705 }
 706
 707 static uint32_t
 708 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 709 {
 710         int32_t ret;
 711         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 712         struct dpaa2_queue *dpaa2_q;
 713         struct qbman_swp *swp;
 714         struct qbman_fq_query_np_rslt state;
 715         uint32_t frame_cnt = 0;
 716
 717         PMD_INIT_FUNC_TRACE();
 718
 719         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 720                 ret = dpaa2_affine_qbman_swp();
 721                 if (ret) {
 722                         DPAA2_PMD_ERR("Failure in affining portal");
 723                         return -EINVAL;
 724                 }
 725         }
 726         swp = DPAA2_PER_LCORE_PORTAL;
 727
 728         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 729
 730         if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
 731                 frame_cnt = qbman_fq_state_frame_count(&state);
 732                 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
 733                                 rx_queue_id, frame_cnt);
 734         }
 735         return frame_cnt;
 736 }
 737
 738 static const uint32_t *
 739 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 740 {
 741         static const uint32_t ptypes[] = {
 742                 /*todo -= add more types */
 743                 RTE_PTYPE_L2_ETHER,
 744                 RTE_PTYPE_L3_IPV4,
 745                 RTE_PTYPE_L3_IPV4_EXT,
 746                 RTE_PTYPE_L3_IPV6,
 747                 RTE_PTYPE_L3_IPV6_EXT,
 748                 RTE_PTYPE_L4_TCP,
 749                 RTE_PTYPE_L4_UDP,
 750                 RTE_PTYPE_L4_SCTP,
 751                 RTE_PTYPE_L4_ICMP,
 752                 RTE_PTYPE_UNKNOWN
 753         };
 754
 755         if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
 756                 dev->rx_pkt_burst == dpaa2_dev_rx ||
 757                 dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 758                 return ptypes;
 759         return NULL;
 760 }
 761
 762 /**
 763  * Dpaa2 link Interrupt handler
 764  *
 765  * @param param
 766  *  The address of parameter (struct rte_eth_dev *) regsitered before.
 767  *
 768  * @return
 769  *  void
 770  */
 771 static void
 772 dpaa2_interrupt_handler(void *param)
 773 {
 774         struct rte_eth_dev *dev = param;
 775         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 776         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 777         int ret;
 778         int irq_index = DPNI_IRQ_INDEX;
 779         unsigned int status = 0, clear = 0;
 780
 781         PMD_INIT_FUNC_TRACE();
 782
 783         if (dpni == NULL) {
 784                 DPAA2_PMD_ERR("dpni is NULL");
 785                 return;
 786         }
 787
 788         ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
 789                                   irq_index, &status);
 790         if (unlikely(ret)) {
 791                 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
 792                 clear = 0xffffffff;
 793                 goto out;
 794         }
 795
 796         if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
 797                 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
 798                 dpaa2_dev_link_update(dev, 0);
 799                 /* calling all the apps registered for link status event */
 800                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
 801                                               NULL);
 802         }
 803 out:
 804         ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
 805                                     irq_index, clear);
 806         if (unlikely(ret))
 807                 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
 808 }
 809
 810 static int
 811 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 812 {
 813         int err = 0;
 814         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 815         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 816         int irq_index = DPNI_IRQ_INDEX;
 817         unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 818
 819         PMD_INIT_FUNC_TRACE();
 820
 821         err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
 822                                 irq_index, mask);
 823         if (err < 0) {
 824                 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
 825                               strerror(-err));
 826                 return err;
 827         }
 828
 829         err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
 830                                   irq_index, enable);
 831         if (err < 0)
 832                 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
 833                               strerror(-err));
 834
 835         return err;
 836 }
 837
 838 static int
 839 dpaa2_dev_start(struct rte_eth_dev *dev)
 840 {
 841         struct rte_device *rdev = dev->device;
 842         struct rte_dpaa2_device *dpaa2_dev;
 843         struct rte_eth_dev_data *data = dev->data;
 844         struct dpaa2_dev_priv *priv = data->dev_private;
 845         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 846         struct dpni_queue cfg;
 847         struct dpni_error_cfg   err_cfg;
 848         uint16_t qdid;
 849         struct dpni_queue_id qid;
 850         struct dpaa2_queue *dpaa2_q;
 851         int ret, i;
 852         struct rte_intr_handle *intr_handle;
 853
 854         dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
 855         intr_handle = &dpaa2_dev->intr_handle;
 856
 857         PMD_INIT_FUNC_TRACE();
 858
 859         ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
 860         if (ret) {
 861                 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
 862                               priv->hw_id, ret);
 863                 return ret;
 864         }
 865
 866         /* Power up the phy. Needed to make the link go UP */
 867         dpaa2_dev_set_link_up(dev);
 868
 869         ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
 870                             DPNI_QUEUE_TX, &qdid);
 871         if (ret) {
 872                 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
 873                 return ret;
 874         }
 875         priv->qdid = qdid;
 876
 877         for (i = 0; i < data->nb_rx_queues; i++) {
 878                 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
 879                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 880                                      DPNI_QUEUE_RX, dpaa2_q->tc_index,
 881                                        dpaa2_q->flow_id, &cfg, &qid);
 882                 if (ret) {
 883                         DPAA2_PMD_ERR("Error in getting flow information: "
 884                                       "err=%d", ret);
 885                         return ret;
 886                 }
 887                 dpaa2_q->fqid = qid.fqid;
 888         }
 889
 890         /*checksum errors, send them to normal path and set it in annotation */
 891         err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
 892         err_cfg.errors |= DPNI_ERROR_PHE;
 893
 894         err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
 895         err_cfg.set_frame_annotation = true;
 896
 897         ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
 898                                        priv->token, &err_cfg);
 899         if (ret) {
 900                 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
 901                               ret);
 902                 return ret;
 903         }
 904
 905         /* if the interrupts were configured on this devices*/
 906         if (intr_handle && (intr_handle->fd) &&
 907             (dev->data->dev_conf.intr_conf.lsc != 0)) {
 908                 /* Registering LSC interrupt handler */
 909                 rte_intr_callback_register(intr_handle,
 910                                            dpaa2_interrupt_handler,
 911                                            (void *)dev);
 912
 913                 /* enable vfio intr/eventfd mapping
 914                  * Interrupt index 0 is required, so we can not use
 915                  * rte_intr_enable.
 916                  */
 917                 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
 918
 919                 /* enable dpni_irqs */
 920                 dpaa2_eth_setup_irqs(dev, 1);
 921         }
 922
 923         /* Change the tx burst function if ordered queues are used */
 924         if (priv->en_ordered)
 925                 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
 926
 927         return 0;
 928 }
 929
 930 /**
 931  *  This routine disables all traffic on the adapter by issuing a
 932  *  global reset on the MAC.
 933  */
 934 static void
 935 dpaa2_dev_stop(struct rte_eth_dev *dev)
 936 {
 937         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 938         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 939         int ret;
 940         struct rte_eth_link link;
 941         struct rte_intr_handle *intr_handle = dev->intr_handle;
 942
 943         PMD_INIT_FUNC_TRACE();
 944
 945         /* reset interrupt callback  */
 946         if (intr_handle && (intr_handle->fd) &&
 947             (dev->data->dev_conf.intr_conf.lsc != 0)) {
 948                 /*disable dpni irqs */
 949                 dpaa2_eth_setup_irqs(dev, 0);
 950
 951                 /* disable vfio intr before callback unregister */
 952                 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
 953
 954                 /* Unregistering LSC interrupt handler */
 955                 rte_intr_callback_unregister(intr_handle,
 956                                              dpaa2_interrupt_handler,
 957                                              (void *)dev);
 958         }
 959
 960         dpaa2_dev_set_link_down(dev);
 961
 962         ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
 963         if (ret) {
 964                 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
 965                               ret, priv->hw_id);
 966                 return;
 967         }
 968
 969         /* clear the recorded link status */
 970         memset(&link, 0, sizeof(link));
 971         rte_eth_linkstatus_set(dev, &link);
 972 }
 973
 974 static void
 975 dpaa2_dev_close(struct rte_eth_dev *dev)
 976 {
 977         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 978         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 979         int ret;
 980         struct rte_eth_link link;
 981
 982         PMD_INIT_FUNC_TRACE();
 983
 984         dpaa2_flow_clean(dev);
 985
 986         /* Clean the device first */
 987         ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
 988         if (ret) {
 989                 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
 990                 return;
 991         }
 992
 993         memset(&link, 0, sizeof(link));
 994         rte_eth_linkstatus_set(dev, &link);
 995 }
 996
 997 static int
 998 dpaa2_dev_promiscuous_enable(
 999                 struct rte_eth_dev *dev)
1000 {
1001         int ret;
1002         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1003         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1004
1005         PMD_INIT_FUNC_TRACE();
1006
1007         if (dpni == NULL) {
1008                 DPAA2_PMD_ERR("dpni is NULL");
1009                 return -ENODEV;
1010         }
1011
1012         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1013         if (ret < 0)
1014                 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
1015
1016         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1017         if (ret < 0)
1018                 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1019
1020         return ret;
1021 }
1022
1023 static int
1024 dpaa2_dev_promiscuous_disable(
1025                 struct rte_eth_dev *dev)
1026 {
1027         int ret;
1028         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1029         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1030
1031         PMD_INIT_FUNC_TRACE();
1032
1033         if (dpni == NULL) {
1034                 DPAA2_PMD_ERR("dpni is NULL");
1035                 return -ENODEV;
1036         }
1037
1038         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1039         if (ret < 0)
1040                 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1041
1042         if (dev->data->all_multicast == 0) {
1043                 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1044                                                  priv->token, false);
1045                 if (ret < 0)
1046                         DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1047                                       ret);
1048         }
1049
1050         return ret;
1051 }
1052
1053 static int
1054 dpaa2_dev_allmulticast_enable(
1055                 struct rte_eth_dev *dev)
1056 {
1057         int ret;
1058         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1059         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1060
1061         PMD_INIT_FUNC_TRACE();
1062
1063         if (dpni == NULL) {
1064                 DPAA2_PMD_ERR("dpni is NULL");
1065                 return -ENODEV;
1066         }
1067
1068         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1069         if (ret < 0)
1070                 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1071
1072         return ret;
1073 }
1074
1075 static int
1076 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1077 {
1078         int ret;
1079         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1080         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1081
1082         PMD_INIT_FUNC_TRACE();
1083
1084         if (dpni == NULL) {
1085                 DPAA2_PMD_ERR("dpni is NULL");
1086                 return -ENODEV;
1087         }
1088
1089         /* must remain on for all promiscuous */
1090         if (dev->data->promiscuous == 1)
1091                 return 0;
1092
1093         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1094         if (ret < 0)
1095                 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1096
1097         return ret;
1098 }
1099
1100 static int
1101 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1102 {
1103         int ret;
1104         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1105         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1106         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1107                                 + VLAN_TAG_SIZE;
1108
1109         PMD_INIT_FUNC_TRACE();
1110
1111         if (dpni == NULL) {
1112                 DPAA2_PMD_ERR("dpni is NULL");
1113                 return -EINVAL;
1114         }
1115
1116         /* check that mtu is within the allowed range */
1117         if (mtu < RTE_ETHER_MIN_MTU || frame_size > DPAA2_MAX_RX_PKT_LEN)
1118                 return -EINVAL;
1119
1120         if (frame_size > RTE_ETHER_MAX_LEN)
1121                 dev->data->dev_conf.rxmode.offloads &=
1122                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
1123         else
1124                 dev->data->dev_conf.rxmode.offloads &=
1125                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1126
1127         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1128
1129         /* Set the Max Rx frame length as 'mtu' +
1130          * Maximum Ethernet header length
1131          */
1132         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1133                                         frame_size);
1134         if (ret) {
1135                 DPAA2_PMD_ERR("Setting the max frame length failed");
1136                 return -1;
1137         }
1138         DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1139         return 0;
1140 }
1141
1142 static int
1143 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1144                        struct rte_ether_addr *addr,
1145                        __rte_unused uint32_t index,
1146                        __rte_unused uint32_t pool)
1147 {
1148         int ret;
1149         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1150         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1151
1152         PMD_INIT_FUNC_TRACE();
1153
1154         if (dpni == NULL) {
1155                 DPAA2_PMD_ERR("dpni is NULL");
1156                 return -1;
1157         }
1158
1159         ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1160                                 priv->token, addr->addr_bytes);
1161         if (ret)
1162                 DPAA2_PMD_ERR(
1163                         "error: Adding the MAC ADDR failed: err = %d", ret);
1164         return 0;
1165 }
1166
1167 static void
1168 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1169                           uint32_t index)
1170 {
1171         int ret;
1172         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1173         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1174         struct rte_eth_dev_data *data = dev->data;
1175         struct rte_ether_addr *macaddr;
1176
1177         PMD_INIT_FUNC_TRACE();
1178
1179         macaddr = &data->mac_addrs[index];
1180
1181         if (dpni == NULL) {
1182                 DPAA2_PMD_ERR("dpni is NULL");
1183                 return;
1184         }
1185
1186         ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1187                                    priv->token, macaddr->addr_bytes);
1188         if (ret)
1189                 DPAA2_PMD_ERR(
1190                         "error: Removing the MAC ADDR failed: err = %d", ret);
1191 }
1192
1193 static int
1194 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1195                        struct rte_ether_addr *addr)
1196 {
1197         int ret;
1198         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1199         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1200
1201         PMD_INIT_FUNC_TRACE();
1202
1203         if (dpni == NULL) {
1204                 DPAA2_PMD_ERR("dpni is NULL");
1205                 return -EINVAL;
1206         }
1207
1208         ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1209                                         priv->token, addr->addr_bytes);
1210
1211         if (ret)
1212                 DPAA2_PMD_ERR(
1213                         "error: Setting the MAC ADDR failed %d", ret);
1214
1215         return ret;
1216 }
1217
1218 static
1219 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1220                          struct rte_eth_stats *stats)
1221 {
1222         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1223         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1224         int32_t  retcode;
1225         uint8_t page0 = 0, page1 = 1, page2 = 2;
1226         union dpni_statistics value;
1227         int i;
1228         struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1229
1230         memset(&value, 0, sizeof(union dpni_statistics));
1231
1232         PMD_INIT_FUNC_TRACE();
1233
1234         if (!dpni) {
1235                 DPAA2_PMD_ERR("dpni is NULL");
1236                 return -EINVAL;
1237         }
1238
1239         if (!stats) {
1240                 DPAA2_PMD_ERR("stats is NULL");
1241                 return -EINVAL;
1242         }
1243
1244         /*Get Counters from page_0*/
1245         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1246                                       page0, 0, &value);
1247         if (retcode)
1248                 goto err;
1249
1250         stats->ipackets = value.page_0.ingress_all_frames;
1251         stats->ibytes = value.page_0.ingress_all_bytes;
1252
1253         /*Get Counters from page_1*/
1254         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1255                                       page1, 0, &value);
1256         if (retcode)
1257                 goto err;
1258
1259         stats->opackets = value.page_1.egress_all_frames;
1260         stats->obytes = value.page_1.egress_all_bytes;
1261
1262         /*Get Counters from page_2*/
1263         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1264                                       page2, 0, &value);
1265         if (retcode)
1266                 goto err;
1267
1268         /* Ingress drop frame count due to configured rules */
1269         stats->ierrors = value.page_2.ingress_filtered_frames;
1270         /* Ingress drop frame count due to error */
1271         stats->ierrors += value.page_2.ingress_discarded_frames;
1272
1273         stats->oerrors = value.page_2.egress_discarded_frames;
1274         stats->imissed = value.page_2.ingress_nobuffer_discards;
1275
1276         /* Fill in per queue stats */
1277         for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1278                 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1279                 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1280                 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1281                 if (dpaa2_rxq)
1282                         stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1283                 if (dpaa2_txq)
1284                         stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1285
1286                 /* Byte counting is not implemented */
1287                 stats->q_ibytes[i]   = 0;
1288                 stats->q_obytes[i]   = 0;
1289         }
1290
1291         return 0;
1292
1293 err:
1294         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1295         return retcode;
1296 };
1297
1298 static int
1299 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1300                      unsigned int n)
1301 {
1302         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1303         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1304         int32_t  retcode;
1305         union dpni_statistics value[3] = {};
1306         unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1307
1308         if (n < num)
1309                 return num;
1310
1311         if (xstats == NULL)
1312                 return 0;
1313
1314         /* Get Counters from page_0*/
1315         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1316                                       0, 0, &value[0]);
1317         if (retcode)
1318                 goto err;
1319
1320         /* Get Counters from page_1*/
1321         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1322                                       1, 0, &value[1]);
1323         if (retcode)
1324                 goto err;
1325
1326         /* Get Counters from page_2*/
1327         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1328                                       2, 0, &value[2]);
1329         if (retcode)
1330                 goto err;
1331
1332         for (i = 0; i < num; i++) {
1333                 xstats[i].id = i;
1334                 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1335                         raw.counter[dpaa2_xstats_strings[i].stats_id];
1336         }
1337         return i;
1338 err:
1339         DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1340         return retcode;
1341 }
1342
1343 static int
1344 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1345                        struct rte_eth_xstat_name *xstats_names,
1346                        unsigned int limit)
1347 {
1348         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1349
1350         if (limit < stat_cnt)
1351                 return stat_cnt;
1352
1353         if (xstats_names != NULL)
1354                 for (i = 0; i < stat_cnt; i++)
1355                         strlcpy(xstats_names[i].name,
1356                                 dpaa2_xstats_strings[i].name,
1357                                 sizeof(xstats_names[i].name));
1358
1359         return stat_cnt;
1360 }
1361
1362 static int
1363 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1364                        uint64_t *values, unsigned int n)
1365 {
1366         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1367         uint64_t values_copy[stat_cnt];
1368
1369         if (!ids) {
1370                 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1371                 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1372                 int32_t  retcode;
1373                 union dpni_statistics value[3] = {};
1374
1375                 if (n < stat_cnt)
1376                         return stat_cnt;
1377
1378                 if (!values)
1379                         return 0;
1380
1381                 /* Get Counters from page_0*/
1382                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1383                                               0, 0, &value[0]);
1384                 if (retcode)
1385                         return 0;
1386
1387                 /* Get Counters from page_1*/
1388                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1389                                               1, 0, &value[1]);
1390                 if (retcode)
1391                         return 0;
1392
1393                 /* Get Counters from page_2*/
1394                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1395                                               2, 0, &value[2]);
1396                 if (retcode)
1397                         return 0;
1398
1399                 for (i = 0; i < stat_cnt; i++) {
1400                         values[i] = value[dpaa2_xstats_strings[i].page_id].
1401                                 raw.counter[dpaa2_xstats_strings[i].stats_id];
1402                 }
1403                 return stat_cnt;
1404         }
1405
1406         dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1407
1408         for (i = 0; i < n; i++) {
1409                 if (ids[i] >= stat_cnt) {
1410                         DPAA2_PMD_ERR("xstats id value isn't valid");
1411                         return -1;
1412                 }
1413                 values[i] = values_copy[ids[i]];
1414         }
1415         return n;
1416 }
1417
1418 static int
1419 dpaa2_xstats_get_names_by_id(
1420         struct rte_eth_dev *dev,
1421         struct rte_eth_xstat_name *xstats_names,
1422         const uint64_t *ids,
1423         unsigned int limit)
1424 {
1425         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1426         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1427
1428         if (!ids)
1429                 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1430
1431         dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1432
1433         for (i = 0; i < limit; i++) {
1434                 if (ids[i] >= stat_cnt) {
1435                         DPAA2_PMD_ERR("xstats id value isn't valid");
1436                         return -1;
1437                 }
1438                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1439         }
1440         return limit;
1441 }
1442
1443 static int
1444 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1445 {
1446         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1447         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1448         int retcode;
1449         int i;
1450         struct dpaa2_queue *dpaa2_q;
1451
1452         PMD_INIT_FUNC_TRACE();
1453
1454         if (dpni == NULL) {
1455                 DPAA2_PMD_ERR("dpni is NULL");
1456                 return -EINVAL;
1457         }
1458
1459         retcode =  dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1460         if (retcode)
1461                 goto error;
1462
1463         /* Reset the per queue stats in dpaa2_queue structure */
1464         for (i = 0; i < priv->nb_rx_queues; i++) {
1465                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1466                 if (dpaa2_q)
1467                         dpaa2_q->rx_pkts = 0;
1468         }
1469
1470         for (i = 0; i < priv->nb_tx_queues; i++) {
1471                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1472                 if (dpaa2_q)
1473                         dpaa2_q->tx_pkts = 0;
1474         }
1475
1476         return 0;
1477
1478 error:
1479         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1480         return retcode;
1481 };
1482
1483 /* return 0 means link status changed, -1 means not changed */
1484 static int
1485 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1486                         int wait_to_complete __rte_unused)
1487 {
1488         int ret;
1489         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1490         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1491         struct rte_eth_link link;
1492         struct dpni_link_state state = {0};
1493
1494         if (dpni == NULL) {
1495                 DPAA2_PMD_ERR("dpni is NULL");
1496                 return 0;
1497         }
1498
1499         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1500         if (ret < 0) {
1501                 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1502                 return -1;
1503         }
1504
1505         memset(&link, 0, sizeof(struct rte_eth_link));
1506         link.link_status = state.up;
1507         link.link_speed = state.rate;
1508
1509         if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1510                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1511         else
1512                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1513
1514         ret = rte_eth_linkstatus_set(dev, &link);
1515         if (ret == -1)
1516                 DPAA2_PMD_DEBUG("No change in status");
1517         else
1518                 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1519                                link.link_status ? "Up" : "Down");
1520
1521         return ret;
1522 }
1523
1524 /**
1525  * Toggle the DPNI to enable, if not already enabled.
1526  * This is not strictly PHY up/down - it is more of logical toggling.
1527  */
1528 static int
1529 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1530 {
1531         int ret = -EINVAL;
1532         struct dpaa2_dev_priv *priv;
1533         struct fsl_mc_io *dpni;
1534         int en = 0;
1535         struct dpni_link_state state = {0};
1536
1537         priv = dev->data->dev_private;
1538         dpni = (struct fsl_mc_io *)priv->hw;
1539
1540         if (dpni == NULL) {
1541                 DPAA2_PMD_ERR("dpni is NULL");
1542                 return ret;
1543         }
1544
1545         /* Check if DPNI is currently enabled */
1546         ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1547         if (ret) {
1548                 /* Unable to obtain dpni status; Not continuing */
1549                 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1550                 return -EINVAL;
1551         }
1552
1553         /* Enable link if not already enabled */
1554         if (!en) {
1555                 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1556                 if (ret) {
1557                         DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1558                         return -EINVAL;
1559                 }
1560         }
1561         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1562         if (ret < 0) {
1563                 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1564                 return -1;
1565         }
1566
1567         /* changing tx burst function to start enqueues */
1568         dev->tx_pkt_burst = dpaa2_dev_tx;
1569         dev->data->dev_link.link_status = state.up;
1570
1571         if (state.up)
1572                 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1573         else
1574                 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1575         return ret;
1576 }
1577
1578 /**
1579  * Toggle the DPNI to disable, if not already disabled.
1580  * This is not strictly PHY up/down - it is more of logical toggling.
1581  */
1582 static int
1583 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1584 {
1585         int ret = -EINVAL;
1586         struct dpaa2_dev_priv *priv;
1587         struct fsl_mc_io *dpni;
1588         int dpni_enabled = 0;
1589         int retries = 10;
1590
1591         PMD_INIT_FUNC_TRACE();
1592
1593         priv = dev->data->dev_private;
1594         dpni = (struct fsl_mc_io *)priv->hw;
1595
1596         if (dpni == NULL) {
1597                 DPAA2_PMD_ERR("Device has not yet been configured");
1598                 return ret;
1599         }
1600
1601         /*changing  tx burst function to avoid any more enqueues */
1602         dev->tx_pkt_burst = dummy_dev_tx;
1603
1604         /* Loop while dpni_disable() attempts to drain the egress FQs
1605          * and confirm them back to us.
1606          */
1607         do {
1608                 ret = dpni_disable(dpni, 0, priv->token);
1609                 if (ret) {
1610                         DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1611                         return ret;
1612                 }
1613                 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1614                 if (ret) {
1615                         DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1616                         return ret;
1617                 }
1618                 if (dpni_enabled)
1619                         /* Allow the MC some slack */
1620                         rte_delay_us(100 * 1000);
1621         } while (dpni_enabled && --retries);
1622
1623         if (!retries) {
1624                 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1625                 /* todo- we may have to manually cleanup queues.
1626                  */
1627         } else {
1628                 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1629                                dev->data->port_id);
1630         }
1631
1632         dev->data->dev_link.link_status = 0;
1633
1634         return ret;
1635 }
1636
1637 static int
1638 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1639 {
1640         int ret = -EINVAL;
1641         struct dpaa2_dev_priv *priv;
1642         struct fsl_mc_io *dpni;
1643         struct dpni_link_state state = {0};
1644
1645         PMD_INIT_FUNC_TRACE();
1646
1647         priv = dev->data->dev_private;
1648         dpni = (struct fsl_mc_io *)priv->hw;
1649
1650         if (dpni == NULL || fc_conf == NULL) {
1651                 DPAA2_PMD_ERR("device not configured");
1652                 return ret;
1653         }
1654
1655         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1656         if (ret) {
1657                 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1658                 return ret;
1659         }
1660
1661         memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1662         if (state.options & DPNI_LINK_OPT_PAUSE) {
1663                 /* DPNI_LINK_OPT_PAUSE set
1664                  *  if ASYM_PAUSE not set,
1665                  *      RX Side flow control (handle received Pause frame)
1666                  *      TX side flow control (send Pause frame)
1667                  *  if ASYM_PAUSE set,
1668                  *      RX Side flow control (handle received Pause frame)
1669                  *      No TX side flow control (send Pause frame disabled)
1670                  */
1671                 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1672                         fc_conf->mode = RTE_FC_FULL;
1673                 else
1674                         fc_conf->mode = RTE_FC_RX_PAUSE;
1675         } else {
1676                 /* DPNI_LINK_OPT_PAUSE not set
1677                  *  if ASYM_PAUSE set,
1678                  *      TX side flow control (send Pause frame)
1679                  *      No RX side flow control (No action on pause frame rx)
1680                  *  if ASYM_PAUSE not set,
1681                  *      Flow control disabled
1682                  */
1683                 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1684                         fc_conf->mode = RTE_FC_TX_PAUSE;
1685                 else
1686                         fc_conf->mode = RTE_FC_NONE;
1687         }
1688
1689         return ret;
1690 }
1691
1692 static int
1693 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1694 {
1695         int ret = -EINVAL;
1696         struct dpaa2_dev_priv *priv;
1697         struct fsl_mc_io *dpni;
1698         struct dpni_link_state state = {0};
1699         struct dpni_link_cfg cfg = {0};
1700
1701         PMD_INIT_FUNC_TRACE();
1702
1703         priv = dev->data->dev_private;
1704         dpni = (struct fsl_mc_io *)priv->hw;
1705
1706         if (dpni == NULL) {
1707                 DPAA2_PMD_ERR("dpni is NULL");
1708                 return ret;
1709         }
1710
1711         /* It is necessary to obtain the current state before setting fc_conf
1712          * as MC would return error in case rate, autoneg or duplex values are
1713          * different.
1714          */
1715         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1716         if (ret) {
1717                 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1718                 return -1;
1719         }
1720
1721         /* Disable link before setting configuration */
1722         dpaa2_dev_set_link_down(dev);
1723
1724         /* Based on fc_conf, update cfg */
1725         cfg.rate = state.rate;
1726         cfg.options = state.options;
1727
1728         /* update cfg with fc_conf */
1729         switch (fc_conf->mode) {
1730         case RTE_FC_FULL:
1731                 /* Full flow control;
1732                  * OPT_PAUSE set, ASYM_PAUSE not set
1733                  */
1734                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1735                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1736                 break;
1737         case RTE_FC_TX_PAUSE:
1738                 /* Enable RX flow control
1739                  * OPT_PAUSE not set;
1740                  * ASYM_PAUSE set;
1741                  */
1742                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1743                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1744                 break;
1745         case RTE_FC_RX_PAUSE:
1746                 /* Enable TX Flow control
1747                  * OPT_PAUSE set
1748                  * ASYM_PAUSE set
1749                  */
1750                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1751                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1752                 break;
1753         case RTE_FC_NONE:
1754                 /* Disable Flow control
1755                  * OPT_PAUSE not set
1756                  * ASYM_PAUSE not set
1757                  */
1758                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1759                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1760                 break;
1761         default:
1762                 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1763                               fc_conf->mode);
1764                 return -1;
1765         }
1766
1767         ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1768         if (ret)
1769                 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1770                               ret);
1771
1772         /* Enable link */
1773         dpaa2_dev_set_link_up(dev);
1774
1775         return ret;
1776 }
1777
1778 static int
1779 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1780                           struct rte_eth_rss_conf *rss_conf)
1781 {
1782         struct rte_eth_dev_data *data = dev->data;
1783         struct rte_eth_conf *eth_conf = &data->dev_conf;
1784         int ret;
1785
1786         PMD_INIT_FUNC_TRACE();
1787
1788         if (rss_conf->rss_hf) {
1789                 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1790                 if (ret) {
1791                         DPAA2_PMD_ERR("Unable to set flow dist");
1792                         return ret;
1793                 }
1794         } else {
1795                 ret = dpaa2_remove_flow_dist(dev, 0);
1796                 if (ret) {
1797                         DPAA2_PMD_ERR("Unable to remove flow dist");
1798                         return ret;
1799                 }
1800         }
1801         eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1802         return 0;
1803 }
1804
1805 static int
1806 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1807                             struct rte_eth_rss_conf *rss_conf)
1808 {
1809         struct rte_eth_dev_data *data = dev->data;
1810         struct rte_eth_conf *eth_conf = &data->dev_conf;
1811
1812         /* dpaa2 does not support rss_key, so length should be 0*/
1813         rss_conf->rss_key_len = 0;
1814         rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1815         return 0;
1816 }
1817
1818 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
1819                 int eth_rx_queue_id,
1820                 uint16_t dpcon_id,
1821                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
1822 {
1823         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1824         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1825         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1826         uint8_t flow_id = dpaa2_ethq->flow_id;
1827         struct dpni_queue cfg;
1828         uint8_t options;
1829         int ret;
1830
1831         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
1832                 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
1833         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
1834                 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
1835         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
1836                 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
1837         else
1838                 return -EINVAL;
1839
1840         memset(&cfg, 0, sizeof(struct dpni_queue));
1841         options = DPNI_QUEUE_OPT_DEST;
1842         cfg.destination.type = DPNI_DEST_DPCON;
1843         cfg.destination.id = dpcon_id;
1844         cfg.destination.priority = queue_conf->ev.priority;
1845
1846         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
1847                 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
1848                 cfg.destination.hold_active = 1;
1849         }
1850
1851         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
1852                         !eth_priv->en_ordered) {
1853                 struct opr_cfg ocfg;
1854
1855                 /* Restoration window size = 256 frames */
1856                 ocfg.oprrws = 3;
1857                 /* Restoration window size = 512 frames for LX2 */
1858                 if (dpaa2_svr_family == SVR_LX2160A)
1859                         ocfg.oprrws = 4;
1860                 /* Auto advance NESN window enabled */
1861                 ocfg.oa = 1;
1862                 /* Late arrival window size disabled */
1863                 ocfg.olws = 0;
1864                 /* ORL resource exhaustaion advance NESN disabled */
1865                 ocfg.oeane = 0;
1866                 /* Loose ordering enabled */
1867                 ocfg.oloe = 1;
1868                 eth_priv->en_loose_ordered = 1;
1869                 /* Strict ordering enabled if explicitly set */
1870                 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
1871                         ocfg.oloe = 0;
1872                         eth_priv->en_loose_ordered = 0;
1873                 }
1874
1875                 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
1876                                    dpaa2_ethq->tc_index, flow_id,
1877                                    OPR_OPT_CREATE, &ocfg);
1878                 if (ret) {
1879                         DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
1880                         return ret;
1881                 }
1882
1883                 eth_priv->en_ordered = 1;
1884         }
1885
1886         options |= DPNI_QUEUE_OPT_USER_CTX;
1887         cfg.user_context = (size_t)(dpaa2_ethq);
1888
1889         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1890                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
1891         if (ret) {
1892                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1893                 return ret;
1894         }
1895
1896         memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
1897
1898         return 0;
1899 }
1900
1901 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
1902                 int eth_rx_queue_id)
1903 {
1904         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1905         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1906         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1907         uint8_t flow_id = dpaa2_ethq->flow_id;
1908         struct dpni_queue cfg;
1909         uint8_t options;
1910         int ret;
1911
1912         memset(&cfg, 0, sizeof(struct dpni_queue));
1913         options = DPNI_QUEUE_OPT_DEST;
1914         cfg.destination.type = DPNI_DEST_NONE;
1915
1916         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1917                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
1918         if (ret)
1919                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1920
1921         return ret;
1922 }
1923
1924 static inline int
1925 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op)
1926 {
1927         unsigned int i;
1928
1929         for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) {
1930                 if (dpaa2_supported_filter_ops[i] == filter_op)
1931                         return 0;
1932         }
1933         return -ENOTSUP;
1934 }
1935
1936 static int
1937 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
1938                     enum rte_filter_type filter_type,
1939                                  enum rte_filter_op filter_op,
1940                                  void *arg)
1941 {
1942         int ret = 0;
1943
1944         if (!dev)
1945                 return -ENODEV;
1946
1947         switch (filter_type) {
1948         case RTE_ETH_FILTER_GENERIC:
1949                 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) {
1950                         ret = -ENOTSUP;
1951                         break;
1952                 }
1953                 *(const void **)arg = &dpaa2_flow_ops;
1954                 dpaa2_filter_type |= filter_type;
1955                 break;
1956         default:
1957                 RTE_LOG(ERR, PMD, "Filter type (%d) not supported",
1958                         filter_type);
1959                 ret = -ENOTSUP;
1960                 break;
1961         }
1962         return ret;
1963 }
1964
1965 static struct eth_dev_ops dpaa2_ethdev_ops = {
1966         .dev_configure    = dpaa2_eth_dev_configure,
1967         .dev_start            = dpaa2_dev_start,
1968         .dev_stop             = dpaa2_dev_stop,
1969         .dev_close            = dpaa2_dev_close,
1970         .promiscuous_enable   = dpaa2_dev_promiscuous_enable,
1971         .promiscuous_disable  = dpaa2_dev_promiscuous_disable,
1972         .allmulticast_enable  = dpaa2_dev_allmulticast_enable,
1973         .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1974         .dev_set_link_up      = dpaa2_dev_set_link_up,
1975         .dev_set_link_down    = dpaa2_dev_set_link_down,
1976         .link_update       = dpaa2_dev_link_update,
1977         .stats_get             = dpaa2_dev_stats_get,
1978         .xstats_get            = dpaa2_dev_xstats_get,
1979         .xstats_get_by_id     = dpaa2_xstats_get_by_id,
1980         .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
1981         .xstats_get_names      = dpaa2_xstats_get_names,
1982         .stats_reset       = dpaa2_dev_stats_reset,
1983         .xstats_reset         = dpaa2_dev_stats_reset,
1984         .fw_version_get    = dpaa2_fw_version_get,
1985         .dev_infos_get     = dpaa2_dev_info_get,
1986         .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1987         .mtu_set           = dpaa2_dev_mtu_set,
1988         .vlan_filter_set      = dpaa2_vlan_filter_set,
1989         .vlan_offload_set     = dpaa2_vlan_offload_set,
1990         .vlan_tpid_set        = dpaa2_vlan_tpid_set,
1991         .rx_queue_setup    = dpaa2_dev_rx_queue_setup,
1992         .rx_queue_release  = dpaa2_dev_rx_queue_release,
1993         .tx_queue_setup    = dpaa2_dev_tx_queue_setup,
1994         .tx_queue_release  = dpaa2_dev_tx_queue_release,
1995         .rx_queue_count       = dpaa2_dev_rx_queue_count,
1996         .flow_ctrl_get        = dpaa2_flow_ctrl_get,
1997         .flow_ctrl_set        = dpaa2_flow_ctrl_set,
1998         .mac_addr_add         = dpaa2_dev_add_mac_addr,
1999         .mac_addr_remove      = dpaa2_dev_remove_mac_addr,
2000         .mac_addr_set         = dpaa2_dev_set_mac_addr,
2001         .rss_hash_update      = dpaa2_dev_rss_hash_update,
2002         .rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
2003         .filter_ctrl          = dpaa2_dev_flow_ctrl,
2004 };
2005
2006 /* Populate the mac address from physically available (u-boot/firmware) and/or
2007  * one set by higher layers like MC (restool) etc.
2008  * Returns the table of MAC entries (multiple entries)
2009  */
2010 static int
2011 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
2012                   struct rte_ether_addr *mac_entry)
2013 {
2014         int ret;
2015         struct rte_ether_addr phy_mac, prime_mac;
2016
2017         memset(&phy_mac, 0, sizeof(struct rte_ether_addr));
2018         memset(&prime_mac, 0, sizeof(struct rte_ether_addr));
2019
2020         /* Get the physical device MAC address */
2021         ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2022                                      phy_mac.addr_bytes);
2023         if (ret) {
2024                 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
2025                 goto cleanup;
2026         }
2027
2028         ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2029                                         prime_mac.addr_bytes);
2030         if (ret) {
2031                 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
2032                 goto cleanup;
2033         }
2034
2035         /* Now that both MAC have been obtained, do:
2036          *  if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
2037          *     and return phy
2038          *  If empty_mac(phy), return prime.
2039          *  if both are empty, create random MAC, set as prime and return
2040          */
2041         if (!rte_is_zero_ether_addr(&phy_mac)) {
2042                 /* If the addresses are not same, overwrite prime */
2043                 if (!rte_is_same_ether_addr(&phy_mac, &prime_mac)) {
2044                         ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2045                                                         priv->token,
2046                                                         phy_mac.addr_bytes);
2047                         if (ret) {
2048                                 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
2049                                               ret);
2050                                 goto cleanup;
2051                         }
2052                         memcpy(&prime_mac, &phy_mac,
2053                                 sizeof(struct rte_ether_addr));
2054                 }
2055         } else if (rte_is_zero_ether_addr(&prime_mac)) {
2056                 /* In case phys and prime, both are zero, create random MAC */
2057                 rte_eth_random_addr(prime_mac.addr_bytes);
2058                 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2059                                                 priv->token,
2060                                                 prime_mac.addr_bytes);
2061                 if (ret) {
2062                         DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
2063                         goto cleanup;
2064                 }
2065         }
2066
2067         /* prime_mac the final MAC address */
2068         memcpy(mac_entry, &prime_mac, sizeof(struct rte_ether_addr));
2069         return 0;
2070
2071 cleanup:
2072         return -1;
2073 }
2074
2075 static int
2076 check_devargs_handler(__rte_unused const char *key, const char *value,
2077                       __rte_unused void *opaque)
2078 {
2079         if (strcmp(value, "1"))
2080                 return -1;
2081
2082         return 0;
2083 }
2084
2085 static int
2086 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2087 {
2088         struct rte_kvargs *kvlist;
2089
2090         if (!devargs)
2091                 return 0;
2092
2093         kvlist = rte_kvargs_parse(devargs->args, NULL);
2094         if (!kvlist)
2095                 return 0;
2096
2097         if (!rte_kvargs_count(kvlist, key)) {
2098                 rte_kvargs_free(kvlist);
2099                 return 0;
2100         }
2101
2102         if (rte_kvargs_process(kvlist, key,
2103                                check_devargs_handler, NULL) < 0) {
2104                 rte_kvargs_free(kvlist);
2105                 return 0;
2106         }
2107         rte_kvargs_free(kvlist);
2108
2109         return 1;
2110 }
2111
2112 static int
2113 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2114 {
2115         struct rte_device *dev = eth_dev->device;
2116         struct rte_dpaa2_device *dpaa2_dev;
2117         struct fsl_mc_io *dpni_dev;
2118         struct dpni_attr attr;
2119         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2120         struct dpni_buffer_layout layout;
2121         int ret, hw_id, i;
2122
2123         PMD_INIT_FUNC_TRACE();
2124
2125         /* For secondary processes, the primary has done all the work */
2126         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2127                 /* In case of secondary, only burst and ops API need to be
2128                  * plugged.
2129                  */
2130                 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2131                 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2132                         eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2133                 else if (dpaa2_get_devargs(dev->devargs,
2134                                         DRIVER_NO_PREFETCH_MODE))
2135                         eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2136                 else
2137                         eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2138                 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2139                 return 0;
2140         }
2141
2142         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2143
2144         hw_id = dpaa2_dev->object_id;
2145
2146         dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2147         if (!dpni_dev) {
2148                 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2149                 return -1;
2150         }
2151
2152         dpni_dev->regs = rte_mcp_ptr_list[0];
2153         ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2154         if (ret) {
2155                 DPAA2_PMD_ERR(
2156                              "Failure in opening dpni@%d with err code %d",
2157                              hw_id, ret);
2158                 rte_free(dpni_dev);
2159                 return -1;
2160         }
2161
2162         /* Clean the device first */
2163         ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2164         if (ret) {
2165                 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2166                               hw_id, ret);
2167                 goto init_err;
2168         }
2169
2170         ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2171         if (ret) {
2172                 DPAA2_PMD_ERR(
2173                              "Failure in get dpni@%d attribute, err code %d",
2174                              hw_id, ret);
2175                 goto init_err;
2176         }
2177
2178         priv->num_rx_tc = attr.num_rx_tcs;
2179
2180         for (i = 0; i < attr.num_rx_tcs; i++)
2181                 priv->nb_rx_queues += attr.num_queues;
2182
2183         /* Using number of TX queues as number of TX TCs */
2184         priv->nb_tx_queues = attr.num_tx_tcs;
2185
2186         DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
2187                         priv->num_rx_tc, priv->nb_rx_queues,
2188                         priv->nb_tx_queues);
2189
2190         priv->hw = dpni_dev;
2191         priv->hw_id = hw_id;
2192         priv->options = attr.options;
2193         priv->max_mac_filters = attr.mac_filter_entries;
2194         priv->max_vlan_filters = attr.vlan_filter_entries;
2195         priv->flags = 0;
2196
2197         /* Allocate memory for hardware structure for queues */
2198         ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2199         if (ret) {
2200                 DPAA2_PMD_ERR("Queue allocation Failed");
2201                 goto init_err;
2202         }
2203
2204         /* Allocate memory for storing MAC addresses.
2205          * Table of mac_filter_entries size is allocated so that RTE ether lib
2206          * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2207          */
2208         eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2209                 RTE_ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2210         if (eth_dev->data->mac_addrs == NULL) {
2211                 DPAA2_PMD_ERR(
2212                    "Failed to allocate %d bytes needed to store MAC addresses",
2213                    RTE_ETHER_ADDR_LEN * attr.mac_filter_entries);
2214                 ret = -ENOMEM;
2215                 goto init_err;
2216         }
2217
2218         ret = populate_mac_addr(dpni_dev, priv, &eth_dev->data->mac_addrs[0]);
2219         if (ret) {
2220                 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2221                 rte_free(eth_dev->data->mac_addrs);
2222                 eth_dev->data->mac_addrs = NULL;
2223                 goto init_err;
2224         }
2225
2226         /* ... tx buffer layout ... */
2227         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2228         layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2229         layout.pass_frame_status = 1;
2230         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2231                                      DPNI_QUEUE_TX, &layout);
2232         if (ret) {
2233                 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2234                 goto init_err;
2235         }
2236
2237         /* ... tx-conf and error buffer layout ... */
2238         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2239         layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2240         layout.pass_frame_status = 1;
2241         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2242                                      DPNI_QUEUE_TX_CONFIRM, &layout);
2243         if (ret) {
2244                 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2245                              ret);
2246                 goto init_err;
2247         }
2248
2249         eth_dev->dev_ops = &dpaa2_ethdev_ops;
2250
2251         if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2252                 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2253                 DPAA2_PMD_INFO("Loopback mode");
2254         } else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
2255                 eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2256                 DPAA2_PMD_INFO("No Prefetch mode");
2257         } else {
2258                 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2259         }
2260         eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2261
2262         /*Init fields w.r.t. classficaition*/
2263         memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg));
2264         priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64);
2265         if (!priv->extract.qos_extract_param) {
2266                 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow "
2267                             " classificaiton ", ret);
2268                 goto init_err;
2269         }
2270         for (i = 0; i < MAX_TCS; i++) {
2271                 memset(&priv->extract.fs_key_cfg[i], 0,
2272                         sizeof(struct dpkg_profile_cfg));
2273                 priv->extract.fs_extract_param[i] =
2274                         (size_t)rte_malloc(NULL, 256, 64);
2275                 if (!priv->extract.fs_extract_param[i]) {
2276                         DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton",
2277                                      ret);
2278                         goto init_err;
2279                 }
2280         }
2281
2282         RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2283         return 0;
2284 init_err:
2285         dpaa2_dev_uninit(eth_dev);
2286         return ret;
2287 }
2288
2289 static int
2290 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2291 {
2292         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2293         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
2294         int i, ret;
2295
2296         PMD_INIT_FUNC_TRACE();
2297
2298         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2299                 return 0;
2300
2301         if (!dpni) {
2302                 DPAA2_PMD_WARN("Already closed or not started");
2303                 return -1;
2304         }
2305
2306         dpaa2_dev_close(eth_dev);
2307
2308         dpaa2_free_rx_tx_queues(eth_dev);
2309
2310         /* Close the device at underlying layer*/
2311         ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2312         if (ret) {
2313                 DPAA2_PMD_ERR(
2314                              "Failure closing dpni device with err code %d",
2315                              ret);
2316         }
2317
2318         /* Free the allocated memory for ethernet private data and dpni*/
2319         priv->hw = NULL;
2320         rte_free(dpni);
2321
2322         for (i = 0; i < MAX_TCS; i++) {
2323                 if (priv->extract.fs_extract_param[i])
2324                         rte_free((void *)(size_t)priv->extract.fs_extract_param[i]);
2325         }
2326
2327         if (priv->extract.qos_extract_param)
2328                 rte_free((void *)(size_t)priv->extract.qos_extract_param);
2329
2330         eth_dev->dev_ops = NULL;
2331         eth_dev->rx_pkt_burst = NULL;
2332         eth_dev->tx_pkt_burst = NULL;
2333
2334         DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2335         return 0;
2336 }
2337
2338 static int
2339 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2340                 struct rte_dpaa2_device *dpaa2_dev)
2341 {
2342         struct rte_eth_dev *eth_dev;
2343         int diag;
2344
2345         if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
2346                 RTE_PKTMBUF_HEADROOM) {
2347                 DPAA2_PMD_ERR(
2348                 "RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA2 Annotation req(%d)",
2349                 RTE_PKTMBUF_HEADROOM,
2350                 DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE);
2351
2352                 return -1;
2353         }
2354
2355         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2356                 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2357                 if (!eth_dev)
2358                         return -ENODEV;
2359                 eth_dev->data->dev_private = rte_zmalloc(
2360                                                 "ethdev private structure",
2361                                                 sizeof(struct dpaa2_dev_priv),
2362                                                 RTE_CACHE_LINE_SIZE);
2363                 if (eth_dev->data->dev_private == NULL) {
2364                         DPAA2_PMD_CRIT(
2365                                 "Unable to allocate memory for private data");
2366                         rte_eth_dev_release_port(eth_dev);
2367                         return -ENOMEM;
2368                 }
2369         } else {
2370                 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2371                 if (!eth_dev)
2372                         return -ENODEV;
2373         }
2374
2375         eth_dev->device = &dpaa2_dev->device;
2376
2377         dpaa2_dev->eth_dev = eth_dev;
2378         eth_dev->data->rx_mbuf_alloc_failed = 0;
2379
2380         if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2381                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2382
2383         /* Invoke PMD device initialization function */
2384         diag = dpaa2_dev_init(eth_dev);
2385         if (diag == 0) {
2386                 rte_eth_dev_probing_finish(eth_dev);
2387                 return 0;
2388         }
2389
2390         rte_eth_dev_release_port(eth_dev);
2391         return diag;
2392 }
2393
2394 static int
2395 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2396 {
2397         struct rte_eth_dev *eth_dev;
2398
2399         eth_dev = dpaa2_dev->eth_dev;
2400         dpaa2_dev_uninit(eth_dev);
2401
2402         rte_eth_dev_release_port(eth_dev);
2403
2404         return 0;
2405 }
2406
2407 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2408         .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2409         .drv_type = DPAA2_ETH,
2410         .probe = rte_dpaa2_probe,
2411         .remove = rte_dpaa2_remove,
2412 };
2413
2414 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2415 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2416                 DRIVER_LOOPBACK_MODE "=<int> "
2417                 DRIVER_NO_PREFETCH_MODE "=<int>");
2418 RTE_INIT(dpaa2_pmd_init_log)
2419 {
2420         dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2421         if (dpaa2_logtype_pmd >= 0)
2422                 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);
2423 }