drivers/net/dpaa2/dpaa2_ethdev.c

   1 /* * SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016 NXP
   5  *
   6  */
   7
   8 #include <time.h>
   9 #include <net/if.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_malloc.h>
  14 #include <rte_memcpy.h>
  15 #include <rte_string_fns.h>
  16 #include <rte_cycles.h>
  17 #include <rte_kvargs.h>
  18 #include <rte_dev.h>
  19 #include <rte_fslmc.h>
  20 #include <rte_flow_driver.h>
  21
  22 #include "dpaa2_pmd_logs.h"
  23 #include <fslmc_vfio.h>
  24 #include <dpaa2_hw_pvt.h>
  25 #include <dpaa2_hw_mempool.h>
  26 #include <dpaa2_hw_dpio.h>
  27 #include <mc/fsl_dpmng.h>
  28 #include "dpaa2_ethdev.h"
  29 #include <fsl_qbman_debug.h>
  30
  31 #define DRIVER_LOOPBACK_MODE "drv_loopback"
  32 #define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
  33
  34 /* Supported Rx offloads */
  35 static uint64_t dev_rx_offloads_sup =
  36                 DEV_RX_OFFLOAD_CHECKSUM |
  37                 DEV_RX_OFFLOAD_SCTP_CKSUM |
  38                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  39                 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
  40                 DEV_RX_OFFLOAD_VLAN_STRIP |
  41                 DEV_RX_OFFLOAD_VLAN_FILTER |
  42                 DEV_RX_OFFLOAD_JUMBO_FRAME |
  43                 DEV_RX_OFFLOAD_TIMESTAMP;
  44
  45 /* Rx offloads which cannot be disabled */
  46 static uint64_t dev_rx_offloads_nodis =
  47                 DEV_RX_OFFLOAD_SCATTER;
  48
  49 /* Supported Tx offloads */
  50 static uint64_t dev_tx_offloads_sup =
  51                 DEV_TX_OFFLOAD_VLAN_INSERT |
  52                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  53                 DEV_TX_OFFLOAD_UDP_CKSUM |
  54                 DEV_TX_OFFLOAD_TCP_CKSUM |
  55                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  56                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  57                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  58                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  59
  60 /* Tx offloads which cannot be disabled */
  61 static uint64_t dev_tx_offloads_nodis =
  62                 DEV_TX_OFFLOAD_MULTI_SEGS;
  63
  64 /* enable timestamp in mbuf */
  65 enum pmd_dpaa2_ts dpaa2_enable_ts;
  66
  67 struct rte_dpaa2_xstats_name_off {
  68         char name[RTE_ETH_XSTATS_NAME_SIZE];
  69         uint8_t page_id; /* dpni statistics page id */
  70         uint8_t stats_id; /* stats id in the given page */
  71 };
  72
  73 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
  74         {"ingress_multicast_frames", 0, 2},
  75         {"ingress_multicast_bytes", 0, 3},
  76         {"ingress_broadcast_frames", 0, 4},
  77         {"ingress_broadcast_bytes", 0, 5},
  78         {"egress_multicast_frames", 1, 2},
  79         {"egress_multicast_bytes", 1, 3},
  80         {"egress_broadcast_frames", 1, 4},
  81         {"egress_broadcast_bytes", 1, 5},
  82         {"ingress_filtered_frames", 2, 0},
  83         {"ingress_discarded_frames", 2, 1},
  84         {"ingress_nobuffer_discards", 2, 2},
  85         {"egress_discarded_frames", 2, 3},
  86         {"egress_confirmed_frames", 2, 4},
  87         {"cgr_reject_frames", 4, 0},
  88         {"cgr_reject_bytes", 4, 1},
  89 };
  90
  91 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
  92         RTE_ETH_FILTER_ADD,
  93         RTE_ETH_FILTER_DELETE,
  94         RTE_ETH_FILTER_UPDATE,
  95         RTE_ETH_FILTER_FLUSH,
  96         RTE_ETH_FILTER_GET
  97 };
  98
  99 static struct rte_dpaa2_driver rte_dpaa2_pmd;
 100 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
 101 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
 102                                  int wait_to_complete);
 103 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
 104 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
 105 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 106
 107 int dpaa2_logtype_pmd;
 108
 109 void
 110 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
 111 {
 112         dpaa2_enable_ts = enable;
 113 }
 114
 115 static int
 116 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 117 {
 118         int ret;
 119         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 120         struct fsl_mc_io *dpni = dev->process_private;
 121
 122         PMD_INIT_FUNC_TRACE();
 123
 124         if (dpni == NULL) {
 125                 DPAA2_PMD_ERR("dpni is NULL");
 126                 return -1;
 127         }
 128
 129         if (on)
 130                 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
 131                                        priv->token, vlan_id);
 132         else
 133                 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
 134                                           priv->token, vlan_id);
 135
 136         if (ret < 0)
 137                 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
 138                               ret, vlan_id, priv->hw_id);
 139
 140         return ret;
 141 }
 142
 143 static int
 144 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 145 {
 146         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 147         struct fsl_mc_io *dpni = dev->process_private;
 148         int ret;
 149
 150         PMD_INIT_FUNC_TRACE();
 151
 152         if (mask & ETH_VLAN_FILTER_MASK) {
 153                 /* VLAN Filter not avaialble */
 154                 if (!priv->max_vlan_filters) {
 155                         DPAA2_PMD_INFO("VLAN filter not available");
 156                         goto next_mask;
 157                 }
 158
 159                 if (dev->data->dev_conf.rxmode.offloads &
 160                         DEV_RX_OFFLOAD_VLAN_FILTER)
 161                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 162                                                       priv->token, true);
 163                 else
 164                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 165                                                       priv->token, false);
 166                 if (ret < 0)
 167                         DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
 168         }
 169 next_mask:
 170         if (mask & ETH_VLAN_EXTEND_MASK) {
 171                 if (dev->data->dev_conf.rxmode.offloads &
 172                         DEV_RX_OFFLOAD_VLAN_EXTEND)
 173                         DPAA2_PMD_INFO("VLAN extend offload not supported");
 174         }
 175
 176         return 0;
 177 }
 178
 179 static int
 180 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 181                       enum rte_vlan_type vlan_type __rte_unused,
 182                       uint16_t tpid)
 183 {
 184         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 185         struct fsl_mc_io *dpni = dev->process_private;
 186         int ret = -ENOTSUP;
 187
 188         PMD_INIT_FUNC_TRACE();
 189
 190         /* nothing to be done for standard vlan tpids */
 191         if (tpid == 0x8100 || tpid == 0x88A8)
 192                 return 0;
 193
 194         ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 195                                    priv->token, tpid);
 196         if (ret < 0)
 197                 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
 198         /* if already configured tpids, remove them first */
 199         if (ret == -EBUSY) {
 200                 struct dpni_custom_tpid_cfg tpid_list = {0};
 201
 202                 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
 203                                    priv->token, &tpid_list);
 204                 if (ret < 0)
 205                         goto fail;
 206                 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
 207                                    priv->token, tpid_list.tpid1);
 208                 if (ret < 0)
 209                         goto fail;
 210                 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 211                                            priv->token, tpid);
 212         }
 213 fail:
 214         return ret;
 215 }
 216
 217 static int
 218 dpaa2_fw_version_get(struct rte_eth_dev *dev,
 219                      char *fw_version,
 220                      size_t fw_size)
 221 {
 222         int ret;
 223         struct fsl_mc_io *dpni = dev->process_private;
 224         struct mc_soc_version mc_plat_info = {0};
 225         struct mc_version mc_ver_info = {0};
 226
 227         PMD_INIT_FUNC_TRACE();
 228
 229         if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
 230                 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
 231
 232         if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
 233                 DPAA2_PMD_WARN("\tmc_get_version failed");
 234
 235         ret = snprintf(fw_version, fw_size,
 236                        "%x-%d.%d.%d",
 237                        mc_plat_info.svr,
 238                        mc_ver_info.major,
 239                        mc_ver_info.minor,
 240                        mc_ver_info.revision);
 241
 242         ret += 1; /* add the size of '\0' */
 243         if (fw_size < (uint32_t)ret)
 244                 return ret;
 245         else
 246                 return 0;
 247 }
 248
 249 static int
 250 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 251 {
 252         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 253
 254         PMD_INIT_FUNC_TRACE();
 255
 256         dev_info->if_index = priv->hw_id;
 257
 258         dev_info->max_mac_addrs = priv->max_mac_filters;
 259         dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
 260         dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 261         dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 262         dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
 263         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 264                                         dev_rx_offloads_nodis;
 265         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 266                                         dev_tx_offloads_nodis;
 267         dev_info->speed_capa = ETH_LINK_SPEED_1G |
 268                         ETH_LINK_SPEED_2_5G |
 269                         ETH_LINK_SPEED_10G;
 270
 271         dev_info->max_hash_mac_addrs = 0;
 272         dev_info->max_vfs = 0;
 273         dev_info->max_vmdq_pools = ETH_16_POOLS;
 274         dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
 275
 276         return 0;
 277 }
 278
 279 static int
 280 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 281 {
 282         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 283         uint16_t dist_idx;
 284         uint32_t vq_id;
 285         uint8_t num_rxqueue_per_tc;
 286         struct dpaa2_queue *mc_q, *mcq;
 287         uint32_t tot_queues;
 288         int i;
 289         struct dpaa2_queue *dpaa2_q;
 290
 291         PMD_INIT_FUNC_TRACE();
 292
 293         num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
 294         if (priv->tx_conf_en)
 295                 tot_queues = priv->nb_rx_queues + 2 * priv->nb_tx_queues;
 296         else
 297                 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 298         mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 299                           RTE_CACHE_LINE_SIZE);
 300         if (!mc_q) {
 301                 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
 302                 return -1;
 303         }
 304
 305         for (i = 0; i < priv->nb_rx_queues; i++) {
 306                 mc_q->eth_data = dev->data;
 307                 priv->rx_vq[i] = mc_q++;
 308                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 309                 dpaa2_q->q_storage = rte_malloc("dq_storage",
 310                                         sizeof(struct queue_storage_info_t),
 311                                         RTE_CACHE_LINE_SIZE);
 312                 if (!dpaa2_q->q_storage)
 313                         goto fail;
 314
 315                 memset(dpaa2_q->q_storage, 0,
 316                        sizeof(struct queue_storage_info_t));
 317                 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 318                         goto fail;
 319         }
 320
 321         for (i = 0; i < priv->nb_tx_queues; i++) {
 322                 mc_q->eth_data = dev->data;
 323                 mc_q->flow_id = 0xffff;
 324                 priv->tx_vq[i] = mc_q++;
 325                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 326                 dpaa2_q->cscn = rte_malloc(NULL,
 327                                            sizeof(struct qbman_result), 16);
 328                 if (!dpaa2_q->cscn)
 329                         goto fail_tx;
 330         }
 331
 332         if (priv->tx_conf_en) {
 333                 /*Setup tx confirmation queues*/
 334                 for (i = 0; i < priv->nb_tx_queues; i++) {
 335                         mc_q->eth_data = dev->data;
 336                         mc_q->tc_index = i;
 337                         mc_q->flow_id = 0;
 338                         priv->tx_conf_vq[i] = mc_q++;
 339                         dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 340                         dpaa2_q->q_storage =
 341                                 rte_malloc("dq_storage",
 342                                         sizeof(struct queue_storage_info_t),
 343                                         RTE_CACHE_LINE_SIZE);
 344                         if (!dpaa2_q->q_storage)
 345                                 goto fail_tx_conf;
 346
 347                         memset(dpaa2_q->q_storage, 0,
 348                                sizeof(struct queue_storage_info_t));
 349                         if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 350                                 goto fail_tx_conf;
 351                 }
 352         }
 353
 354         vq_id = 0;
 355         for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 356                 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
 357                 mcq->tc_index = dist_idx / num_rxqueue_per_tc;
 358                 mcq->flow_id = dist_idx % num_rxqueue_per_tc;
 359                 vq_id++;
 360         }
 361
 362         return 0;
 363 fail_tx_conf:
 364         i -= 1;
 365         while (i >= 0) {
 366                 dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 367                 rte_free(dpaa2_q->q_storage);
 368                 priv->tx_conf_vq[i--] = NULL;
 369         }
 370         i = priv->nb_tx_queues;
 371 fail_tx:
 372         i -= 1;
 373         while (i >= 0) {
 374                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 375                 rte_free(dpaa2_q->cscn);
 376                 priv->tx_vq[i--] = NULL;
 377         }
 378         i = priv->nb_rx_queues;
 379 fail:
 380         i -= 1;
 381         mc_q = priv->rx_vq[0];
 382         while (i >= 0) {
 383                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 384                 dpaa2_free_dq_storage(dpaa2_q->q_storage);
 385                 rte_free(dpaa2_q->q_storage);
 386                 priv->rx_vq[i--] = NULL;
 387         }
 388         rte_free(mc_q);
 389         return -1;
 390 }
 391
 392 static void
 393 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 394 {
 395         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 396         struct dpaa2_queue *dpaa2_q;
 397         int i;
 398
 399         PMD_INIT_FUNC_TRACE();
 400
 401         /* Queue allocation base */
 402         if (priv->rx_vq[0]) {
 403                 /* cleaning up queue storage */
 404                 for (i = 0; i < priv->nb_rx_queues; i++) {
 405                         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 406                         if (dpaa2_q->q_storage)
 407                                 rte_free(dpaa2_q->q_storage);
 408                 }
 409                 /* cleanup tx queue cscn */
 410                 for (i = 0; i < priv->nb_tx_queues; i++) {
 411                         dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 412                         rte_free(dpaa2_q->cscn);
 413                 }
 414                 if (priv->tx_conf_en) {
 415                         /* cleanup tx conf queue storage */
 416                         for (i = 0; i < priv->nb_tx_queues; i++) {
 417                                 dpaa2_q = (struct dpaa2_queue *)
 418                                                 priv->tx_conf_vq[i];
 419                                 rte_free(dpaa2_q->q_storage);
 420                         }
 421                 }
 422                 /*free memory for all queues (RX+TX) */
 423                 rte_free(priv->rx_vq[0]);
 424                 priv->rx_vq[0] = NULL;
 425         }
 426 }
 427
 428 static int
 429 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 430 {
 431         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 432         struct fsl_mc_io *dpni = dev->process_private;
 433         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 434         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 435         uint64_t tx_offloads = eth_conf->txmode.offloads;
 436         int rx_l3_csum_offload = false;
 437         int rx_l4_csum_offload = false;
 438         int tx_l3_csum_offload = false;
 439         int tx_l4_csum_offload = false;
 440         int ret;
 441
 442         PMD_INIT_FUNC_TRACE();
 443
 444         /* Rx offloads which are enabled by default */
 445         if (dev_rx_offloads_nodis & ~rx_offloads) {
 446                 DPAA2_PMD_INFO(
 447                 "Some of rx offloads enabled by default - requested 0x%" PRIx64
 448                 " fixed are 0x%" PRIx64,
 449                 rx_offloads, dev_rx_offloads_nodis);
 450         }
 451
 452         /* Tx offloads which are enabled by default */
 453         if (dev_tx_offloads_nodis & ~tx_offloads) {
 454                 DPAA2_PMD_INFO(
 455                 "Some of tx offloads enabled by default - requested 0x%" PRIx64
 456                 " fixed are 0x%" PRIx64,
 457                 tx_offloads, dev_tx_offloads_nodis);
 458         }
 459
 460         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 461                 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 462                         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
 463                                 priv->token, eth_conf->rxmode.max_rx_pkt_len
 464                                 - RTE_ETHER_CRC_LEN);
 465                         if (ret) {
 466                                 DPAA2_PMD_ERR(
 467                                         "Unable to set mtu. check config");
 468                                 return ret;
 469                         }
 470                         dev->data->mtu =
 471                                 dev->data->dev_conf.rxmode.max_rx_pkt_len -
 472                                 RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
 473                                 VLAN_TAG_SIZE;
 474                 } else {
 475                         return -1;
 476                 }
 477         }
 478
 479         if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
 480                 ret = dpaa2_setup_flow_dist(dev,
 481                                 eth_conf->rx_adv_conf.rss_conf.rss_hf);
 482                 if (ret) {
 483                         DPAA2_PMD_ERR("Unable to set flow distribution."
 484                                       "Check queue config");
 485                         return ret;
 486                 }
 487         }
 488
 489         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 490                 rx_l3_csum_offload = true;
 491
 492         if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
 493                 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
 494                 (rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 495                 rx_l4_csum_offload = true;
 496
 497         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 498                                DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
 499         if (ret) {
 500                 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
 501                 return ret;
 502         }
 503
 504         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 505                                DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
 506         if (ret) {
 507                 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
 508                 return ret;
 509         }
 510
 511         if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
 512                 dpaa2_enable_ts = true;
 513
 514         if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 515                 tx_l3_csum_offload = true;
 516
 517         if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
 518                 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
 519                 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
 520                 tx_l4_csum_offload = true;
 521
 522         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 523                                DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
 524         if (ret) {
 525                 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
 526                 return ret;
 527         }
 528
 529         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 530                                DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
 531         if (ret) {
 532                 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
 533                 return ret;
 534         }
 535
 536         /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
 537          * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
 538          * to 0 for LS2 in the hardware thus disabling data/annotation
 539          * stashing. For LX2 this is fixed in hardware and thus hash result and
 540          * parse results can be received in FD using this option.
 541          */
 542         if (dpaa2_svr_family == SVR_LX2160A) {
 543                 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 544                                        DPNI_FLCTYPE_HASH, true);
 545                 if (ret) {
 546                         DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
 547                         return ret;
 548                 }
 549         }
 550
 551         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 552                 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
 553
 554         /* update the current status */
 555         dpaa2_dev_link_update(dev, 0);
 556
 557         return 0;
 558 }
 559
 560 /* Function to setup RX flow information. It contains traffic class ID,
 561  * flow ID, destination configuration etc.
 562  */
 563 static int
 564 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 565                          uint16_t rx_queue_id,
 566                          uint16_t nb_rx_desc,
 567                          unsigned int socket_id __rte_unused,
 568                          const struct rte_eth_rxconf *rx_conf __rte_unused,
 569                          struct rte_mempool *mb_pool)
 570 {
 571         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 572         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 573         struct dpaa2_queue *dpaa2_q;
 574         struct dpni_queue cfg;
 575         uint8_t options = 0;
 576         uint8_t flow_id;
 577         uint32_t bpid;
 578         int i, ret;
 579
 580         PMD_INIT_FUNC_TRACE();
 581
 582         DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
 583                         dev, rx_queue_id, mb_pool, rx_conf);
 584
 585         if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
 586                 bpid = mempool_to_bpid(mb_pool);
 587                 ret = dpaa2_attach_bp_list(priv,
 588                                            rte_dpaa2_bpid_info[bpid].bp_list);
 589                 if (ret)
 590                         return ret;
 591         }
 592         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 593         dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
 594         dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 595
 596         /*Get the flow id from given VQ id*/
 597         flow_id = dpaa2_q->flow_id;
 598         memset(&cfg, 0, sizeof(struct dpni_queue));
 599
 600         options = options | DPNI_QUEUE_OPT_USER_CTX;
 601         cfg.user_context = (size_t)(dpaa2_q);
 602
 603         /* check if a private cgr available. */
 604         for (i = 0; i < priv->max_cgs; i++) {
 605                 if (!priv->cgid_in_use[i]) {
 606                         priv->cgid_in_use[i] = 1;
 607                         break;
 608                 }
 609         }
 610
 611         if (i < priv->max_cgs) {
 612                 options |= DPNI_QUEUE_OPT_SET_CGID;
 613                 cfg.cgid = i;
 614                 dpaa2_q->cgid = cfg.cgid;
 615         } else {
 616                 dpaa2_q->cgid = 0xff;
 617         }
 618
 619         /*if ls2088 or rev2 device, enable the stashing */
 620
 621         if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
 622                 options |= DPNI_QUEUE_OPT_FLC;
 623                 cfg.flc.stash_control = true;
 624                 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
 625                 /* 00 00 00 - last 6 bit represent annotation, context stashing,
 626                  * data stashing setting 01 01 00 (0x14)
 627                  * (in following order ->DS AS CS)
 628                  * to enable 1 line data, 1 line annotation.
 629                  * For LX2, this setting should be 01 00 00 (0x10)
 630                  */
 631                 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
 632                         cfg.flc.value |= 0x10;
 633                 else
 634                         cfg.flc.value |= 0x14;
 635         }
 636         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 637                              dpaa2_q->tc_index, flow_id, options, &cfg);
 638         if (ret) {
 639                 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
 640                 return -1;
 641         }
 642
 643         if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
 644                 struct dpni_taildrop taildrop;
 645
 646                 taildrop.enable = 1;
 647
 648                 /* Private CGR will use tail drop length as nb_rx_desc.
 649                  * for rest cases we can use standard byte based tail drop.
 650                  * There is no HW restriction, but number of CGRs are limited,
 651                  * hence this restriction is placed.
 652                  */
 653                 if (dpaa2_q->cgid != 0xff) {
 654                         /*enabling per rx queue congestion control */
 655                         taildrop.threshold = nb_rx_desc;
 656                         taildrop.units = DPNI_CONGESTION_UNIT_FRAMES;
 657                         taildrop.oal = 0;
 658                         DPAA2_PMD_DEBUG("Enabling CG Tail Drop on queue = %d",
 659                                         rx_queue_id);
 660                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 661                                                 DPNI_CP_CONGESTION_GROUP,
 662                                                 DPNI_QUEUE_RX,
 663                                                 dpaa2_q->tc_index,
 664                                                 flow_id, &taildrop);
 665                 } else {
 666                         /*enabling per rx queue congestion control */
 667                         taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
 668                         taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
 669                         taildrop.oal = CONG_RX_OAL;
 670                         DPAA2_PMD_DEBUG("Enabling Byte based Drop on queue= %d",
 671                                         rx_queue_id);
 672                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 673                                                 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 674                                                 dpaa2_q->tc_index, flow_id,
 675                                                 &taildrop);
 676                 }
 677                 if (ret) {
 678                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 679                                       ret);
 680                         return -1;
 681                 }
 682         } else { /* Disable tail Drop */
 683                 struct dpni_taildrop taildrop = {0};
 684                 DPAA2_PMD_INFO("Tail drop is disabled on queue");
 685
 686                 taildrop.enable = 0;
 687                 if (dpaa2_q->cgid != 0xff) {
 688                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 689                                         DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
 690                                         dpaa2_q->tc_index,
 691                                         flow_id, &taildrop);
 692                 } else {
 693                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 694                                         DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 695                                         dpaa2_q->tc_index, flow_id, &taildrop);
 696                 }
 697                 if (ret) {
 698                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 699                                       ret);
 700                         return -1;
 701                 }
 702         }
 703
 704         dev->data->rx_queues[rx_queue_id] = dpaa2_q;
 705         return 0;
 706 }
 707
 708 static int
 709 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 710                          uint16_t tx_queue_id,
 711                          uint16_t nb_tx_desc __rte_unused,
 712                          unsigned int socket_id __rte_unused,
 713                          const struct rte_eth_txconf *tx_conf __rte_unused)
 714 {
 715         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 716         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 717                 priv->tx_vq[tx_queue_id];
 718         struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
 719                 priv->tx_conf_vq[tx_queue_id];
 720         struct fsl_mc_io *dpni = dev->process_private;
 721         struct dpni_queue tx_conf_cfg;
 722         struct dpni_queue tx_flow_cfg;
 723         uint8_t options = 0, flow_id;
 724         struct dpni_queue_id qid;
 725         uint32_t tc_id;
 726         int ret;
 727
 728         PMD_INIT_FUNC_TRACE();
 729
 730         /* Return if queue already configured */
 731         if (dpaa2_q->flow_id != 0xffff) {
 732                 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 733                 return 0;
 734         }
 735
 736         memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 737         memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 738
 739         tc_id = tx_queue_id;
 740         flow_id = 0;
 741
 742         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
 743                              tc_id, flow_id, options, &tx_flow_cfg);
 744         if (ret) {
 745                 DPAA2_PMD_ERR("Error in setting the tx flow: "
 746                               "tc_id=%d, flow=%d err=%d",
 747                               tc_id, flow_id, ret);
 748                         return -1;
 749         }
 750
 751         dpaa2_q->flow_id = flow_id;
 752
 753         if (tx_queue_id == 0) {
 754                 /*Set tx-conf and error configuration*/
 755                 if (priv->tx_conf_en)
 756                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 757                                                             priv->token,
 758                                                             DPNI_CONF_AFFINE);
 759                 else
 760                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 761                                                             priv->token,
 762                                                             DPNI_CONF_DISABLE);
 763                 if (ret) {
 764                         DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 765                                       "err=%d", ret);
 766                         return -1;
 767                 }
 768         }
 769         dpaa2_q->tc_index = tc_id;
 770
 771         ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 772                              DPNI_QUEUE_TX, dpaa2_q->tc_index,
 773                              dpaa2_q->flow_id, &tx_flow_cfg, &qid);
 774         if (ret) {
 775                 DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 776                 return -1;
 777         }
 778         dpaa2_q->fqid = qid.fqid;
 779
 780         if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 781                 struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 782
 783                 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 784                 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
 785                 /* Notify that the queue is not congested when the data in
 786                  * the queue is below this thershold.
 787                  */
 788                 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
 789                 cong_notif_cfg.message_ctx = 0;
 790                 cong_notif_cfg.message_iova =
 791                                 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
 792                 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
 793                 cong_notif_cfg.notification_mode =
 794                                          DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
 795                                          DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
 796                                          DPNI_CONG_OPT_COHERENT_WRITE;
 797                 cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
 798
 799                 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
 800                                                        priv->token,
 801                                                        DPNI_QUEUE_TX,
 802                                                        tc_id,
 803                                                        &cong_notif_cfg);
 804                 if (ret) {
 805                         DPAA2_PMD_ERR(
 806                            "Error in setting tx congestion notification: "
 807                            "err=%d", ret);
 808                         return -ret;
 809                 }
 810         }
 811         dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 812         dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 813
 814         if (priv->tx_conf_en) {
 815                 dpaa2_q->tx_conf_queue = dpaa2_tx_conf_q;
 816                 options = options | DPNI_QUEUE_OPT_USER_CTX;
 817                 tx_conf_cfg.user_context = (size_t)(dpaa2_q);
 818                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 819                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 820                              dpaa2_tx_conf_q->flow_id, options, &tx_conf_cfg);
 821                 if (ret) {
 822                         DPAA2_PMD_ERR("Error in setting the tx conf flow: "
 823                               "tc_index=%d, flow=%d err=%d",
 824                               dpaa2_tx_conf_q->tc_index,
 825                               dpaa2_tx_conf_q->flow_id, ret);
 826                         return -1;
 827                 }
 828
 829                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 830                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 831                              dpaa2_tx_conf_q->flow_id, &tx_conf_cfg, &qid);
 832                 if (ret) {
 833                         DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 834                         return -1;
 835                 }
 836                 dpaa2_tx_conf_q->fqid = qid.fqid;
 837         }
 838         return 0;
 839 }
 840
 841 static void
 842 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 843 {
 844         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
 845         struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
 846         struct fsl_mc_io *dpni =
 847                 (struct fsl_mc_io *)priv->eth_dev->process_private;
 848         uint8_t options = 0;
 849         int ret;
 850         struct dpni_queue cfg;
 851
 852         memset(&cfg, 0, sizeof(struct dpni_queue));
 853         PMD_INIT_FUNC_TRACE();
 854         if (dpaa2_q->cgid != 0xff) {
 855                 options = DPNI_QUEUE_OPT_CLEAR_CGID;
 856                 cfg.cgid = dpaa2_q->cgid;
 857
 858                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 859                                      DPNI_QUEUE_RX,
 860                                      dpaa2_q->tc_index, dpaa2_q->flow_id,
 861                                      options, &cfg);
 862                 if (ret)
 863                         DPAA2_PMD_ERR("Unable to clear CGR from q=%u err=%d",
 864                                         dpaa2_q->fqid, ret);
 865                 priv->cgid_in_use[dpaa2_q->cgid] = 0;
 866                 dpaa2_q->cgid = 0xff;
 867         }
 868 }
 869
 870 static void
 871 dpaa2_dev_tx_queue_release(void *q __rte_unused)
 872 {
 873         PMD_INIT_FUNC_TRACE();
 874 }
 875
 876 static uint32_t
 877 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 878 {
 879         int32_t ret;
 880         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 881         struct dpaa2_queue *dpaa2_q;
 882         struct qbman_swp *swp;
 883         struct qbman_fq_query_np_rslt state;
 884         uint32_t frame_cnt = 0;
 885
 886         PMD_INIT_FUNC_TRACE();
 887
 888         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 889                 ret = dpaa2_affine_qbman_swp();
 890                 if (ret) {
 891                         DPAA2_PMD_ERR("Failure in affining portal");
 892                         return -EINVAL;
 893                 }
 894         }
 895         swp = DPAA2_PER_LCORE_PORTAL;
 896
 897         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 898
 899         if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
 900                 frame_cnt = qbman_fq_state_frame_count(&state);
 901                 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
 902                                 rx_queue_id, frame_cnt);
 903         }
 904         return frame_cnt;
 905 }
 906
 907 static const uint32_t *
 908 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 909 {
 910         static const uint32_t ptypes[] = {
 911                 /*todo -= add more types */
 912                 RTE_PTYPE_L2_ETHER,
 913                 RTE_PTYPE_L3_IPV4,
 914                 RTE_PTYPE_L3_IPV4_EXT,
 915                 RTE_PTYPE_L3_IPV6,
 916                 RTE_PTYPE_L3_IPV6_EXT,
 917                 RTE_PTYPE_L4_TCP,
 918                 RTE_PTYPE_L4_UDP,
 919                 RTE_PTYPE_L4_SCTP,
 920                 RTE_PTYPE_L4_ICMP,
 921                 RTE_PTYPE_UNKNOWN
 922         };
 923
 924         if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
 925                 dev->rx_pkt_burst == dpaa2_dev_rx ||
 926                 dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 927                 return ptypes;
 928         return NULL;
 929 }
 930
 931 /**
 932  * Dpaa2 link Interrupt handler
 933  *
 934  * @param param
 935  *  The address of parameter (struct rte_eth_dev *) regsitered before.
 936  *
 937  * @return
 938  *  void
 939  */
 940 static void
 941 dpaa2_interrupt_handler(void *param)
 942 {
 943         struct rte_eth_dev *dev = param;
 944         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 945         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 946         int ret;
 947         int irq_index = DPNI_IRQ_INDEX;
 948         unsigned int status = 0, clear = 0;
 949
 950         PMD_INIT_FUNC_TRACE();
 951
 952         if (dpni == NULL) {
 953                 DPAA2_PMD_ERR("dpni is NULL");
 954                 return;
 955         }
 956
 957         ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
 958                                   irq_index, &status);
 959         if (unlikely(ret)) {
 960                 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
 961                 clear = 0xffffffff;
 962                 goto out;
 963         }
 964
 965         if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
 966                 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
 967                 dpaa2_dev_link_update(dev, 0);
 968                 /* calling all the apps registered for link status event */
 969                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
 970                                               NULL);
 971         }
 972 out:
 973         ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
 974                                     irq_index, clear);
 975         if (unlikely(ret))
 976                 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
 977 }
 978
 979 static int
 980 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 981 {
 982         int err = 0;
 983         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 984         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 985         int irq_index = DPNI_IRQ_INDEX;
 986         unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 987
 988         PMD_INIT_FUNC_TRACE();
 989
 990         err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
 991                                 irq_index, mask);
 992         if (err < 0) {
 993                 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
 994                               strerror(-err));
 995                 return err;
 996         }
 997
 998         err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
 999                                   irq_index, enable);
1000         if (err < 0)
1001                 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
1002                               strerror(-err));
1003
1004         return err;
1005 }
1006
1007 static int
1008 dpaa2_dev_start(struct rte_eth_dev *dev)
1009 {
1010         struct rte_device *rdev = dev->device;
1011         struct rte_dpaa2_device *dpaa2_dev;
1012         struct rte_eth_dev_data *data = dev->data;
1013         struct dpaa2_dev_priv *priv = data->dev_private;
1014         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1015         struct dpni_queue cfg;
1016         struct dpni_error_cfg   err_cfg;
1017         uint16_t qdid;
1018         struct dpni_queue_id qid;
1019         struct dpaa2_queue *dpaa2_q;
1020         int ret, i;
1021         struct rte_intr_handle *intr_handle;
1022
1023         dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
1024         intr_handle = &dpaa2_dev->intr_handle;
1025
1026         PMD_INIT_FUNC_TRACE();
1027
1028         ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1029         if (ret) {
1030                 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
1031                               priv->hw_id, ret);
1032                 return ret;
1033         }
1034
1035         /* Power up the phy. Needed to make the link go UP */
1036         dpaa2_dev_set_link_up(dev);
1037
1038         ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
1039                             DPNI_QUEUE_TX, &qdid);
1040         if (ret) {
1041                 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
1042                 return ret;
1043         }
1044         priv->qdid = qdid;
1045
1046         for (i = 0; i < data->nb_rx_queues; i++) {
1047                 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
1048                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
1049                                      DPNI_QUEUE_RX, dpaa2_q->tc_index,
1050                                        dpaa2_q->flow_id, &cfg, &qid);
1051                 if (ret) {
1052                         DPAA2_PMD_ERR("Error in getting flow information: "
1053                                       "err=%d", ret);
1054                         return ret;
1055                 }
1056                 dpaa2_q->fqid = qid.fqid;
1057         }
1058
1059         /*checksum errors, send them to normal path and set it in annotation */
1060         err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
1061         err_cfg.errors |= DPNI_ERROR_PHE;
1062
1063         err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
1064         err_cfg.set_frame_annotation = true;
1065
1066         ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
1067                                        priv->token, &err_cfg);
1068         if (ret) {
1069                 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
1070                               ret);
1071                 return ret;
1072         }
1073
1074         /* if the interrupts were configured on this devices*/
1075         if (intr_handle && (intr_handle->fd) &&
1076             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1077                 /* Registering LSC interrupt handler */
1078                 rte_intr_callback_register(intr_handle,
1079                                            dpaa2_interrupt_handler,
1080                                            (void *)dev);
1081
1082                 /* enable vfio intr/eventfd mapping
1083                  * Interrupt index 0 is required, so we can not use
1084                  * rte_intr_enable.
1085                  */
1086                 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
1087
1088                 /* enable dpni_irqs */
1089                 dpaa2_eth_setup_irqs(dev, 1);
1090         }
1091
1092         /* Change the tx burst function if ordered queues are used */
1093         if (priv->en_ordered)
1094                 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
1095
1096         return 0;
1097 }
1098
1099 /**
1100  *  This routine disables all traffic on the adapter by issuing a
1101  *  global reset on the MAC.
1102  */
1103 static void
1104 dpaa2_dev_stop(struct rte_eth_dev *dev)
1105 {
1106         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1107         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1108         int ret;
1109         struct rte_eth_link link;
1110         struct rte_intr_handle *intr_handle = dev->intr_handle;
1111
1112         PMD_INIT_FUNC_TRACE();
1113
1114         /* reset interrupt callback  */
1115         if (intr_handle && (intr_handle->fd) &&
1116             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1117                 /*disable dpni irqs */
1118                 dpaa2_eth_setup_irqs(dev, 0);
1119
1120                 /* disable vfio intr before callback unregister */
1121                 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
1122
1123                 /* Unregistering LSC interrupt handler */
1124                 rte_intr_callback_unregister(intr_handle,
1125                                              dpaa2_interrupt_handler,
1126                                              (void *)dev);
1127         }
1128
1129         dpaa2_dev_set_link_down(dev);
1130
1131         ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
1132         if (ret) {
1133                 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
1134                               ret, priv->hw_id);
1135                 return;
1136         }
1137
1138         /* clear the recorded link status */
1139         memset(&link, 0, sizeof(link));
1140         rte_eth_linkstatus_set(dev, &link);
1141 }
1142
1143 static void
1144 dpaa2_dev_close(struct rte_eth_dev *dev)
1145 {
1146         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1147         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1148         int ret;
1149         struct rte_eth_link link;
1150
1151         PMD_INIT_FUNC_TRACE();
1152
1153         dpaa2_flow_clean(dev);
1154
1155         /* Clean the device first */
1156         ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
1157         if (ret) {
1158                 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
1159                 return;
1160         }
1161
1162         memset(&link, 0, sizeof(link));
1163         rte_eth_linkstatus_set(dev, &link);
1164 }
1165
1166 static int
1167 dpaa2_dev_promiscuous_enable(
1168                 struct rte_eth_dev *dev)
1169 {
1170         int ret;
1171         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1172         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1173
1174         PMD_INIT_FUNC_TRACE();
1175
1176         if (dpni == NULL) {
1177                 DPAA2_PMD_ERR("dpni is NULL");
1178                 return -ENODEV;
1179         }
1180
1181         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1182         if (ret < 0)
1183                 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
1184
1185         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1186         if (ret < 0)
1187                 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1188
1189         return ret;
1190 }
1191
1192 static int
1193 dpaa2_dev_promiscuous_disable(
1194                 struct rte_eth_dev *dev)
1195 {
1196         int ret;
1197         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1198         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1199
1200         PMD_INIT_FUNC_TRACE();
1201
1202         if (dpni == NULL) {
1203                 DPAA2_PMD_ERR("dpni is NULL");
1204                 return -ENODEV;
1205         }
1206
1207         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1208         if (ret < 0)
1209                 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1210
1211         if (dev->data->all_multicast == 0) {
1212                 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1213                                                  priv->token, false);
1214                 if (ret < 0)
1215                         DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1216                                       ret);
1217         }
1218
1219         return ret;
1220 }
1221
1222 static int
1223 dpaa2_dev_allmulticast_enable(
1224                 struct rte_eth_dev *dev)
1225 {
1226         int ret;
1227         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1228         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1229
1230         PMD_INIT_FUNC_TRACE();
1231
1232         if (dpni == NULL) {
1233                 DPAA2_PMD_ERR("dpni is NULL");
1234                 return -ENODEV;
1235         }
1236
1237         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1238         if (ret < 0)
1239                 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1240
1241         return ret;
1242 }
1243
1244 static int
1245 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1246 {
1247         int ret;
1248         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1249         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1250
1251         PMD_INIT_FUNC_TRACE();
1252
1253         if (dpni == NULL) {
1254                 DPAA2_PMD_ERR("dpni is NULL");
1255                 return -ENODEV;
1256         }
1257
1258         /* must remain on for all promiscuous */
1259         if (dev->data->promiscuous == 1)
1260                 return 0;
1261
1262         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1263         if (ret < 0)
1264                 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1265
1266         return ret;
1267 }
1268
1269 static int
1270 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1271 {
1272         int ret;
1273         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1274         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1275         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1276                                 + VLAN_TAG_SIZE;
1277
1278         PMD_INIT_FUNC_TRACE();
1279
1280         if (dpni == NULL) {
1281                 DPAA2_PMD_ERR("dpni is NULL");
1282                 return -EINVAL;
1283         }
1284
1285         /* check that mtu is within the allowed range */
1286         if (mtu < RTE_ETHER_MIN_MTU || frame_size > DPAA2_MAX_RX_PKT_LEN)
1287                 return -EINVAL;
1288
1289         if (frame_size > RTE_ETHER_MAX_LEN)
1290                 dev->data->dev_conf.rxmode.offloads &=
1291                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
1292         else
1293                 dev->data->dev_conf.rxmode.offloads &=
1294                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1295
1296         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1297
1298         /* Set the Max Rx frame length as 'mtu' +
1299          * Maximum Ethernet header length
1300          */
1301         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1302                                         frame_size - RTE_ETHER_CRC_LEN);
1303         if (ret) {
1304                 DPAA2_PMD_ERR("Setting the max frame length failed");
1305                 return -1;
1306         }
1307         DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1308         return 0;
1309 }
1310
1311 static int
1312 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1313                        struct rte_ether_addr *addr,
1314                        __rte_unused uint32_t index,
1315                        __rte_unused uint32_t pool)
1316 {
1317         int ret;
1318         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1319         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1320
1321         PMD_INIT_FUNC_TRACE();
1322
1323         if (dpni == NULL) {
1324                 DPAA2_PMD_ERR("dpni is NULL");
1325                 return -1;
1326         }
1327
1328         ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1329                                 priv->token, addr->addr_bytes);
1330         if (ret)
1331                 DPAA2_PMD_ERR(
1332                         "error: Adding the MAC ADDR failed: err = %d", ret);
1333         return 0;
1334 }
1335
1336 static void
1337 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1338                           uint32_t index)
1339 {
1340         int ret;
1341         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1342         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1343         struct rte_eth_dev_data *data = dev->data;
1344         struct rte_ether_addr *macaddr;
1345
1346         PMD_INIT_FUNC_TRACE();
1347
1348         macaddr = &data->mac_addrs[index];
1349
1350         if (dpni == NULL) {
1351                 DPAA2_PMD_ERR("dpni is NULL");
1352                 return;
1353         }
1354
1355         ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1356                                    priv->token, macaddr->addr_bytes);
1357         if (ret)
1358                 DPAA2_PMD_ERR(
1359                         "error: Removing the MAC ADDR failed: err = %d", ret);
1360 }
1361
1362 static int
1363 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1364                        struct rte_ether_addr *addr)
1365 {
1366         int ret;
1367         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1368         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1369
1370         PMD_INIT_FUNC_TRACE();
1371
1372         if (dpni == NULL) {
1373                 DPAA2_PMD_ERR("dpni is NULL");
1374                 return -EINVAL;
1375         }
1376
1377         ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1378                                         priv->token, addr->addr_bytes);
1379
1380         if (ret)
1381                 DPAA2_PMD_ERR(
1382                         "error: Setting the MAC ADDR failed %d", ret);
1383
1384         return ret;
1385 }
1386
1387 static
1388 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1389                          struct rte_eth_stats *stats)
1390 {
1391         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1392         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1393         int32_t  retcode;
1394         uint8_t page0 = 0, page1 = 1, page2 = 2;
1395         union dpni_statistics value;
1396         int i;
1397         struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1398
1399         memset(&value, 0, sizeof(union dpni_statistics));
1400
1401         PMD_INIT_FUNC_TRACE();
1402
1403         if (!dpni) {
1404                 DPAA2_PMD_ERR("dpni is NULL");
1405                 return -EINVAL;
1406         }
1407
1408         if (!stats) {
1409                 DPAA2_PMD_ERR("stats is NULL");
1410                 return -EINVAL;
1411         }
1412
1413         /*Get Counters from page_0*/
1414         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1415                                       page0, 0, &value);
1416         if (retcode)
1417                 goto err;
1418
1419         stats->ipackets = value.page_0.ingress_all_frames;
1420         stats->ibytes = value.page_0.ingress_all_bytes;
1421
1422         /*Get Counters from page_1*/
1423         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1424                                       page1, 0, &value);
1425         if (retcode)
1426                 goto err;
1427
1428         stats->opackets = value.page_1.egress_all_frames;
1429         stats->obytes = value.page_1.egress_all_bytes;
1430
1431         /*Get Counters from page_2*/
1432         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1433                                       page2, 0, &value);
1434         if (retcode)
1435                 goto err;
1436
1437         /* Ingress drop frame count due to configured rules */
1438         stats->ierrors = value.page_2.ingress_filtered_frames;
1439         /* Ingress drop frame count due to error */
1440         stats->ierrors += value.page_2.ingress_discarded_frames;
1441
1442         stats->oerrors = value.page_2.egress_discarded_frames;
1443         stats->imissed = value.page_2.ingress_nobuffer_discards;
1444
1445         /* Fill in per queue stats */
1446         for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1447                 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1448                 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1449                 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1450                 if (dpaa2_rxq)
1451                         stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1452                 if (dpaa2_txq)
1453                         stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1454
1455                 /* Byte counting is not implemented */
1456                 stats->q_ibytes[i]   = 0;
1457                 stats->q_obytes[i]   = 0;
1458         }
1459
1460         return 0;
1461
1462 err:
1463         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1464         return retcode;
1465 };
1466
1467 static int
1468 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1469                      unsigned int n)
1470 {
1471         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1472         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1473         int32_t  retcode;
1474         union dpni_statistics value[5] = {};
1475         unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1476
1477         if (n < num)
1478                 return num;
1479
1480         if (xstats == NULL)
1481                 return 0;
1482
1483         /* Get Counters from page_0*/
1484         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1485                                       0, 0, &value[0]);
1486         if (retcode)
1487                 goto err;
1488
1489         /* Get Counters from page_1*/
1490         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1491                                       1, 0, &value[1]);
1492         if (retcode)
1493                 goto err;
1494
1495         /* Get Counters from page_2*/
1496         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1497                                       2, 0, &value[2]);
1498         if (retcode)
1499                 goto err;
1500
1501         for (i = 0; i < priv->max_cgs; i++) {
1502                 if (!priv->cgid_in_use[i]) {
1503                         /* Get Counters from page_4*/
1504                         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
1505                                                       priv->token,
1506                                                       4, 0, &value[4]);
1507                         if (retcode)
1508                                 goto err;
1509                         break;
1510                 }
1511         }
1512
1513         for (i = 0; i < num; i++) {
1514                 xstats[i].id = i;
1515                 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1516                         raw.counter[dpaa2_xstats_strings[i].stats_id];
1517         }
1518         return i;
1519 err:
1520         DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1521         return retcode;
1522 }
1523
1524 static int
1525 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1526                        struct rte_eth_xstat_name *xstats_names,
1527                        unsigned int limit)
1528 {
1529         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1530
1531         if (limit < stat_cnt)
1532                 return stat_cnt;
1533
1534         if (xstats_names != NULL)
1535                 for (i = 0; i < stat_cnt; i++)
1536                         strlcpy(xstats_names[i].name,
1537                                 dpaa2_xstats_strings[i].name,
1538                                 sizeof(xstats_names[i].name));
1539
1540         return stat_cnt;
1541 }
1542
1543 static int
1544 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1545                        uint64_t *values, unsigned int n)
1546 {
1547         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1548         uint64_t values_copy[stat_cnt];
1549
1550         if (!ids) {
1551                 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1552                 struct fsl_mc_io *dpni =
1553                         (struct fsl_mc_io *)dev->process_private;
1554                 int32_t  retcode;
1555                 union dpni_statistics value[5] = {};
1556
1557                 if (n < stat_cnt)
1558                         return stat_cnt;
1559
1560                 if (!values)
1561                         return 0;
1562
1563                 /* Get Counters from page_0*/
1564                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1565                                               0, 0, &value[0]);
1566                 if (retcode)
1567                         return 0;
1568
1569                 /* Get Counters from page_1*/
1570                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1571                                               1, 0, &value[1]);
1572                 if (retcode)
1573                         return 0;
1574
1575                 /* Get Counters from page_2*/
1576                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1577                                               2, 0, &value[2]);
1578                 if (retcode)
1579                         return 0;
1580
1581                 /* Get Counters from page_4*/
1582                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1583                                               4, 0, &value[4]);
1584                 if (retcode)
1585                         return 0;
1586
1587                 for (i = 0; i < stat_cnt; i++) {
1588                         values[i] = value[dpaa2_xstats_strings[i].page_id].
1589                                 raw.counter[dpaa2_xstats_strings[i].stats_id];
1590                 }
1591                 return stat_cnt;
1592         }
1593
1594         dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1595
1596         for (i = 0; i < n; i++) {
1597                 if (ids[i] >= stat_cnt) {
1598                         DPAA2_PMD_ERR("xstats id value isn't valid");
1599                         return -1;
1600                 }
1601                 values[i] = values_copy[ids[i]];
1602         }
1603         return n;
1604 }
1605
1606 static int
1607 dpaa2_xstats_get_names_by_id(
1608         struct rte_eth_dev *dev,
1609         struct rte_eth_xstat_name *xstats_names,
1610         const uint64_t *ids,
1611         unsigned int limit)
1612 {
1613         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1614         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1615
1616         if (!ids)
1617                 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1618
1619         dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1620
1621         for (i = 0; i < limit; i++) {
1622                 if (ids[i] >= stat_cnt) {
1623                         DPAA2_PMD_ERR("xstats id value isn't valid");
1624                         return -1;
1625                 }
1626                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1627         }
1628         return limit;
1629 }
1630
1631 static int
1632 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1633 {
1634         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1635         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1636         int retcode;
1637         int i;
1638         struct dpaa2_queue *dpaa2_q;
1639
1640         PMD_INIT_FUNC_TRACE();
1641
1642         if (dpni == NULL) {
1643                 DPAA2_PMD_ERR("dpni is NULL");
1644                 return -EINVAL;
1645         }
1646
1647         retcode =  dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1648         if (retcode)
1649                 goto error;
1650
1651         /* Reset the per queue stats in dpaa2_queue structure */
1652         for (i = 0; i < priv->nb_rx_queues; i++) {
1653                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1654                 if (dpaa2_q)
1655                         dpaa2_q->rx_pkts = 0;
1656         }
1657
1658         for (i = 0; i < priv->nb_tx_queues; i++) {
1659                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1660                 if (dpaa2_q)
1661                         dpaa2_q->tx_pkts = 0;
1662         }
1663
1664         return 0;
1665
1666 error:
1667         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1668         return retcode;
1669 };
1670
1671 /* return 0 means link status changed, -1 means not changed */
1672 static int
1673 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1674                         int wait_to_complete __rte_unused)
1675 {
1676         int ret;
1677         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1678         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1679         struct rte_eth_link link;
1680         struct dpni_link_state state = {0};
1681
1682         if (dpni == NULL) {
1683                 DPAA2_PMD_ERR("dpni is NULL");
1684                 return 0;
1685         }
1686
1687         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1688         if (ret < 0) {
1689                 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1690                 return -1;
1691         }
1692
1693         memset(&link, 0, sizeof(struct rte_eth_link));
1694         link.link_status = state.up;
1695         link.link_speed = state.rate;
1696
1697         if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1698                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1699         else
1700                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1701
1702         ret = rte_eth_linkstatus_set(dev, &link);
1703         if (ret == -1)
1704                 DPAA2_PMD_DEBUG("No change in status");
1705         else
1706                 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1707                                link.link_status ? "Up" : "Down");
1708
1709         return ret;
1710 }
1711
1712 /**
1713  * Toggle the DPNI to enable, if not already enabled.
1714  * This is not strictly PHY up/down - it is more of logical toggling.
1715  */
1716 static int
1717 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1718 {
1719         int ret = -EINVAL;
1720         struct dpaa2_dev_priv *priv;
1721         struct fsl_mc_io *dpni;
1722         int en = 0;
1723         struct dpni_link_state state = {0};
1724
1725         priv = dev->data->dev_private;
1726         dpni = (struct fsl_mc_io *)dev->process_private;
1727
1728         if (dpni == NULL) {
1729                 DPAA2_PMD_ERR("dpni is NULL");
1730                 return ret;
1731         }
1732
1733         /* Check if DPNI is currently enabled */
1734         ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1735         if (ret) {
1736                 /* Unable to obtain dpni status; Not continuing */
1737                 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1738                 return -EINVAL;
1739         }
1740
1741         /* Enable link if not already enabled */
1742         if (!en) {
1743                 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1744                 if (ret) {
1745                         DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1746                         return -EINVAL;
1747                 }
1748         }
1749         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1750         if (ret < 0) {
1751                 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1752                 return -1;
1753         }
1754
1755         /* changing tx burst function to start enqueues */
1756         dev->tx_pkt_burst = dpaa2_dev_tx;
1757         dev->data->dev_link.link_status = state.up;
1758
1759         if (state.up)
1760                 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1761         else
1762                 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1763         return ret;
1764 }
1765
1766 /**
1767  * Toggle the DPNI to disable, if not already disabled.
1768  * This is not strictly PHY up/down - it is more of logical toggling.
1769  */
1770 static int
1771 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1772 {
1773         int ret = -EINVAL;
1774         struct dpaa2_dev_priv *priv;
1775         struct fsl_mc_io *dpni;
1776         int dpni_enabled = 0;
1777         int retries = 10;
1778
1779         PMD_INIT_FUNC_TRACE();
1780
1781         priv = dev->data->dev_private;
1782         dpni = (struct fsl_mc_io *)dev->process_private;
1783
1784         if (dpni == NULL) {
1785                 DPAA2_PMD_ERR("Device has not yet been configured");
1786                 return ret;
1787         }
1788
1789         /*changing  tx burst function to avoid any more enqueues */
1790         dev->tx_pkt_burst = dummy_dev_tx;
1791
1792         /* Loop while dpni_disable() attempts to drain the egress FQs
1793          * and confirm them back to us.
1794          */
1795         do {
1796                 ret = dpni_disable(dpni, 0, priv->token);
1797                 if (ret) {
1798                         DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1799                         return ret;
1800                 }
1801                 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1802                 if (ret) {
1803                         DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1804                         return ret;
1805                 }
1806                 if (dpni_enabled)
1807                         /* Allow the MC some slack */
1808                         rte_delay_us(100 * 1000);
1809         } while (dpni_enabled && --retries);
1810
1811         if (!retries) {
1812                 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1813                 /* todo- we may have to manually cleanup queues.
1814                  */
1815         } else {
1816                 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1817                                dev->data->port_id);
1818         }
1819
1820         dev->data->dev_link.link_status = 0;
1821
1822         return ret;
1823 }
1824
1825 static int
1826 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1827 {
1828         int ret = -EINVAL;
1829         struct dpaa2_dev_priv *priv;
1830         struct fsl_mc_io *dpni;
1831         struct dpni_link_state state = {0};
1832
1833         PMD_INIT_FUNC_TRACE();
1834
1835         priv = dev->data->dev_private;
1836         dpni = (struct fsl_mc_io *)dev->process_private;
1837
1838         if (dpni == NULL || fc_conf == NULL) {
1839                 DPAA2_PMD_ERR("device not configured");
1840                 return ret;
1841         }
1842
1843         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1844         if (ret) {
1845                 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1846                 return ret;
1847         }
1848
1849         memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1850         if (state.options & DPNI_LINK_OPT_PAUSE) {
1851                 /* DPNI_LINK_OPT_PAUSE set
1852                  *  if ASYM_PAUSE not set,
1853                  *      RX Side flow control (handle received Pause frame)
1854                  *      TX side flow control (send Pause frame)
1855                  *  if ASYM_PAUSE set,
1856                  *      RX Side flow control (handle received Pause frame)
1857                  *      No TX side flow control (send Pause frame disabled)
1858                  */
1859                 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1860                         fc_conf->mode = RTE_FC_FULL;
1861                 else
1862                         fc_conf->mode = RTE_FC_RX_PAUSE;
1863         } else {
1864                 /* DPNI_LINK_OPT_PAUSE not set
1865                  *  if ASYM_PAUSE set,
1866                  *      TX side flow control (send Pause frame)
1867                  *      No RX side flow control (No action on pause frame rx)
1868                  *  if ASYM_PAUSE not set,
1869                  *      Flow control disabled
1870                  */
1871                 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1872                         fc_conf->mode = RTE_FC_TX_PAUSE;
1873                 else
1874                         fc_conf->mode = RTE_FC_NONE;
1875         }
1876
1877         return ret;
1878 }
1879
1880 static int
1881 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1882 {
1883         int ret = -EINVAL;
1884         struct dpaa2_dev_priv *priv;
1885         struct fsl_mc_io *dpni;
1886         struct dpni_link_state state = {0};
1887         struct dpni_link_cfg cfg = {0};
1888
1889         PMD_INIT_FUNC_TRACE();
1890
1891         priv = dev->data->dev_private;
1892         dpni = (struct fsl_mc_io *)dev->process_private;
1893
1894         if (dpni == NULL) {
1895                 DPAA2_PMD_ERR("dpni is NULL");
1896                 return ret;
1897         }
1898
1899         /* It is necessary to obtain the current state before setting fc_conf
1900          * as MC would return error in case rate, autoneg or duplex values are
1901          * different.
1902          */
1903         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1904         if (ret) {
1905                 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1906                 return -1;
1907         }
1908
1909         /* Disable link before setting configuration */
1910         dpaa2_dev_set_link_down(dev);
1911
1912         /* Based on fc_conf, update cfg */
1913         cfg.rate = state.rate;
1914         cfg.options = state.options;
1915
1916         /* update cfg with fc_conf */
1917         switch (fc_conf->mode) {
1918         case RTE_FC_FULL:
1919                 /* Full flow control;
1920                  * OPT_PAUSE set, ASYM_PAUSE not set
1921                  */
1922                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1923                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1924                 break;
1925         case RTE_FC_TX_PAUSE:
1926                 /* Enable RX flow control
1927                  * OPT_PAUSE not set;
1928                  * ASYM_PAUSE set;
1929                  */
1930                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1931                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1932                 break;
1933         case RTE_FC_RX_PAUSE:
1934                 /* Enable TX Flow control
1935                  * OPT_PAUSE set
1936                  * ASYM_PAUSE set
1937                  */
1938                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1939                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1940                 break;
1941         case RTE_FC_NONE:
1942                 /* Disable Flow control
1943                  * OPT_PAUSE not set
1944                  * ASYM_PAUSE not set
1945                  */
1946                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1947                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1948                 break;
1949         default:
1950                 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1951                               fc_conf->mode);
1952                 return -1;
1953         }
1954
1955         ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1956         if (ret)
1957                 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1958                               ret);
1959
1960         /* Enable link */
1961         dpaa2_dev_set_link_up(dev);
1962
1963         return ret;
1964 }
1965
1966 static int
1967 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1968                           struct rte_eth_rss_conf *rss_conf)
1969 {
1970         struct rte_eth_dev_data *data = dev->data;
1971         struct rte_eth_conf *eth_conf = &data->dev_conf;
1972         int ret;
1973
1974         PMD_INIT_FUNC_TRACE();
1975
1976         if (rss_conf->rss_hf) {
1977                 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1978                 if (ret) {
1979                         DPAA2_PMD_ERR("Unable to set flow dist");
1980                         return ret;
1981                 }
1982         } else {
1983                 ret = dpaa2_remove_flow_dist(dev, 0);
1984                 if (ret) {
1985                         DPAA2_PMD_ERR("Unable to remove flow dist");
1986                         return ret;
1987                 }
1988         }
1989         eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1990         return 0;
1991 }
1992
1993 static int
1994 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1995                             struct rte_eth_rss_conf *rss_conf)
1996 {
1997         struct rte_eth_dev_data *data = dev->data;
1998         struct rte_eth_conf *eth_conf = &data->dev_conf;
1999
2000         /* dpaa2 does not support rss_key, so length should be 0*/
2001         rss_conf->rss_key_len = 0;
2002         rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
2003         return 0;
2004 }
2005
2006 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
2007                 int eth_rx_queue_id,
2008                 uint16_t dpcon_id,
2009                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
2010 {
2011         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2012         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2013         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2014         uint8_t flow_id = dpaa2_ethq->flow_id;
2015         struct dpni_queue cfg;
2016         uint8_t options;
2017         int ret;
2018
2019         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
2020                 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
2021         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
2022                 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
2023         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
2024                 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
2025         else
2026                 return -EINVAL;
2027
2028         memset(&cfg, 0, sizeof(struct dpni_queue));
2029         options = DPNI_QUEUE_OPT_DEST;
2030         cfg.destination.type = DPNI_DEST_DPCON;
2031         cfg.destination.id = dpcon_id;
2032         cfg.destination.priority = queue_conf->ev.priority;
2033
2034         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
2035                 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
2036                 cfg.destination.hold_active = 1;
2037         }
2038
2039         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
2040                         !eth_priv->en_ordered) {
2041                 struct opr_cfg ocfg;
2042
2043                 /* Restoration window size = 256 frames */
2044                 ocfg.oprrws = 3;
2045                 /* Restoration window size = 512 frames for LX2 */
2046                 if (dpaa2_svr_family == SVR_LX2160A)
2047                         ocfg.oprrws = 4;
2048                 /* Auto advance NESN window enabled */
2049                 ocfg.oa = 1;
2050                 /* Late arrival window size disabled */
2051                 ocfg.olws = 0;
2052                 /* ORL resource exhaustaion advance NESN disabled */
2053                 ocfg.oeane = 0;
2054                 /* Loose ordering enabled */
2055                 ocfg.oloe = 1;
2056                 eth_priv->en_loose_ordered = 1;
2057                 /* Strict ordering enabled if explicitly set */
2058                 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
2059                         ocfg.oloe = 0;
2060                         eth_priv->en_loose_ordered = 0;
2061                 }
2062
2063                 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
2064                                    dpaa2_ethq->tc_index, flow_id,
2065                                    OPR_OPT_CREATE, &ocfg);
2066                 if (ret) {
2067                         DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
2068                         return ret;
2069                 }
2070
2071                 eth_priv->en_ordered = 1;
2072         }
2073
2074         options |= DPNI_QUEUE_OPT_USER_CTX;
2075         cfg.user_context = (size_t)(dpaa2_ethq);
2076
2077         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2078                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2079         if (ret) {
2080                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2081                 return ret;
2082         }
2083
2084         memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
2085
2086         return 0;
2087 }
2088
2089 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
2090                 int eth_rx_queue_id)
2091 {
2092         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2093         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2094         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2095         uint8_t flow_id = dpaa2_ethq->flow_id;
2096         struct dpni_queue cfg;
2097         uint8_t options;
2098         int ret;
2099
2100         memset(&cfg, 0, sizeof(struct dpni_queue));
2101         options = DPNI_QUEUE_OPT_DEST;
2102         cfg.destination.type = DPNI_DEST_NONE;
2103
2104         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2105                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2106         if (ret)
2107                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2108
2109         return ret;
2110 }
2111
2112 static inline int
2113 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op)
2114 {
2115         unsigned int i;
2116
2117         for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) {
2118                 if (dpaa2_supported_filter_ops[i] == filter_op)
2119                         return 0;
2120         }
2121         return -ENOTSUP;
2122 }
2123
2124 static int
2125 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
2126                     enum rte_filter_type filter_type,
2127                                  enum rte_filter_op filter_op,
2128                                  void *arg)
2129 {
2130         int ret = 0;
2131
2132         if (!dev)
2133                 return -ENODEV;
2134
2135         switch (filter_type) {
2136         case RTE_ETH_FILTER_GENERIC:
2137                 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) {
2138                         ret = -ENOTSUP;
2139                         break;
2140                 }
2141                 *(const void **)arg = &dpaa2_flow_ops;
2142                 dpaa2_filter_type |= filter_type;
2143                 break;
2144         default:
2145                 RTE_LOG(ERR, PMD, "Filter type (%d) not supported",
2146                         filter_type);
2147                 ret = -ENOTSUP;
2148                 break;
2149         }
2150         return ret;
2151 }
2152
2153 static struct eth_dev_ops dpaa2_ethdev_ops = {
2154         .dev_configure    = dpaa2_eth_dev_configure,
2155         .dev_start            = dpaa2_dev_start,
2156         .dev_stop             = dpaa2_dev_stop,
2157         .dev_close            = dpaa2_dev_close,
2158         .promiscuous_enable   = dpaa2_dev_promiscuous_enable,
2159         .promiscuous_disable  = dpaa2_dev_promiscuous_disable,
2160         .allmulticast_enable  = dpaa2_dev_allmulticast_enable,
2161         .allmulticast_disable = dpaa2_dev_allmulticast_disable,
2162         .dev_set_link_up      = dpaa2_dev_set_link_up,
2163         .dev_set_link_down    = dpaa2_dev_set_link_down,
2164         .link_update       = dpaa2_dev_link_update,
2165         .stats_get             = dpaa2_dev_stats_get,
2166         .xstats_get            = dpaa2_dev_xstats_get,
2167         .xstats_get_by_id     = dpaa2_xstats_get_by_id,
2168         .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
2169         .xstats_get_names      = dpaa2_xstats_get_names,
2170         .stats_reset       = dpaa2_dev_stats_reset,
2171         .xstats_reset         = dpaa2_dev_stats_reset,
2172         .fw_version_get    = dpaa2_fw_version_get,
2173         .dev_infos_get     = dpaa2_dev_info_get,
2174         .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
2175         .mtu_set           = dpaa2_dev_mtu_set,
2176         .vlan_filter_set      = dpaa2_vlan_filter_set,
2177         .vlan_offload_set     = dpaa2_vlan_offload_set,
2178         .vlan_tpid_set        = dpaa2_vlan_tpid_set,
2179         .rx_queue_setup    = dpaa2_dev_rx_queue_setup,
2180         .rx_queue_release  = dpaa2_dev_rx_queue_release,
2181         .tx_queue_setup    = dpaa2_dev_tx_queue_setup,
2182         .tx_queue_release  = dpaa2_dev_tx_queue_release,
2183         .rx_queue_count       = dpaa2_dev_rx_queue_count,
2184         .flow_ctrl_get        = dpaa2_flow_ctrl_get,
2185         .flow_ctrl_set        = dpaa2_flow_ctrl_set,
2186         .mac_addr_add         = dpaa2_dev_add_mac_addr,
2187         .mac_addr_remove      = dpaa2_dev_remove_mac_addr,
2188         .mac_addr_set         = dpaa2_dev_set_mac_addr,
2189         .rss_hash_update      = dpaa2_dev_rss_hash_update,
2190         .rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
2191         .filter_ctrl          = dpaa2_dev_flow_ctrl,
2192 #if defined(RTE_LIBRTE_IEEE1588)
2193         .timesync_enable      = dpaa2_timesync_enable,
2194         .timesync_disable     = dpaa2_timesync_disable,
2195         .timesync_read_time   = dpaa2_timesync_read_time,
2196         .timesync_write_time  = dpaa2_timesync_write_time,
2197         .timesync_adjust_time = dpaa2_timesync_adjust_time,
2198         .timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
2199         .timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
2200 #endif
2201 };
2202
2203 /* Populate the mac address from physically available (u-boot/firmware) and/or
2204  * one set by higher layers like MC (restool) etc.
2205  * Returns the table of MAC entries (multiple entries)
2206  */
2207 static int
2208 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
2209                   struct rte_ether_addr *mac_entry)
2210 {
2211         int ret;
2212         struct rte_ether_addr phy_mac, prime_mac;
2213
2214         memset(&phy_mac, 0, sizeof(struct rte_ether_addr));
2215         memset(&prime_mac, 0, sizeof(struct rte_ether_addr));
2216
2217         /* Get the physical device MAC address */
2218         ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2219                                      phy_mac.addr_bytes);
2220         if (ret) {
2221                 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
2222                 goto cleanup;
2223         }
2224
2225         ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2226                                         prime_mac.addr_bytes);
2227         if (ret) {
2228                 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
2229                 goto cleanup;
2230         }
2231
2232         /* Now that both MAC have been obtained, do:
2233          *  if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
2234          *     and return phy
2235          *  If empty_mac(phy), return prime.
2236          *  if both are empty, create random MAC, set as prime and return
2237          */
2238         if (!rte_is_zero_ether_addr(&phy_mac)) {
2239                 /* If the addresses are not same, overwrite prime */
2240                 if (!rte_is_same_ether_addr(&phy_mac, &prime_mac)) {
2241                         ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2242                                                         priv->token,
2243                                                         phy_mac.addr_bytes);
2244                         if (ret) {
2245                                 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
2246                                               ret);
2247                                 goto cleanup;
2248                         }
2249                         memcpy(&prime_mac, &phy_mac,
2250                                 sizeof(struct rte_ether_addr));
2251                 }
2252         } else if (rte_is_zero_ether_addr(&prime_mac)) {
2253                 /* In case phys and prime, both are zero, create random MAC */
2254                 rte_eth_random_addr(prime_mac.addr_bytes);
2255                 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2256                                                 priv->token,
2257                                                 prime_mac.addr_bytes);
2258                 if (ret) {
2259                         DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
2260                         goto cleanup;
2261                 }
2262         }
2263
2264         /* prime_mac the final MAC address */
2265         memcpy(mac_entry, &prime_mac, sizeof(struct rte_ether_addr));
2266         return 0;
2267
2268 cleanup:
2269         return -1;
2270 }
2271
2272 static int
2273 check_devargs_handler(__rte_unused const char *key, const char *value,
2274                       __rte_unused void *opaque)
2275 {
2276         if (strcmp(value, "1"))
2277                 return -1;
2278
2279         return 0;
2280 }
2281
2282 static int
2283 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2284 {
2285         struct rte_kvargs *kvlist;
2286
2287         if (!devargs)
2288                 return 0;
2289
2290         kvlist = rte_kvargs_parse(devargs->args, NULL);
2291         if (!kvlist)
2292                 return 0;
2293
2294         if (!rte_kvargs_count(kvlist, key)) {
2295                 rte_kvargs_free(kvlist);
2296                 return 0;
2297         }
2298
2299         if (rte_kvargs_process(kvlist, key,
2300                                check_devargs_handler, NULL) < 0) {
2301                 rte_kvargs_free(kvlist);
2302                 return 0;
2303         }
2304         rte_kvargs_free(kvlist);
2305
2306         return 1;
2307 }
2308
2309 static int
2310 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2311 {
2312         struct rte_device *dev = eth_dev->device;
2313         struct rte_dpaa2_device *dpaa2_dev;
2314         struct fsl_mc_io *dpni_dev;
2315         struct dpni_attr attr;
2316         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2317         struct dpni_buffer_layout layout;
2318         int ret, hw_id, i;
2319
2320         PMD_INIT_FUNC_TRACE();
2321
2322         dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2323         if (!dpni_dev) {
2324                 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2325                 return -1;
2326         }
2327         dpni_dev->regs = rte_mcp_ptr_list[0];
2328         eth_dev->process_private = (void *)dpni_dev;
2329
2330         /* For secondary processes, the primary has done all the work */
2331         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2332                 /* In case of secondary, only burst and ops API need to be
2333                  * plugged.
2334                  */
2335                 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2336                 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2337                         eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2338                 else if (dpaa2_get_devargs(dev->devargs,
2339                                         DRIVER_NO_PREFETCH_MODE))
2340                         eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2341                 else
2342                         eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2343                 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2344                 return 0;
2345         }
2346
2347         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2348
2349         hw_id = dpaa2_dev->object_id;
2350         ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2351         if (ret) {
2352                 DPAA2_PMD_ERR(
2353                              "Failure in opening dpni@%d with err code %d",
2354                              hw_id, ret);
2355                 rte_free(dpni_dev);
2356                 return -1;
2357         }
2358
2359         /* Clean the device first */
2360         ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2361         if (ret) {
2362                 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2363                               hw_id, ret);
2364                 goto init_err;
2365         }
2366
2367         ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2368         if (ret) {
2369                 DPAA2_PMD_ERR(
2370                              "Failure in get dpni@%d attribute, err code %d",
2371                              hw_id, ret);
2372                 goto init_err;
2373         }
2374
2375         priv->num_rx_tc = attr.num_rx_tcs;
2376         /* only if the custom CG is enabled */
2377         if (attr.options & DPNI_OPT_CUSTOM_CG)
2378                 priv->max_cgs = attr.num_cgs;
2379         else
2380                 priv->max_cgs = 0;
2381
2382         for (i = 0; i < priv->max_cgs; i++)
2383                 priv->cgid_in_use[i] = 0;
2384
2385         for (i = 0; i < attr.num_rx_tcs; i++)
2386                 priv->nb_rx_queues += attr.num_queues;
2387
2388         /* Using number of TX queues as number of TX TCs */
2389         priv->nb_tx_queues = attr.num_tx_tcs;
2390
2391         DPAA2_PMD_DEBUG("RX-TC= %d, rx_queues= %d, tx_queues=%d, max_cgs=%d",
2392                         priv->num_rx_tc, priv->nb_rx_queues,
2393                         priv->nb_tx_queues, priv->max_cgs);
2394
2395         priv->hw = dpni_dev;
2396         priv->hw_id = hw_id;
2397         priv->options = attr.options;
2398         priv->max_mac_filters = attr.mac_filter_entries;
2399         priv->max_vlan_filters = attr.vlan_filter_entries;
2400         priv->flags = 0;
2401 #if defined(RTE_LIBRTE_IEEE1588)
2402         priv->tx_conf_en = 1;
2403 #else
2404         priv->tx_conf_en = 0;
2405 #endif
2406
2407         /* Allocate memory for hardware structure for queues */
2408         ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2409         if (ret) {
2410                 DPAA2_PMD_ERR("Queue allocation Failed");
2411                 goto init_err;
2412         }
2413
2414         /* Allocate memory for storing MAC addresses.
2415          * Table of mac_filter_entries size is allocated so that RTE ether lib
2416          * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2417          */
2418         eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2419                 RTE_ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2420         if (eth_dev->data->mac_addrs == NULL) {
2421                 DPAA2_PMD_ERR(
2422                    "Failed to allocate %d bytes needed to store MAC addresses",
2423                    RTE_ETHER_ADDR_LEN * attr.mac_filter_entries);
2424                 ret = -ENOMEM;
2425                 goto init_err;
2426         }
2427
2428         ret = populate_mac_addr(dpni_dev, priv, &eth_dev->data->mac_addrs[0]);
2429         if (ret) {
2430                 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2431                 rte_free(eth_dev->data->mac_addrs);
2432                 eth_dev->data->mac_addrs = NULL;
2433                 goto init_err;
2434         }
2435
2436         /* ... tx buffer layout ... */
2437         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2438         if (priv->tx_conf_en) {
2439                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2440                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2441                 layout.pass_timestamp = true;
2442         } else {
2443                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2444         }
2445         layout.pass_frame_status = 1;
2446         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2447                                      DPNI_QUEUE_TX, &layout);
2448         if (ret) {
2449                 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2450                 goto init_err;
2451         }
2452
2453         /* ... tx-conf and error buffer layout ... */
2454         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2455         if (priv->tx_conf_en) {
2456                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2457                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2458                 layout.pass_timestamp = true;
2459         } else {
2460                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2461         }
2462         layout.pass_frame_status = 1;
2463         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2464                                      DPNI_QUEUE_TX_CONFIRM, &layout);
2465         if (ret) {
2466                 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2467                              ret);
2468                 goto init_err;
2469         }
2470
2471         eth_dev->dev_ops = &dpaa2_ethdev_ops;
2472
2473         if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2474                 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2475                 DPAA2_PMD_INFO("Loopback mode");
2476         } else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
2477                 eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2478                 DPAA2_PMD_INFO("No Prefetch mode");
2479         } else {
2480                 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2481         }
2482         eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2483
2484         /*Init fields w.r.t. classficaition*/
2485         memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg));
2486         priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64);
2487         if (!priv->extract.qos_extract_param) {
2488                 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow "
2489                             " classificaiton ", ret);
2490                 goto init_err;
2491         }
2492         for (i = 0; i < MAX_TCS; i++) {
2493                 memset(&priv->extract.fs_key_cfg[i], 0,
2494                         sizeof(struct dpkg_profile_cfg));
2495                 priv->extract.fs_extract_param[i] =
2496                         (size_t)rte_malloc(NULL, 256, 64);
2497                 if (!priv->extract.fs_extract_param[i]) {
2498                         DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton",
2499                                      ret);
2500                         goto init_err;
2501                 }
2502         }
2503
2504         ret = dpni_set_max_frame_length(dpni_dev, CMD_PRI_LOW, priv->token,
2505                                         RTE_ETHER_MAX_LEN - RTE_ETHER_CRC_LEN
2506                                         + VLAN_TAG_SIZE);
2507         if (ret) {
2508                 DPAA2_PMD_ERR("Unable to set mtu. check config");
2509                 goto init_err;
2510         }
2511
2512         RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2513         return 0;
2514 init_err:
2515         dpaa2_dev_uninit(eth_dev);
2516         return ret;
2517 }
2518
2519 static int
2520 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2521 {
2522         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2523         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_dev->process_private;
2524         int i, ret;
2525
2526         PMD_INIT_FUNC_TRACE();
2527
2528         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2529                 return 0;
2530
2531         if (!dpni) {
2532                 DPAA2_PMD_WARN("Already closed or not started");
2533                 return -1;
2534         }
2535
2536         dpaa2_dev_close(eth_dev);
2537
2538         dpaa2_free_rx_tx_queues(eth_dev);
2539
2540         /* Close the device at underlying layer*/
2541         ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2542         if (ret) {
2543                 DPAA2_PMD_ERR(
2544                              "Failure closing dpni device with err code %d",
2545                              ret);
2546         }
2547
2548         /* Free the allocated memory for ethernet private data and dpni*/
2549         priv->hw = NULL;
2550         eth_dev->process_private = NULL;
2551         rte_free(dpni);
2552
2553         for (i = 0; i < MAX_TCS; i++) {
2554                 if (priv->extract.fs_extract_param[i])
2555                         rte_free((void *)(size_t)priv->extract.fs_extract_param[i]);
2556         }
2557
2558         if (priv->extract.qos_extract_param)
2559                 rte_free((void *)(size_t)priv->extract.qos_extract_param);
2560
2561         eth_dev->dev_ops = NULL;
2562         eth_dev->rx_pkt_burst = NULL;
2563         eth_dev->tx_pkt_burst = NULL;
2564
2565         DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2566         return 0;
2567 }
2568
2569 static int
2570 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2571                 struct rte_dpaa2_device *dpaa2_dev)
2572 {
2573         struct rte_eth_dev *eth_dev;
2574         struct dpaa2_dev_priv *dev_priv;
2575         int diag;
2576
2577         if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
2578                 RTE_PKTMBUF_HEADROOM) {
2579                 DPAA2_PMD_ERR(
2580                 "RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA2 Annotation req(%d)",
2581                 RTE_PKTMBUF_HEADROOM,
2582                 DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE);
2583
2584                 return -1;
2585         }
2586
2587         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2588                 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2589                 if (!eth_dev)
2590                         return -ENODEV;
2591                 dev_priv = rte_zmalloc("ethdev private structure",
2592                                        sizeof(struct dpaa2_dev_priv),
2593                                        RTE_CACHE_LINE_SIZE);
2594                 if (dev_priv == NULL) {
2595                         DPAA2_PMD_CRIT(
2596                                 "Unable to allocate memory for private data");
2597                         rte_eth_dev_release_port(eth_dev);
2598                         return -ENOMEM;
2599                 }
2600                 eth_dev->data->dev_private = (void *)dev_priv;
2601                 /* Store a pointer to eth_dev in dev_private */
2602                 dev_priv->eth_dev = eth_dev;
2603                 dev_priv->tx_conf_en = 0;
2604         } else {
2605                 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2606                 if (!eth_dev) {
2607                         DPAA2_PMD_DEBUG("returning enodev");
2608                         return -ENODEV;
2609                 }
2610         }
2611
2612         eth_dev->device = &dpaa2_dev->device;
2613
2614         dpaa2_dev->eth_dev = eth_dev;
2615         eth_dev->data->rx_mbuf_alloc_failed = 0;
2616
2617         if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2618                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2619
2620         /* Invoke PMD device initialization function */
2621         diag = dpaa2_dev_init(eth_dev);
2622         if (diag == 0) {
2623                 rte_eth_dev_probing_finish(eth_dev);
2624                 return 0;
2625         }
2626
2627         rte_eth_dev_release_port(eth_dev);
2628         return diag;
2629 }
2630
2631 static int
2632 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2633 {
2634         struct rte_eth_dev *eth_dev;
2635
2636         eth_dev = dpaa2_dev->eth_dev;
2637         dpaa2_dev_uninit(eth_dev);
2638
2639         rte_eth_dev_release_port(eth_dev);
2640
2641         return 0;
2642 }
2643
2644 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2645         .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2646         .drv_type = DPAA2_ETH,
2647         .probe = rte_dpaa2_probe,
2648         .remove = rte_dpaa2_remove,
2649 };
2650
2651 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2652 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2653                 DRIVER_LOOPBACK_MODE "=<int> "
2654                 DRIVER_NO_PREFETCH_MODE "=<int>");
2655 RTE_INIT(dpaa2_pmd_init_log)
2656 {
2657         dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2658         if (dpaa2_logtype_pmd >= 0)
2659                 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);
2660 }