1 /* * SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
12 #include <rte_ethdev_driver.h>
13 #include <rte_malloc.h>
14 #include <rte_memcpy.h>
15 #include <rte_string_fns.h>
16 #include <rte_cycles.h>
17 #include <rte_kvargs.h>
19 #include <rte_fslmc.h>
21 #include "dpaa2_pmd_logs.h"
22 #include <fslmc_vfio.h>
23 #include <dpaa2_hw_pvt.h>
24 #include <dpaa2_hw_mempool.h>
25 #include <dpaa2_hw_dpio.h>
26 #include <mc/fsl_dpmng.h>
27 #include "dpaa2_ethdev.h"
28 #include <fsl_qbman_debug.h>
30 #define DRIVER_LOOPBACK_MODE "drv_looback"
32 /* Supported Rx offloads */
33 static uint64_t dev_rx_offloads_sup =
34 DEV_RX_OFFLOAD_VLAN_STRIP |
35 DEV_RX_OFFLOAD_IPV4_CKSUM |
36 DEV_RX_OFFLOAD_UDP_CKSUM |
37 DEV_RX_OFFLOAD_TCP_CKSUM |
38 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
39 DEV_RX_OFFLOAD_VLAN_FILTER |
40 DEV_RX_OFFLOAD_JUMBO_FRAME;
42 /* Rx offloads which cannot be disabled */
43 static uint64_t dev_rx_offloads_nodis =
44 DEV_RX_OFFLOAD_SCATTER;
46 /* Supported Tx offloads */
47 static uint64_t dev_tx_offloads_sup =
48 DEV_TX_OFFLOAD_VLAN_INSERT |
49 DEV_TX_OFFLOAD_IPV4_CKSUM |
50 DEV_TX_OFFLOAD_UDP_CKSUM |
51 DEV_TX_OFFLOAD_TCP_CKSUM |
52 DEV_TX_OFFLOAD_SCTP_CKSUM |
53 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
55 /* Tx offloads which cannot be disabled */
56 static uint64_t dev_tx_offloads_nodis =
57 DEV_TX_OFFLOAD_MULTI_SEGS |
58 DEV_TX_OFFLOAD_MT_LOCKFREE |
59 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
61 /* enable timestamp in mbuf */
62 enum pmd_dpaa2_ts dpaa2_enable_ts;
64 struct rte_dpaa2_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
66 uint8_t page_id; /* dpni statistics page id */
67 uint8_t stats_id; /* stats id in the given page */
70 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
71 {"ingress_multicast_frames", 0, 2},
72 {"ingress_multicast_bytes", 0, 3},
73 {"ingress_broadcast_frames", 0, 4},
74 {"ingress_broadcast_bytes", 0, 5},
75 {"egress_multicast_frames", 1, 2},
76 {"egress_multicast_bytes", 1, 3},
77 {"egress_broadcast_frames", 1, 4},
78 {"egress_broadcast_bytes", 1, 5},
79 {"ingress_filtered_frames", 2, 0},
80 {"ingress_discarded_frames", 2, 1},
81 {"ingress_nobuffer_discards", 2, 2},
82 {"egress_discarded_frames", 2, 3},
83 {"egress_confirmed_frames", 2, 4},
86 static struct rte_dpaa2_driver rte_dpaa2_pmd;
87 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
88 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
89 int wait_to_complete);
90 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
91 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
92 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
94 int dpaa2_logtype_pmd;
96 __rte_experimental void
97 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
99 dpaa2_enable_ts = enable;
103 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
106 struct dpaa2_dev_priv *priv = dev->data->dev_private;
107 struct fsl_mc_io *dpni = priv->hw;
109 PMD_INIT_FUNC_TRACE();
112 DPAA2_PMD_ERR("dpni is NULL");
117 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
118 priv->token, vlan_id);
120 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
121 priv->token, vlan_id);
124 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
125 ret, vlan_id, priv->hw_id);
131 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
133 struct dpaa2_dev_priv *priv = dev->data->dev_private;
134 struct fsl_mc_io *dpni = priv->hw;
137 PMD_INIT_FUNC_TRACE();
139 if (mask & ETH_VLAN_FILTER_MASK) {
140 /* VLAN Filter not avaialble */
141 if (!priv->max_vlan_filters) {
142 DPAA2_PMD_INFO("VLAN filter not available");
146 if (dev->data->dev_conf.rxmode.offloads &
147 DEV_RX_OFFLOAD_VLAN_FILTER)
148 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
151 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
154 DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
157 if (mask & ETH_VLAN_EXTEND_MASK) {
158 if (dev->data->dev_conf.rxmode.offloads &
159 DEV_RX_OFFLOAD_VLAN_EXTEND)
160 DPAA2_PMD_INFO("VLAN extend offload not supported");
167 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
168 enum rte_vlan_type vlan_type __rte_unused,
171 struct dpaa2_dev_priv *priv = dev->data->dev_private;
172 struct fsl_mc_io *dpni = priv->hw;
175 PMD_INIT_FUNC_TRACE();
177 /* nothing to be done for standard vlan tpids */
178 if (tpid == 0x8100 || tpid == 0x88A8)
181 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
184 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
185 /* if already configured tpids, remove them first */
187 struct dpni_custom_tpid_cfg tpid_list = {0};
189 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
190 priv->token, &tpid_list);
193 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
194 priv->token, tpid_list.tpid1);
197 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
205 dpaa2_fw_version_get(struct rte_eth_dev *dev,
210 struct dpaa2_dev_priv *priv = dev->data->dev_private;
211 struct fsl_mc_io *dpni = priv->hw;
212 struct mc_soc_version mc_plat_info = {0};
213 struct mc_version mc_ver_info = {0};
215 PMD_INIT_FUNC_TRACE();
217 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
218 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
220 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
221 DPAA2_PMD_WARN("\tmc_get_version failed");
223 ret = snprintf(fw_version, fw_size,
228 mc_ver_info.revision);
230 ret += 1; /* add the size of '\0' */
231 if (fw_size < (uint32_t)ret)
238 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
240 struct dpaa2_dev_priv *priv = dev->data->dev_private;
242 PMD_INIT_FUNC_TRACE();
244 dev_info->if_index = priv->hw_id;
246 dev_info->max_mac_addrs = priv->max_mac_filters;
247 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
248 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
249 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
250 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
251 dev_info->rx_offload_capa = dev_rx_offloads_sup |
252 dev_rx_offloads_nodis;
253 dev_info->tx_offload_capa = dev_tx_offloads_sup |
254 dev_tx_offloads_nodis;
255 dev_info->speed_capa = ETH_LINK_SPEED_1G |
256 ETH_LINK_SPEED_2_5G |
259 dev_info->max_hash_mac_addrs = 0;
260 dev_info->max_vfs = 0;
261 dev_info->max_vmdq_pools = ETH_16_POOLS;
262 dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
266 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
268 struct dpaa2_dev_priv *priv = dev->data->dev_private;
271 uint8_t num_rxqueue_per_tc;
272 struct dpaa2_queue *mc_q, *mcq;
275 struct dpaa2_queue *dpaa2_q;
277 PMD_INIT_FUNC_TRACE();
279 num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
280 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
281 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
282 RTE_CACHE_LINE_SIZE);
284 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
288 for (i = 0; i < priv->nb_rx_queues; i++) {
289 mc_q->eth_data = dev->data;
290 priv->rx_vq[i] = mc_q++;
291 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
292 dpaa2_q->q_storage = rte_malloc("dq_storage",
293 sizeof(struct queue_storage_info_t),
294 RTE_CACHE_LINE_SIZE);
295 if (!dpaa2_q->q_storage)
298 memset(dpaa2_q->q_storage, 0,
299 sizeof(struct queue_storage_info_t));
300 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
304 for (i = 0; i < priv->nb_tx_queues; i++) {
305 mc_q->eth_data = dev->data;
306 mc_q->flow_id = 0xffff;
307 priv->tx_vq[i] = mc_q++;
308 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
309 dpaa2_q->cscn = rte_malloc(NULL,
310 sizeof(struct qbman_result), 16);
316 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
317 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
318 mcq->tc_index = dist_idx / num_rxqueue_per_tc;
319 mcq->flow_id = dist_idx % num_rxqueue_per_tc;
327 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
328 rte_free(dpaa2_q->cscn);
329 priv->tx_vq[i--] = NULL;
331 i = priv->nb_rx_queues;
334 mc_q = priv->rx_vq[0];
336 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
337 dpaa2_free_dq_storage(dpaa2_q->q_storage);
338 rte_free(dpaa2_q->q_storage);
339 priv->rx_vq[i--] = NULL;
346 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
348 struct dpaa2_dev_priv *priv = dev->data->dev_private;
349 struct dpaa2_queue *dpaa2_q;
352 PMD_INIT_FUNC_TRACE();
354 /* Queue allocation base */
355 if (priv->rx_vq[0]) {
356 /* cleaning up queue storage */
357 for (i = 0; i < priv->nb_rx_queues; i++) {
358 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
359 if (dpaa2_q->q_storage)
360 rte_free(dpaa2_q->q_storage);
362 /* cleanup tx queue cscn */
363 for (i = 0; i < priv->nb_tx_queues; i++) {
364 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
365 rte_free(dpaa2_q->cscn);
367 /*free memory for all queues (RX+TX) */
368 rte_free(priv->rx_vq[0]);
369 priv->rx_vq[0] = NULL;
374 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
376 struct dpaa2_dev_priv *priv = dev->data->dev_private;
377 struct fsl_mc_io *dpni = priv->hw;
378 struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
379 uint64_t rx_offloads = eth_conf->rxmode.offloads;
380 uint64_t tx_offloads = eth_conf->txmode.offloads;
381 int rx_l3_csum_offload = false;
382 int rx_l4_csum_offload = false;
383 int tx_l3_csum_offload = false;
384 int tx_l4_csum_offload = false;
387 PMD_INIT_FUNC_TRACE();
389 /* Rx offloads validation */
390 if (dev_rx_offloads_nodis & ~rx_offloads) {
392 "Rx offloads non configurable - requested 0x%" PRIx64
393 " ignored 0x%" PRIx64,
394 rx_offloads, dev_rx_offloads_nodis);
397 /* Tx offloads validation */
398 if (dev_tx_offloads_nodis & ~tx_offloads) {
400 "Tx offloads non configurable - requested 0x%" PRIx64
401 " ignored 0x%" PRIx64,
402 tx_offloads, dev_tx_offloads_nodis);
405 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
406 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
407 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
408 priv->token, eth_conf->rxmode.max_rx_pkt_len);
411 "Unable to set mtu. check config");
419 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
420 ret = dpaa2_setup_flow_dist(dev,
421 eth_conf->rx_adv_conf.rss_conf.rss_hf);
423 DPAA2_PMD_ERR("Unable to set flow distribution."
424 "Check queue config");
429 if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
430 rx_l3_csum_offload = true;
432 if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
433 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM))
434 rx_l4_csum_offload = true;
436 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
437 DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
439 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
443 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
444 DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
446 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
450 if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
451 tx_l3_csum_offload = true;
453 if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
454 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
455 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
456 tx_l4_csum_offload = true;
458 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
459 DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
461 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
465 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
466 DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
468 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
472 /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
473 * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
474 * to 0 for LS2 in the hardware thus disabling data/annotation
475 * stashing. For LX2 this is fixed in hardware and thus hash result and
476 * parse results can be received in FD using this option.
478 if (dpaa2_svr_family == SVR_LX2160A) {
479 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
480 DPNI_FLCTYPE_HASH, true);
482 DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
487 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
488 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
490 /* update the current status */
491 dpaa2_dev_link_update(dev, 0);
496 /* Function to setup RX flow information. It contains traffic class ID,
497 * flow ID, destination configuration etc.
500 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
501 uint16_t rx_queue_id,
502 uint16_t nb_rx_desc __rte_unused,
503 unsigned int socket_id __rte_unused,
504 const struct rte_eth_rxconf *rx_conf __rte_unused,
505 struct rte_mempool *mb_pool)
507 struct dpaa2_dev_priv *priv = dev->data->dev_private;
508 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
509 struct dpaa2_queue *dpaa2_q;
510 struct dpni_queue cfg;
516 PMD_INIT_FUNC_TRACE();
518 DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
519 dev, rx_queue_id, mb_pool, rx_conf);
521 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
522 bpid = mempool_to_bpid(mb_pool);
523 ret = dpaa2_attach_bp_list(priv,
524 rte_dpaa2_bpid_info[bpid].bp_list);
528 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
529 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
530 dpaa2_q->bp_array = rte_dpaa2_bpid_info;
532 /*Get the flow id from given VQ id*/
533 flow_id = rx_queue_id % priv->nb_rx_queues;
534 memset(&cfg, 0, sizeof(struct dpni_queue));
536 options = options | DPNI_QUEUE_OPT_USER_CTX;
537 cfg.user_context = (size_t)(dpaa2_q);
539 /*if ls2088 or rev2 device, enable the stashing */
541 if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
542 options |= DPNI_QUEUE_OPT_FLC;
543 cfg.flc.stash_control = true;
544 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
545 /* 00 00 00 - last 6 bit represent annotation, context stashing,
546 * data stashing setting 01 01 00 (0x14)
547 * (in following order ->DS AS CS)
548 * to enable 1 line data, 1 line annotation.
549 * For LX2, this setting should be 01 00 00 (0x10)
551 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
552 cfg.flc.value |= 0x10;
554 cfg.flc.value |= 0x14;
556 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
557 dpaa2_q->tc_index, flow_id, options, &cfg);
559 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
563 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
564 struct dpni_taildrop taildrop;
567 /*enabling per rx queue congestion control */
568 taildrop.threshold = CONG_THRESHOLD_RX_Q;
569 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
570 taildrop.oal = CONG_RX_OAL;
571 DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d",
573 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
574 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
575 dpaa2_q->tc_index, flow_id, &taildrop);
577 DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
583 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
588 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
589 uint16_t tx_queue_id,
590 uint16_t nb_tx_desc __rte_unused,
591 unsigned int socket_id __rte_unused,
592 const struct rte_eth_txconf *tx_conf __rte_unused)
594 struct dpaa2_dev_priv *priv = dev->data->dev_private;
595 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
596 priv->tx_vq[tx_queue_id];
597 struct fsl_mc_io *dpni = priv->hw;
598 struct dpni_queue tx_conf_cfg;
599 struct dpni_queue tx_flow_cfg;
600 uint8_t options = 0, flow_id;
604 PMD_INIT_FUNC_TRACE();
606 /* Return if queue already configured */
607 if (dpaa2_q->flow_id != 0xffff) {
608 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
612 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
613 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
618 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
619 tc_id, flow_id, options, &tx_flow_cfg);
621 DPAA2_PMD_ERR("Error in setting the tx flow: "
622 "tc_id=%d, flow=%d err=%d",
623 tc_id, flow_id, ret);
627 dpaa2_q->flow_id = flow_id;
629 if (tx_queue_id == 0) {
630 /*Set tx-conf and error configuration*/
631 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
635 DPAA2_PMD_ERR("Error in set tx conf mode settings: "
640 dpaa2_q->tc_index = tc_id;
642 if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
643 struct dpni_congestion_notification_cfg cong_notif_cfg;
645 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
646 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
647 /* Notify that the queue is not congested when the data in
648 * the queue is below this thershold.
650 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
651 cong_notif_cfg.message_ctx = 0;
652 cong_notif_cfg.message_iova =
653 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
654 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
655 cong_notif_cfg.notification_mode =
656 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
657 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
658 DPNI_CONG_OPT_COHERENT_WRITE;
660 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
667 "Error in setting tx congestion notification: "
672 dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
673 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
678 dpaa2_dev_rx_queue_release(void *q __rte_unused)
680 PMD_INIT_FUNC_TRACE();
684 dpaa2_dev_tx_queue_release(void *q __rte_unused)
686 PMD_INIT_FUNC_TRACE();
690 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
693 struct dpaa2_dev_priv *priv = dev->data->dev_private;
694 struct dpaa2_queue *dpaa2_q;
695 struct qbman_swp *swp;
696 struct qbman_fq_query_np_rslt state;
697 uint32_t frame_cnt = 0;
699 PMD_INIT_FUNC_TRACE();
701 if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
702 ret = dpaa2_affine_qbman_swp();
704 DPAA2_PMD_ERR("Failure in affining portal");
708 swp = DPAA2_PER_LCORE_PORTAL;
710 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
712 if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
713 frame_cnt = qbman_fq_state_frame_count(&state);
714 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
715 rx_queue_id, frame_cnt);
720 static const uint32_t *
721 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
723 static const uint32_t ptypes[] = {
724 /*todo -= add more types */
727 RTE_PTYPE_L3_IPV4_EXT,
729 RTE_PTYPE_L3_IPV6_EXT,
737 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
738 dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
744 * Dpaa2 link Interrupt handler
747 * The address of parameter (struct rte_eth_dev *) regsitered before.
753 dpaa2_interrupt_handler(void *param)
755 struct rte_eth_dev *dev = param;
756 struct dpaa2_dev_priv *priv = dev->data->dev_private;
757 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
759 int irq_index = DPNI_IRQ_INDEX;
760 unsigned int status = 0, clear = 0;
762 PMD_INIT_FUNC_TRACE();
765 DPAA2_PMD_ERR("dpni is NULL");
769 ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
772 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
777 if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
778 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
779 dpaa2_dev_link_update(dev, 0);
780 /* calling all the apps registered for link status event */
781 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
785 ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
788 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
792 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
795 struct dpaa2_dev_priv *priv = dev->data->dev_private;
796 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
797 int irq_index = DPNI_IRQ_INDEX;
798 unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
800 PMD_INIT_FUNC_TRACE();
802 err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
805 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
810 err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
813 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
820 dpaa2_dev_start(struct rte_eth_dev *dev)
822 struct rte_device *rdev = dev->device;
823 struct rte_dpaa2_device *dpaa2_dev;
824 struct rte_eth_dev_data *data = dev->data;
825 struct dpaa2_dev_priv *priv = data->dev_private;
826 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
827 struct dpni_queue cfg;
828 struct dpni_error_cfg err_cfg;
830 struct dpni_queue_id qid;
831 struct dpaa2_queue *dpaa2_q;
833 struct rte_intr_handle *intr_handle;
835 dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
836 intr_handle = &dpaa2_dev->intr_handle;
838 PMD_INIT_FUNC_TRACE();
840 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
842 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
847 /* Power up the phy. Needed to make the link go UP */
848 dpaa2_dev_set_link_up(dev);
850 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
851 DPNI_QUEUE_TX, &qdid);
853 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
858 for (i = 0; i < data->nb_rx_queues; i++) {
859 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
860 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
861 DPNI_QUEUE_RX, dpaa2_q->tc_index,
862 dpaa2_q->flow_id, &cfg, &qid);
864 DPAA2_PMD_ERR("Error in getting flow information: "
868 dpaa2_q->fqid = qid.fqid;
871 /*checksum errors, send them to normal path and set it in annotation */
872 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
874 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
875 err_cfg.set_frame_annotation = true;
877 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
878 priv->token, &err_cfg);
880 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
885 /* if the interrupts were configured on this devices*/
886 if (intr_handle && (intr_handle->fd) &&
887 (dev->data->dev_conf.intr_conf.lsc != 0)) {
888 /* Registering LSC interrupt handler */
889 rte_intr_callback_register(intr_handle,
890 dpaa2_interrupt_handler,
893 /* enable vfio intr/eventfd mapping
894 * Interrupt index 0 is required, so we can not use
897 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
899 /* enable dpni_irqs */
900 dpaa2_eth_setup_irqs(dev, 1);
903 /* Change the tx burst function if ordered queues are used */
904 if (priv->en_ordered)
905 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
911 * This routine disables all traffic on the adapter by issuing a
912 * global reset on the MAC.
915 dpaa2_dev_stop(struct rte_eth_dev *dev)
917 struct dpaa2_dev_priv *priv = dev->data->dev_private;
918 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
920 struct rte_eth_link link;
921 struct rte_intr_handle *intr_handle = dev->intr_handle;
923 PMD_INIT_FUNC_TRACE();
925 /* reset interrupt callback */
926 if (intr_handle && (intr_handle->fd) &&
927 (dev->data->dev_conf.intr_conf.lsc != 0)) {
928 /*disable dpni irqs */
929 dpaa2_eth_setup_irqs(dev, 0);
931 /* disable vfio intr before callback unregister */
932 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
934 /* Unregistering LSC interrupt handler */
935 rte_intr_callback_unregister(intr_handle,
936 dpaa2_interrupt_handler,
940 dpaa2_dev_set_link_down(dev);
942 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
944 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
949 /* clear the recorded link status */
950 memset(&link, 0, sizeof(link));
951 rte_eth_linkstatus_set(dev, &link);
955 dpaa2_dev_close(struct rte_eth_dev *dev)
957 struct dpaa2_dev_priv *priv = dev->data->dev_private;
958 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
960 struct rte_eth_link link;
962 PMD_INIT_FUNC_TRACE();
964 /* Clean the device first */
965 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
967 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
971 memset(&link, 0, sizeof(link));
972 rte_eth_linkstatus_set(dev, &link);
976 dpaa2_dev_promiscuous_enable(
977 struct rte_eth_dev *dev)
980 struct dpaa2_dev_priv *priv = dev->data->dev_private;
981 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
983 PMD_INIT_FUNC_TRACE();
986 DPAA2_PMD_ERR("dpni is NULL");
990 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
992 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
994 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
996 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1000 dpaa2_dev_promiscuous_disable(
1001 struct rte_eth_dev *dev)
1004 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1005 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1007 PMD_INIT_FUNC_TRACE();
1010 DPAA2_PMD_ERR("dpni is NULL");
1014 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1016 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1018 if (dev->data->all_multicast == 0) {
1019 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1020 priv->token, false);
1022 DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1028 dpaa2_dev_allmulticast_enable(
1029 struct rte_eth_dev *dev)
1032 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1033 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1035 PMD_INIT_FUNC_TRACE();
1038 DPAA2_PMD_ERR("dpni is NULL");
1042 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1044 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1048 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1051 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1052 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1054 PMD_INIT_FUNC_TRACE();
1057 DPAA2_PMD_ERR("dpni is NULL");
1061 /* must remain on for all promiscuous */
1062 if (dev->data->promiscuous == 1)
1065 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1067 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1071 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1074 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1075 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1076 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
1079 PMD_INIT_FUNC_TRACE();
1082 DPAA2_PMD_ERR("dpni is NULL");
1086 /* check that mtu is within the allowed range */
1087 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
1090 if (frame_size > ETHER_MAX_LEN)
1091 dev->data->dev_conf.rxmode.offloads &=
1092 DEV_RX_OFFLOAD_JUMBO_FRAME;
1094 dev->data->dev_conf.rxmode.offloads &=
1095 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1097 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1099 /* Set the Max Rx frame length as 'mtu' +
1100 * Maximum Ethernet header length
1102 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1105 DPAA2_PMD_ERR("Setting the max frame length failed");
1108 DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1113 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1114 struct ether_addr *addr,
1115 __rte_unused uint32_t index,
1116 __rte_unused uint32_t pool)
1119 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1120 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1122 PMD_INIT_FUNC_TRACE();
1125 DPAA2_PMD_ERR("dpni is NULL");
1129 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1130 priv->token, addr->addr_bytes);
1133 "error: Adding the MAC ADDR failed: err = %d", ret);
1138 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1142 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1143 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1144 struct rte_eth_dev_data *data = dev->data;
1145 struct ether_addr *macaddr;
1147 PMD_INIT_FUNC_TRACE();
1149 macaddr = &data->mac_addrs[index];
1152 DPAA2_PMD_ERR("dpni is NULL");
1156 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1157 priv->token, macaddr->addr_bytes);
1160 "error: Removing the MAC ADDR failed: err = %d", ret);
1164 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1165 struct ether_addr *addr)
1168 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1169 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1171 PMD_INIT_FUNC_TRACE();
1174 DPAA2_PMD_ERR("dpni is NULL");
1178 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1179 priv->token, addr->addr_bytes);
1183 "error: Setting the MAC ADDR failed %d", ret);
1189 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1190 struct rte_eth_stats *stats)
1192 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1193 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1195 uint8_t page0 = 0, page1 = 1, page2 = 2;
1196 union dpni_statistics value;
1198 struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1200 memset(&value, 0, sizeof(union dpni_statistics));
1202 PMD_INIT_FUNC_TRACE();
1205 DPAA2_PMD_ERR("dpni is NULL");
1210 DPAA2_PMD_ERR("stats is NULL");
1214 /*Get Counters from page_0*/
1215 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1220 stats->ipackets = value.page_0.ingress_all_frames;
1221 stats->ibytes = value.page_0.ingress_all_bytes;
1223 /*Get Counters from page_1*/
1224 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1229 stats->opackets = value.page_1.egress_all_frames;
1230 stats->obytes = value.page_1.egress_all_bytes;
1232 /*Get Counters from page_2*/
1233 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1238 /* Ingress drop frame count due to configured rules */
1239 stats->ierrors = value.page_2.ingress_filtered_frames;
1240 /* Ingress drop frame count due to error */
1241 stats->ierrors += value.page_2.ingress_discarded_frames;
1243 stats->oerrors = value.page_2.egress_discarded_frames;
1244 stats->imissed = value.page_2.ingress_nobuffer_discards;
1246 /* Fill in per queue stats */
1247 for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1248 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1249 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1250 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1252 stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1254 stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1256 /* Byte counting is not implemented */
1257 stats->q_ibytes[i] = 0;
1258 stats->q_obytes[i] = 0;
1264 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1269 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1272 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1273 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1275 union dpni_statistics value[3] = {};
1276 unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1284 /* Get Counters from page_0*/
1285 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1290 /* Get Counters from page_1*/
1291 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1296 /* Get Counters from page_2*/
1297 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1302 for (i = 0; i < num; i++) {
1304 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1305 raw.counter[dpaa2_xstats_strings[i].stats_id];
1309 DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1314 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1315 struct rte_eth_xstat_name *xstats_names,
1318 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1320 if (limit < stat_cnt)
1323 if (xstats_names != NULL)
1324 for (i = 0; i < stat_cnt; i++)
1325 snprintf(xstats_names[i].name,
1326 sizeof(xstats_names[i].name),
1328 dpaa2_xstats_strings[i].name);
1334 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1335 uint64_t *values, unsigned int n)
1337 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1338 uint64_t values_copy[stat_cnt];
1341 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1342 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1344 union dpni_statistics value[3] = {};
1352 /* Get Counters from page_0*/
1353 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1358 /* Get Counters from page_1*/
1359 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1364 /* Get Counters from page_2*/
1365 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1370 for (i = 0; i < stat_cnt; i++) {
1371 values[i] = value[dpaa2_xstats_strings[i].page_id].
1372 raw.counter[dpaa2_xstats_strings[i].stats_id];
1377 dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1379 for (i = 0; i < n; i++) {
1380 if (ids[i] >= stat_cnt) {
1381 DPAA2_PMD_ERR("xstats id value isn't valid");
1384 values[i] = values_copy[ids[i]];
1390 dpaa2_xstats_get_names_by_id(
1391 struct rte_eth_dev *dev,
1392 struct rte_eth_xstat_name *xstats_names,
1393 const uint64_t *ids,
1396 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1397 struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1400 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1402 dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1404 for (i = 0; i < limit; i++) {
1405 if (ids[i] >= stat_cnt) {
1406 DPAA2_PMD_ERR("xstats id value isn't valid");
1409 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1415 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1417 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1418 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1421 struct dpaa2_queue *dpaa2_q;
1423 PMD_INIT_FUNC_TRACE();
1426 DPAA2_PMD_ERR("dpni is NULL");
1430 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1434 /* Reset the per queue stats in dpaa2_queue structure */
1435 for (i = 0; i < priv->nb_rx_queues; i++) {
1436 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1438 dpaa2_q->rx_pkts = 0;
1441 for (i = 0; i < priv->nb_tx_queues; i++) {
1442 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1444 dpaa2_q->tx_pkts = 0;
1450 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1454 /* return 0 means link status changed, -1 means not changed */
1456 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1457 int wait_to_complete __rte_unused)
1460 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1461 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1462 struct rte_eth_link link;
1463 struct dpni_link_state state = {0};
1466 DPAA2_PMD_ERR("dpni is NULL");
1470 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1472 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1476 memset(&link, 0, sizeof(struct rte_eth_link));
1477 link.link_status = state.up;
1478 link.link_speed = state.rate;
1480 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1481 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1483 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1485 ret = rte_eth_linkstatus_set(dev, &link);
1487 DPAA2_PMD_DEBUG("No change in status");
1489 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1490 link.link_status ? "Up" : "Down");
1496 * Toggle the DPNI to enable, if not already enabled.
1497 * This is not strictly PHY up/down - it is more of logical toggling.
1500 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1503 struct dpaa2_dev_priv *priv;
1504 struct fsl_mc_io *dpni;
1506 struct dpni_link_state state = {0};
1508 priv = dev->data->dev_private;
1509 dpni = (struct fsl_mc_io *)priv->hw;
1512 DPAA2_PMD_ERR("dpni is NULL");
1516 /* Check if DPNI is currently enabled */
1517 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1519 /* Unable to obtain dpni status; Not continuing */
1520 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1524 /* Enable link if not already enabled */
1526 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1528 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1532 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1534 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1538 /* changing tx burst function to start enqueues */
1539 dev->tx_pkt_burst = dpaa2_dev_tx;
1540 dev->data->dev_link.link_status = state.up;
1543 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1545 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1550 * Toggle the DPNI to disable, if not already disabled.
1551 * This is not strictly PHY up/down - it is more of logical toggling.
1554 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1557 struct dpaa2_dev_priv *priv;
1558 struct fsl_mc_io *dpni;
1559 int dpni_enabled = 0;
1562 PMD_INIT_FUNC_TRACE();
1564 priv = dev->data->dev_private;
1565 dpni = (struct fsl_mc_io *)priv->hw;
1568 DPAA2_PMD_ERR("Device has not yet been configured");
1572 /*changing tx burst function to avoid any more enqueues */
1573 dev->tx_pkt_burst = dummy_dev_tx;
1575 /* Loop while dpni_disable() attempts to drain the egress FQs
1576 * and confirm them back to us.
1579 ret = dpni_disable(dpni, 0, priv->token);
1581 DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1584 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1586 DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1590 /* Allow the MC some slack */
1591 rte_delay_us(100 * 1000);
1592 } while (dpni_enabled && --retries);
1595 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1596 /* todo- we may have to manually cleanup queues.
1599 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1600 dev->data->port_id);
1603 dev->data->dev_link.link_status = 0;
1609 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1612 struct dpaa2_dev_priv *priv;
1613 struct fsl_mc_io *dpni;
1614 struct dpni_link_state state = {0};
1616 PMD_INIT_FUNC_TRACE();
1618 priv = dev->data->dev_private;
1619 dpni = (struct fsl_mc_io *)priv->hw;
1621 if (dpni == NULL || fc_conf == NULL) {
1622 DPAA2_PMD_ERR("device not configured");
1626 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1628 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1632 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1633 if (state.options & DPNI_LINK_OPT_PAUSE) {
1634 /* DPNI_LINK_OPT_PAUSE set
1635 * if ASYM_PAUSE not set,
1636 * RX Side flow control (handle received Pause frame)
1637 * TX side flow control (send Pause frame)
1638 * if ASYM_PAUSE set,
1639 * RX Side flow control (handle received Pause frame)
1640 * No TX side flow control (send Pause frame disabled)
1642 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1643 fc_conf->mode = RTE_FC_FULL;
1645 fc_conf->mode = RTE_FC_RX_PAUSE;
1647 /* DPNI_LINK_OPT_PAUSE not set
1648 * if ASYM_PAUSE set,
1649 * TX side flow control (send Pause frame)
1650 * No RX side flow control (No action on pause frame rx)
1651 * if ASYM_PAUSE not set,
1652 * Flow control disabled
1654 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1655 fc_conf->mode = RTE_FC_TX_PAUSE;
1657 fc_conf->mode = RTE_FC_NONE;
1664 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1667 struct dpaa2_dev_priv *priv;
1668 struct fsl_mc_io *dpni;
1669 struct dpni_link_state state = {0};
1670 struct dpni_link_cfg cfg = {0};
1672 PMD_INIT_FUNC_TRACE();
1674 priv = dev->data->dev_private;
1675 dpni = (struct fsl_mc_io *)priv->hw;
1678 DPAA2_PMD_ERR("dpni is NULL");
1682 /* It is necessary to obtain the current state before setting fc_conf
1683 * as MC would return error in case rate, autoneg or duplex values are
1686 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1688 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1692 /* Disable link before setting configuration */
1693 dpaa2_dev_set_link_down(dev);
1695 /* Based on fc_conf, update cfg */
1696 cfg.rate = state.rate;
1697 cfg.options = state.options;
1699 /* update cfg with fc_conf */
1700 switch (fc_conf->mode) {
1702 /* Full flow control;
1703 * OPT_PAUSE set, ASYM_PAUSE not set
1705 cfg.options |= DPNI_LINK_OPT_PAUSE;
1706 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1708 case RTE_FC_TX_PAUSE:
1709 /* Enable RX flow control
1710 * OPT_PAUSE not set;
1713 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1714 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1716 case RTE_FC_RX_PAUSE:
1717 /* Enable TX Flow control
1721 cfg.options |= DPNI_LINK_OPT_PAUSE;
1722 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1725 /* Disable Flow control
1727 * ASYM_PAUSE not set
1729 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1730 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1733 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1738 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1740 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1744 dpaa2_dev_set_link_up(dev);
1750 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1751 struct rte_eth_rss_conf *rss_conf)
1753 struct rte_eth_dev_data *data = dev->data;
1754 struct rte_eth_conf *eth_conf = &data->dev_conf;
1757 PMD_INIT_FUNC_TRACE();
1759 if (rss_conf->rss_hf) {
1760 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1762 DPAA2_PMD_ERR("Unable to set flow dist");
1766 ret = dpaa2_remove_flow_dist(dev, 0);
1768 DPAA2_PMD_ERR("Unable to remove flow dist");
1772 eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1777 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1778 struct rte_eth_rss_conf *rss_conf)
1780 struct rte_eth_dev_data *data = dev->data;
1781 struct rte_eth_conf *eth_conf = &data->dev_conf;
1783 /* dpaa2 does not support rss_key, so length should be 0*/
1784 rss_conf->rss_key_len = 0;
1785 rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1789 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
1790 int eth_rx_queue_id,
1792 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
1794 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1795 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1796 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1797 uint8_t flow_id = dpaa2_ethq->flow_id;
1798 struct dpni_queue cfg;
1802 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
1803 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
1804 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
1805 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
1806 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
1807 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
1811 memset(&cfg, 0, sizeof(struct dpni_queue));
1812 options = DPNI_QUEUE_OPT_DEST;
1813 cfg.destination.type = DPNI_DEST_DPCON;
1814 cfg.destination.id = dpcon_id;
1815 cfg.destination.priority = queue_conf->ev.priority;
1817 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
1818 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
1819 cfg.destination.hold_active = 1;
1822 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
1823 !eth_priv->en_ordered) {
1824 struct opr_cfg ocfg;
1826 /* Restoration window size = 256 frames */
1828 /* Restoration window size = 512 frames for LX2 */
1829 if (dpaa2_svr_family == SVR_LX2160A)
1831 /* Auto advance NESN window enabled */
1833 /* Late arrival window size disabled */
1835 /* ORL resource exhaustaion advance NESN disabled */
1837 /* Loose ordering enabled */
1839 eth_priv->en_loose_ordered = 1;
1840 /* Strict ordering enabled if explicitly set */
1841 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
1843 eth_priv->en_loose_ordered = 0;
1846 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
1847 dpaa2_ethq->tc_index, flow_id,
1848 OPR_OPT_CREATE, &ocfg);
1850 DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
1854 eth_priv->en_ordered = 1;
1857 options |= DPNI_QUEUE_OPT_USER_CTX;
1858 cfg.user_context = (size_t)(dpaa2_ethq);
1860 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1861 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1863 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1867 memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
1872 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
1873 int eth_rx_queue_id)
1875 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1876 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1877 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1878 uint8_t flow_id = dpaa2_ethq->flow_id;
1879 struct dpni_queue cfg;
1883 memset(&cfg, 0, sizeof(struct dpni_queue));
1884 options = DPNI_QUEUE_OPT_DEST;
1885 cfg.destination.type = DPNI_DEST_NONE;
1887 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1888 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1890 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1895 static struct eth_dev_ops dpaa2_ethdev_ops = {
1896 .dev_configure = dpaa2_eth_dev_configure,
1897 .dev_start = dpaa2_dev_start,
1898 .dev_stop = dpaa2_dev_stop,
1899 .dev_close = dpaa2_dev_close,
1900 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
1901 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
1902 .allmulticast_enable = dpaa2_dev_allmulticast_enable,
1903 .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1904 .dev_set_link_up = dpaa2_dev_set_link_up,
1905 .dev_set_link_down = dpaa2_dev_set_link_down,
1906 .link_update = dpaa2_dev_link_update,
1907 .stats_get = dpaa2_dev_stats_get,
1908 .xstats_get = dpaa2_dev_xstats_get,
1909 .xstats_get_by_id = dpaa2_xstats_get_by_id,
1910 .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
1911 .xstats_get_names = dpaa2_xstats_get_names,
1912 .stats_reset = dpaa2_dev_stats_reset,
1913 .xstats_reset = dpaa2_dev_stats_reset,
1914 .fw_version_get = dpaa2_fw_version_get,
1915 .dev_infos_get = dpaa2_dev_info_get,
1916 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1917 .mtu_set = dpaa2_dev_mtu_set,
1918 .vlan_filter_set = dpaa2_vlan_filter_set,
1919 .vlan_offload_set = dpaa2_vlan_offload_set,
1920 .vlan_tpid_set = dpaa2_vlan_tpid_set,
1921 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
1922 .rx_queue_release = dpaa2_dev_rx_queue_release,
1923 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
1924 .tx_queue_release = dpaa2_dev_tx_queue_release,
1925 .rx_queue_count = dpaa2_dev_rx_queue_count,
1926 .flow_ctrl_get = dpaa2_flow_ctrl_get,
1927 .flow_ctrl_set = dpaa2_flow_ctrl_set,
1928 .mac_addr_add = dpaa2_dev_add_mac_addr,
1929 .mac_addr_remove = dpaa2_dev_remove_mac_addr,
1930 .mac_addr_set = dpaa2_dev_set_mac_addr,
1931 .rss_hash_update = dpaa2_dev_rss_hash_update,
1932 .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
1935 /* Populate the mac address from physically available (u-boot/firmware) and/or
1936 * one set by higher layers like MC (restool) etc.
1937 * Returns the table of MAC entries (multiple entries)
1940 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
1941 struct ether_addr *mac_entry)
1944 struct ether_addr phy_mac, prime_mac;
1946 memset(&phy_mac, 0, sizeof(struct ether_addr));
1947 memset(&prime_mac, 0, sizeof(struct ether_addr));
1949 /* Get the physical device MAC address */
1950 ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
1951 phy_mac.addr_bytes);
1953 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
1957 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
1958 prime_mac.addr_bytes);
1960 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
1964 /* Now that both MAC have been obtained, do:
1965 * if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
1967 * If empty_mac(phy), return prime.
1968 * if both are empty, create random MAC, set as prime and return
1970 if (!is_zero_ether_addr(&phy_mac)) {
1971 /* If the addresses are not same, overwrite prime */
1972 if (!is_same_ether_addr(&phy_mac, &prime_mac)) {
1973 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1975 phy_mac.addr_bytes);
1977 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
1981 memcpy(&prime_mac, &phy_mac, sizeof(struct ether_addr));
1983 } else if (is_zero_ether_addr(&prime_mac)) {
1984 /* In case phys and prime, both are zero, create random MAC */
1985 eth_random_addr(prime_mac.addr_bytes);
1986 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1988 prime_mac.addr_bytes);
1990 DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
1995 /* prime_mac the final MAC address */
1996 memcpy(mac_entry, &prime_mac, sizeof(struct ether_addr));
2004 check_devargs_handler(__rte_unused const char *key, const char *value,
2005 __rte_unused void *opaque)
2007 if (strcmp(value, "1"))
2014 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2016 struct rte_kvargs *kvlist;
2021 kvlist = rte_kvargs_parse(devargs->args, NULL);
2025 if (!rte_kvargs_count(kvlist, key)) {
2026 rte_kvargs_free(kvlist);
2030 if (rte_kvargs_process(kvlist, key,
2031 check_devargs_handler, NULL) < 0) {
2032 rte_kvargs_free(kvlist);
2035 rte_kvargs_free(kvlist);
2041 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2043 struct rte_device *dev = eth_dev->device;
2044 struct rte_dpaa2_device *dpaa2_dev;
2045 struct fsl_mc_io *dpni_dev;
2046 struct dpni_attr attr;
2047 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2048 struct dpni_buffer_layout layout;
2051 PMD_INIT_FUNC_TRACE();
2053 /* For secondary processes, the primary has done all the work */
2054 if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2055 /* In case of secondary, only burst and ops API need to be
2058 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2059 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2060 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2062 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2063 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2067 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2069 hw_id = dpaa2_dev->object_id;
2071 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2073 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2077 dpni_dev->regs = rte_mcp_ptr_list[0];
2078 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2081 "Failure in opening dpni@%d with err code %d",
2087 /* Clean the device first */
2088 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2090 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2095 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2098 "Failure in get dpni@%d attribute, err code %d",
2103 priv->num_rx_tc = attr.num_rx_tcs;
2105 /* Resetting the "num_rx_queues" to equal number of queues in first TC
2106 * as only one TC is supported on Rx Side. Once Multiple TCs will be
2107 * in use for Rx processing then this will be changed or removed.
2109 priv->nb_rx_queues = attr.num_queues;
2111 /* Using number of TX queues as number of TX TCs */
2112 priv->nb_tx_queues = attr.num_tx_tcs;
2114 DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
2115 priv->num_rx_tc, priv->nb_rx_queues,
2116 priv->nb_tx_queues);
2118 priv->hw = dpni_dev;
2119 priv->hw_id = hw_id;
2120 priv->options = attr.options;
2121 priv->max_mac_filters = attr.mac_filter_entries;
2122 priv->max_vlan_filters = attr.vlan_filter_entries;
2125 /* Allocate memory for hardware structure for queues */
2126 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2128 DPAA2_PMD_ERR("Queue allocation Failed");
2132 /* Allocate memory for storing MAC addresses.
2133 * Table of mac_filter_entries size is allocated so that RTE ether lib
2134 * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2136 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2137 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2138 if (eth_dev->data->mac_addrs == NULL) {
2140 "Failed to allocate %d bytes needed to store MAC addresses",
2141 ETHER_ADDR_LEN * attr.mac_filter_entries);
2146 ret = populate_mac_addr(dpni_dev, priv, ð_dev->data->mac_addrs[0]);
2148 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2149 rte_free(eth_dev->data->mac_addrs);
2150 eth_dev->data->mac_addrs = NULL;
2154 /* ... tx buffer layout ... */
2155 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2156 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2157 layout.pass_frame_status = 1;
2158 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2159 DPNI_QUEUE_TX, &layout);
2161 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2165 /* ... tx-conf and error buffer layout ... */
2166 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2167 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2168 layout.pass_frame_status = 1;
2169 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2170 DPNI_QUEUE_TX_CONFIRM, &layout);
2172 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2177 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2179 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2180 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2181 DPAA2_PMD_INFO("Loopback mode");
2183 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2185 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2187 RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2190 dpaa2_dev_uninit(eth_dev);
2195 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2197 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2198 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
2201 PMD_INIT_FUNC_TRACE();
2203 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2207 DPAA2_PMD_WARN("Already closed or not started");
2211 dpaa2_dev_close(eth_dev);
2213 dpaa2_free_rx_tx_queues(eth_dev);
2215 /* Close the device at underlying layer*/
2216 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2219 "Failure closing dpni device with err code %d",
2223 /* Free the allocated memory for ethernet private data and dpni*/
2227 eth_dev->dev_ops = NULL;
2228 eth_dev->rx_pkt_burst = NULL;
2229 eth_dev->tx_pkt_burst = NULL;
2231 DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2236 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2237 struct rte_dpaa2_device *dpaa2_dev)
2239 struct rte_eth_dev *eth_dev;
2242 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2243 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2246 eth_dev->data->dev_private = rte_zmalloc(
2247 "ethdev private structure",
2248 sizeof(struct dpaa2_dev_priv),
2249 RTE_CACHE_LINE_SIZE);
2250 if (eth_dev->data->dev_private == NULL) {
2252 "Unable to allocate memory for private data");
2253 rte_eth_dev_release_port(eth_dev);
2257 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2262 eth_dev->device = &dpaa2_dev->device;
2264 dpaa2_dev->eth_dev = eth_dev;
2265 eth_dev->data->rx_mbuf_alloc_failed = 0;
2267 if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2268 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2270 /* Invoke PMD device initialization function */
2271 diag = dpaa2_dev_init(eth_dev);
2273 rte_eth_dev_probing_finish(eth_dev);
2277 rte_eth_dev_release_port(eth_dev);
2282 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2284 struct rte_eth_dev *eth_dev;
2286 eth_dev = dpaa2_dev->eth_dev;
2287 dpaa2_dev_uninit(eth_dev);
2289 rte_eth_dev_release_port(eth_dev);
2294 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2295 .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2296 .drv_type = DPAA2_ETH,
2297 .probe = rte_dpaa2_probe,
2298 .remove = rte_dpaa2_remove,
2301 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2302 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2303 DRIVER_LOOPBACK_MODE "=<int>");
2304 RTE_INIT(dpaa2_pmd_init_log)
2306 dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2307 if (dpaa2_logtype_pmd >= 0)
2308 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);