drivers/net/dpaa2/dpaa2_ethdev.c

   1 /* * SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016 NXP
   5  *
   6  */
   7
   8 #include <time.h>
   9 #include <net/if.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_malloc.h>
  14 #include <rte_memcpy.h>
  15 #include <rte_string_fns.h>
  16 #include <rte_cycles.h>
  17 #include <rte_kvargs.h>
  18 #include <rte_dev.h>
  19 #include <rte_fslmc.h>
  20 #include <rte_flow_driver.h>
  21
  22 #include "dpaa2_pmd_logs.h"
  23 #include <fslmc_vfio.h>
  24 #include <dpaa2_hw_pvt.h>
  25 #include <dpaa2_hw_mempool.h>
  26 #include <dpaa2_hw_dpio.h>
  27 #include <mc/fsl_dpmng.h>
  28 #include "dpaa2_ethdev.h"
  29 #include "dpaa2_sparser.h"
  30 #include <fsl_qbman_debug.h>
  31
  32 #define DRIVER_LOOPBACK_MODE "drv_loopback"
  33 #define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
  34
  35 /* Supported Rx offloads */
  36 static uint64_t dev_rx_offloads_sup =
  37                 DEV_RX_OFFLOAD_CHECKSUM |
  38                 DEV_RX_OFFLOAD_SCTP_CKSUM |
  39                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  40                 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
  41                 DEV_RX_OFFLOAD_VLAN_STRIP |
  42                 DEV_RX_OFFLOAD_VLAN_FILTER |
  43                 DEV_RX_OFFLOAD_JUMBO_FRAME |
  44                 DEV_RX_OFFLOAD_TIMESTAMP;
  45
  46 /* Rx offloads which cannot be disabled */
  47 static uint64_t dev_rx_offloads_nodis =
  48                 DEV_RX_OFFLOAD_RSS_HASH |
  49                 DEV_RX_OFFLOAD_SCATTER;
  50
  51 /* Supported Tx offloads */
  52 static uint64_t dev_tx_offloads_sup =
  53                 DEV_TX_OFFLOAD_VLAN_INSERT |
  54                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  55                 DEV_TX_OFFLOAD_UDP_CKSUM |
  56                 DEV_TX_OFFLOAD_TCP_CKSUM |
  57                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  58                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  59                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  60                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  61
  62 /* Tx offloads which cannot be disabled */
  63 static uint64_t dev_tx_offloads_nodis =
  64                 DEV_TX_OFFLOAD_MULTI_SEGS;
  65
  66 /* enable timestamp in mbuf */
  67 enum pmd_dpaa2_ts dpaa2_enable_ts;
  68
  69 struct rte_dpaa2_xstats_name_off {
  70         char name[RTE_ETH_XSTATS_NAME_SIZE];
  71         uint8_t page_id; /* dpni statistics page id */
  72         uint8_t stats_id; /* stats id in the given page */
  73 };
  74
  75 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
  76         {"ingress_multicast_frames", 0, 2},
  77         {"ingress_multicast_bytes", 0, 3},
  78         {"ingress_broadcast_frames", 0, 4},
  79         {"ingress_broadcast_bytes", 0, 5},
  80         {"egress_multicast_frames", 1, 2},
  81         {"egress_multicast_bytes", 1, 3},
  82         {"egress_broadcast_frames", 1, 4},
  83         {"egress_broadcast_bytes", 1, 5},
  84         {"ingress_filtered_frames", 2, 0},
  85         {"ingress_discarded_frames", 2, 1},
  86         {"ingress_nobuffer_discards", 2, 2},
  87         {"egress_discarded_frames", 2, 3},
  88         {"egress_confirmed_frames", 2, 4},
  89         {"cgr_reject_frames", 4, 0},
  90         {"cgr_reject_bytes", 4, 1},
  91 };
  92
  93 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
  94         RTE_ETH_FILTER_ADD,
  95         RTE_ETH_FILTER_DELETE,
  96         RTE_ETH_FILTER_UPDATE,
  97         RTE_ETH_FILTER_FLUSH,
  98         RTE_ETH_FILTER_GET
  99 };
 100
 101 static struct rte_dpaa2_driver rte_dpaa2_pmd;
 102 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
 103 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
 104                                  int wait_to_complete);
 105 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
 106 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
 107 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 108
 109 int dpaa2_logtype_pmd;
 110
 111 void
 112 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
 113 {
 114         dpaa2_enable_ts = enable;
 115 }
 116
 117 static int
 118 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 119 {
 120         int ret;
 121         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 122         struct fsl_mc_io *dpni = dev->process_private;
 123
 124         PMD_INIT_FUNC_TRACE();
 125
 126         if (dpni == NULL) {
 127                 DPAA2_PMD_ERR("dpni is NULL");
 128                 return -1;
 129         }
 130
 131         if (on)
 132                 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW, priv->token,
 133                                        vlan_id, 0, 0, 0);
 134         else
 135                 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
 136                                           priv->token, vlan_id);
 137
 138         if (ret < 0)
 139                 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
 140                               ret, vlan_id, priv->hw_id);
 141
 142         return ret;
 143 }
 144
 145 static int
 146 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 147 {
 148         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 149         struct fsl_mc_io *dpni = dev->process_private;
 150         int ret;
 151
 152         PMD_INIT_FUNC_TRACE();
 153
 154         if (mask & ETH_VLAN_FILTER_MASK) {
 155                 /* VLAN Filter not avaialble */
 156                 if (!priv->max_vlan_filters) {
 157                         DPAA2_PMD_INFO("VLAN filter not available");
 158                         goto next_mask;
 159                 }
 160
 161                 if (dev->data->dev_conf.rxmode.offloads &
 162                         DEV_RX_OFFLOAD_VLAN_FILTER)
 163                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 164                                                       priv->token, true);
 165                 else
 166                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 167                                                       priv->token, false);
 168                 if (ret < 0)
 169                         DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
 170         }
 171 next_mask:
 172         if (mask & ETH_VLAN_EXTEND_MASK) {
 173                 if (dev->data->dev_conf.rxmode.offloads &
 174                         DEV_RX_OFFLOAD_VLAN_EXTEND)
 175                         DPAA2_PMD_INFO("VLAN extend offload not supported");
 176         }
 177
 178         return 0;
 179 }
 180
 181 static int
 182 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 183                       enum rte_vlan_type vlan_type __rte_unused,
 184                       uint16_t tpid)
 185 {
 186         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 187         struct fsl_mc_io *dpni = dev->process_private;
 188         int ret = -ENOTSUP;
 189
 190         PMD_INIT_FUNC_TRACE();
 191
 192         /* nothing to be done for standard vlan tpids */
 193         if (tpid == 0x8100 || tpid == 0x88A8)
 194                 return 0;
 195
 196         ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 197                                    priv->token, tpid);
 198         if (ret < 0)
 199                 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
 200         /* if already configured tpids, remove them first */
 201         if (ret == -EBUSY) {
 202                 struct dpni_custom_tpid_cfg tpid_list = {0};
 203
 204                 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
 205                                    priv->token, &tpid_list);
 206                 if (ret < 0)
 207                         goto fail;
 208                 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
 209                                    priv->token, tpid_list.tpid1);
 210                 if (ret < 0)
 211                         goto fail;
 212                 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 213                                            priv->token, tpid);
 214         }
 215 fail:
 216         return ret;
 217 }
 218
 219 static int
 220 dpaa2_fw_version_get(struct rte_eth_dev *dev,
 221                      char *fw_version,
 222                      size_t fw_size)
 223 {
 224         int ret;
 225         struct fsl_mc_io *dpni = dev->process_private;
 226         struct mc_soc_version mc_plat_info = {0};
 227         struct mc_version mc_ver_info = {0};
 228
 229         PMD_INIT_FUNC_TRACE();
 230
 231         if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
 232                 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
 233
 234         if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
 235                 DPAA2_PMD_WARN("\tmc_get_version failed");
 236
 237         ret = snprintf(fw_version, fw_size,
 238                        "%x-%d.%d.%d",
 239                        mc_plat_info.svr,
 240                        mc_ver_info.major,
 241                        mc_ver_info.minor,
 242                        mc_ver_info.revision);
 243
 244         ret += 1; /* add the size of '\0' */
 245         if (fw_size < (uint32_t)ret)
 246                 return ret;
 247         else
 248                 return 0;
 249 }
 250
 251 static int
 252 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 253 {
 254         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 255
 256         PMD_INIT_FUNC_TRACE();
 257
 258         dev_info->if_index = priv->hw_id;
 259
 260         dev_info->max_mac_addrs = priv->max_mac_filters;
 261         dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
 262         dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 263         dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 264         dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
 265         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 266                                         dev_rx_offloads_nodis;
 267         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 268                                         dev_tx_offloads_nodis;
 269         dev_info->speed_capa = ETH_LINK_SPEED_1G |
 270                         ETH_LINK_SPEED_2_5G |
 271                         ETH_LINK_SPEED_10G;
 272
 273         dev_info->max_hash_mac_addrs = 0;
 274         dev_info->max_vfs = 0;
 275         dev_info->max_vmdq_pools = ETH_16_POOLS;
 276         dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
 277
 278         dev_info->default_rxportconf.burst_size = dpaa2_dqrr_size;
 279         /* same is rx size for best perf */
 280         dev_info->default_txportconf.burst_size = dpaa2_dqrr_size;
 281
 282         dev_info->default_rxportconf.nb_queues = 1;
 283         dev_info->default_txportconf.nb_queues = 1;
 284         dev_info->default_txportconf.ring_size = CONG_ENTER_TX_THRESHOLD;
 285         dev_info->default_rxportconf.ring_size = DPAA2_RX_DEFAULT_NBDESC;
 286
 287         return 0;
 288 }
 289
 290 static int
 291 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 292 {
 293         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 294         uint16_t dist_idx;
 295         uint32_t vq_id;
 296         uint8_t num_rxqueue_per_tc;
 297         struct dpaa2_queue *mc_q, *mcq;
 298         uint32_t tot_queues;
 299         int i;
 300         struct dpaa2_queue *dpaa2_q;
 301
 302         PMD_INIT_FUNC_TRACE();
 303
 304         num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
 305         if (priv->tx_conf_en)
 306                 tot_queues = priv->nb_rx_queues + 2 * priv->nb_tx_queues;
 307         else
 308                 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 309         mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 310                           RTE_CACHE_LINE_SIZE);
 311         if (!mc_q) {
 312                 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
 313                 return -1;
 314         }
 315
 316         for (i = 0; i < priv->nb_rx_queues; i++) {
 317                 mc_q->eth_data = dev->data;
 318                 priv->rx_vq[i] = mc_q++;
 319                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 320                 dpaa2_q->q_storage = rte_malloc("dq_storage",
 321                                         sizeof(struct queue_storage_info_t),
 322                                         RTE_CACHE_LINE_SIZE);
 323                 if (!dpaa2_q->q_storage)
 324                         goto fail;
 325
 326                 memset(dpaa2_q->q_storage, 0,
 327                        sizeof(struct queue_storage_info_t));
 328                 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 329                         goto fail;
 330         }
 331
 332         for (i = 0; i < priv->nb_tx_queues; i++) {
 333                 mc_q->eth_data = dev->data;
 334                 mc_q->flow_id = 0xffff;
 335                 priv->tx_vq[i] = mc_q++;
 336                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 337                 dpaa2_q->cscn = rte_malloc(NULL,
 338                                            sizeof(struct qbman_result), 16);
 339                 if (!dpaa2_q->cscn)
 340                         goto fail_tx;
 341         }
 342
 343         if (priv->tx_conf_en) {
 344                 /*Setup tx confirmation queues*/
 345                 for (i = 0; i < priv->nb_tx_queues; i++) {
 346                         mc_q->eth_data = dev->data;
 347                         mc_q->tc_index = i;
 348                         mc_q->flow_id = 0;
 349                         priv->tx_conf_vq[i] = mc_q++;
 350                         dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 351                         dpaa2_q->q_storage =
 352                                 rte_malloc("dq_storage",
 353                                         sizeof(struct queue_storage_info_t),
 354                                         RTE_CACHE_LINE_SIZE);
 355                         if (!dpaa2_q->q_storage)
 356                                 goto fail_tx_conf;
 357
 358                         memset(dpaa2_q->q_storage, 0,
 359                                sizeof(struct queue_storage_info_t));
 360                         if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 361                                 goto fail_tx_conf;
 362                 }
 363         }
 364
 365         vq_id = 0;
 366         for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 367                 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
 368                 mcq->tc_index = dist_idx / num_rxqueue_per_tc;
 369                 mcq->flow_id = dist_idx % num_rxqueue_per_tc;
 370                 vq_id++;
 371         }
 372
 373         return 0;
 374 fail_tx_conf:
 375         i -= 1;
 376         while (i >= 0) {
 377                 dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
 378                 rte_free(dpaa2_q->q_storage);
 379                 priv->tx_conf_vq[i--] = NULL;
 380         }
 381         i = priv->nb_tx_queues;
 382 fail_tx:
 383         i -= 1;
 384         while (i >= 0) {
 385                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 386                 rte_free(dpaa2_q->cscn);
 387                 priv->tx_vq[i--] = NULL;
 388         }
 389         i = priv->nb_rx_queues;
 390 fail:
 391         i -= 1;
 392         mc_q = priv->rx_vq[0];
 393         while (i >= 0) {
 394                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 395                 dpaa2_free_dq_storage(dpaa2_q->q_storage);
 396                 rte_free(dpaa2_q->q_storage);
 397                 priv->rx_vq[i--] = NULL;
 398         }
 399         rte_free(mc_q);
 400         return -1;
 401 }
 402
 403 static void
 404 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 405 {
 406         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 407         struct dpaa2_queue *dpaa2_q;
 408         int i;
 409
 410         PMD_INIT_FUNC_TRACE();
 411
 412         /* Queue allocation base */
 413         if (priv->rx_vq[0]) {
 414                 /* cleaning up queue storage */
 415                 for (i = 0; i < priv->nb_rx_queues; i++) {
 416                         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 417                         if (dpaa2_q->q_storage)
 418                                 rte_free(dpaa2_q->q_storage);
 419                 }
 420                 /* cleanup tx queue cscn */
 421                 for (i = 0; i < priv->nb_tx_queues; i++) {
 422                         dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 423                         rte_free(dpaa2_q->cscn);
 424                 }
 425                 if (priv->tx_conf_en) {
 426                         /* cleanup tx conf queue storage */
 427                         for (i = 0; i < priv->nb_tx_queues; i++) {
 428                                 dpaa2_q = (struct dpaa2_queue *)
 429                                                 priv->tx_conf_vq[i];
 430                                 rte_free(dpaa2_q->q_storage);
 431                         }
 432                 }
 433                 /*free memory for all queues (RX+TX) */
 434                 rte_free(priv->rx_vq[0]);
 435                 priv->rx_vq[0] = NULL;
 436         }
 437 }
 438
 439 static int
 440 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 441 {
 442         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 443         struct fsl_mc_io *dpni = dev->process_private;
 444         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 445         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 446         uint64_t tx_offloads = eth_conf->txmode.offloads;
 447         int rx_l3_csum_offload = false;
 448         int rx_l4_csum_offload = false;
 449         int tx_l3_csum_offload = false;
 450         int tx_l4_csum_offload = false;
 451         int ret;
 452
 453         PMD_INIT_FUNC_TRACE();
 454
 455         /* Rx offloads which are enabled by default */
 456         if (dev_rx_offloads_nodis & ~rx_offloads) {
 457                 DPAA2_PMD_INFO(
 458                 "Some of rx offloads enabled by default - requested 0x%" PRIx64
 459                 " fixed are 0x%" PRIx64,
 460                 rx_offloads, dev_rx_offloads_nodis);
 461         }
 462
 463         /* Tx offloads which are enabled by default */
 464         if (dev_tx_offloads_nodis & ~tx_offloads) {
 465                 DPAA2_PMD_INFO(
 466                 "Some of tx offloads enabled by default - requested 0x%" PRIx64
 467                 " fixed are 0x%" PRIx64,
 468                 tx_offloads, dev_tx_offloads_nodis);
 469         }
 470
 471         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 472                 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 473                         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
 474                                 priv->token, eth_conf->rxmode.max_rx_pkt_len
 475                                 - RTE_ETHER_CRC_LEN);
 476                         if (ret) {
 477                                 DPAA2_PMD_ERR(
 478                                         "Unable to set mtu. check config");
 479                                 return ret;
 480                         }
 481                         dev->data->mtu =
 482                                 dev->data->dev_conf.rxmode.max_rx_pkt_len -
 483                                 RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
 484                                 VLAN_TAG_SIZE;
 485                 } else {
 486                         return -1;
 487                 }
 488         }
 489
 490         if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
 491                 ret = dpaa2_setup_flow_dist(dev,
 492                                 eth_conf->rx_adv_conf.rss_conf.rss_hf);
 493                 if (ret) {
 494                         DPAA2_PMD_ERR("Unable to set flow distribution."
 495                                       "Check queue config");
 496                         return ret;
 497                 }
 498         }
 499
 500         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 501                 rx_l3_csum_offload = true;
 502
 503         if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
 504                 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
 505                 (rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 506                 rx_l4_csum_offload = true;
 507
 508         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 509                                DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
 510         if (ret) {
 511                 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
 512                 return ret;
 513         }
 514
 515         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 516                                DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
 517         if (ret) {
 518                 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
 519                 return ret;
 520         }
 521
 522         if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
 523                 dpaa2_enable_ts = true;
 524
 525         if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 526                 tx_l3_csum_offload = true;
 527
 528         if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
 529                 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
 530                 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
 531                 tx_l4_csum_offload = true;
 532
 533         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 534                                DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
 535         if (ret) {
 536                 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
 537                 return ret;
 538         }
 539
 540         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 541                                DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
 542         if (ret) {
 543                 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
 544                 return ret;
 545         }
 546
 547         /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
 548          * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
 549          * to 0 for LS2 in the hardware thus disabling data/annotation
 550          * stashing. For LX2 this is fixed in hardware and thus hash result and
 551          * parse results can be received in FD using this option.
 552          */
 553         if (dpaa2_svr_family == SVR_LX2160A) {
 554                 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 555                                        DPNI_FLCTYPE_HASH, true);
 556                 if (ret) {
 557                         DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
 558                         return ret;
 559                 }
 560         }
 561
 562         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 563                 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
 564
 565         return 0;
 566 }
 567
 568 /* Function to setup RX flow information. It contains traffic class ID,
 569  * flow ID, destination configuration etc.
 570  */
 571 static int
 572 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 573                          uint16_t rx_queue_id,
 574                          uint16_t nb_rx_desc,
 575                          unsigned int socket_id __rte_unused,
 576                          const struct rte_eth_rxconf *rx_conf __rte_unused,
 577                          struct rte_mempool *mb_pool)
 578 {
 579         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 580         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 581         struct dpaa2_queue *dpaa2_q;
 582         struct dpni_queue cfg;
 583         uint8_t options = 0;
 584         uint8_t flow_id;
 585         uint32_t bpid;
 586         int i, ret;
 587
 588         PMD_INIT_FUNC_TRACE();
 589
 590         DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
 591                         dev, rx_queue_id, mb_pool, rx_conf);
 592
 593         if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
 594                 bpid = mempool_to_bpid(mb_pool);
 595                 ret = dpaa2_attach_bp_list(priv,
 596                                            rte_dpaa2_bpid_info[bpid].bp_list);
 597                 if (ret)
 598                         return ret;
 599         }
 600         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 601         dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
 602         dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 603
 604         /*Get the flow id from given VQ id*/
 605         flow_id = dpaa2_q->flow_id;
 606         memset(&cfg, 0, sizeof(struct dpni_queue));
 607
 608         options = options | DPNI_QUEUE_OPT_USER_CTX;
 609         cfg.user_context = (size_t)(dpaa2_q);
 610
 611         /* check if a private cgr available. */
 612         for (i = 0; i < priv->max_cgs; i++) {
 613                 if (!priv->cgid_in_use[i]) {
 614                         priv->cgid_in_use[i] = 1;
 615                         break;
 616                 }
 617         }
 618
 619         if (i < priv->max_cgs) {
 620                 options |= DPNI_QUEUE_OPT_SET_CGID;
 621                 cfg.cgid = i;
 622                 dpaa2_q->cgid = cfg.cgid;
 623         } else {
 624                 dpaa2_q->cgid = 0xff;
 625         }
 626
 627         /*if ls2088 or rev2 device, enable the stashing */
 628
 629         if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
 630                 options |= DPNI_QUEUE_OPT_FLC;
 631                 cfg.flc.stash_control = true;
 632                 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
 633                 /* 00 00 00 - last 6 bit represent annotation, context stashing,
 634                  * data stashing setting 01 01 00 (0x14)
 635                  * (in following order ->DS AS CS)
 636                  * to enable 1 line data, 1 line annotation.
 637                  * For LX2, this setting should be 01 00 00 (0x10)
 638                  */
 639                 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
 640                         cfg.flc.value |= 0x10;
 641                 else
 642                         cfg.flc.value |= 0x14;
 643         }
 644         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 645                              dpaa2_q->tc_index, flow_id, options, &cfg);
 646         if (ret) {
 647                 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
 648                 return -1;
 649         }
 650
 651         if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
 652                 struct dpni_taildrop taildrop;
 653
 654                 taildrop.enable = 1;
 655
 656                 /* Private CGR will use tail drop length as nb_rx_desc.
 657                  * for rest cases we can use standard byte based tail drop.
 658                  * There is no HW restriction, but number of CGRs are limited,
 659                  * hence this restriction is placed.
 660                  */
 661                 if (dpaa2_q->cgid != 0xff) {
 662                         /*enabling per rx queue congestion control */
 663                         taildrop.threshold = nb_rx_desc;
 664                         taildrop.units = DPNI_CONGESTION_UNIT_FRAMES;
 665                         taildrop.oal = 0;
 666                         DPAA2_PMD_DEBUG("Enabling CG Tail Drop on queue = %d",
 667                                         rx_queue_id);
 668                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 669                                                 DPNI_CP_CONGESTION_GROUP,
 670                                                 DPNI_QUEUE_RX,
 671                                                 dpaa2_q->tc_index,
 672                                                 flow_id, &taildrop);
 673                 } else {
 674                         /*enabling per rx queue congestion control */
 675                         taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
 676                         taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
 677                         taildrop.oal = CONG_RX_OAL;
 678                         DPAA2_PMD_DEBUG("Enabling Byte based Drop on queue= %d",
 679                                         rx_queue_id);
 680                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 681                                                 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 682                                                 dpaa2_q->tc_index, flow_id,
 683                                                 &taildrop);
 684                 }
 685                 if (ret) {
 686                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 687                                       ret);
 688                         return -1;
 689                 }
 690         } else { /* Disable tail Drop */
 691                 struct dpni_taildrop taildrop = {0};
 692                 DPAA2_PMD_INFO("Tail drop is disabled on queue");
 693
 694                 taildrop.enable = 0;
 695                 if (dpaa2_q->cgid != 0xff) {
 696                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 697                                         DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
 698                                         dpaa2_q->tc_index,
 699                                         flow_id, &taildrop);
 700                 } else {
 701                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 702                                         DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 703                                         dpaa2_q->tc_index, flow_id, &taildrop);
 704                 }
 705                 if (ret) {
 706                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 707                                       ret);
 708                         return -1;
 709                 }
 710         }
 711
 712         dev->data->rx_queues[rx_queue_id] = dpaa2_q;
 713         return 0;
 714 }
 715
 716 static int
 717 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 718                          uint16_t tx_queue_id,
 719                          uint16_t nb_tx_desc __rte_unused,
 720                          unsigned int socket_id __rte_unused,
 721                          const struct rte_eth_txconf *tx_conf __rte_unused)
 722 {
 723         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 724         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 725                 priv->tx_vq[tx_queue_id];
 726         struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
 727                 priv->tx_conf_vq[tx_queue_id];
 728         struct fsl_mc_io *dpni = dev->process_private;
 729         struct dpni_queue tx_conf_cfg;
 730         struct dpni_queue tx_flow_cfg;
 731         uint8_t options = 0, flow_id;
 732         struct dpni_queue_id qid;
 733         uint32_t tc_id;
 734         int ret;
 735
 736         PMD_INIT_FUNC_TRACE();
 737
 738         /* Return if queue already configured */
 739         if (dpaa2_q->flow_id != 0xffff) {
 740                 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 741                 return 0;
 742         }
 743
 744         memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 745         memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 746
 747         tc_id = tx_queue_id;
 748         flow_id = 0;
 749
 750         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
 751                              tc_id, flow_id, options, &tx_flow_cfg);
 752         if (ret) {
 753                 DPAA2_PMD_ERR("Error in setting the tx flow: "
 754                               "tc_id=%d, flow=%d err=%d",
 755                               tc_id, flow_id, ret);
 756                         return -1;
 757         }
 758
 759         dpaa2_q->flow_id = flow_id;
 760
 761         if (tx_queue_id == 0) {
 762                 /*Set tx-conf and error configuration*/
 763                 if (priv->tx_conf_en)
 764                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 765                                                             priv->token,
 766                                                             DPNI_CONF_AFFINE);
 767                 else
 768                         ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 769                                                             priv->token,
 770                                                             DPNI_CONF_DISABLE);
 771                 if (ret) {
 772                         DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 773                                       "err=%d", ret);
 774                         return -1;
 775                 }
 776         }
 777         dpaa2_q->tc_index = tc_id;
 778
 779         ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 780                              DPNI_QUEUE_TX, dpaa2_q->tc_index,
 781                              dpaa2_q->flow_id, &tx_flow_cfg, &qid);
 782         if (ret) {
 783                 DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 784                 return -1;
 785         }
 786         dpaa2_q->fqid = qid.fqid;
 787
 788         if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 789                 struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 790
 791                 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 792                 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
 793                 /* Notify that the queue is not congested when the data in
 794                  * the queue is below this thershold.
 795                  */
 796                 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
 797                 cong_notif_cfg.message_ctx = 0;
 798                 cong_notif_cfg.message_iova =
 799                                 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
 800                 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
 801                 cong_notif_cfg.notification_mode =
 802                                          DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
 803                                          DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
 804                                          DPNI_CONG_OPT_COHERENT_WRITE;
 805                 cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
 806
 807                 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
 808                                                        priv->token,
 809                                                        DPNI_QUEUE_TX,
 810                                                        tc_id,
 811                                                        &cong_notif_cfg);
 812                 if (ret) {
 813                         DPAA2_PMD_ERR(
 814                            "Error in setting tx congestion notification: "
 815                            "err=%d", ret);
 816                         return -ret;
 817                 }
 818         }
 819         dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 820         dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 821
 822         if (priv->tx_conf_en) {
 823                 dpaa2_q->tx_conf_queue = dpaa2_tx_conf_q;
 824                 options = options | DPNI_QUEUE_OPT_USER_CTX;
 825                 tx_conf_cfg.user_context = (size_t)(dpaa2_q);
 826                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 827                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 828                              dpaa2_tx_conf_q->flow_id, options, &tx_conf_cfg);
 829                 if (ret) {
 830                         DPAA2_PMD_ERR("Error in setting the tx conf flow: "
 831                               "tc_index=%d, flow=%d err=%d",
 832                               dpaa2_tx_conf_q->tc_index,
 833                               dpaa2_tx_conf_q->flow_id, ret);
 834                         return -1;
 835                 }
 836
 837                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 838                              DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
 839                              dpaa2_tx_conf_q->flow_id, &tx_conf_cfg, &qid);
 840                 if (ret) {
 841                         DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 842                         return -1;
 843                 }
 844                 dpaa2_tx_conf_q->fqid = qid.fqid;
 845         }
 846         return 0;
 847 }
 848
 849 static void
 850 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 851 {
 852         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
 853         struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
 854         struct fsl_mc_io *dpni =
 855                 (struct fsl_mc_io *)priv->eth_dev->process_private;
 856         uint8_t options = 0;
 857         int ret;
 858         struct dpni_queue cfg;
 859
 860         memset(&cfg, 0, sizeof(struct dpni_queue));
 861         PMD_INIT_FUNC_TRACE();
 862         if (dpaa2_q->cgid != 0xff) {
 863                 options = DPNI_QUEUE_OPT_CLEAR_CGID;
 864                 cfg.cgid = dpaa2_q->cgid;
 865
 866                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 867                                      DPNI_QUEUE_RX,
 868                                      dpaa2_q->tc_index, dpaa2_q->flow_id,
 869                                      options, &cfg);
 870                 if (ret)
 871                         DPAA2_PMD_ERR("Unable to clear CGR from q=%u err=%d",
 872                                         dpaa2_q->fqid, ret);
 873                 priv->cgid_in_use[dpaa2_q->cgid] = 0;
 874                 dpaa2_q->cgid = 0xff;
 875         }
 876 }
 877
 878 static void
 879 dpaa2_dev_tx_queue_release(void *q __rte_unused)
 880 {
 881         PMD_INIT_FUNC_TRACE();
 882 }
 883
 884 static uint32_t
 885 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 886 {
 887         int32_t ret;
 888         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 889         struct dpaa2_queue *dpaa2_q;
 890         struct qbman_swp *swp;
 891         struct qbman_fq_query_np_rslt state;
 892         uint32_t frame_cnt = 0;
 893
 894         PMD_INIT_FUNC_TRACE();
 895
 896         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 897                 ret = dpaa2_affine_qbman_swp();
 898                 if (ret) {
 899                         DPAA2_PMD_ERR(
 900                                 "Failed to allocate IO portal, tid: %d\n",
 901                                 rte_gettid());
 902                         return -EINVAL;
 903                 }
 904         }
 905         swp = DPAA2_PER_LCORE_PORTAL;
 906
 907         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 908
 909         if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
 910                 frame_cnt = qbman_fq_state_frame_count(&state);
 911                 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
 912                                 rx_queue_id, frame_cnt);
 913         }
 914         return frame_cnt;
 915 }
 916
 917 static const uint32_t *
 918 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 919 {
 920         static const uint32_t ptypes[] = {
 921                 /*todo -= add more types */
 922                 RTE_PTYPE_L2_ETHER,
 923                 RTE_PTYPE_L3_IPV4,
 924                 RTE_PTYPE_L3_IPV4_EXT,
 925                 RTE_PTYPE_L3_IPV6,
 926                 RTE_PTYPE_L3_IPV6_EXT,
 927                 RTE_PTYPE_L4_TCP,
 928                 RTE_PTYPE_L4_UDP,
 929                 RTE_PTYPE_L4_SCTP,
 930                 RTE_PTYPE_L4_ICMP,
 931                 RTE_PTYPE_UNKNOWN
 932         };
 933
 934         if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
 935                 dev->rx_pkt_burst == dpaa2_dev_rx ||
 936                 dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 937                 return ptypes;
 938         return NULL;
 939 }
 940
 941 /**
 942  * Dpaa2 link Interrupt handler
 943  *
 944  * @param param
 945  *  The address of parameter (struct rte_eth_dev *) regsitered before.
 946  *
 947  * @return
 948  *  void
 949  */
 950 static void
 951 dpaa2_interrupt_handler(void *param)
 952 {
 953         struct rte_eth_dev *dev = param;
 954         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 955         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 956         int ret;
 957         int irq_index = DPNI_IRQ_INDEX;
 958         unsigned int status = 0, clear = 0;
 959
 960         PMD_INIT_FUNC_TRACE();
 961
 962         if (dpni == NULL) {
 963                 DPAA2_PMD_ERR("dpni is NULL");
 964                 return;
 965         }
 966
 967         ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
 968                                   irq_index, &status);
 969         if (unlikely(ret)) {
 970                 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
 971                 clear = 0xffffffff;
 972                 goto out;
 973         }
 974
 975         if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
 976                 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
 977                 dpaa2_dev_link_update(dev, 0);
 978                 /* calling all the apps registered for link status event */
 979                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
 980                                               NULL);
 981         }
 982 out:
 983         ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
 984                                     irq_index, clear);
 985         if (unlikely(ret))
 986                 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
 987 }
 988
 989 static int
 990 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 991 {
 992         int err = 0;
 993         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 994         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 995         int irq_index = DPNI_IRQ_INDEX;
 996         unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 997
 998         PMD_INIT_FUNC_TRACE();
 999
1000         err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
1001                                 irq_index, mask);
1002         if (err < 0) {
1003                 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
1004                               strerror(-err));
1005                 return err;
1006         }
1007
1008         err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
1009                                   irq_index, enable);
1010         if (err < 0)
1011                 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
1012                               strerror(-err));
1013
1014         return err;
1015 }
1016
1017 static int
1018 dpaa2_dev_start(struct rte_eth_dev *dev)
1019 {
1020         struct rte_device *rdev = dev->device;
1021         struct rte_dpaa2_device *dpaa2_dev;
1022         struct rte_eth_dev_data *data = dev->data;
1023         struct dpaa2_dev_priv *priv = data->dev_private;
1024         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1025         struct dpni_queue cfg;
1026         struct dpni_error_cfg   err_cfg;
1027         uint16_t qdid;
1028         struct dpni_queue_id qid;
1029         struct dpaa2_queue *dpaa2_q;
1030         int ret, i;
1031         struct rte_intr_handle *intr_handle;
1032
1033         dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
1034         intr_handle = &dpaa2_dev->intr_handle;
1035
1036         PMD_INIT_FUNC_TRACE();
1037
1038         ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1039         if (ret) {
1040                 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
1041                               priv->hw_id, ret);
1042                 return ret;
1043         }
1044
1045         /* Power up the phy. Needed to make the link go UP */
1046         dpaa2_dev_set_link_up(dev);
1047
1048         ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
1049                             DPNI_QUEUE_TX, &qdid);
1050         if (ret) {
1051                 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
1052                 return ret;
1053         }
1054         priv->qdid = qdid;
1055
1056         for (i = 0; i < data->nb_rx_queues; i++) {
1057                 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
1058                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
1059                                      DPNI_QUEUE_RX, dpaa2_q->tc_index,
1060                                        dpaa2_q->flow_id, &cfg, &qid);
1061                 if (ret) {
1062                         DPAA2_PMD_ERR("Error in getting flow information: "
1063                                       "err=%d", ret);
1064                         return ret;
1065                 }
1066                 dpaa2_q->fqid = qid.fqid;
1067         }
1068
1069         /*checksum errors, send them to normal path and set it in annotation */
1070         err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
1071         err_cfg.errors |= DPNI_ERROR_PHE;
1072
1073         err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
1074         err_cfg.set_frame_annotation = true;
1075
1076         ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
1077                                        priv->token, &err_cfg);
1078         if (ret) {
1079                 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
1080                               ret);
1081                 return ret;
1082         }
1083
1084         /* if the interrupts were configured on this devices*/
1085         if (intr_handle && (intr_handle->fd) &&
1086             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1087                 /* Registering LSC interrupt handler */
1088                 rte_intr_callback_register(intr_handle,
1089                                            dpaa2_interrupt_handler,
1090                                            (void *)dev);
1091
1092                 /* enable vfio intr/eventfd mapping
1093                  * Interrupt index 0 is required, so we can not use
1094                  * rte_intr_enable.
1095                  */
1096                 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
1097
1098                 /* enable dpni_irqs */
1099                 dpaa2_eth_setup_irqs(dev, 1);
1100         }
1101
1102         /* Change the tx burst function if ordered queues are used */
1103         if (priv->en_ordered)
1104                 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
1105
1106         return 0;
1107 }
1108
1109 /**
1110  *  This routine disables all traffic on the adapter by issuing a
1111  *  global reset on the MAC.
1112  */
1113 static void
1114 dpaa2_dev_stop(struct rte_eth_dev *dev)
1115 {
1116         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1117         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1118         int ret;
1119         struct rte_eth_link link;
1120         struct rte_intr_handle *intr_handle = dev->intr_handle;
1121
1122         PMD_INIT_FUNC_TRACE();
1123
1124         /* reset interrupt callback  */
1125         if (intr_handle && (intr_handle->fd) &&
1126             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1127                 /*disable dpni irqs */
1128                 dpaa2_eth_setup_irqs(dev, 0);
1129
1130                 /* disable vfio intr before callback unregister */
1131                 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
1132
1133                 /* Unregistering LSC interrupt handler */
1134                 rte_intr_callback_unregister(intr_handle,
1135                                              dpaa2_interrupt_handler,
1136                                              (void *)dev);
1137         }
1138
1139         dpaa2_dev_set_link_down(dev);
1140
1141         ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
1142         if (ret) {
1143                 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
1144                               ret, priv->hw_id);
1145                 return;
1146         }
1147
1148         /* clear the recorded link status */
1149         memset(&link, 0, sizeof(link));
1150         rte_eth_linkstatus_set(dev, &link);
1151 }
1152
1153 static void
1154 dpaa2_dev_close(struct rte_eth_dev *dev)
1155 {
1156         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1157         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1158         int ret;
1159         struct rte_eth_link link;
1160
1161         PMD_INIT_FUNC_TRACE();
1162
1163         dpaa2_flow_clean(dev);
1164
1165         /* Clean the device first */
1166         ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
1167         if (ret) {
1168                 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
1169                 return;
1170         }
1171
1172         memset(&link, 0, sizeof(link));
1173         rte_eth_linkstatus_set(dev, &link);
1174 }
1175
1176 static int
1177 dpaa2_dev_promiscuous_enable(
1178                 struct rte_eth_dev *dev)
1179 {
1180         int ret;
1181         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1182         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1183
1184         PMD_INIT_FUNC_TRACE();
1185
1186         if (dpni == NULL) {
1187                 DPAA2_PMD_ERR("dpni is NULL");
1188                 return -ENODEV;
1189         }
1190
1191         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1192         if (ret < 0)
1193                 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
1194
1195         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1196         if (ret < 0)
1197                 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1198
1199         return ret;
1200 }
1201
1202 static int
1203 dpaa2_dev_promiscuous_disable(
1204                 struct rte_eth_dev *dev)
1205 {
1206         int ret;
1207         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1208         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1209
1210         PMD_INIT_FUNC_TRACE();
1211
1212         if (dpni == NULL) {
1213                 DPAA2_PMD_ERR("dpni is NULL");
1214                 return -ENODEV;
1215         }
1216
1217         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1218         if (ret < 0)
1219                 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1220
1221         if (dev->data->all_multicast == 0) {
1222                 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1223                                                  priv->token, false);
1224                 if (ret < 0)
1225                         DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1226                                       ret);
1227         }
1228
1229         return ret;
1230 }
1231
1232 static int
1233 dpaa2_dev_allmulticast_enable(
1234                 struct rte_eth_dev *dev)
1235 {
1236         int ret;
1237         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1238         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1239
1240         PMD_INIT_FUNC_TRACE();
1241
1242         if (dpni == NULL) {
1243                 DPAA2_PMD_ERR("dpni is NULL");
1244                 return -ENODEV;
1245         }
1246
1247         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1248         if (ret < 0)
1249                 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1250
1251         return ret;
1252 }
1253
1254 static int
1255 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1256 {
1257         int ret;
1258         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1259         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1260
1261         PMD_INIT_FUNC_TRACE();
1262
1263         if (dpni == NULL) {
1264                 DPAA2_PMD_ERR("dpni is NULL");
1265                 return -ENODEV;
1266         }
1267
1268         /* must remain on for all promiscuous */
1269         if (dev->data->promiscuous == 1)
1270                 return 0;
1271
1272         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1273         if (ret < 0)
1274                 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1275
1276         return ret;
1277 }
1278
1279 static int
1280 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1281 {
1282         int ret;
1283         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1284         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1285         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1286                                 + VLAN_TAG_SIZE;
1287
1288         PMD_INIT_FUNC_TRACE();
1289
1290         if (dpni == NULL) {
1291                 DPAA2_PMD_ERR("dpni is NULL");
1292                 return -EINVAL;
1293         }
1294
1295         /* check that mtu is within the allowed range */
1296         if (mtu < RTE_ETHER_MIN_MTU || frame_size > DPAA2_MAX_RX_PKT_LEN)
1297                 return -EINVAL;
1298
1299         if (frame_size > RTE_ETHER_MAX_LEN)
1300                 dev->data->dev_conf.rxmode.offloads |=
1301                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
1302         else
1303                 dev->data->dev_conf.rxmode.offloads &=
1304                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1305
1306         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1307
1308         /* Set the Max Rx frame length as 'mtu' +
1309          * Maximum Ethernet header length
1310          */
1311         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1312                                         frame_size - RTE_ETHER_CRC_LEN);
1313         if (ret) {
1314                 DPAA2_PMD_ERR("Setting the max frame length failed");
1315                 return -1;
1316         }
1317         DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1318         return 0;
1319 }
1320
1321 static int
1322 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1323                        struct rte_ether_addr *addr,
1324                        __rte_unused uint32_t index,
1325                        __rte_unused uint32_t pool)
1326 {
1327         int ret;
1328         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1329         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1330
1331         PMD_INIT_FUNC_TRACE();
1332
1333         if (dpni == NULL) {
1334                 DPAA2_PMD_ERR("dpni is NULL");
1335                 return -1;
1336         }
1337
1338         ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW, priv->token,
1339                                 addr->addr_bytes, 0, 0, 0);
1340         if (ret)
1341                 DPAA2_PMD_ERR(
1342                         "error: Adding the MAC ADDR failed: err = %d", ret);
1343         return 0;
1344 }
1345
1346 static void
1347 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1348                           uint32_t index)
1349 {
1350         int ret;
1351         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1352         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1353         struct rte_eth_dev_data *data = dev->data;
1354         struct rte_ether_addr *macaddr;
1355
1356         PMD_INIT_FUNC_TRACE();
1357
1358         macaddr = &data->mac_addrs[index];
1359
1360         if (dpni == NULL) {
1361                 DPAA2_PMD_ERR("dpni is NULL");
1362                 return;
1363         }
1364
1365         ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1366                                    priv->token, macaddr->addr_bytes);
1367         if (ret)
1368                 DPAA2_PMD_ERR(
1369                         "error: Removing the MAC ADDR failed: err = %d", ret);
1370 }
1371
1372 static int
1373 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1374                        struct rte_ether_addr *addr)
1375 {
1376         int ret;
1377         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1378         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1379
1380         PMD_INIT_FUNC_TRACE();
1381
1382         if (dpni == NULL) {
1383                 DPAA2_PMD_ERR("dpni is NULL");
1384                 return -EINVAL;
1385         }
1386
1387         ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1388                                         priv->token, addr->addr_bytes);
1389
1390         if (ret)
1391                 DPAA2_PMD_ERR(
1392                         "error: Setting the MAC ADDR failed %d", ret);
1393
1394         return ret;
1395 }
1396
1397 static
1398 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1399                          struct rte_eth_stats *stats)
1400 {
1401         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1402         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1403         int32_t  retcode;
1404         uint8_t page0 = 0, page1 = 1, page2 = 2;
1405         union dpni_statistics value;
1406         int i;
1407         struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1408
1409         memset(&value, 0, sizeof(union dpni_statistics));
1410
1411         PMD_INIT_FUNC_TRACE();
1412
1413         if (!dpni) {
1414                 DPAA2_PMD_ERR("dpni is NULL");
1415                 return -EINVAL;
1416         }
1417
1418         if (!stats) {
1419                 DPAA2_PMD_ERR("stats is NULL");
1420                 return -EINVAL;
1421         }
1422
1423         /*Get Counters from page_0*/
1424         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1425                                       page0, 0, &value);
1426         if (retcode)
1427                 goto err;
1428
1429         stats->ipackets = value.page_0.ingress_all_frames;
1430         stats->ibytes = value.page_0.ingress_all_bytes;
1431
1432         /*Get Counters from page_1*/
1433         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1434                                       page1, 0, &value);
1435         if (retcode)
1436                 goto err;
1437
1438         stats->opackets = value.page_1.egress_all_frames;
1439         stats->obytes = value.page_1.egress_all_bytes;
1440
1441         /*Get Counters from page_2*/
1442         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1443                                       page2, 0, &value);
1444         if (retcode)
1445                 goto err;
1446
1447         /* Ingress drop frame count due to configured rules */
1448         stats->ierrors = value.page_2.ingress_filtered_frames;
1449         /* Ingress drop frame count due to error */
1450         stats->ierrors += value.page_2.ingress_discarded_frames;
1451
1452         stats->oerrors = value.page_2.egress_discarded_frames;
1453         stats->imissed = value.page_2.ingress_nobuffer_discards;
1454
1455         /* Fill in per queue stats */
1456         for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1457                 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1458                 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1459                 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1460                 if (dpaa2_rxq)
1461                         stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1462                 if (dpaa2_txq)
1463                         stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1464
1465                 /* Byte counting is not implemented */
1466                 stats->q_ibytes[i]   = 0;
1467                 stats->q_obytes[i]   = 0;
1468         }
1469
1470         return 0;
1471
1472 err:
1473         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1474         return retcode;
1475 };
1476
1477 static int
1478 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1479                      unsigned int n)
1480 {
1481         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1482         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1483         int32_t  retcode;
1484         union dpni_statistics value[5] = {};
1485         unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1486
1487         if (n < num)
1488                 return num;
1489
1490         if (xstats == NULL)
1491                 return 0;
1492
1493         /* Get Counters from page_0*/
1494         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1495                                       0, 0, &value[0]);
1496         if (retcode)
1497                 goto err;
1498
1499         /* Get Counters from page_1*/
1500         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1501                                       1, 0, &value[1]);
1502         if (retcode)
1503                 goto err;
1504
1505         /* Get Counters from page_2*/
1506         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1507                                       2, 0, &value[2]);
1508         if (retcode)
1509                 goto err;
1510
1511         for (i = 0; i < priv->max_cgs; i++) {
1512                 if (!priv->cgid_in_use[i]) {
1513                         /* Get Counters from page_4*/
1514                         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
1515                                                       priv->token,
1516                                                       4, 0, &value[4]);
1517                         if (retcode)
1518                                 goto err;
1519                         break;
1520                 }
1521         }
1522
1523         for (i = 0; i < num; i++) {
1524                 xstats[i].id = i;
1525                 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1526                         raw.counter[dpaa2_xstats_strings[i].stats_id];
1527         }
1528         return i;
1529 err:
1530         DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1531         return retcode;
1532 }
1533
1534 static int
1535 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1536                        struct rte_eth_xstat_name *xstats_names,
1537                        unsigned int limit)
1538 {
1539         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1540
1541         if (limit < stat_cnt)
1542                 return stat_cnt;
1543
1544         if (xstats_names != NULL)
1545                 for (i = 0; i < stat_cnt; i++)
1546                         strlcpy(xstats_names[i].name,
1547                                 dpaa2_xstats_strings[i].name,
1548                                 sizeof(xstats_names[i].name));
1549
1550         return stat_cnt;
1551 }
1552
1553 static int
1554 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1555                        uint64_t *values, unsigned int n)
1556 {
1557         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1558         uint64_t values_copy[stat_cnt];
1559
1560         if (!ids) {
1561                 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1562                 struct fsl_mc_io *dpni =
1563                         (struct fsl_mc_io *)dev->process_private;
1564                 int32_t  retcode;
1565                 union dpni_statistics value[5] = {};
1566
1567                 if (n < stat_cnt)
1568                         return stat_cnt;
1569
1570                 if (!values)
1571                         return 0;
1572
1573                 /* Get Counters from page_0*/
1574                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1575                                               0, 0, &value[0]);
1576                 if (retcode)
1577                         return 0;
1578
1579                 /* Get Counters from page_1*/
1580                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1581                                               1, 0, &value[1]);
1582                 if (retcode)
1583                         return 0;
1584
1585                 /* Get Counters from page_2*/
1586                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1587                                               2, 0, &value[2]);
1588                 if (retcode)
1589                         return 0;
1590
1591                 /* Get Counters from page_4*/
1592                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1593                                               4, 0, &value[4]);
1594                 if (retcode)
1595                         return 0;
1596
1597                 for (i = 0; i < stat_cnt; i++) {
1598                         values[i] = value[dpaa2_xstats_strings[i].page_id].
1599                                 raw.counter[dpaa2_xstats_strings[i].stats_id];
1600                 }
1601                 return stat_cnt;
1602         }
1603
1604         dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1605
1606         for (i = 0; i < n; i++) {
1607                 if (ids[i] >= stat_cnt) {
1608                         DPAA2_PMD_ERR("xstats id value isn't valid");
1609                         return -1;
1610                 }
1611                 values[i] = values_copy[ids[i]];
1612         }
1613         return n;
1614 }
1615
1616 static int
1617 dpaa2_xstats_get_names_by_id(
1618         struct rte_eth_dev *dev,
1619         struct rte_eth_xstat_name *xstats_names,
1620         const uint64_t *ids,
1621         unsigned int limit)
1622 {
1623         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1624         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1625
1626         if (!ids)
1627                 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1628
1629         dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1630
1631         for (i = 0; i < limit; i++) {
1632                 if (ids[i] >= stat_cnt) {
1633                         DPAA2_PMD_ERR("xstats id value isn't valid");
1634                         return -1;
1635                 }
1636                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1637         }
1638         return limit;
1639 }
1640
1641 static int
1642 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1643 {
1644         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1645         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1646         int retcode;
1647         int i;
1648         struct dpaa2_queue *dpaa2_q;
1649
1650         PMD_INIT_FUNC_TRACE();
1651
1652         if (dpni == NULL) {
1653                 DPAA2_PMD_ERR("dpni is NULL");
1654                 return -EINVAL;
1655         }
1656
1657         retcode =  dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1658         if (retcode)
1659                 goto error;
1660
1661         /* Reset the per queue stats in dpaa2_queue structure */
1662         for (i = 0; i < priv->nb_rx_queues; i++) {
1663                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1664                 if (dpaa2_q)
1665                         dpaa2_q->rx_pkts = 0;
1666         }
1667
1668         for (i = 0; i < priv->nb_tx_queues; i++) {
1669                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1670                 if (dpaa2_q)
1671                         dpaa2_q->tx_pkts = 0;
1672         }
1673
1674         return 0;
1675
1676 error:
1677         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1678         return retcode;
1679 };
1680
1681 /* return 0 means link status changed, -1 means not changed */
1682 static int
1683 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1684                         int wait_to_complete __rte_unused)
1685 {
1686         int ret;
1687         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1688         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
1689         struct rte_eth_link link;
1690         struct dpni_link_state state = {0};
1691
1692         if (dpni == NULL) {
1693                 DPAA2_PMD_ERR("dpni is NULL");
1694                 return 0;
1695         }
1696
1697         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1698         if (ret < 0) {
1699                 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1700                 return -1;
1701         }
1702
1703         memset(&link, 0, sizeof(struct rte_eth_link));
1704         link.link_status = state.up;
1705         link.link_speed = state.rate;
1706
1707         if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1708                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1709         else
1710                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1711
1712         ret = rte_eth_linkstatus_set(dev, &link);
1713         if (ret == -1)
1714                 DPAA2_PMD_DEBUG("No change in status");
1715         else
1716                 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1717                                link.link_status ? "Up" : "Down");
1718
1719         return ret;
1720 }
1721
1722 /**
1723  * Toggle the DPNI to enable, if not already enabled.
1724  * This is not strictly PHY up/down - it is more of logical toggling.
1725  */
1726 static int
1727 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1728 {
1729         int ret = -EINVAL;
1730         struct dpaa2_dev_priv *priv;
1731         struct fsl_mc_io *dpni;
1732         int en = 0;
1733         struct dpni_link_state state = {0};
1734
1735         priv = dev->data->dev_private;
1736         dpni = (struct fsl_mc_io *)dev->process_private;
1737
1738         if (dpni == NULL) {
1739                 DPAA2_PMD_ERR("dpni is NULL");
1740                 return ret;
1741         }
1742
1743         /* Check if DPNI is currently enabled */
1744         ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1745         if (ret) {
1746                 /* Unable to obtain dpni status; Not continuing */
1747                 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1748                 return -EINVAL;
1749         }
1750
1751         /* Enable link if not already enabled */
1752         if (!en) {
1753                 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1754                 if (ret) {
1755                         DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1756                         return -EINVAL;
1757                 }
1758         }
1759         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1760         if (ret < 0) {
1761                 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1762                 return -1;
1763         }
1764
1765         /* changing tx burst function to start enqueues */
1766         dev->tx_pkt_burst = dpaa2_dev_tx;
1767         dev->data->dev_link.link_status = state.up;
1768         dev->data->dev_link.link_speed = state.rate;
1769
1770         if (state.up)
1771                 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1772         else
1773                 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1774         return ret;
1775 }
1776
1777 /**
1778  * Toggle the DPNI to disable, if not already disabled.
1779  * This is not strictly PHY up/down - it is more of logical toggling.
1780  */
1781 static int
1782 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1783 {
1784         int ret = -EINVAL;
1785         struct dpaa2_dev_priv *priv;
1786         struct fsl_mc_io *dpni;
1787         int dpni_enabled = 0;
1788         int retries = 10;
1789
1790         PMD_INIT_FUNC_TRACE();
1791
1792         priv = dev->data->dev_private;
1793         dpni = (struct fsl_mc_io *)dev->process_private;
1794
1795         if (dpni == NULL) {
1796                 DPAA2_PMD_ERR("Device has not yet been configured");
1797                 return ret;
1798         }
1799
1800         /*changing  tx burst function to avoid any more enqueues */
1801         dev->tx_pkt_burst = dummy_dev_tx;
1802
1803         /* Loop while dpni_disable() attempts to drain the egress FQs
1804          * and confirm them back to us.
1805          */
1806         do {
1807                 ret = dpni_disable(dpni, 0, priv->token);
1808                 if (ret) {
1809                         DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1810                         return ret;
1811                 }
1812                 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1813                 if (ret) {
1814                         DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1815                         return ret;
1816                 }
1817                 if (dpni_enabled)
1818                         /* Allow the MC some slack */
1819                         rte_delay_us(100 * 1000);
1820         } while (dpni_enabled && --retries);
1821
1822         if (!retries) {
1823                 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1824                 /* todo- we may have to manually cleanup queues.
1825                  */
1826         } else {
1827                 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1828                                dev->data->port_id);
1829         }
1830
1831         dev->data->dev_link.link_status = 0;
1832
1833         return ret;
1834 }
1835
1836 static int
1837 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1838 {
1839         int ret = -EINVAL;
1840         struct dpaa2_dev_priv *priv;
1841         struct fsl_mc_io *dpni;
1842         struct dpni_link_state state = {0};
1843
1844         PMD_INIT_FUNC_TRACE();
1845
1846         priv = dev->data->dev_private;
1847         dpni = (struct fsl_mc_io *)dev->process_private;
1848
1849         if (dpni == NULL || fc_conf == NULL) {
1850                 DPAA2_PMD_ERR("device not configured");
1851                 return ret;
1852         }
1853
1854         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1855         if (ret) {
1856                 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1857                 return ret;
1858         }
1859
1860         memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1861         if (state.options & DPNI_LINK_OPT_PAUSE) {
1862                 /* DPNI_LINK_OPT_PAUSE set
1863                  *  if ASYM_PAUSE not set,
1864                  *      RX Side flow control (handle received Pause frame)
1865                  *      TX side flow control (send Pause frame)
1866                  *  if ASYM_PAUSE set,
1867                  *      RX Side flow control (handle received Pause frame)
1868                  *      No TX side flow control (send Pause frame disabled)
1869                  */
1870                 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1871                         fc_conf->mode = RTE_FC_FULL;
1872                 else
1873                         fc_conf->mode = RTE_FC_RX_PAUSE;
1874         } else {
1875                 /* DPNI_LINK_OPT_PAUSE not set
1876                  *  if ASYM_PAUSE set,
1877                  *      TX side flow control (send Pause frame)
1878                  *      No RX side flow control (No action on pause frame rx)
1879                  *  if ASYM_PAUSE not set,
1880                  *      Flow control disabled
1881                  */
1882                 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1883                         fc_conf->mode = RTE_FC_TX_PAUSE;
1884                 else
1885                         fc_conf->mode = RTE_FC_NONE;
1886         }
1887
1888         return ret;
1889 }
1890
1891 static int
1892 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1893 {
1894         int ret = -EINVAL;
1895         struct dpaa2_dev_priv *priv;
1896         struct fsl_mc_io *dpni;
1897         struct dpni_link_state state = {0};
1898         struct dpni_link_cfg cfg = {0};
1899
1900         PMD_INIT_FUNC_TRACE();
1901
1902         priv = dev->data->dev_private;
1903         dpni = (struct fsl_mc_io *)dev->process_private;
1904
1905         if (dpni == NULL) {
1906                 DPAA2_PMD_ERR("dpni is NULL");
1907                 return ret;
1908         }
1909
1910         /* It is necessary to obtain the current state before setting fc_conf
1911          * as MC would return error in case rate, autoneg or duplex values are
1912          * different.
1913          */
1914         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1915         if (ret) {
1916                 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1917                 return -1;
1918         }
1919
1920         /* Disable link before setting configuration */
1921         dpaa2_dev_set_link_down(dev);
1922
1923         /* Based on fc_conf, update cfg */
1924         cfg.rate = state.rate;
1925         cfg.options = state.options;
1926
1927         /* update cfg with fc_conf */
1928         switch (fc_conf->mode) {
1929         case RTE_FC_FULL:
1930                 /* Full flow control;
1931                  * OPT_PAUSE set, ASYM_PAUSE not set
1932                  */
1933                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1934                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1935                 break;
1936         case RTE_FC_TX_PAUSE:
1937                 /* Enable RX flow control
1938                  * OPT_PAUSE not set;
1939                  * ASYM_PAUSE set;
1940                  */
1941                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1942                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1943                 break;
1944         case RTE_FC_RX_PAUSE:
1945                 /* Enable TX Flow control
1946                  * OPT_PAUSE set
1947                  * ASYM_PAUSE set
1948                  */
1949                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1950                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1951                 break;
1952         case RTE_FC_NONE:
1953                 /* Disable Flow control
1954                  * OPT_PAUSE not set
1955                  * ASYM_PAUSE not set
1956                  */
1957                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1958                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1959                 break;
1960         default:
1961                 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1962                               fc_conf->mode);
1963                 return -1;
1964         }
1965
1966         ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1967         if (ret)
1968                 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1969                               ret);
1970
1971         /* Enable link */
1972         dpaa2_dev_set_link_up(dev);
1973
1974         return ret;
1975 }
1976
1977 static int
1978 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1979                           struct rte_eth_rss_conf *rss_conf)
1980 {
1981         struct rte_eth_dev_data *data = dev->data;
1982         struct rte_eth_conf *eth_conf = &data->dev_conf;
1983         int ret;
1984
1985         PMD_INIT_FUNC_TRACE();
1986
1987         if (rss_conf->rss_hf) {
1988                 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1989                 if (ret) {
1990                         DPAA2_PMD_ERR("Unable to set flow dist");
1991                         return ret;
1992                 }
1993         } else {
1994                 ret = dpaa2_remove_flow_dist(dev, 0);
1995                 if (ret) {
1996                         DPAA2_PMD_ERR("Unable to remove flow dist");
1997                         return ret;
1998                 }
1999         }
2000         eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
2001         return 0;
2002 }
2003
2004 static int
2005 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2006                             struct rte_eth_rss_conf *rss_conf)
2007 {
2008         struct rte_eth_dev_data *data = dev->data;
2009         struct rte_eth_conf *eth_conf = &data->dev_conf;
2010
2011         /* dpaa2 does not support rss_key, so length should be 0*/
2012         rss_conf->rss_key_len = 0;
2013         rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
2014         return 0;
2015 }
2016
2017 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
2018                 int eth_rx_queue_id,
2019                 struct dpaa2_dpcon_dev *dpcon,
2020                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
2021 {
2022         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2023         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2024         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2025         uint8_t flow_id = dpaa2_ethq->flow_id;
2026         struct dpni_queue cfg;
2027         uint8_t options, priority;
2028         int ret;
2029
2030         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
2031                 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
2032         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
2033                 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
2034         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
2035                 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
2036         else
2037                 return -EINVAL;
2038
2039         priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / queue_conf->ev.priority) *
2040                    (dpcon->num_priorities - 1);
2041
2042         memset(&cfg, 0, sizeof(struct dpni_queue));
2043         options = DPNI_QUEUE_OPT_DEST;
2044         cfg.destination.type = DPNI_DEST_DPCON;
2045         cfg.destination.id = dpcon->dpcon_id;
2046         cfg.destination.priority = priority;
2047
2048         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
2049                 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
2050                 cfg.destination.hold_active = 1;
2051         }
2052
2053         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
2054                         !eth_priv->en_ordered) {
2055                 struct opr_cfg ocfg;
2056
2057                 /* Restoration window size = 256 frames */
2058                 ocfg.oprrws = 3;
2059                 /* Restoration window size = 512 frames for LX2 */
2060                 if (dpaa2_svr_family == SVR_LX2160A)
2061                         ocfg.oprrws = 4;
2062                 /* Auto advance NESN window enabled */
2063                 ocfg.oa = 1;
2064                 /* Late arrival window size disabled */
2065                 ocfg.olws = 0;
2066                 /* ORL resource exhaustaion advance NESN disabled */
2067                 ocfg.oeane = 0;
2068                 /* Loose ordering enabled */
2069                 ocfg.oloe = 1;
2070                 eth_priv->en_loose_ordered = 1;
2071                 /* Strict ordering enabled if explicitly set */
2072                 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
2073                         ocfg.oloe = 0;
2074                         eth_priv->en_loose_ordered = 0;
2075                 }
2076
2077                 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
2078                                    dpaa2_ethq->tc_index, flow_id,
2079                                    OPR_OPT_CREATE, &ocfg);
2080                 if (ret) {
2081                         DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
2082                         return ret;
2083                 }
2084
2085                 eth_priv->en_ordered = 1;
2086         }
2087
2088         options |= DPNI_QUEUE_OPT_USER_CTX;
2089         cfg.user_context = (size_t)(dpaa2_ethq);
2090
2091         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2092                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2093         if (ret) {
2094                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2095                 return ret;
2096         }
2097
2098         memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
2099
2100         return 0;
2101 }
2102
2103 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
2104                 int eth_rx_queue_id)
2105 {
2106         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2107         struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
2108         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2109         uint8_t flow_id = dpaa2_ethq->flow_id;
2110         struct dpni_queue cfg;
2111         uint8_t options;
2112         int ret;
2113
2114         memset(&cfg, 0, sizeof(struct dpni_queue));
2115         options = DPNI_QUEUE_OPT_DEST;
2116         cfg.destination.type = DPNI_DEST_NONE;
2117
2118         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2119                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2120         if (ret)
2121                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2122
2123         return ret;
2124 }
2125
2126 static inline int
2127 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op)
2128 {
2129         unsigned int i;
2130
2131         for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) {
2132                 if (dpaa2_supported_filter_ops[i] == filter_op)
2133                         return 0;
2134         }
2135         return -ENOTSUP;
2136 }
2137
2138 static int
2139 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
2140                     enum rte_filter_type filter_type,
2141                                  enum rte_filter_op filter_op,
2142                                  void *arg)
2143 {
2144         int ret = 0;
2145
2146         if (!dev)
2147                 return -ENODEV;
2148
2149         switch (filter_type) {
2150         case RTE_ETH_FILTER_GENERIC:
2151                 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) {
2152                         ret = -ENOTSUP;
2153                         break;
2154                 }
2155                 *(const void **)arg = &dpaa2_flow_ops;
2156                 dpaa2_filter_type |= filter_type;
2157                 break;
2158         default:
2159                 RTE_LOG(ERR, PMD, "Filter type (%d) not supported",
2160                         filter_type);
2161                 ret = -ENOTSUP;
2162                 break;
2163         }
2164         return ret;
2165 }
2166
2167 static struct eth_dev_ops dpaa2_ethdev_ops = {
2168         .dev_configure    = dpaa2_eth_dev_configure,
2169         .dev_start            = dpaa2_dev_start,
2170         .dev_stop             = dpaa2_dev_stop,
2171         .dev_close            = dpaa2_dev_close,
2172         .promiscuous_enable   = dpaa2_dev_promiscuous_enable,
2173         .promiscuous_disable  = dpaa2_dev_promiscuous_disable,
2174         .allmulticast_enable  = dpaa2_dev_allmulticast_enable,
2175         .allmulticast_disable = dpaa2_dev_allmulticast_disable,
2176         .dev_set_link_up      = dpaa2_dev_set_link_up,
2177         .dev_set_link_down    = dpaa2_dev_set_link_down,
2178         .link_update       = dpaa2_dev_link_update,
2179         .stats_get             = dpaa2_dev_stats_get,
2180         .xstats_get            = dpaa2_dev_xstats_get,
2181         .xstats_get_by_id     = dpaa2_xstats_get_by_id,
2182         .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
2183         .xstats_get_names      = dpaa2_xstats_get_names,
2184         .stats_reset       = dpaa2_dev_stats_reset,
2185         .xstats_reset         = dpaa2_dev_stats_reset,
2186         .fw_version_get    = dpaa2_fw_version_get,
2187         .dev_infos_get     = dpaa2_dev_info_get,
2188         .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
2189         .mtu_set           = dpaa2_dev_mtu_set,
2190         .vlan_filter_set      = dpaa2_vlan_filter_set,
2191         .vlan_offload_set     = dpaa2_vlan_offload_set,
2192         .vlan_tpid_set        = dpaa2_vlan_tpid_set,
2193         .rx_queue_setup    = dpaa2_dev_rx_queue_setup,
2194         .rx_queue_release  = dpaa2_dev_rx_queue_release,
2195         .tx_queue_setup    = dpaa2_dev_tx_queue_setup,
2196         .tx_queue_release  = dpaa2_dev_tx_queue_release,
2197         .rx_queue_count       = dpaa2_dev_rx_queue_count,
2198         .flow_ctrl_get        = dpaa2_flow_ctrl_get,
2199         .flow_ctrl_set        = dpaa2_flow_ctrl_set,
2200         .mac_addr_add         = dpaa2_dev_add_mac_addr,
2201         .mac_addr_remove      = dpaa2_dev_remove_mac_addr,
2202         .mac_addr_set         = dpaa2_dev_set_mac_addr,
2203         .rss_hash_update      = dpaa2_dev_rss_hash_update,
2204         .rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
2205         .filter_ctrl          = dpaa2_dev_flow_ctrl,
2206 #if defined(RTE_LIBRTE_IEEE1588)
2207         .timesync_enable      = dpaa2_timesync_enable,
2208         .timesync_disable     = dpaa2_timesync_disable,
2209         .timesync_read_time   = dpaa2_timesync_read_time,
2210         .timesync_write_time  = dpaa2_timesync_write_time,
2211         .timesync_adjust_time = dpaa2_timesync_adjust_time,
2212         .timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
2213         .timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
2214 #endif
2215 };
2216
2217 /* Populate the mac address from physically available (u-boot/firmware) and/or
2218  * one set by higher layers like MC (restool) etc.
2219  * Returns the table of MAC entries (multiple entries)
2220  */
2221 static int
2222 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
2223                   struct rte_ether_addr *mac_entry)
2224 {
2225         int ret;
2226         struct rte_ether_addr phy_mac, prime_mac;
2227
2228         memset(&phy_mac, 0, sizeof(struct rte_ether_addr));
2229         memset(&prime_mac, 0, sizeof(struct rte_ether_addr));
2230
2231         /* Get the physical device MAC address */
2232         ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2233                                      phy_mac.addr_bytes);
2234         if (ret) {
2235                 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
2236                 goto cleanup;
2237         }
2238
2239         ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2240                                         prime_mac.addr_bytes);
2241         if (ret) {
2242                 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
2243                 goto cleanup;
2244         }
2245
2246         /* Now that both MAC have been obtained, do:
2247          *  if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
2248          *     and return phy
2249          *  If empty_mac(phy), return prime.
2250          *  if both are empty, create random MAC, set as prime and return
2251          */
2252         if (!rte_is_zero_ether_addr(&phy_mac)) {
2253                 /* If the addresses are not same, overwrite prime */
2254                 if (!rte_is_same_ether_addr(&phy_mac, &prime_mac)) {
2255                         ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2256                                                         priv->token,
2257                                                         phy_mac.addr_bytes);
2258                         if (ret) {
2259                                 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
2260                                               ret);
2261                                 goto cleanup;
2262                         }
2263                         memcpy(&prime_mac, &phy_mac,
2264                                 sizeof(struct rte_ether_addr));
2265                 }
2266         } else if (rte_is_zero_ether_addr(&prime_mac)) {
2267                 /* In case phys and prime, both are zero, create random MAC */
2268                 rte_eth_random_addr(prime_mac.addr_bytes);
2269                 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2270                                                 priv->token,
2271                                                 prime_mac.addr_bytes);
2272                 if (ret) {
2273                         DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
2274                         goto cleanup;
2275                 }
2276         }
2277
2278         /* prime_mac the final MAC address */
2279         memcpy(mac_entry, &prime_mac, sizeof(struct rte_ether_addr));
2280         return 0;
2281
2282 cleanup:
2283         return -1;
2284 }
2285
2286 static int
2287 check_devargs_handler(__rte_unused const char *key, const char *value,
2288                       __rte_unused void *opaque)
2289 {
2290         if (strcmp(value, "1"))
2291                 return -1;
2292
2293         return 0;
2294 }
2295
2296 static int
2297 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2298 {
2299         struct rte_kvargs *kvlist;
2300
2301         if (!devargs)
2302                 return 0;
2303
2304         kvlist = rte_kvargs_parse(devargs->args, NULL);
2305         if (!kvlist)
2306                 return 0;
2307
2308         if (!rte_kvargs_count(kvlist, key)) {
2309                 rte_kvargs_free(kvlist);
2310                 return 0;
2311         }
2312
2313         if (rte_kvargs_process(kvlist, key,
2314                                check_devargs_handler, NULL) < 0) {
2315                 rte_kvargs_free(kvlist);
2316                 return 0;
2317         }
2318         rte_kvargs_free(kvlist);
2319
2320         return 1;
2321 }
2322
2323 static int
2324 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2325 {
2326         struct rte_device *dev = eth_dev->device;
2327         struct rte_dpaa2_device *dpaa2_dev;
2328         struct fsl_mc_io *dpni_dev;
2329         struct dpni_attr attr;
2330         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2331         struct dpni_buffer_layout layout;
2332         int ret, hw_id, i;
2333
2334         PMD_INIT_FUNC_TRACE();
2335
2336         dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2337         if (!dpni_dev) {
2338                 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2339                 return -1;
2340         }
2341         dpni_dev->regs = rte_mcp_ptr_list[0];
2342         eth_dev->process_private = (void *)dpni_dev;
2343
2344         /* For secondary processes, the primary has done all the work */
2345         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2346                 /* In case of secondary, only burst and ops API need to be
2347                  * plugged.
2348                  */
2349                 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2350                 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2351                         eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2352                 else if (dpaa2_get_devargs(dev->devargs,
2353                                         DRIVER_NO_PREFETCH_MODE))
2354                         eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2355                 else
2356                         eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2357                 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2358                 return 0;
2359         }
2360
2361         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2362
2363         hw_id = dpaa2_dev->object_id;
2364         ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2365         if (ret) {
2366                 DPAA2_PMD_ERR(
2367                              "Failure in opening dpni@%d with err code %d",
2368                              hw_id, ret);
2369                 rte_free(dpni_dev);
2370                 return -1;
2371         }
2372
2373         /* Clean the device first */
2374         ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2375         if (ret) {
2376                 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2377                               hw_id, ret);
2378                 goto init_err;
2379         }
2380
2381         ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2382         if (ret) {
2383                 DPAA2_PMD_ERR(
2384                              "Failure in get dpni@%d attribute, err code %d",
2385                              hw_id, ret);
2386                 goto init_err;
2387         }
2388
2389         priv->num_rx_tc = attr.num_rx_tcs;
2390         /* only if the custom CG is enabled */
2391         if (attr.options & DPNI_OPT_CUSTOM_CG)
2392                 priv->max_cgs = attr.num_cgs;
2393         else
2394                 priv->max_cgs = 0;
2395
2396         for (i = 0; i < priv->max_cgs; i++)
2397                 priv->cgid_in_use[i] = 0;
2398
2399         for (i = 0; i < attr.num_rx_tcs; i++)
2400                 priv->nb_rx_queues += attr.num_queues;
2401
2402         /* Using number of TX queues as number of TX TCs */
2403         priv->nb_tx_queues = attr.num_tx_tcs;
2404
2405         DPAA2_PMD_DEBUG("RX-TC= %d, rx_queues= %d, tx_queues=%d, max_cgs=%d",
2406                         priv->num_rx_tc, priv->nb_rx_queues,
2407                         priv->nb_tx_queues, priv->max_cgs);
2408
2409         priv->hw = dpni_dev;
2410         priv->hw_id = hw_id;
2411         priv->options = attr.options;
2412         priv->max_mac_filters = attr.mac_filter_entries;
2413         priv->max_vlan_filters = attr.vlan_filter_entries;
2414         priv->flags = 0;
2415 #if defined(RTE_LIBRTE_IEEE1588)
2416         priv->tx_conf_en = 1;
2417 #else
2418         priv->tx_conf_en = 0;
2419 #endif
2420
2421         /* Allocate memory for hardware structure for queues */
2422         ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2423         if (ret) {
2424                 DPAA2_PMD_ERR("Queue allocation Failed");
2425                 goto init_err;
2426         }
2427
2428         /* Allocate memory for storing MAC addresses.
2429          * Table of mac_filter_entries size is allocated so that RTE ether lib
2430          * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2431          */
2432         eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2433                 RTE_ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2434         if (eth_dev->data->mac_addrs == NULL) {
2435                 DPAA2_PMD_ERR(
2436                    "Failed to allocate %d bytes needed to store MAC addresses",
2437                    RTE_ETHER_ADDR_LEN * attr.mac_filter_entries);
2438                 ret = -ENOMEM;
2439                 goto init_err;
2440         }
2441
2442         ret = populate_mac_addr(dpni_dev, priv, &eth_dev->data->mac_addrs[0]);
2443         if (ret) {
2444                 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2445                 rte_free(eth_dev->data->mac_addrs);
2446                 eth_dev->data->mac_addrs = NULL;
2447                 goto init_err;
2448         }
2449
2450         /* ... tx buffer layout ... */
2451         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2452         if (priv->tx_conf_en) {
2453                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2454                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2455                 layout.pass_timestamp = true;
2456         } else {
2457                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2458         }
2459         layout.pass_frame_status = 1;
2460         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2461                                      DPNI_QUEUE_TX, &layout);
2462         if (ret) {
2463                 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2464                 goto init_err;
2465         }
2466
2467         /* ... tx-conf and error buffer layout ... */
2468         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2469         if (priv->tx_conf_en) {
2470                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
2471                                  DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
2472                 layout.pass_timestamp = true;
2473         } else {
2474                 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2475         }
2476         layout.pass_frame_status = 1;
2477         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2478                                      DPNI_QUEUE_TX_CONFIRM, &layout);
2479         if (ret) {
2480                 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2481                              ret);
2482                 goto init_err;
2483         }
2484
2485         eth_dev->dev_ops = &dpaa2_ethdev_ops;
2486
2487         if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2488                 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2489                 DPAA2_PMD_INFO("Loopback mode");
2490         } else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
2491                 eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2492                 DPAA2_PMD_INFO("No Prefetch mode");
2493         } else {
2494                 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2495         }
2496         eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2497
2498         /*Init fields w.r.t. classficaition*/
2499         memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg));
2500         priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64);
2501         if (!priv->extract.qos_extract_param) {
2502                 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow "
2503                             " classificaiton ", ret);
2504                 goto init_err;
2505         }
2506         for (i = 0; i < MAX_TCS; i++) {
2507                 memset(&priv->extract.fs_key_cfg[i], 0,
2508                         sizeof(struct dpkg_profile_cfg));
2509                 priv->extract.fs_extract_param[i] =
2510                         (size_t)rte_malloc(NULL, 256, 64);
2511                 if (!priv->extract.fs_extract_param[i]) {
2512                         DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton",
2513                                      ret);
2514                         goto init_err;
2515                 }
2516         }
2517
2518         ret = dpni_set_max_frame_length(dpni_dev, CMD_PRI_LOW, priv->token,
2519                                         RTE_ETHER_MAX_LEN - RTE_ETHER_CRC_LEN
2520                                         + VLAN_TAG_SIZE);
2521         if (ret) {
2522                 DPAA2_PMD_ERR("Unable to set mtu. check config");
2523                 goto init_err;
2524         }
2525
2526         /*TODO To enable soft parser support DPAA2 driver needs to integrate
2527          * with external entity to receive byte code for software sequence
2528          * and same will be offload to the H/W using MC interface.
2529          * Currently it is assumed that DPAA2 driver has byte code by some
2530          * mean and same if offloaded to H/W.
2531          */
2532         if (getenv("DPAA2_ENABLE_SOFT_PARSER")) {
2533                 WRIOP_SS_INITIALIZER(priv);
2534                 ret = dpaa2_eth_load_wriop_soft_parser(priv, DPNI_SS_INGRESS);
2535                 if (ret < 0) {
2536                         DPAA2_PMD_ERR(" Error(%d) in loading softparser\n",
2537                                       ret);
2538                         return ret;
2539                 }
2540
2541                 ret = dpaa2_eth_enable_wriop_soft_parser(priv,
2542                                                          DPNI_SS_INGRESS);
2543                 if (ret < 0) {
2544                         DPAA2_PMD_ERR(" Error(%d) in enabling softparser\n",
2545                                       ret);
2546                         return ret;
2547                 }
2548         }
2549         RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2550         return 0;
2551 init_err:
2552         dpaa2_dev_uninit(eth_dev);
2553         return ret;
2554 }
2555
2556 static int
2557 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2558 {
2559         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2560         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_dev->process_private;
2561         int i, ret;
2562
2563         PMD_INIT_FUNC_TRACE();
2564
2565         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2566                 return 0;
2567
2568         if (!dpni) {
2569                 DPAA2_PMD_WARN("Already closed or not started");
2570                 return -1;
2571         }
2572
2573         dpaa2_dev_close(eth_dev);
2574
2575         dpaa2_free_rx_tx_queues(eth_dev);
2576
2577         /* Close the device at underlying layer*/
2578         ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2579         if (ret) {
2580                 DPAA2_PMD_ERR(
2581                              "Failure closing dpni device with err code %d",
2582                              ret);
2583         }
2584
2585         /* Free the allocated memory for ethernet private data and dpni*/
2586         priv->hw = NULL;
2587         eth_dev->process_private = NULL;
2588         rte_free(dpni);
2589
2590         for (i = 0; i < MAX_TCS; i++) {
2591                 if (priv->extract.fs_extract_param[i])
2592                         rte_free((void *)(size_t)priv->extract.fs_extract_param[i]);
2593         }
2594
2595         if (priv->extract.qos_extract_param)
2596                 rte_free((void *)(size_t)priv->extract.qos_extract_param);
2597
2598         eth_dev->dev_ops = NULL;
2599         eth_dev->rx_pkt_burst = NULL;
2600         eth_dev->tx_pkt_burst = NULL;
2601
2602         DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2603         return 0;
2604 }
2605
2606 static int
2607 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2608                 struct rte_dpaa2_device *dpaa2_dev)
2609 {
2610         struct rte_eth_dev *eth_dev;
2611         struct dpaa2_dev_priv *dev_priv;
2612         int diag;
2613
2614         if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
2615                 RTE_PKTMBUF_HEADROOM) {
2616                 DPAA2_PMD_ERR(
2617                 "RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA2 Annotation req(%d)",
2618                 RTE_PKTMBUF_HEADROOM,
2619                 DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE);
2620
2621                 return -1;
2622         }
2623
2624         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2625                 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2626                 if (!eth_dev)
2627                         return -ENODEV;
2628                 dev_priv = rte_zmalloc("ethdev private structure",
2629                                        sizeof(struct dpaa2_dev_priv),
2630                                        RTE_CACHE_LINE_SIZE);
2631                 if (dev_priv == NULL) {
2632                         DPAA2_PMD_CRIT(
2633                                 "Unable to allocate memory for private data");
2634                         rte_eth_dev_release_port(eth_dev);
2635                         return -ENOMEM;
2636                 }
2637                 eth_dev->data->dev_private = (void *)dev_priv;
2638                 /* Store a pointer to eth_dev in dev_private */
2639                 dev_priv->eth_dev = eth_dev;
2640                 dev_priv->tx_conf_en = 0;
2641         } else {
2642                 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2643                 if (!eth_dev) {
2644                         DPAA2_PMD_DEBUG("returning enodev");
2645                         return -ENODEV;
2646                 }
2647         }
2648
2649         eth_dev->device = &dpaa2_dev->device;
2650
2651         dpaa2_dev->eth_dev = eth_dev;
2652         eth_dev->data->rx_mbuf_alloc_failed = 0;
2653
2654         if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2655                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2656
2657         /* Invoke PMD device initialization function */
2658         diag = dpaa2_dev_init(eth_dev);
2659         if (diag == 0) {
2660                 rte_eth_dev_probing_finish(eth_dev);
2661                 return 0;
2662         }
2663
2664         rte_eth_dev_release_port(eth_dev);
2665         return diag;
2666 }
2667
2668 static int
2669 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2670 {
2671         struct rte_eth_dev *eth_dev;
2672
2673         eth_dev = dpaa2_dev->eth_dev;
2674         dpaa2_dev_uninit(eth_dev);
2675
2676         rte_eth_dev_release_port(eth_dev);
2677
2678         return 0;
2679 }
2680
2681 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2682         .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2683         .drv_type = DPAA2_ETH,
2684         .probe = rte_dpaa2_probe,
2685         .remove = rte_dpaa2_remove,
2686 };
2687
2688 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2689 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2690                 DRIVER_LOOPBACK_MODE "=<int> "
2691                 DRIVER_NO_PREFETCH_MODE "=<int>");
2692 RTE_INIT(dpaa2_pmd_init_log)
2693 {
2694         dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2695         if (dpaa2_logtype_pmd >= 0)
2696                 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);
2697 }