drivers/net/dpaa2/dpaa2_ethdev.c

   1 /* * SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2016 NXP
   5  *
   6  */
   7
   8 #include <time.h>
   9 #include <net/if.h>
  10
  11 #include <rte_mbuf.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_malloc.h>
  14 #include <rte_memcpy.h>
  15 #include <rte_string_fns.h>
  16 #include <rte_cycles.h>
  17 #include <rte_kvargs.h>
  18 #include <rte_dev.h>
  19 #include <rte_fslmc.h>
  20 #include <rte_flow_driver.h>
  21
  22 #include "dpaa2_pmd_logs.h"
  23 #include <fslmc_vfio.h>
  24 #include <dpaa2_hw_pvt.h>
  25 #include <dpaa2_hw_mempool.h>
  26 #include <dpaa2_hw_dpio.h>
  27 #include <mc/fsl_dpmng.h>
  28 #include "dpaa2_ethdev.h"
  29 #include <fsl_qbman_debug.h>
  30
  31 #define DRIVER_LOOPBACK_MODE "drv_loopback"
  32 #define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
  33
  34 /* Supported Rx offloads */
  35 static uint64_t dev_rx_offloads_sup =
  36                 DEV_RX_OFFLOAD_CHECKSUM |
  37                 DEV_RX_OFFLOAD_SCTP_CKSUM |
  38                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
  39                 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
  40                 DEV_RX_OFFLOAD_VLAN_STRIP |
  41                 DEV_RX_OFFLOAD_VLAN_FILTER |
  42                 DEV_RX_OFFLOAD_JUMBO_FRAME |
  43                 DEV_RX_OFFLOAD_TIMESTAMP;
  44
  45 /* Rx offloads which cannot be disabled */
  46 static uint64_t dev_rx_offloads_nodis =
  47                 DEV_RX_OFFLOAD_SCATTER;
  48
  49 /* Supported Tx offloads */
  50 static uint64_t dev_tx_offloads_sup =
  51                 DEV_TX_OFFLOAD_VLAN_INSERT |
  52                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  53                 DEV_TX_OFFLOAD_UDP_CKSUM |
  54                 DEV_TX_OFFLOAD_TCP_CKSUM |
  55                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  56                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  57                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  58                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  59
  60 /* Tx offloads which cannot be disabled */
  61 static uint64_t dev_tx_offloads_nodis =
  62                 DEV_TX_OFFLOAD_MULTI_SEGS;
  63
  64 /* enable timestamp in mbuf */
  65 enum pmd_dpaa2_ts dpaa2_enable_ts;
  66
  67 struct rte_dpaa2_xstats_name_off {
  68         char name[RTE_ETH_XSTATS_NAME_SIZE];
  69         uint8_t page_id; /* dpni statistics page id */
  70         uint8_t stats_id; /* stats id in the given page */
  71 };
  72
  73 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
  74         {"ingress_multicast_frames", 0, 2},
  75         {"ingress_multicast_bytes", 0, 3},
  76         {"ingress_broadcast_frames", 0, 4},
  77         {"ingress_broadcast_bytes", 0, 5},
  78         {"egress_multicast_frames", 1, 2},
  79         {"egress_multicast_bytes", 1, 3},
  80         {"egress_broadcast_frames", 1, 4},
  81         {"egress_broadcast_bytes", 1, 5},
  82         {"ingress_filtered_frames", 2, 0},
  83         {"ingress_discarded_frames", 2, 1},
  84         {"ingress_nobuffer_discards", 2, 2},
  85         {"egress_discarded_frames", 2, 3},
  86         {"egress_confirmed_frames", 2, 4},
  87         {"cgr_reject_frames", 4, 0},
  88         {"cgr_reject_bytes", 4, 1},
  89 };
  90
  91 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
  92         RTE_ETH_FILTER_ADD,
  93         RTE_ETH_FILTER_DELETE,
  94         RTE_ETH_FILTER_UPDATE,
  95         RTE_ETH_FILTER_FLUSH,
  96         RTE_ETH_FILTER_GET
  97 };
  98
  99 static struct rte_dpaa2_driver rte_dpaa2_pmd;
 100 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
 101 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
 102                                  int wait_to_complete);
 103 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
 104 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
 105 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 106
 107 int dpaa2_logtype_pmd;
 108
 109 void
 110 rte_pmd_dpaa2_set_timestamp(enum pmd_dpaa2_ts enable)
 111 {
 112         dpaa2_enable_ts = enable;
 113 }
 114
 115 static int
 116 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 117 {
 118         int ret;
 119         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 120         struct fsl_mc_io *dpni = priv->hw;
 121
 122         PMD_INIT_FUNC_TRACE();
 123
 124         if (dpni == NULL) {
 125                 DPAA2_PMD_ERR("dpni is NULL");
 126                 return -1;
 127         }
 128
 129         if (on)
 130                 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
 131                                        priv->token, vlan_id);
 132         else
 133                 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
 134                                           priv->token, vlan_id);
 135
 136         if (ret < 0)
 137                 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
 138                               ret, vlan_id, priv->hw_id);
 139
 140         return ret;
 141 }
 142
 143 static int
 144 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 145 {
 146         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 147         struct fsl_mc_io *dpni = priv->hw;
 148         int ret;
 149
 150         PMD_INIT_FUNC_TRACE();
 151
 152         if (mask & ETH_VLAN_FILTER_MASK) {
 153                 /* VLAN Filter not avaialble */
 154                 if (!priv->max_vlan_filters) {
 155                         DPAA2_PMD_INFO("VLAN filter not available");
 156                         goto next_mask;
 157                 }
 158
 159                 if (dev->data->dev_conf.rxmode.offloads &
 160                         DEV_RX_OFFLOAD_VLAN_FILTER)
 161                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 162                                                       priv->token, true);
 163                 else
 164                         ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
 165                                                       priv->token, false);
 166                 if (ret < 0)
 167                         DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
 168         }
 169 next_mask:
 170         if (mask & ETH_VLAN_EXTEND_MASK) {
 171                 if (dev->data->dev_conf.rxmode.offloads &
 172                         DEV_RX_OFFLOAD_VLAN_EXTEND)
 173                         DPAA2_PMD_INFO("VLAN extend offload not supported");
 174         }
 175
 176         return 0;
 177 }
 178
 179 static int
 180 dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 181                       enum rte_vlan_type vlan_type __rte_unused,
 182                       uint16_t tpid)
 183 {
 184         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 185         struct fsl_mc_io *dpni = priv->hw;
 186         int ret = -ENOTSUP;
 187
 188         PMD_INIT_FUNC_TRACE();
 189
 190         /* nothing to be done for standard vlan tpids */
 191         if (tpid == 0x8100 || tpid == 0x88A8)
 192                 return 0;
 193
 194         ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 195                                    priv->token, tpid);
 196         if (ret < 0)
 197                 DPAA2_PMD_INFO("Unable to set vlan tpid = %d", ret);
 198         /* if already configured tpids, remove them first */
 199         if (ret == -EBUSY) {
 200                 struct dpni_custom_tpid_cfg tpid_list = {0};
 201
 202                 ret = dpni_get_custom_tpid(dpni, CMD_PRI_LOW,
 203                                    priv->token, &tpid_list);
 204                 if (ret < 0)
 205                         goto fail;
 206                 ret = dpni_remove_custom_tpid(dpni, CMD_PRI_LOW,
 207                                    priv->token, tpid_list.tpid1);
 208                 if (ret < 0)
 209                         goto fail;
 210                 ret = dpni_add_custom_tpid(dpni, CMD_PRI_LOW,
 211                                            priv->token, tpid);
 212         }
 213 fail:
 214         return ret;
 215 }
 216
 217 static int
 218 dpaa2_fw_version_get(struct rte_eth_dev *dev,
 219                      char *fw_version,
 220                      size_t fw_size)
 221 {
 222         int ret;
 223         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 224         struct fsl_mc_io *dpni = priv->hw;
 225         struct mc_soc_version mc_plat_info = {0};
 226         struct mc_version mc_ver_info = {0};
 227
 228         PMD_INIT_FUNC_TRACE();
 229
 230         if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
 231                 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
 232
 233         if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
 234                 DPAA2_PMD_WARN("\tmc_get_version failed");
 235
 236         ret = snprintf(fw_version, fw_size,
 237                        "%x-%d.%d.%d",
 238                        mc_plat_info.svr,
 239                        mc_ver_info.major,
 240                        mc_ver_info.minor,
 241                        mc_ver_info.revision);
 242
 243         ret += 1; /* add the size of '\0' */
 244         if (fw_size < (uint32_t)ret)
 245                 return ret;
 246         else
 247                 return 0;
 248 }
 249
 250 static int
 251 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 252 {
 253         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 254
 255         PMD_INIT_FUNC_TRACE();
 256
 257         dev_info->if_index = priv->hw_id;
 258
 259         dev_info->max_mac_addrs = priv->max_mac_filters;
 260         dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
 261         dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
 262         dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
 263         dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
 264         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 265                                         dev_rx_offloads_nodis;
 266         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 267                                         dev_tx_offloads_nodis;
 268         dev_info->speed_capa = ETH_LINK_SPEED_1G |
 269                         ETH_LINK_SPEED_2_5G |
 270                         ETH_LINK_SPEED_10G;
 271
 272         dev_info->max_hash_mac_addrs = 0;
 273         dev_info->max_vfs = 0;
 274         dev_info->max_vmdq_pools = ETH_16_POOLS;
 275         dev_info->flow_type_rss_offloads = DPAA2_RSS_OFFLOAD_ALL;
 276
 277         return 0;
 278 }
 279
 280 static int
 281 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 282 {
 283         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 284         uint16_t dist_idx;
 285         uint32_t vq_id;
 286         uint8_t num_rxqueue_per_tc;
 287         struct dpaa2_queue *mc_q, *mcq;
 288         uint32_t tot_queues;
 289         int i;
 290         struct dpaa2_queue *dpaa2_q;
 291
 292         PMD_INIT_FUNC_TRACE();
 293
 294         num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
 295         tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 296         mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 297                           RTE_CACHE_LINE_SIZE);
 298         if (!mc_q) {
 299                 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
 300                 return -1;
 301         }
 302
 303         for (i = 0; i < priv->nb_rx_queues; i++) {
 304                 mc_q->eth_data = dev->data;
 305                 priv->rx_vq[i] = mc_q++;
 306                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 307                 dpaa2_q->q_storage = rte_malloc("dq_storage",
 308                                         sizeof(struct queue_storage_info_t),
 309                                         RTE_CACHE_LINE_SIZE);
 310                 if (!dpaa2_q->q_storage)
 311                         goto fail;
 312
 313                 memset(dpaa2_q->q_storage, 0,
 314                        sizeof(struct queue_storage_info_t));
 315                 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
 316                         goto fail;
 317         }
 318
 319         for (i = 0; i < priv->nb_tx_queues; i++) {
 320                 mc_q->eth_data = dev->data;
 321                 mc_q->flow_id = 0xffff;
 322                 priv->tx_vq[i] = mc_q++;
 323                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 324                 dpaa2_q->cscn = rte_malloc(NULL,
 325                                            sizeof(struct qbman_result), 16);
 326                 if (!dpaa2_q->cscn)
 327                         goto fail_tx;
 328         }
 329
 330         vq_id = 0;
 331         for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 332                 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
 333                 mcq->tc_index = dist_idx / num_rxqueue_per_tc;
 334                 mcq->flow_id = dist_idx % num_rxqueue_per_tc;
 335                 vq_id++;
 336         }
 337
 338         return 0;
 339 fail_tx:
 340         i -= 1;
 341         while (i >= 0) {
 342                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 343                 rte_free(dpaa2_q->cscn);
 344                 priv->tx_vq[i--] = NULL;
 345         }
 346         i = priv->nb_rx_queues;
 347 fail:
 348         i -= 1;
 349         mc_q = priv->rx_vq[0];
 350         while (i >= 0) {
 351                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 352                 dpaa2_free_dq_storage(dpaa2_q->q_storage);
 353                 rte_free(dpaa2_q->q_storage);
 354                 priv->rx_vq[i--] = NULL;
 355         }
 356         rte_free(mc_q);
 357         return -1;
 358 }
 359
 360 static void
 361 dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 362 {
 363         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 364         struct dpaa2_queue *dpaa2_q;
 365         int i;
 366
 367         PMD_INIT_FUNC_TRACE();
 368
 369         /* Queue allocation base */
 370         if (priv->rx_vq[0]) {
 371                 /* cleaning up queue storage */
 372                 for (i = 0; i < priv->nb_rx_queues; i++) {
 373                         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
 374                         if (dpaa2_q->q_storage)
 375                                 rte_free(dpaa2_q->q_storage);
 376                 }
 377                 /* cleanup tx queue cscn */
 378                 for (i = 0; i < priv->nb_tx_queues; i++) {
 379                         dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 380                         rte_free(dpaa2_q->cscn);
 381                 }
 382                 /*free memory for all queues (RX+TX) */
 383                 rte_free(priv->rx_vq[0]);
 384                 priv->rx_vq[0] = NULL;
 385         }
 386 }
 387
 388 static int
 389 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 390 {
 391         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 392         struct fsl_mc_io *dpni = priv->hw;
 393         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 394         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 395         uint64_t tx_offloads = eth_conf->txmode.offloads;
 396         int rx_l3_csum_offload = false;
 397         int rx_l4_csum_offload = false;
 398         int tx_l3_csum_offload = false;
 399         int tx_l4_csum_offload = false;
 400         int ret;
 401
 402         PMD_INIT_FUNC_TRACE();
 403
 404         /* Rx offloads which are enabled by default */
 405         if (dev_rx_offloads_nodis & ~rx_offloads) {
 406                 DPAA2_PMD_INFO(
 407                 "Some of rx offloads enabled by default - requested 0x%" PRIx64
 408                 " fixed are 0x%" PRIx64,
 409                 rx_offloads, dev_rx_offloads_nodis);
 410         }
 411
 412         /* Tx offloads which are enabled by default */
 413         if (dev_tx_offloads_nodis & ~tx_offloads) {
 414                 DPAA2_PMD_INFO(
 415                 "Some of tx offloads enabled by default - requested 0x%" PRIx64
 416                 " fixed are 0x%" PRIx64,
 417                 tx_offloads, dev_tx_offloads_nodis);
 418         }
 419
 420         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 421                 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 422                         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
 423                                 priv->token, eth_conf->rxmode.max_rx_pkt_len
 424                                 - RTE_ETHER_CRC_LEN);
 425                         if (ret) {
 426                                 DPAA2_PMD_ERR(
 427                                         "Unable to set mtu. check config");
 428                                 return ret;
 429                         }
 430                         dev->data->mtu =
 431                                 dev->data->dev_conf.rxmode.max_rx_pkt_len -
 432                                 RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
 433                                 VLAN_TAG_SIZE;
 434                 } else {
 435                         return -1;
 436                 }
 437         }
 438
 439         if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
 440                 ret = dpaa2_setup_flow_dist(dev,
 441                                 eth_conf->rx_adv_conf.rss_conf.rss_hf);
 442                 if (ret) {
 443                         DPAA2_PMD_ERR("Unable to set flow distribution."
 444                                       "Check queue config");
 445                         return ret;
 446                 }
 447         }
 448
 449         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 450                 rx_l3_csum_offload = true;
 451
 452         if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
 453                 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
 454                 (rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 455                 rx_l4_csum_offload = true;
 456
 457         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 458                                DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
 459         if (ret) {
 460                 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
 461                 return ret;
 462         }
 463
 464         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 465                                DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
 466         if (ret) {
 467                 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
 468                 return ret;
 469         }
 470
 471         if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
 472                 dpaa2_enable_ts = true;
 473
 474         if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 475                 tx_l3_csum_offload = true;
 476
 477         if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
 478                 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
 479                 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
 480                 tx_l4_csum_offload = true;
 481
 482         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 483                                DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
 484         if (ret) {
 485                 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
 486                 return ret;
 487         }
 488
 489         ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 490                                DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
 491         if (ret) {
 492                 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
 493                 return ret;
 494         }
 495
 496         /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
 497          * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
 498          * to 0 for LS2 in the hardware thus disabling data/annotation
 499          * stashing. For LX2 this is fixed in hardware and thus hash result and
 500          * parse results can be received in FD using this option.
 501          */
 502         if (dpaa2_svr_family == SVR_LX2160A) {
 503                 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
 504                                        DPNI_FLCTYPE_HASH, true);
 505                 if (ret) {
 506                         DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
 507                         return ret;
 508                 }
 509         }
 510
 511         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
 512                 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
 513
 514         /* update the current status */
 515         dpaa2_dev_link_update(dev, 0);
 516
 517         return 0;
 518 }
 519
 520 /* Function to setup RX flow information. It contains traffic class ID,
 521  * flow ID, destination configuration etc.
 522  */
 523 static int
 524 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 525                          uint16_t rx_queue_id,
 526                          uint16_t nb_rx_desc,
 527                          unsigned int socket_id __rte_unused,
 528                          const struct rte_eth_rxconf *rx_conf __rte_unused,
 529                          struct rte_mempool *mb_pool)
 530 {
 531         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 532         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 533         struct dpaa2_queue *dpaa2_q;
 534         struct dpni_queue cfg;
 535         uint8_t options = 0;
 536         uint8_t flow_id;
 537         uint32_t bpid;
 538         int i, ret;
 539
 540         PMD_INIT_FUNC_TRACE();
 541
 542         DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
 543                         dev, rx_queue_id, mb_pool, rx_conf);
 544
 545         if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
 546                 bpid = mempool_to_bpid(mb_pool);
 547                 ret = dpaa2_attach_bp_list(priv,
 548                                            rte_dpaa2_bpid_info[bpid].bp_list);
 549                 if (ret)
 550                         return ret;
 551         }
 552         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 553         dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
 554         dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 555
 556         /*Get the flow id from given VQ id*/
 557         flow_id = dpaa2_q->flow_id;
 558         memset(&cfg, 0, sizeof(struct dpni_queue));
 559
 560         options = options | DPNI_QUEUE_OPT_USER_CTX;
 561         cfg.user_context = (size_t)(dpaa2_q);
 562
 563         /* check if a private cgr available. */
 564         for (i = 0; i < priv->max_cgs; i++) {
 565                 if (!priv->cgid_in_use[i]) {
 566                         priv->cgid_in_use[i] = 1;
 567                         break;
 568                 }
 569         }
 570
 571         if (i < priv->max_cgs) {
 572                 options |= DPNI_QUEUE_OPT_SET_CGID;
 573                 cfg.cgid = i;
 574                 dpaa2_q->cgid = cfg.cgid;
 575         } else {
 576                 dpaa2_q->cgid = 0xff;
 577         }
 578
 579         /*if ls2088 or rev2 device, enable the stashing */
 580
 581         if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
 582                 options |= DPNI_QUEUE_OPT_FLC;
 583                 cfg.flc.stash_control = true;
 584                 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
 585                 /* 00 00 00 - last 6 bit represent annotation, context stashing,
 586                  * data stashing setting 01 01 00 (0x14)
 587                  * (in following order ->DS AS CS)
 588                  * to enable 1 line data, 1 line annotation.
 589                  * For LX2, this setting should be 01 00 00 (0x10)
 590                  */
 591                 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
 592                         cfg.flc.value |= 0x10;
 593                 else
 594                         cfg.flc.value |= 0x14;
 595         }
 596         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 597                              dpaa2_q->tc_index, flow_id, options, &cfg);
 598         if (ret) {
 599                 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
 600                 return -1;
 601         }
 602
 603         if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
 604                 struct dpni_taildrop taildrop;
 605
 606                 taildrop.enable = 1;
 607
 608                 /* Private CGR will use tail drop length as nb_rx_desc.
 609                  * for rest cases we can use standard byte based tail drop.
 610                  * There is no HW restriction, but number of CGRs are limited,
 611                  * hence this restriction is placed.
 612                  */
 613                 if (dpaa2_q->cgid != 0xff) {
 614                         /*enabling per rx queue congestion control */
 615                         taildrop.threshold = nb_rx_desc;
 616                         taildrop.units = DPNI_CONGESTION_UNIT_FRAMES;
 617                         taildrop.oal = 0;
 618                         DPAA2_PMD_DEBUG("Enabling CG Tail Drop on queue = %d",
 619                                         rx_queue_id);
 620                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 621                                                 DPNI_CP_CONGESTION_GROUP,
 622                                                 DPNI_QUEUE_RX,
 623                                                 dpaa2_q->tc_index,
 624                                                 flow_id, &taildrop);
 625                 } else {
 626                         /*enabling per rx queue congestion control */
 627                         taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
 628                         taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
 629                         taildrop.oal = CONG_RX_OAL;
 630                         DPAA2_PMD_DEBUG("Enabling Byte based Drop on queue= %d",
 631                                         rx_queue_id);
 632                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 633                                                 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 634                                                 dpaa2_q->tc_index, flow_id,
 635                                                 &taildrop);
 636                 }
 637                 if (ret) {
 638                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 639                                       ret);
 640                         return -1;
 641                 }
 642         } else { /* Disable tail Drop */
 643                 struct dpni_taildrop taildrop = {0};
 644                 DPAA2_PMD_INFO("Tail drop is disabled on queue");
 645
 646                 taildrop.enable = 0;
 647                 if (dpaa2_q->cgid != 0xff) {
 648                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 649                                         DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
 650                                         dpaa2_q->tc_index,
 651                                         flow_id, &taildrop);
 652                 } else {
 653                         ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 654                                         DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 655                                         dpaa2_q->tc_index, flow_id, &taildrop);
 656                 }
 657                 if (ret) {
 658                         DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 659                                       ret);
 660                         return -1;
 661                 }
 662         }
 663
 664         dev->data->rx_queues[rx_queue_id] = dpaa2_q;
 665         return 0;
 666 }
 667
 668 static int
 669 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 670                          uint16_t tx_queue_id,
 671                          uint16_t nb_tx_desc __rte_unused,
 672                          unsigned int socket_id __rte_unused,
 673                          const struct rte_eth_txconf *tx_conf __rte_unused)
 674 {
 675         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 676         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 677                 priv->tx_vq[tx_queue_id];
 678         struct fsl_mc_io *dpni = priv->hw;
 679         struct dpni_queue tx_conf_cfg;
 680         struct dpni_queue tx_flow_cfg;
 681         uint8_t options = 0, flow_id;
 682         struct dpni_queue_id qid;
 683         uint32_t tc_id;
 684         int ret;
 685
 686         PMD_INIT_FUNC_TRACE();
 687
 688         /* Return if queue already configured */
 689         if (dpaa2_q->flow_id != 0xffff) {
 690                 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 691                 return 0;
 692         }
 693
 694         memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
 695         memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
 696
 697         tc_id = tx_queue_id;
 698         flow_id = 0;
 699
 700         ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
 701                              tc_id, flow_id, options, &tx_flow_cfg);
 702         if (ret) {
 703                 DPAA2_PMD_ERR("Error in setting the tx flow: "
 704                               "tc_id=%d, flow=%d err=%d",
 705                               tc_id, flow_id, ret);
 706                         return -1;
 707         }
 708
 709         dpaa2_q->flow_id = flow_id;
 710
 711         if (tx_queue_id == 0) {
 712                 /*Set tx-conf and error configuration*/
 713                 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
 714                                                     priv->token,
 715                                                     DPNI_CONF_DISABLE);
 716                 if (ret) {
 717                         DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 718                                       "err=%d", ret);
 719                         return -1;
 720                 }
 721         }
 722         dpaa2_q->tc_index = tc_id;
 723
 724         ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 725                              DPNI_QUEUE_TX, dpaa2_q->tc_index,
 726                              dpaa2_q->flow_id, &tx_flow_cfg, &qid);
 727         if (ret) {
 728                 DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
 729                 return -1;
 730         }
 731         dpaa2_q->fqid = qid.fqid;
 732
 733         if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 734                 struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 735
 736                 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 737                 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
 738                 /* Notify that the queue is not congested when the data in
 739                  * the queue is below this thershold.
 740                  */
 741                 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
 742                 cong_notif_cfg.message_ctx = 0;
 743                 cong_notif_cfg.message_iova =
 744                                 (size_t)DPAA2_VADDR_TO_IOVA(dpaa2_q->cscn);
 745                 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
 746                 cong_notif_cfg.notification_mode =
 747                                          DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
 748                                          DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
 749                                          DPNI_CONG_OPT_COHERENT_WRITE;
 750                 cong_notif_cfg.cg_point = DPNI_CP_QUEUE;
 751
 752                 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
 753                                                        priv->token,
 754                                                        DPNI_QUEUE_TX,
 755                                                        tc_id,
 756                                                        &cong_notif_cfg);
 757                 if (ret) {
 758                         DPAA2_PMD_ERR(
 759                            "Error in setting tx congestion notification: "
 760                            "err=%d", ret);
 761                         return -ret;
 762                 }
 763         }
 764         dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 765         dev->data->tx_queues[tx_queue_id] = dpaa2_q;
 766         return 0;
 767 }
 768
 769 static void
 770 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 771 {
 772         struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
 773         struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
 774         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 775         uint8_t options = 0;
 776         int ret;
 777         struct dpni_queue cfg;
 778
 779         memset(&cfg, 0, sizeof(struct dpni_queue));
 780         PMD_INIT_FUNC_TRACE();
 781         if (dpaa2_q->cgid != 0xff) {
 782                 options = DPNI_QUEUE_OPT_CLEAR_CGID;
 783                 cfg.cgid = dpaa2_q->cgid;
 784
 785                 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
 786                                      DPNI_QUEUE_RX,
 787                                      dpaa2_q->tc_index, dpaa2_q->flow_id,
 788                                      options, &cfg);
 789                 if (ret)
 790                         DPAA2_PMD_ERR("Unable to clear CGR from q=%u err=%d",
 791                                         dpaa2_q->fqid, ret);
 792                 priv->cgid_in_use[dpaa2_q->cgid] = 0;
 793                 dpaa2_q->cgid = 0xff;
 794         }
 795 }
 796
 797 static void
 798 dpaa2_dev_tx_queue_release(void *q __rte_unused)
 799 {
 800         PMD_INIT_FUNC_TRACE();
 801 }
 802
 803 static uint32_t
 804 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 805 {
 806         int32_t ret;
 807         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 808         struct dpaa2_queue *dpaa2_q;
 809         struct qbman_swp *swp;
 810         struct qbman_fq_query_np_rslt state;
 811         uint32_t frame_cnt = 0;
 812
 813         PMD_INIT_FUNC_TRACE();
 814
 815         if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 816                 ret = dpaa2_affine_qbman_swp();
 817                 if (ret) {
 818                         DPAA2_PMD_ERR("Failure in affining portal");
 819                         return -EINVAL;
 820                 }
 821         }
 822         swp = DPAA2_PER_LCORE_PORTAL;
 823
 824         dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
 825
 826         if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
 827                 frame_cnt = qbman_fq_state_frame_count(&state);
 828                 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
 829                                 rx_queue_id, frame_cnt);
 830         }
 831         return frame_cnt;
 832 }
 833
 834 static const uint32_t *
 835 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 836 {
 837         static const uint32_t ptypes[] = {
 838                 /*todo -= add more types */
 839                 RTE_PTYPE_L2_ETHER,
 840                 RTE_PTYPE_L3_IPV4,
 841                 RTE_PTYPE_L3_IPV4_EXT,
 842                 RTE_PTYPE_L3_IPV6,
 843                 RTE_PTYPE_L3_IPV6_EXT,
 844                 RTE_PTYPE_L4_TCP,
 845                 RTE_PTYPE_L4_UDP,
 846                 RTE_PTYPE_L4_SCTP,
 847                 RTE_PTYPE_L4_ICMP,
 848                 RTE_PTYPE_UNKNOWN
 849         };
 850
 851         if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
 852                 dev->rx_pkt_burst == dpaa2_dev_rx ||
 853                 dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 854                 return ptypes;
 855         return NULL;
 856 }
 857
 858 /**
 859  * Dpaa2 link Interrupt handler
 860  *
 861  * @param param
 862  *  The address of parameter (struct rte_eth_dev *) regsitered before.
 863  *
 864  * @return
 865  *  void
 866  */
 867 static void
 868 dpaa2_interrupt_handler(void *param)
 869 {
 870         struct rte_eth_dev *dev = param;
 871         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 872         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 873         int ret;
 874         int irq_index = DPNI_IRQ_INDEX;
 875         unsigned int status = 0, clear = 0;
 876
 877         PMD_INIT_FUNC_TRACE();
 878
 879         if (dpni == NULL) {
 880                 DPAA2_PMD_ERR("dpni is NULL");
 881                 return;
 882         }
 883
 884         ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
 885                                   irq_index, &status);
 886         if (unlikely(ret)) {
 887                 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
 888                 clear = 0xffffffff;
 889                 goto out;
 890         }
 891
 892         if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
 893                 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
 894                 dpaa2_dev_link_update(dev, 0);
 895                 /* calling all the apps registered for link status event */
 896                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
 897                                               NULL);
 898         }
 899 out:
 900         ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
 901                                     irq_index, clear);
 902         if (unlikely(ret))
 903                 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
 904 }
 905
 906 static int
 907 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 908 {
 909         int err = 0;
 910         struct dpaa2_dev_priv *priv = dev->data->dev_private;
 911         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 912         int irq_index = DPNI_IRQ_INDEX;
 913         unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 914
 915         PMD_INIT_FUNC_TRACE();
 916
 917         err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
 918                                 irq_index, mask);
 919         if (err < 0) {
 920                 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
 921                               strerror(-err));
 922                 return err;
 923         }
 924
 925         err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
 926                                   irq_index, enable);
 927         if (err < 0)
 928                 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
 929                               strerror(-err));
 930
 931         return err;
 932 }
 933
 934 static int
 935 dpaa2_dev_start(struct rte_eth_dev *dev)
 936 {
 937         struct rte_device *rdev = dev->device;
 938         struct rte_dpaa2_device *dpaa2_dev;
 939         struct rte_eth_dev_data *data = dev->data;
 940         struct dpaa2_dev_priv *priv = data->dev_private;
 941         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 942         struct dpni_queue cfg;
 943         struct dpni_error_cfg   err_cfg;
 944         uint16_t qdid;
 945         struct dpni_queue_id qid;
 946         struct dpaa2_queue *dpaa2_q;
 947         int ret, i;
 948         struct rte_intr_handle *intr_handle;
 949
 950         dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
 951         intr_handle = &dpaa2_dev->intr_handle;
 952
 953         PMD_INIT_FUNC_TRACE();
 954
 955         ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
 956         if (ret) {
 957                 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
 958                               priv->hw_id, ret);
 959                 return ret;
 960         }
 961
 962         /* Power up the phy. Needed to make the link go UP */
 963         dpaa2_dev_set_link_up(dev);
 964
 965         ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
 966                             DPNI_QUEUE_TX, &qdid);
 967         if (ret) {
 968                 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
 969                 return ret;
 970         }
 971         priv->qdid = qdid;
 972
 973         for (i = 0; i < data->nb_rx_queues; i++) {
 974                 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
 975                 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
 976                                      DPNI_QUEUE_RX, dpaa2_q->tc_index,
 977                                        dpaa2_q->flow_id, &cfg, &qid);
 978                 if (ret) {
 979                         DPAA2_PMD_ERR("Error in getting flow information: "
 980                                       "err=%d", ret);
 981                         return ret;
 982                 }
 983                 dpaa2_q->fqid = qid.fqid;
 984         }
 985
 986         /*checksum errors, send them to normal path and set it in annotation */
 987         err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
 988         err_cfg.errors |= DPNI_ERROR_PHE;
 989
 990         err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
 991         err_cfg.set_frame_annotation = true;
 992
 993         ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
 994                                        priv->token, &err_cfg);
 995         if (ret) {
 996                 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
 997                               ret);
 998                 return ret;
 999         }
1000
1001         /* if the interrupts were configured on this devices*/
1002         if (intr_handle && (intr_handle->fd) &&
1003             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1004                 /* Registering LSC interrupt handler */
1005                 rte_intr_callback_register(intr_handle,
1006                                            dpaa2_interrupt_handler,
1007                                            (void *)dev);
1008
1009                 /* enable vfio intr/eventfd mapping
1010                  * Interrupt index 0 is required, so we can not use
1011                  * rte_intr_enable.
1012                  */
1013                 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
1014
1015                 /* enable dpni_irqs */
1016                 dpaa2_eth_setup_irqs(dev, 1);
1017         }
1018
1019         /* Change the tx burst function if ordered queues are used */
1020         if (priv->en_ordered)
1021                 dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
1022
1023         return 0;
1024 }
1025
1026 /**
1027  *  This routine disables all traffic on the adapter by issuing a
1028  *  global reset on the MAC.
1029  */
1030 static void
1031 dpaa2_dev_stop(struct rte_eth_dev *dev)
1032 {
1033         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1034         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1035         int ret;
1036         struct rte_eth_link link;
1037         struct rte_intr_handle *intr_handle = dev->intr_handle;
1038
1039         PMD_INIT_FUNC_TRACE();
1040
1041         /* reset interrupt callback  */
1042         if (intr_handle && (intr_handle->fd) &&
1043             (dev->data->dev_conf.intr_conf.lsc != 0)) {
1044                 /*disable dpni irqs */
1045                 dpaa2_eth_setup_irqs(dev, 0);
1046
1047                 /* disable vfio intr before callback unregister */
1048                 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
1049
1050                 /* Unregistering LSC interrupt handler */
1051                 rte_intr_callback_unregister(intr_handle,
1052                                              dpaa2_interrupt_handler,
1053                                              (void *)dev);
1054         }
1055
1056         dpaa2_dev_set_link_down(dev);
1057
1058         ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
1059         if (ret) {
1060                 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
1061                               ret, priv->hw_id);
1062                 return;
1063         }
1064
1065         /* clear the recorded link status */
1066         memset(&link, 0, sizeof(link));
1067         rte_eth_linkstatus_set(dev, &link);
1068 }
1069
1070 static void
1071 dpaa2_dev_close(struct rte_eth_dev *dev)
1072 {
1073         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1074         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1075         int ret;
1076         struct rte_eth_link link;
1077
1078         PMD_INIT_FUNC_TRACE();
1079
1080         dpaa2_flow_clean(dev);
1081
1082         /* Clean the device first */
1083         ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
1084         if (ret) {
1085                 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
1086                 return;
1087         }
1088
1089         memset(&link, 0, sizeof(link));
1090         rte_eth_linkstatus_set(dev, &link);
1091 }
1092
1093 static int
1094 dpaa2_dev_promiscuous_enable(
1095                 struct rte_eth_dev *dev)
1096 {
1097         int ret;
1098         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1099         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1100
1101         PMD_INIT_FUNC_TRACE();
1102
1103         if (dpni == NULL) {
1104                 DPAA2_PMD_ERR("dpni is NULL");
1105                 return -ENODEV;
1106         }
1107
1108         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1109         if (ret < 0)
1110                 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
1111
1112         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1113         if (ret < 0)
1114                 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
1115
1116         return ret;
1117 }
1118
1119 static int
1120 dpaa2_dev_promiscuous_disable(
1121                 struct rte_eth_dev *dev)
1122 {
1123         int ret;
1124         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1125         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1126
1127         PMD_INIT_FUNC_TRACE();
1128
1129         if (dpni == NULL) {
1130                 DPAA2_PMD_ERR("dpni is NULL");
1131                 return -ENODEV;
1132         }
1133
1134         ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1135         if (ret < 0)
1136                 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
1137
1138         if (dev->data->all_multicast == 0) {
1139                 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
1140                                                  priv->token, false);
1141                 if (ret < 0)
1142                         DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
1143                                       ret);
1144         }
1145
1146         return ret;
1147 }
1148
1149 static int
1150 dpaa2_dev_allmulticast_enable(
1151                 struct rte_eth_dev *dev)
1152 {
1153         int ret;
1154         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1155         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1156
1157         PMD_INIT_FUNC_TRACE();
1158
1159         if (dpni == NULL) {
1160                 DPAA2_PMD_ERR("dpni is NULL");
1161                 return -ENODEV;
1162         }
1163
1164         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
1165         if (ret < 0)
1166                 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
1167
1168         return ret;
1169 }
1170
1171 static int
1172 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
1173 {
1174         int ret;
1175         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1176         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1177
1178         PMD_INIT_FUNC_TRACE();
1179
1180         if (dpni == NULL) {
1181                 DPAA2_PMD_ERR("dpni is NULL");
1182                 return -ENODEV;
1183         }
1184
1185         /* must remain on for all promiscuous */
1186         if (dev->data->promiscuous == 1)
1187                 return 0;
1188
1189         ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
1190         if (ret < 0)
1191                 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
1192
1193         return ret;
1194 }
1195
1196 static int
1197 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
1198 {
1199         int ret;
1200         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1201         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1202         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
1203                                 + VLAN_TAG_SIZE;
1204
1205         PMD_INIT_FUNC_TRACE();
1206
1207         if (dpni == NULL) {
1208                 DPAA2_PMD_ERR("dpni is NULL");
1209                 return -EINVAL;
1210         }
1211
1212         /* check that mtu is within the allowed range */
1213         if (mtu < RTE_ETHER_MIN_MTU || frame_size > DPAA2_MAX_RX_PKT_LEN)
1214                 return -EINVAL;
1215
1216         if (frame_size > RTE_ETHER_MAX_LEN)
1217                 dev->data->dev_conf.rxmode.offloads &=
1218                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
1219         else
1220                 dev->data->dev_conf.rxmode.offloads &=
1221                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
1222
1223         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1224
1225         /* Set the Max Rx frame length as 'mtu' +
1226          * Maximum Ethernet header length
1227          */
1228         ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1229                                         frame_size - RTE_ETHER_CRC_LEN);
1230         if (ret) {
1231                 DPAA2_PMD_ERR("Setting the max frame length failed");
1232                 return -1;
1233         }
1234         DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1235         return 0;
1236 }
1237
1238 static int
1239 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1240                        struct rte_ether_addr *addr,
1241                        __rte_unused uint32_t index,
1242                        __rte_unused uint32_t pool)
1243 {
1244         int ret;
1245         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1246         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1247
1248         PMD_INIT_FUNC_TRACE();
1249
1250         if (dpni == NULL) {
1251                 DPAA2_PMD_ERR("dpni is NULL");
1252                 return -1;
1253         }
1254
1255         ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1256                                 priv->token, addr->addr_bytes);
1257         if (ret)
1258                 DPAA2_PMD_ERR(
1259                         "error: Adding the MAC ADDR failed: err = %d", ret);
1260         return 0;
1261 }
1262
1263 static void
1264 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1265                           uint32_t index)
1266 {
1267         int ret;
1268         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1269         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1270         struct rte_eth_dev_data *data = dev->data;
1271         struct rte_ether_addr *macaddr;
1272
1273         PMD_INIT_FUNC_TRACE();
1274
1275         macaddr = &data->mac_addrs[index];
1276
1277         if (dpni == NULL) {
1278                 DPAA2_PMD_ERR("dpni is NULL");
1279                 return;
1280         }
1281
1282         ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1283                                    priv->token, macaddr->addr_bytes);
1284         if (ret)
1285                 DPAA2_PMD_ERR(
1286                         "error: Removing the MAC ADDR failed: err = %d", ret);
1287 }
1288
1289 static int
1290 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1291                        struct rte_ether_addr *addr)
1292 {
1293         int ret;
1294         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1295         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1296
1297         PMD_INIT_FUNC_TRACE();
1298
1299         if (dpni == NULL) {
1300                 DPAA2_PMD_ERR("dpni is NULL");
1301                 return -EINVAL;
1302         }
1303
1304         ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1305                                         priv->token, addr->addr_bytes);
1306
1307         if (ret)
1308                 DPAA2_PMD_ERR(
1309                         "error: Setting the MAC ADDR failed %d", ret);
1310
1311         return ret;
1312 }
1313
1314 static
1315 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1316                          struct rte_eth_stats *stats)
1317 {
1318         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1319         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1320         int32_t  retcode;
1321         uint8_t page0 = 0, page1 = 1, page2 = 2;
1322         union dpni_statistics value;
1323         int i;
1324         struct dpaa2_queue *dpaa2_rxq, *dpaa2_txq;
1325
1326         memset(&value, 0, sizeof(union dpni_statistics));
1327
1328         PMD_INIT_FUNC_TRACE();
1329
1330         if (!dpni) {
1331                 DPAA2_PMD_ERR("dpni is NULL");
1332                 return -EINVAL;
1333         }
1334
1335         if (!stats) {
1336                 DPAA2_PMD_ERR("stats is NULL");
1337                 return -EINVAL;
1338         }
1339
1340         /*Get Counters from page_0*/
1341         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1342                                       page0, 0, &value);
1343         if (retcode)
1344                 goto err;
1345
1346         stats->ipackets = value.page_0.ingress_all_frames;
1347         stats->ibytes = value.page_0.ingress_all_bytes;
1348
1349         /*Get Counters from page_1*/
1350         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1351                                       page1, 0, &value);
1352         if (retcode)
1353                 goto err;
1354
1355         stats->opackets = value.page_1.egress_all_frames;
1356         stats->obytes = value.page_1.egress_all_bytes;
1357
1358         /*Get Counters from page_2*/
1359         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1360                                       page2, 0, &value);
1361         if (retcode)
1362                 goto err;
1363
1364         /* Ingress drop frame count due to configured rules */
1365         stats->ierrors = value.page_2.ingress_filtered_frames;
1366         /* Ingress drop frame count due to error */
1367         stats->ierrors += value.page_2.ingress_discarded_frames;
1368
1369         stats->oerrors = value.page_2.egress_discarded_frames;
1370         stats->imissed = value.page_2.ingress_nobuffer_discards;
1371
1372         /* Fill in per queue stats */
1373         for (i = 0; (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) &&
1374                 (i < priv->nb_rx_queues || i < priv->nb_tx_queues); ++i) {
1375                 dpaa2_rxq = (struct dpaa2_queue *)priv->rx_vq[i];
1376                 dpaa2_txq = (struct dpaa2_queue *)priv->tx_vq[i];
1377                 if (dpaa2_rxq)
1378                         stats->q_ipackets[i] = dpaa2_rxq->rx_pkts;
1379                 if (dpaa2_txq)
1380                         stats->q_opackets[i] = dpaa2_txq->tx_pkts;
1381
1382                 /* Byte counting is not implemented */
1383                 stats->q_ibytes[i]   = 0;
1384                 stats->q_obytes[i]   = 0;
1385         }
1386
1387         return 0;
1388
1389 err:
1390         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1391         return retcode;
1392 };
1393
1394 static int
1395 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1396                      unsigned int n)
1397 {
1398         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1399         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1400         int32_t  retcode;
1401         union dpni_statistics value[5] = {};
1402         unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1403
1404         if (n < num)
1405                 return num;
1406
1407         if (xstats == NULL)
1408                 return 0;
1409
1410         /* Get Counters from page_0*/
1411         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1412                                       0, 0, &value[0]);
1413         if (retcode)
1414                 goto err;
1415
1416         /* Get Counters from page_1*/
1417         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1418                                       1, 0, &value[1]);
1419         if (retcode)
1420                 goto err;
1421
1422         /* Get Counters from page_2*/
1423         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1424                                       2, 0, &value[2]);
1425         if (retcode)
1426                 goto err;
1427
1428         for (i = 0; i < priv->max_cgs; i++) {
1429                 if (!priv->cgid_in_use[i]) {
1430                         /* Get Counters from page_4*/
1431                         retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
1432                                                       priv->token,
1433                                                       4, 0, &value[4]);
1434                         if (retcode)
1435                                 goto err;
1436                         break;
1437                 }
1438         }
1439
1440         for (i = 0; i < num; i++) {
1441                 xstats[i].id = i;
1442                 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1443                         raw.counter[dpaa2_xstats_strings[i].stats_id];
1444         }
1445         return i;
1446 err:
1447         DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1448         return retcode;
1449 }
1450
1451 static int
1452 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1453                        struct rte_eth_xstat_name *xstats_names,
1454                        unsigned int limit)
1455 {
1456         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1457
1458         if (limit < stat_cnt)
1459                 return stat_cnt;
1460
1461         if (xstats_names != NULL)
1462                 for (i = 0; i < stat_cnt; i++)
1463                         strlcpy(xstats_names[i].name,
1464                                 dpaa2_xstats_strings[i].name,
1465                                 sizeof(xstats_names[i].name));
1466
1467         return stat_cnt;
1468 }
1469
1470 static int
1471 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1472                        uint64_t *values, unsigned int n)
1473 {
1474         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1475         uint64_t values_copy[stat_cnt];
1476
1477         if (!ids) {
1478                 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1479                 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1480                 int32_t  retcode;
1481                 union dpni_statistics value[5] = {};
1482
1483                 if (n < stat_cnt)
1484                         return stat_cnt;
1485
1486                 if (!values)
1487                         return 0;
1488
1489                 /* Get Counters from page_0*/
1490                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1491                                               0, 0, &value[0]);
1492                 if (retcode)
1493                         return 0;
1494
1495                 /* Get Counters from page_1*/
1496                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1497                                               1, 0, &value[1]);
1498                 if (retcode)
1499                         return 0;
1500
1501                 /* Get Counters from page_2*/
1502                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1503                                               2, 0, &value[2]);
1504                 if (retcode)
1505                         return 0;
1506
1507                 /* Get Counters from page_4*/
1508                 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1509                                               4, 0, &value[4]);
1510                 if (retcode)
1511                         return 0;
1512
1513                 for (i = 0; i < stat_cnt; i++) {
1514                         values[i] = value[dpaa2_xstats_strings[i].page_id].
1515                                 raw.counter[dpaa2_xstats_strings[i].stats_id];
1516                 }
1517                 return stat_cnt;
1518         }
1519
1520         dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1521
1522         for (i = 0; i < n; i++) {
1523                 if (ids[i] >= stat_cnt) {
1524                         DPAA2_PMD_ERR("xstats id value isn't valid");
1525                         return -1;
1526                 }
1527                 values[i] = values_copy[ids[i]];
1528         }
1529         return n;
1530 }
1531
1532 static int
1533 dpaa2_xstats_get_names_by_id(
1534         struct rte_eth_dev *dev,
1535         struct rte_eth_xstat_name *xstats_names,
1536         const uint64_t *ids,
1537         unsigned int limit)
1538 {
1539         unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1540         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1541
1542         if (!ids)
1543                 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1544
1545         dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1546
1547         for (i = 0; i < limit; i++) {
1548                 if (ids[i] >= stat_cnt) {
1549                         DPAA2_PMD_ERR("xstats id value isn't valid");
1550                         return -1;
1551                 }
1552                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1553         }
1554         return limit;
1555 }
1556
1557 static int
1558 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1559 {
1560         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1561         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1562         int retcode;
1563         int i;
1564         struct dpaa2_queue *dpaa2_q;
1565
1566         PMD_INIT_FUNC_TRACE();
1567
1568         if (dpni == NULL) {
1569                 DPAA2_PMD_ERR("dpni is NULL");
1570                 return -EINVAL;
1571         }
1572
1573         retcode =  dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1574         if (retcode)
1575                 goto error;
1576
1577         /* Reset the per queue stats in dpaa2_queue structure */
1578         for (i = 0; i < priv->nb_rx_queues; i++) {
1579                 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1580                 if (dpaa2_q)
1581                         dpaa2_q->rx_pkts = 0;
1582         }
1583
1584         for (i = 0; i < priv->nb_tx_queues; i++) {
1585                 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
1586                 if (dpaa2_q)
1587                         dpaa2_q->tx_pkts = 0;
1588         }
1589
1590         return 0;
1591
1592 error:
1593         DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1594         return retcode;
1595 };
1596
1597 /* return 0 means link status changed, -1 means not changed */
1598 static int
1599 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1600                         int wait_to_complete __rte_unused)
1601 {
1602         int ret;
1603         struct dpaa2_dev_priv *priv = dev->data->dev_private;
1604         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1605         struct rte_eth_link link;
1606         struct dpni_link_state state = {0};
1607
1608         if (dpni == NULL) {
1609                 DPAA2_PMD_ERR("dpni is NULL");
1610                 return 0;
1611         }
1612
1613         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1614         if (ret < 0) {
1615                 DPAA2_PMD_DEBUG("error: dpni_get_link_state %d", ret);
1616                 return -1;
1617         }
1618
1619         memset(&link, 0, sizeof(struct rte_eth_link));
1620         link.link_status = state.up;
1621         link.link_speed = state.rate;
1622
1623         if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1624                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1625         else
1626                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1627
1628         ret = rte_eth_linkstatus_set(dev, &link);
1629         if (ret == -1)
1630                 DPAA2_PMD_DEBUG("No change in status");
1631         else
1632                 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1633                                link.link_status ? "Up" : "Down");
1634
1635         return ret;
1636 }
1637
1638 /**
1639  * Toggle the DPNI to enable, if not already enabled.
1640  * This is not strictly PHY up/down - it is more of logical toggling.
1641  */
1642 static int
1643 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1644 {
1645         int ret = -EINVAL;
1646         struct dpaa2_dev_priv *priv;
1647         struct fsl_mc_io *dpni;
1648         int en = 0;
1649         struct dpni_link_state state = {0};
1650
1651         priv = dev->data->dev_private;
1652         dpni = (struct fsl_mc_io *)priv->hw;
1653
1654         if (dpni == NULL) {
1655                 DPAA2_PMD_ERR("dpni is NULL");
1656                 return ret;
1657         }
1658
1659         /* Check if DPNI is currently enabled */
1660         ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1661         if (ret) {
1662                 /* Unable to obtain dpni status; Not continuing */
1663                 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1664                 return -EINVAL;
1665         }
1666
1667         /* Enable link if not already enabled */
1668         if (!en) {
1669                 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1670                 if (ret) {
1671                         DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1672                         return -EINVAL;
1673                 }
1674         }
1675         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1676         if (ret < 0) {
1677                 DPAA2_PMD_DEBUG("Unable to get link state (%d)", ret);
1678                 return -1;
1679         }
1680
1681         /* changing tx burst function to start enqueues */
1682         dev->tx_pkt_burst = dpaa2_dev_tx;
1683         dev->data->dev_link.link_status = state.up;
1684
1685         if (state.up)
1686                 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1687         else
1688                 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1689         return ret;
1690 }
1691
1692 /**
1693  * Toggle the DPNI to disable, if not already disabled.
1694  * This is not strictly PHY up/down - it is more of logical toggling.
1695  */
1696 static int
1697 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1698 {
1699         int ret = -EINVAL;
1700         struct dpaa2_dev_priv *priv;
1701         struct fsl_mc_io *dpni;
1702         int dpni_enabled = 0;
1703         int retries = 10;
1704
1705         PMD_INIT_FUNC_TRACE();
1706
1707         priv = dev->data->dev_private;
1708         dpni = (struct fsl_mc_io *)priv->hw;
1709
1710         if (dpni == NULL) {
1711                 DPAA2_PMD_ERR("Device has not yet been configured");
1712                 return ret;
1713         }
1714
1715         /*changing  tx burst function to avoid any more enqueues */
1716         dev->tx_pkt_burst = dummy_dev_tx;
1717
1718         /* Loop while dpni_disable() attempts to drain the egress FQs
1719          * and confirm them back to us.
1720          */
1721         do {
1722                 ret = dpni_disable(dpni, 0, priv->token);
1723                 if (ret) {
1724                         DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1725                         return ret;
1726                 }
1727                 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1728                 if (ret) {
1729                         DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1730                         return ret;
1731                 }
1732                 if (dpni_enabled)
1733                         /* Allow the MC some slack */
1734                         rte_delay_us(100 * 1000);
1735         } while (dpni_enabled && --retries);
1736
1737         if (!retries) {
1738                 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1739                 /* todo- we may have to manually cleanup queues.
1740                  */
1741         } else {
1742                 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1743                                dev->data->port_id);
1744         }
1745
1746         dev->data->dev_link.link_status = 0;
1747
1748         return ret;
1749 }
1750
1751 static int
1752 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1753 {
1754         int ret = -EINVAL;
1755         struct dpaa2_dev_priv *priv;
1756         struct fsl_mc_io *dpni;
1757         struct dpni_link_state state = {0};
1758
1759         PMD_INIT_FUNC_TRACE();
1760
1761         priv = dev->data->dev_private;
1762         dpni = (struct fsl_mc_io *)priv->hw;
1763
1764         if (dpni == NULL || fc_conf == NULL) {
1765                 DPAA2_PMD_ERR("device not configured");
1766                 return ret;
1767         }
1768
1769         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1770         if (ret) {
1771                 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1772                 return ret;
1773         }
1774
1775         memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1776         if (state.options & DPNI_LINK_OPT_PAUSE) {
1777                 /* DPNI_LINK_OPT_PAUSE set
1778                  *  if ASYM_PAUSE not set,
1779                  *      RX Side flow control (handle received Pause frame)
1780                  *      TX side flow control (send Pause frame)
1781                  *  if ASYM_PAUSE set,
1782                  *      RX Side flow control (handle received Pause frame)
1783                  *      No TX side flow control (send Pause frame disabled)
1784                  */
1785                 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1786                         fc_conf->mode = RTE_FC_FULL;
1787                 else
1788                         fc_conf->mode = RTE_FC_RX_PAUSE;
1789         } else {
1790                 /* DPNI_LINK_OPT_PAUSE not set
1791                  *  if ASYM_PAUSE set,
1792                  *      TX side flow control (send Pause frame)
1793                  *      No RX side flow control (No action on pause frame rx)
1794                  *  if ASYM_PAUSE not set,
1795                  *      Flow control disabled
1796                  */
1797                 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1798                         fc_conf->mode = RTE_FC_TX_PAUSE;
1799                 else
1800                         fc_conf->mode = RTE_FC_NONE;
1801         }
1802
1803         return ret;
1804 }
1805
1806 static int
1807 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1808 {
1809         int ret = -EINVAL;
1810         struct dpaa2_dev_priv *priv;
1811         struct fsl_mc_io *dpni;
1812         struct dpni_link_state state = {0};
1813         struct dpni_link_cfg cfg = {0};
1814
1815         PMD_INIT_FUNC_TRACE();
1816
1817         priv = dev->data->dev_private;
1818         dpni = (struct fsl_mc_io *)priv->hw;
1819
1820         if (dpni == NULL) {
1821                 DPAA2_PMD_ERR("dpni is NULL");
1822                 return ret;
1823         }
1824
1825         /* It is necessary to obtain the current state before setting fc_conf
1826          * as MC would return error in case rate, autoneg or duplex values are
1827          * different.
1828          */
1829         ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1830         if (ret) {
1831                 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1832                 return -1;
1833         }
1834
1835         /* Disable link before setting configuration */
1836         dpaa2_dev_set_link_down(dev);
1837
1838         /* Based on fc_conf, update cfg */
1839         cfg.rate = state.rate;
1840         cfg.options = state.options;
1841
1842         /* update cfg with fc_conf */
1843         switch (fc_conf->mode) {
1844         case RTE_FC_FULL:
1845                 /* Full flow control;
1846                  * OPT_PAUSE set, ASYM_PAUSE not set
1847                  */
1848                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1849                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1850                 break;
1851         case RTE_FC_TX_PAUSE:
1852                 /* Enable RX flow control
1853                  * OPT_PAUSE not set;
1854                  * ASYM_PAUSE set;
1855                  */
1856                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1857                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1858                 break;
1859         case RTE_FC_RX_PAUSE:
1860                 /* Enable TX Flow control
1861                  * OPT_PAUSE set
1862                  * ASYM_PAUSE set
1863                  */
1864                 cfg.options |= DPNI_LINK_OPT_PAUSE;
1865                 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1866                 break;
1867         case RTE_FC_NONE:
1868                 /* Disable Flow control
1869                  * OPT_PAUSE not set
1870                  * ASYM_PAUSE not set
1871                  */
1872                 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1873                 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1874                 break;
1875         default:
1876                 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1877                               fc_conf->mode);
1878                 return -1;
1879         }
1880
1881         ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1882         if (ret)
1883                 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1884                               ret);
1885
1886         /* Enable link */
1887         dpaa2_dev_set_link_up(dev);
1888
1889         return ret;
1890 }
1891
1892 static int
1893 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1894                           struct rte_eth_rss_conf *rss_conf)
1895 {
1896         struct rte_eth_dev_data *data = dev->data;
1897         struct rte_eth_conf *eth_conf = &data->dev_conf;
1898         int ret;
1899
1900         PMD_INIT_FUNC_TRACE();
1901
1902         if (rss_conf->rss_hf) {
1903                 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1904                 if (ret) {
1905                         DPAA2_PMD_ERR("Unable to set flow dist");
1906                         return ret;
1907                 }
1908         } else {
1909                 ret = dpaa2_remove_flow_dist(dev, 0);
1910                 if (ret) {
1911                         DPAA2_PMD_ERR("Unable to remove flow dist");
1912                         return ret;
1913                 }
1914         }
1915         eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1916         return 0;
1917 }
1918
1919 static int
1920 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1921                             struct rte_eth_rss_conf *rss_conf)
1922 {
1923         struct rte_eth_dev_data *data = dev->data;
1924         struct rte_eth_conf *eth_conf = &data->dev_conf;
1925
1926         /* dpaa2 does not support rss_key, so length should be 0*/
1927         rss_conf->rss_key_len = 0;
1928         rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1929         return 0;
1930 }
1931
1932 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
1933                 int eth_rx_queue_id,
1934                 uint16_t dpcon_id,
1935                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
1936 {
1937         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1938         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1939         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1940         uint8_t flow_id = dpaa2_ethq->flow_id;
1941         struct dpni_queue cfg;
1942         uint8_t options;
1943         int ret;
1944
1945         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
1946                 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
1947         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
1948                 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
1949         else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED)
1950                 dpaa2_ethq->cb = dpaa2_dev_process_ordered_event;
1951         else
1952                 return -EINVAL;
1953
1954         memset(&cfg, 0, sizeof(struct dpni_queue));
1955         options = DPNI_QUEUE_OPT_DEST;
1956         cfg.destination.type = DPNI_DEST_DPCON;
1957         cfg.destination.id = dpcon_id;
1958         cfg.destination.priority = queue_conf->ev.priority;
1959
1960         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
1961                 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
1962                 cfg.destination.hold_active = 1;
1963         }
1964
1965         if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ORDERED &&
1966                         !eth_priv->en_ordered) {
1967                 struct opr_cfg ocfg;
1968
1969                 /* Restoration window size = 256 frames */
1970                 ocfg.oprrws = 3;
1971                 /* Restoration window size = 512 frames for LX2 */
1972                 if (dpaa2_svr_family == SVR_LX2160A)
1973                         ocfg.oprrws = 4;
1974                 /* Auto advance NESN window enabled */
1975                 ocfg.oa = 1;
1976                 /* Late arrival window size disabled */
1977                 ocfg.olws = 0;
1978                 /* ORL resource exhaustaion advance NESN disabled */
1979                 ocfg.oeane = 0;
1980                 /* Loose ordering enabled */
1981                 ocfg.oloe = 1;
1982                 eth_priv->en_loose_ordered = 1;
1983                 /* Strict ordering enabled if explicitly set */
1984                 if (getenv("DPAA2_STRICT_ORDERING_ENABLE")) {
1985                         ocfg.oloe = 0;
1986                         eth_priv->en_loose_ordered = 0;
1987                 }
1988
1989                 ret = dpni_set_opr(dpni, CMD_PRI_LOW, eth_priv->token,
1990                                    dpaa2_ethq->tc_index, flow_id,
1991                                    OPR_OPT_CREATE, &ocfg);
1992                 if (ret) {
1993                         DPAA2_PMD_ERR("Error setting opr: ret: %d\n", ret);
1994                         return ret;
1995                 }
1996
1997                 eth_priv->en_ordered = 1;
1998         }
1999
2000         options |= DPNI_QUEUE_OPT_USER_CTX;
2001         cfg.user_context = (size_t)(dpaa2_ethq);
2002
2003         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2004                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2005         if (ret) {
2006                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2007                 return ret;
2008         }
2009
2010         memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
2011
2012         return 0;
2013 }
2014
2015 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
2016                 int eth_rx_queue_id)
2017 {
2018         struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
2019         struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
2020         struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
2021         uint8_t flow_id = dpaa2_ethq->flow_id;
2022         struct dpni_queue cfg;
2023         uint8_t options;
2024         int ret;
2025
2026         memset(&cfg, 0, sizeof(struct dpni_queue));
2027         options = DPNI_QUEUE_OPT_DEST;
2028         cfg.destination.type = DPNI_DEST_NONE;
2029
2030         ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
2031                              dpaa2_ethq->tc_index, flow_id, options, &cfg);
2032         if (ret)
2033                 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
2034
2035         return ret;
2036 }
2037
2038 static inline int
2039 dpaa2_dev_verify_filter_ops(enum rte_filter_op filter_op)
2040 {
2041         unsigned int i;
2042
2043         for (i = 0; i < RTE_DIM(dpaa2_supported_filter_ops); i++) {
2044                 if (dpaa2_supported_filter_ops[i] == filter_op)
2045                         return 0;
2046         }
2047         return -ENOTSUP;
2048 }
2049
2050 static int
2051 dpaa2_dev_flow_ctrl(struct rte_eth_dev *dev,
2052                     enum rte_filter_type filter_type,
2053                                  enum rte_filter_op filter_op,
2054                                  void *arg)
2055 {
2056         int ret = 0;
2057
2058         if (!dev)
2059                 return -ENODEV;
2060
2061         switch (filter_type) {
2062         case RTE_ETH_FILTER_GENERIC:
2063                 if (dpaa2_dev_verify_filter_ops(filter_op) < 0) {
2064                         ret = -ENOTSUP;
2065                         break;
2066                 }
2067                 *(const void **)arg = &dpaa2_flow_ops;
2068                 dpaa2_filter_type |= filter_type;
2069                 break;
2070         default:
2071                 RTE_LOG(ERR, PMD, "Filter type (%d) not supported",
2072                         filter_type);
2073                 ret = -ENOTSUP;
2074                 break;
2075         }
2076         return ret;
2077 }
2078
2079 static struct eth_dev_ops dpaa2_ethdev_ops = {
2080         .dev_configure    = dpaa2_eth_dev_configure,
2081         .dev_start            = dpaa2_dev_start,
2082         .dev_stop             = dpaa2_dev_stop,
2083         .dev_close            = dpaa2_dev_close,
2084         .promiscuous_enable   = dpaa2_dev_promiscuous_enable,
2085         .promiscuous_disable  = dpaa2_dev_promiscuous_disable,
2086         .allmulticast_enable  = dpaa2_dev_allmulticast_enable,
2087         .allmulticast_disable = dpaa2_dev_allmulticast_disable,
2088         .dev_set_link_up      = dpaa2_dev_set_link_up,
2089         .dev_set_link_down    = dpaa2_dev_set_link_down,
2090         .link_update       = dpaa2_dev_link_update,
2091         .stats_get             = dpaa2_dev_stats_get,
2092         .xstats_get            = dpaa2_dev_xstats_get,
2093         .xstats_get_by_id     = dpaa2_xstats_get_by_id,
2094         .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
2095         .xstats_get_names      = dpaa2_xstats_get_names,
2096         .stats_reset       = dpaa2_dev_stats_reset,
2097         .xstats_reset         = dpaa2_dev_stats_reset,
2098         .fw_version_get    = dpaa2_fw_version_get,
2099         .dev_infos_get     = dpaa2_dev_info_get,
2100         .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
2101         .mtu_set           = dpaa2_dev_mtu_set,
2102         .vlan_filter_set      = dpaa2_vlan_filter_set,
2103         .vlan_offload_set     = dpaa2_vlan_offload_set,
2104         .vlan_tpid_set        = dpaa2_vlan_tpid_set,
2105         .rx_queue_setup    = dpaa2_dev_rx_queue_setup,
2106         .rx_queue_release  = dpaa2_dev_rx_queue_release,
2107         .tx_queue_setup    = dpaa2_dev_tx_queue_setup,
2108         .tx_queue_release  = dpaa2_dev_tx_queue_release,
2109         .rx_queue_count       = dpaa2_dev_rx_queue_count,
2110         .flow_ctrl_get        = dpaa2_flow_ctrl_get,
2111         .flow_ctrl_set        = dpaa2_flow_ctrl_set,
2112         .mac_addr_add         = dpaa2_dev_add_mac_addr,
2113         .mac_addr_remove      = dpaa2_dev_remove_mac_addr,
2114         .mac_addr_set         = dpaa2_dev_set_mac_addr,
2115         .rss_hash_update      = dpaa2_dev_rss_hash_update,
2116         .rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
2117         .filter_ctrl          = dpaa2_dev_flow_ctrl,
2118 };
2119
2120 /* Populate the mac address from physically available (u-boot/firmware) and/or
2121  * one set by higher layers like MC (restool) etc.
2122  * Returns the table of MAC entries (multiple entries)
2123  */
2124 static int
2125 populate_mac_addr(struct fsl_mc_io *dpni_dev, struct dpaa2_dev_priv *priv,
2126                   struct rte_ether_addr *mac_entry)
2127 {
2128         int ret;
2129         struct rte_ether_addr phy_mac, prime_mac;
2130
2131         memset(&phy_mac, 0, sizeof(struct rte_ether_addr));
2132         memset(&prime_mac, 0, sizeof(struct rte_ether_addr));
2133
2134         /* Get the physical device MAC address */
2135         ret = dpni_get_port_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2136                                      phy_mac.addr_bytes);
2137         if (ret) {
2138                 DPAA2_PMD_ERR("DPNI get physical port MAC failed: %d", ret);
2139                 goto cleanup;
2140         }
2141
2142         ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW, priv->token,
2143                                         prime_mac.addr_bytes);
2144         if (ret) {
2145                 DPAA2_PMD_ERR("DPNI get Prime port MAC failed: %d", ret);
2146                 goto cleanup;
2147         }
2148
2149         /* Now that both MAC have been obtained, do:
2150          *  if not_empty_mac(phy) && phy != Prime, overwrite prime with Phy
2151          *     and return phy
2152          *  If empty_mac(phy), return prime.
2153          *  if both are empty, create random MAC, set as prime and return
2154          */
2155         if (!rte_is_zero_ether_addr(&phy_mac)) {
2156                 /* If the addresses are not same, overwrite prime */
2157                 if (!rte_is_same_ether_addr(&phy_mac, &prime_mac)) {
2158                         ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2159                                                         priv->token,
2160                                                         phy_mac.addr_bytes);
2161                         if (ret) {
2162                                 DPAA2_PMD_ERR("Unable to set MAC Address: %d",
2163                                               ret);
2164                                 goto cleanup;
2165                         }
2166                         memcpy(&prime_mac, &phy_mac,
2167                                 sizeof(struct rte_ether_addr));
2168                 }
2169         } else if (rte_is_zero_ether_addr(&prime_mac)) {
2170                 /* In case phys and prime, both are zero, create random MAC */
2171                 rte_eth_random_addr(prime_mac.addr_bytes);
2172                 ret = dpni_set_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
2173                                                 priv->token,
2174                                                 prime_mac.addr_bytes);
2175                 if (ret) {
2176                         DPAA2_PMD_ERR("Unable to set MAC Address: %d", ret);
2177                         goto cleanup;
2178                 }
2179         }
2180
2181         /* prime_mac the final MAC address */
2182         memcpy(mac_entry, &prime_mac, sizeof(struct rte_ether_addr));
2183         return 0;
2184
2185 cleanup:
2186         return -1;
2187 }
2188
2189 static int
2190 check_devargs_handler(__rte_unused const char *key, const char *value,
2191                       __rte_unused void *opaque)
2192 {
2193         if (strcmp(value, "1"))
2194                 return -1;
2195
2196         return 0;
2197 }
2198
2199 static int
2200 dpaa2_get_devargs(struct rte_devargs *devargs, const char *key)
2201 {
2202         struct rte_kvargs *kvlist;
2203
2204         if (!devargs)
2205                 return 0;
2206
2207         kvlist = rte_kvargs_parse(devargs->args, NULL);
2208         if (!kvlist)
2209                 return 0;
2210
2211         if (!rte_kvargs_count(kvlist, key)) {
2212                 rte_kvargs_free(kvlist);
2213                 return 0;
2214         }
2215
2216         if (rte_kvargs_process(kvlist, key,
2217                                check_devargs_handler, NULL) < 0) {
2218                 rte_kvargs_free(kvlist);
2219                 return 0;
2220         }
2221         rte_kvargs_free(kvlist);
2222
2223         return 1;
2224 }
2225
2226 static int
2227 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
2228 {
2229         struct rte_device *dev = eth_dev->device;
2230         struct rte_dpaa2_device *dpaa2_dev;
2231         struct fsl_mc_io *dpni_dev;
2232         struct dpni_attr attr;
2233         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2234         struct dpni_buffer_layout layout;
2235         int ret, hw_id, i;
2236
2237         PMD_INIT_FUNC_TRACE();
2238
2239         /* For secondary processes, the primary has done all the work */
2240         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
2241                 /* In case of secondary, only burst and ops API need to be
2242                  * plugged.
2243                  */
2244                 eth_dev->dev_ops = &dpaa2_ethdev_ops;
2245                 if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
2246                         eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2247                 else if (dpaa2_get_devargs(dev->devargs,
2248                                         DRIVER_NO_PREFETCH_MODE))
2249                         eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2250                 else
2251                         eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2252                 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2253                 return 0;
2254         }
2255
2256         dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
2257
2258         hw_id = dpaa2_dev->object_id;
2259
2260         dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
2261         if (!dpni_dev) {
2262                 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
2263                 return -1;
2264         }
2265
2266         dpni_dev->regs = rte_mcp_ptr_list[0];
2267         ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
2268         if (ret) {
2269                 DPAA2_PMD_ERR(
2270                              "Failure in opening dpni@%d with err code %d",
2271                              hw_id, ret);
2272                 rte_free(dpni_dev);
2273                 return -1;
2274         }
2275
2276         /* Clean the device first */
2277         ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
2278         if (ret) {
2279                 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
2280                               hw_id, ret);
2281                 goto init_err;
2282         }
2283
2284         ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
2285         if (ret) {
2286                 DPAA2_PMD_ERR(
2287                              "Failure in get dpni@%d attribute, err code %d",
2288                              hw_id, ret);
2289                 goto init_err;
2290         }
2291
2292         priv->num_rx_tc = attr.num_rx_tcs;
2293         /* only if the custom CG is enabled */
2294         if (attr.options & DPNI_OPT_CUSTOM_CG)
2295                 priv->max_cgs = attr.num_cgs;
2296         else
2297                 priv->max_cgs = 0;
2298
2299         for (i = 0; i < priv->max_cgs; i++)
2300                 priv->cgid_in_use[i] = 0;
2301
2302         for (i = 0; i < attr.num_rx_tcs; i++)
2303                 priv->nb_rx_queues += attr.num_queues;
2304
2305         /* Using number of TX queues as number of TX TCs */
2306         priv->nb_tx_queues = attr.num_tx_tcs;
2307
2308         DPAA2_PMD_DEBUG("RX-TC= %d, rx_queues= %d, tx_queues=%d, max_cgs=%d",
2309                         priv->num_rx_tc, priv->nb_rx_queues,
2310                         priv->nb_tx_queues, priv->max_cgs);
2311
2312         priv->hw = dpni_dev;
2313         priv->hw_id = hw_id;
2314         priv->options = attr.options;
2315         priv->max_mac_filters = attr.mac_filter_entries;
2316         priv->max_vlan_filters = attr.vlan_filter_entries;
2317         priv->flags = 0;
2318
2319         /* Allocate memory for hardware structure for queues */
2320         ret = dpaa2_alloc_rx_tx_queues(eth_dev);
2321         if (ret) {
2322                 DPAA2_PMD_ERR("Queue allocation Failed");
2323                 goto init_err;
2324         }
2325
2326         /* Allocate memory for storing MAC addresses.
2327          * Table of mac_filter_entries size is allocated so that RTE ether lib
2328          * can add MAC entries when rte_eth_dev_mac_addr_add is called.
2329          */
2330         eth_dev->data->mac_addrs = rte_zmalloc("dpni",
2331                 RTE_ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
2332         if (eth_dev->data->mac_addrs == NULL) {
2333                 DPAA2_PMD_ERR(
2334                    "Failed to allocate %d bytes needed to store MAC addresses",
2335                    RTE_ETHER_ADDR_LEN * attr.mac_filter_entries);
2336                 ret = -ENOMEM;
2337                 goto init_err;
2338         }
2339
2340         ret = populate_mac_addr(dpni_dev, priv, &eth_dev->data->mac_addrs[0]);
2341         if (ret) {
2342                 DPAA2_PMD_ERR("Unable to fetch MAC Address for device");
2343                 rte_free(eth_dev->data->mac_addrs);
2344                 eth_dev->data->mac_addrs = NULL;
2345                 goto init_err;
2346         }
2347
2348         /* ... tx buffer layout ... */
2349         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2350         layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2351         layout.pass_frame_status = 1;
2352         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2353                                      DPNI_QUEUE_TX, &layout);
2354         if (ret) {
2355                 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
2356                 goto init_err;
2357         }
2358
2359         /* ... tx-conf and error buffer layout ... */
2360         memset(&layout, 0, sizeof(struct dpni_buffer_layout));
2361         layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
2362         layout.pass_frame_status = 1;
2363         ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
2364                                      DPNI_QUEUE_TX_CONFIRM, &layout);
2365         if (ret) {
2366                 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
2367                              ret);
2368                 goto init_err;
2369         }
2370
2371         eth_dev->dev_ops = &dpaa2_ethdev_ops;
2372
2373         if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
2374                 eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
2375                 DPAA2_PMD_INFO("Loopback mode");
2376         } else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
2377                 eth_dev->rx_pkt_burst = dpaa2_dev_rx;
2378                 DPAA2_PMD_INFO("No Prefetch mode");
2379         } else {
2380                 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
2381         }
2382         eth_dev->tx_pkt_burst = dpaa2_dev_tx;
2383
2384         /*Init fields w.r.t. classficaition*/
2385         memset(&priv->extract.qos_key_cfg, 0, sizeof(struct dpkg_profile_cfg));
2386         priv->extract.qos_extract_param = (size_t)rte_malloc(NULL, 256, 64);
2387         if (!priv->extract.qos_extract_param) {
2388                 DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow "
2389                             " classificaiton ", ret);
2390                 goto init_err;
2391         }
2392         for (i = 0; i < MAX_TCS; i++) {
2393                 memset(&priv->extract.fs_key_cfg[i], 0,
2394                         sizeof(struct dpkg_profile_cfg));
2395                 priv->extract.fs_extract_param[i] =
2396                         (size_t)rte_malloc(NULL, 256, 64);
2397                 if (!priv->extract.fs_extract_param[i]) {
2398                         DPAA2_PMD_ERR(" Error(%d) in allocation resources for flow classificaiton",
2399                                      ret);
2400                         goto init_err;
2401                 }
2402         }
2403
2404         ret = dpni_set_max_frame_length(dpni_dev, CMD_PRI_LOW, priv->token,
2405                                         RTE_ETHER_MAX_LEN - RTE_ETHER_CRC_LEN
2406                                         + VLAN_TAG_SIZE);
2407         if (ret) {
2408                 DPAA2_PMD_ERR("Unable to set mtu. check config");
2409                 goto init_err;
2410         }
2411
2412         RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
2413         return 0;
2414 init_err:
2415         dpaa2_dev_uninit(eth_dev);
2416         return ret;
2417 }
2418
2419 static int
2420 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
2421 {
2422         struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
2423         struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
2424         int i, ret;
2425
2426         PMD_INIT_FUNC_TRACE();
2427
2428         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
2429                 return 0;
2430
2431         if (!dpni) {
2432                 DPAA2_PMD_WARN("Already closed or not started");
2433                 return -1;
2434         }
2435
2436         dpaa2_dev_close(eth_dev);
2437
2438         dpaa2_free_rx_tx_queues(eth_dev);
2439
2440         /* Close the device at underlying layer*/
2441         ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
2442         if (ret) {
2443                 DPAA2_PMD_ERR(
2444                              "Failure closing dpni device with err code %d",
2445                              ret);
2446         }
2447
2448         /* Free the allocated memory for ethernet private data and dpni*/
2449         priv->hw = NULL;
2450         rte_free(dpni);
2451
2452         for (i = 0; i < MAX_TCS; i++) {
2453                 if (priv->extract.fs_extract_param[i])
2454                         rte_free((void *)(size_t)priv->extract.fs_extract_param[i]);
2455         }
2456
2457         if (priv->extract.qos_extract_param)
2458                 rte_free((void *)(size_t)priv->extract.qos_extract_param);
2459
2460         eth_dev->dev_ops = NULL;
2461         eth_dev->rx_pkt_burst = NULL;
2462         eth_dev->tx_pkt_burst = NULL;
2463
2464         DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
2465         return 0;
2466 }
2467
2468 static int
2469 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
2470                 struct rte_dpaa2_device *dpaa2_dev)
2471 {
2472         struct rte_eth_dev *eth_dev;
2473         int diag;
2474
2475         if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
2476                 RTE_PKTMBUF_HEADROOM) {
2477                 DPAA2_PMD_ERR(
2478                 "RTE_PKTMBUF_HEADROOM(%d) shall be > DPAA2 Annotation req(%d)",
2479                 RTE_PKTMBUF_HEADROOM,
2480                 DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE);
2481
2482                 return -1;
2483         }
2484
2485         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
2486                 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
2487                 if (!eth_dev)
2488                         return -ENODEV;
2489                 eth_dev->data->dev_private = rte_zmalloc(
2490                                                 "ethdev private structure",
2491                                                 sizeof(struct dpaa2_dev_priv),
2492                                                 RTE_CACHE_LINE_SIZE);
2493                 if (eth_dev->data->dev_private == NULL) {
2494                         DPAA2_PMD_CRIT(
2495                                 "Unable to allocate memory for private data");
2496                         rte_eth_dev_release_port(eth_dev);
2497                         return -ENOMEM;
2498                 }
2499         } else {
2500                 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
2501                 if (!eth_dev)
2502                         return -ENODEV;
2503         }
2504
2505         eth_dev->device = &dpaa2_dev->device;
2506
2507         dpaa2_dev->eth_dev = eth_dev;
2508         eth_dev->data->rx_mbuf_alloc_failed = 0;
2509
2510         if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
2511                 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
2512
2513         /* Invoke PMD device initialization function */
2514         diag = dpaa2_dev_init(eth_dev);
2515         if (diag == 0) {
2516                 rte_eth_dev_probing_finish(eth_dev);
2517                 return 0;
2518         }
2519
2520         rte_eth_dev_release_port(eth_dev);
2521         return diag;
2522 }
2523
2524 static int
2525 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2526 {
2527         struct rte_eth_dev *eth_dev;
2528
2529         eth_dev = dpaa2_dev->eth_dev;
2530         dpaa2_dev_uninit(eth_dev);
2531
2532         rte_eth_dev_release_port(eth_dev);
2533
2534         return 0;
2535 }
2536
2537 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2538         .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2539         .drv_type = DPAA2_ETH,
2540         .probe = rte_dpaa2_probe,
2541         .remove = rte_dpaa2_remove,
2542 };
2543
2544 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2545 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
2546                 DRIVER_LOOPBACK_MODE "=<int> "
2547                 DRIVER_NO_PREFETCH_MODE "=<int>");
2548 RTE_INIT(dpaa2_pmd_init_log)
2549 {
2550         dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2551         if (dpaa2_logtype_pmd >= 0)
2552                 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);
2553 }