2 * This file is provided under a dual BSD/GPLv2 license. When using or
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7 * Copyright 2013-2016 Freescale Semiconductor Inc.
8 * Copyright (c) 2016 NXP.
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18 * names of any contributors may be used to endorse or promote products
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23 * ALTERNATIVELY, this software may be distributed under the terms of the
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40 #ifndef _FSL_DPNI_CMD_H
41 #define _FSL_DPNI_CMD_H
44 #define DPNI_VER_MAJOR 7
45 #define DPNI_VER_MINOR 0
48 #define DPNI_CMDID_OPEN ((0x801 << 4) | (0x1))
49 #define DPNI_CMDID_CLOSE ((0x800 << 4) | (0x1))
50 #define DPNI_CMDID_CREATE ((0x901 << 4) | (0x1))
51 #define DPNI_CMDID_DESTROY ((0x981 << 4) | (0x1))
52 #define DPNI_CMDID_GET_API_VERSION ((0xa01 << 4) | (0x1))
54 #define DPNI_CMDID_ENABLE ((0x002 << 4) | (0x1))
55 #define DPNI_CMDID_DISABLE ((0x003 << 4) | (0x1))
56 #define DPNI_CMDID_GET_ATTR ((0x004 << 4) | (0x1))
57 #define DPNI_CMDID_RESET ((0x005 << 4) | (0x1))
58 #define DPNI_CMDID_IS_ENABLED ((0x006 << 4) | (0x1))
60 #define DPNI_CMDID_SET_POOLS ((0x200 << 4) | (0x1))
61 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR ((0x20B << 4) | (0x1))
63 #define DPNI_CMDID_GET_QDID ((0x210 << 4) | (0x1))
64 #define DPNI_CMDID_GET_LINK_STATE ((0x215 << 4) | (0x1))
65 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH ((0x216 << 4) | (0x1))
66 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH ((0x217 << 4) | (0x1))
68 #define DPNI_CMDID_SET_UNICAST_PROMISC ((0x222 << 4) | (0x1))
69 #define DPNI_CMDID_GET_UNICAST_PROMISC ((0x223 << 4) | (0x1))
70 #define DPNI_CMDID_SET_PRIM_MAC ((0x224 << 4) | (0x1))
71 #define DPNI_CMDID_GET_PRIM_MAC ((0x225 << 4) | (0x1))
73 #define DPNI_CMDID_SET_RX_TC_DIST ((0x235 << 4) | (0x1))
75 #define DPNI_CMDID_GET_STATISTICS ((0x25D << 4) | (0x1))
76 #define DPNI_CMDID_RESET_STATISTICS ((0x25E << 4) | (0x1))
77 #define DPNI_CMDID_GET_QUEUE ((0x25F << 4) | (0x1))
78 #define DPNI_CMDID_SET_QUEUE ((0x260 << 4) | (0x1))
79 #define DPNI_CMDID_GET_TAILDROP ((0x261 << 4) | (0x1))
80 #define DPNI_CMDID_SET_TAILDROP ((0x262 << 4) | (0x1))
82 #define DPNI_CMDID_GET_PORT_MAC_ADDR ((0x263 << 4) | (0x1))
84 #define DPNI_CMDID_GET_BUFFER_LAYOUT ((0x264 << 4) | (0x1))
85 #define DPNI_CMDID_SET_BUFFER_LAYOUT ((0x265 << 4) | (0x1))
87 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION ((0x267 << 4) | (0x1))
88 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION ((0x268 << 4) | (0x1))
89 #define DPNI_CMDID_GET_OFFLOAD ((0x26B << 4) | (0x1))
90 #define DPNI_CMDID_SET_OFFLOAD ((0x26C << 4) | (0x1))
91 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE ((0x266 << 4) | (0x1))
92 #define DPNI_CMDID_GET_TX_CONFIRMATION_MODE ((0x26D << 4) | (0x1))
94 /* cmd, param, offset, width, type, arg_name */
95 #define DPNI_CMD_OPEN(cmd, dpni_id) \
96 MC_CMD_OP(cmd, 0, 0, 32, int, dpni_id)
98 /* cmd, param, offset, width, type, arg_name */
99 #define DPNI_CMD_CREATE(cmd, cfg) \
101 MC_CMD_OP(cmd, 0, 0, 32, uint32_t, (cfg)->options); \
102 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, (cfg)->num_queues); \
103 MC_CMD_OP(cmd, 0, 40, 8, uint8_t, (cfg)->num_tcs); \
104 MC_CMD_OP(cmd, 0, 48, 8, uint8_t, (cfg)->mac_filter_entries); \
105 MC_CMD_OP(cmd, 1, 0, 8, uint8_t, (cfg)->vlan_filter_entries); \
106 MC_CMD_OP(cmd, 1, 16, 8, uint8_t, (cfg)->qos_entries); \
107 MC_CMD_OP(cmd, 1, 32, 16, uint16_t, (cfg)->fs_entries); \
110 /* cmd, param, offset, width, type, arg_name */
111 #define DPNI_CMD_SET_POOLS(cmd, cfg) \
113 MC_CMD_OP(cmd, 0, 0, 8, uint8_t, cfg->num_dpbp); \
114 MC_CMD_OP(cmd, 0, 8, 1, int, cfg->pools[0].backup_pool); \
115 MC_CMD_OP(cmd, 0, 9, 1, int, cfg->pools[1].backup_pool); \
116 MC_CMD_OP(cmd, 0, 10, 1, int, cfg->pools[2].backup_pool); \
117 MC_CMD_OP(cmd, 0, 11, 1, int, cfg->pools[3].backup_pool); \
118 MC_CMD_OP(cmd, 0, 12, 1, int, cfg->pools[4].backup_pool); \
119 MC_CMD_OP(cmd, 0, 13, 1, int, cfg->pools[5].backup_pool); \
120 MC_CMD_OP(cmd, 0, 14, 1, int, cfg->pools[6].backup_pool); \
121 MC_CMD_OP(cmd, 0, 15, 1, int, cfg->pools[7].backup_pool); \
122 MC_CMD_OP(cmd, 0, 32, 32, int, cfg->pools[0].dpbp_id); \
123 MC_CMD_OP(cmd, 4, 32, 16, uint16_t, cfg->pools[0].buffer_size);\
124 MC_CMD_OP(cmd, 1, 0, 32, int, cfg->pools[1].dpbp_id); \
125 MC_CMD_OP(cmd, 4, 48, 16, uint16_t, cfg->pools[1].buffer_size);\
126 MC_CMD_OP(cmd, 1, 32, 32, int, cfg->pools[2].dpbp_id); \
127 MC_CMD_OP(cmd, 5, 0, 16, uint16_t, cfg->pools[2].buffer_size);\
128 MC_CMD_OP(cmd, 2, 0, 32, int, cfg->pools[3].dpbp_id); \
129 MC_CMD_OP(cmd, 5, 16, 16, uint16_t, cfg->pools[3].buffer_size);\
130 MC_CMD_OP(cmd, 2, 32, 32, int, cfg->pools[4].dpbp_id); \
131 MC_CMD_OP(cmd, 5, 32, 16, uint16_t, cfg->pools[4].buffer_size);\
132 MC_CMD_OP(cmd, 3, 0, 32, int, cfg->pools[5].dpbp_id); \
133 MC_CMD_OP(cmd, 5, 48, 16, uint16_t, cfg->pools[5].buffer_size);\
134 MC_CMD_OP(cmd, 3, 32, 32, int, cfg->pools[6].dpbp_id); \
135 MC_CMD_OP(cmd, 6, 0, 16, uint16_t, cfg->pools[6].buffer_size);\
136 MC_CMD_OP(cmd, 4, 0, 32, int, cfg->pools[7].dpbp_id); \
137 MC_CMD_OP(cmd, 6, 16, 16, uint16_t, cfg->pools[7].buffer_size);\
140 /* cmd, param, offset, width, type, arg_name */
141 #define DPNI_RSP_IS_ENABLED(cmd, en) \
142 MC_RSP_OP(cmd, 0, 0, 1, int, en)
144 /* DPNI_CMD_GET_ATTR is not used, no input parameters */
146 #define DPNI_RSP_GET_ATTR(cmd, attr) \
148 MC_RSP_OP(cmd, 0, 0, 32, uint32_t, (attr)->options); \
149 MC_RSP_OP(cmd, 0, 32, 8, uint8_t, (attr)->num_queues); \
150 MC_RSP_OP(cmd, 0, 40, 8, uint8_t, (attr)->num_tcs); \
151 MC_RSP_OP(cmd, 0, 48, 8, uint8_t, (attr)->mac_filter_entries); \
152 MC_RSP_OP(cmd, 1, 0, 8, uint8_t, (attr)->vlan_filter_entries); \
153 MC_RSP_OP(cmd, 1, 16, 8, uint8_t, (attr)->qos_entries); \
154 MC_RSP_OP(cmd, 1, 32, 16, uint16_t, (attr)->fs_entries); \
155 MC_RSP_OP(cmd, 2, 0, 8, uint8_t, (attr)->qos_key_size); \
156 MC_RSP_OP(cmd, 2, 8, 8, uint8_t, (attr)->fs_key_size); \
157 MC_RSP_OP(cmd, 2, 16, 16, uint16_t, (attr)->wriop_version); \
160 /* cmd, param, offset, width, type, arg_name */
161 #define DPNI_CMD_SET_ERRORS_BEHAVIOR(cmd, cfg) \
163 MC_CMD_OP(cmd, 0, 0, 32, uint32_t, cfg->errors); \
164 MC_CMD_OP(cmd, 0, 32, 4, enum dpni_error_action, cfg->error_action); \
165 MC_CMD_OP(cmd, 0, 36, 1, int, cfg->set_frame_annotation); \
168 #define DPNI_CMD_GET_BUFFER_LAYOUT(cmd, qtype) \
169 MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype)
171 #define DPNI_RSP_GET_BUFFER_LAYOUT(cmd, layout) \
173 MC_RSP_OP(cmd, 0, 48, 1, char, (layout)->pass_timestamp); \
174 MC_RSP_OP(cmd, 0, 49, 1, char, (layout)->pass_parser_result); \
175 MC_RSP_OP(cmd, 0, 50, 1, char, (layout)->pass_frame_status); \
176 MC_RSP_OP(cmd, 1, 0, 16, uint16_t, (layout)->private_data_size); \
177 MC_RSP_OP(cmd, 1, 16, 16, uint16_t, (layout)->data_align); \
178 MC_RSP_OP(cmd, 1, 32, 16, uint16_t, (layout)->data_head_room); \
179 MC_RSP_OP(cmd, 1, 48, 16, uint16_t, (layout)->data_tail_room); \
182 #define DPNI_CMD_SET_BUFFER_LAYOUT(cmd, qtype, layout) \
184 MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
185 MC_CMD_OP(cmd, 0, 32, 16, uint16_t, (layout)->options); \
186 MC_CMD_OP(cmd, 0, 48, 1, char, (layout)->pass_timestamp); \
187 MC_CMD_OP(cmd, 0, 49, 1, char, (layout)->pass_parser_result); \
188 MC_CMD_OP(cmd, 0, 50, 1, char, (layout)->pass_frame_status); \
189 MC_CMD_OP(cmd, 1, 0, 16, uint16_t, (layout)->private_data_size); \
190 MC_CMD_OP(cmd, 1, 16, 16, uint16_t, (layout)->data_align); \
191 MC_CMD_OP(cmd, 1, 32, 16, uint16_t, (layout)->data_head_room); \
192 MC_CMD_OP(cmd, 1, 48, 16, uint16_t, (layout)->data_tail_room); \
195 #define DPNI_CMD_SET_OFFLOAD(cmd, type, config) \
197 MC_CMD_OP(cmd, 0, 24, 8, enum dpni_offload, type); \
198 MC_CMD_OP(cmd, 0, 32, 32, uint32_t, config); \
201 #define DPNI_CMD_GET_OFFLOAD(cmd, type) \
202 MC_CMD_OP(cmd, 0, 24, 8, enum dpni_offload, type)
204 #define DPNI_RSP_GET_OFFLOAD(cmd, config) \
205 MC_RSP_OP(cmd, 0, 32, 32, uint32_t, config)
207 #define DPNI_CMD_GET_QDID(cmd, qtype) \
208 MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype)
210 /* cmd, param, offset, width, type, arg_name */
211 #define DPNI_RSP_GET_QDID(cmd, qdid) \
212 MC_RSP_OP(cmd, 0, 0, 16, uint16_t, qdid)
215 /* cmd, param, offset, width, type, arg_name */
216 #define DPNI_CMD_GET_STATISTICS(cmd, page) \
217 MC_CMD_OP(cmd, 0, 0, 8, uint8_t, page)
219 #define DPNI_RSP_GET_STATISTICS(cmd, stat) \
221 MC_RSP_OP(cmd, 0, 0, 64, uint64_t, (stat)->raw.counter[0]); \
222 MC_RSP_OP(cmd, 1, 0, 64, uint64_t, (stat)->raw.counter[1]); \
223 MC_RSP_OP(cmd, 2, 0, 64, uint64_t, (stat)->raw.counter[2]); \
224 MC_RSP_OP(cmd, 3, 0, 64, uint64_t, (stat)->raw.counter[3]); \
225 MC_RSP_OP(cmd, 4, 0, 64, uint64_t, (stat)->raw.counter[4]); \
226 MC_RSP_OP(cmd, 5, 0, 64, uint64_t, (stat)->raw.counter[5]); \
227 MC_RSP_OP(cmd, 6, 0, 64, uint64_t, (stat)->raw.counter[6]); \
230 /* cmd, param, offset, width, type, arg_name */
231 #define DPNI_RSP_GET_LINK_STATE(cmd, state) \
233 MC_RSP_OP(cmd, 0, 32, 1, int, state->up);\
234 MC_RSP_OP(cmd, 1, 0, 32, uint32_t, state->rate);\
235 MC_RSP_OP(cmd, 2, 0, 64, uint64_t, state->options);\
238 /* cmd, param, offset, width, type, arg_name */
239 #define DPNI_CMD_SET_MAX_FRAME_LENGTH(cmd, max_frame_length) \
240 MC_CMD_OP(cmd, 0, 0, 16, uint16_t, max_frame_length)
242 /* cmd, param, offset, width, type, arg_name */
243 #define DPNI_RSP_GET_MAX_FRAME_LENGTH(cmd, max_frame_length) \
244 MC_RSP_OP(cmd, 0, 0, 16, uint16_t, max_frame_length)
246 /* cmd, param, offset, width, type, arg_name */
247 #define DPNI_CMD_SET_UNICAST_PROMISC(cmd, en) \
248 MC_CMD_OP(cmd, 0, 0, 1, int, en)
250 /* cmd, param, offset, width, type, arg_name */
251 #define DPNI_RSP_GET_UNICAST_PROMISC(cmd, en) \
252 MC_RSP_OP(cmd, 0, 0, 1, int, en)
254 /* cmd, param, offset, width, type, arg_name */
255 #define DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr) \
257 MC_CMD_OP(cmd, 0, 16, 8, uint8_t, mac_addr[5]); \
258 MC_CMD_OP(cmd, 0, 24, 8, uint8_t, mac_addr[4]); \
259 MC_CMD_OP(cmd, 0, 32, 8, uint8_t, mac_addr[3]); \
260 MC_CMD_OP(cmd, 0, 40, 8, uint8_t, mac_addr[2]); \
261 MC_CMD_OP(cmd, 0, 48, 8, uint8_t, mac_addr[1]); \
262 MC_CMD_OP(cmd, 0, 56, 8, uint8_t, mac_addr[0]); \
265 /* cmd, param, offset, width, type, arg_name */
266 #define DPNI_RSP_GET_PRIMARY_MAC_ADDR(cmd, mac_addr) \
268 MC_RSP_OP(cmd, 0, 16, 8, uint8_t, mac_addr[5]); \
269 MC_RSP_OP(cmd, 0, 24, 8, uint8_t, mac_addr[4]); \
270 MC_RSP_OP(cmd, 0, 32, 8, uint8_t, mac_addr[3]); \
271 MC_RSP_OP(cmd, 0, 40, 8, uint8_t, mac_addr[2]); \
272 MC_RSP_OP(cmd, 0, 48, 8, uint8_t, mac_addr[1]); \
273 MC_RSP_OP(cmd, 0, 56, 8, uint8_t, mac_addr[0]); \
277 /* cmd, param, offset, width, type, arg_name */
278 #define DPNI_CMD_SET_RX_TC_DIST(cmd, tc_id, cfg) \
280 MC_CMD_OP(cmd, 0, 0, 16, uint16_t, cfg->dist_size); \
281 MC_CMD_OP(cmd, 0, 16, 8, uint8_t, tc_id); \
282 MC_CMD_OP(cmd, 0, 24, 4, enum dpni_dist_mode, cfg->dist_mode); \
283 MC_CMD_OP(cmd, 0, 28, 4, enum dpni_fs_miss_action, \
284 cfg->fs_cfg.miss_action); \
285 MC_CMD_OP(cmd, 0, 48, 16, uint16_t, cfg->fs_cfg.default_flow_id); \
286 MC_CMD_OP(cmd, 6, 0, 64, uint64_t, cfg->key_cfg_iova); \
289 #define DPNI_CMD_GET_QUEUE(cmd, qtype, tc, index) \
291 MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
292 MC_CMD_OP(cmd, 0, 8, 8, uint8_t, tc); \
293 MC_CMD_OP(cmd, 0, 16, 8, uint8_t, index); \
296 #define DPNI_RSP_GET_QUEUE(cmd, queue, queue_id) \
298 MC_RSP_OP(cmd, 1, 0, 32, uint32_t, (queue)->destination.id); \
299 MC_RSP_OP(cmd, 1, 48, 8, uint8_t, (queue)->destination.priority); \
300 MC_RSP_OP(cmd, 1, 56, 4, enum dpni_dest, (queue)->destination.type); \
301 MC_RSP_OP(cmd, 1, 62, 1, char, (queue)->flc.stash_control); \
302 MC_RSP_OP(cmd, 1, 63, 1, char, (queue)->destination.hold_active); \
303 MC_RSP_OP(cmd, 2, 0, 64, uint64_t, (queue)->flc.value); \
304 MC_RSP_OP(cmd, 3, 0, 64, uint64_t, (queue)->user_context); \
305 MC_RSP_OP(cmd, 4, 0, 32, uint32_t, (queue_id)->fqid); \
306 MC_RSP_OP(cmd, 4, 32, 16, uint16_t, (queue_id)->qdbin); \
309 #define DPNI_CMD_SET_QUEUE(cmd, qtype, tc, index, options, queue) \
311 MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
312 MC_CMD_OP(cmd, 0, 8, 8, uint8_t, tc); \
313 MC_CMD_OP(cmd, 0, 16, 8, uint8_t, index); \
314 MC_CMD_OP(cmd, 0, 24, 8, uint8_t, options); \
315 MC_CMD_OP(cmd, 1, 0, 32, uint32_t, (queue)->destination.id); \
316 MC_CMD_OP(cmd, 1, 48, 8, uint8_t, (queue)->destination.priority); \
317 MC_CMD_OP(cmd, 1, 56, 4, enum dpni_dest, (queue)->destination.type); \
318 MC_CMD_OP(cmd, 1, 62, 1, char, (queue)->flc.stash_control); \
319 MC_CMD_OP(cmd, 1, 63, 1, char, (queue)->destination.hold_active); \
320 MC_CMD_OP(cmd, 2, 0, 64, uint64_t, (queue)->flc.value); \
321 MC_CMD_OP(cmd, 3, 0, 64, uint64_t, (queue)->user_context); \
324 /* cmd, param, offset, width, type, arg_name */
325 #define DPNI_RSP_GET_API_VERSION(cmd, major, minor) \
327 MC_RSP_OP(cmd, 0, 0, 16, uint16_t, major);\
328 MC_RSP_OP(cmd, 0, 16, 16, uint16_t, minor);\
331 #define DPNI_CMD_GET_TAILDROP(cmd, cp, q_type, tc, q_index) \
333 MC_CMD_OP(cmd, 0, 0, 8, enum dpni_congestion_point, cp); \
334 MC_CMD_OP(cmd, 0, 8, 8, enum dpni_queue_type, q_type); \
335 MC_CMD_OP(cmd, 0, 16, 8, uint8_t, tc); \
336 MC_CMD_OP(cmd, 0, 24, 8, uint8_t, q_index); \
339 #define DPNI_RSP_GET_TAILDROP(cmd, taildrop) \
341 MC_RSP_OP(cmd, 1, 0, 1, char, (taildrop)->enable); \
342 MC_RSP_OP(cmd, 1, 16, 8, enum dpni_congestion_unit, \
343 (taildrop)->units); \
344 MC_RSP_OP(cmd, 1, 32, 32, uint32_t, (taildrop)->threshold); \
347 #define DPNI_CMD_SET_TAILDROP(cmd, cp, q_type, tc, q_index, taildrop) \
349 MC_CMD_OP(cmd, 0, 0, 8, enum dpni_congestion_point, cp); \
350 MC_CMD_OP(cmd, 0, 8, 8, enum dpni_queue_type, q_type); \
351 MC_CMD_OP(cmd, 0, 16, 8, uint8_t, tc); \
352 MC_CMD_OP(cmd, 0, 24, 8, uint8_t, q_index); \
353 MC_CMD_OP(cmd, 1, 0, 1, char, (taildrop)->enable); \
354 MC_CMD_OP(cmd, 1, 16, 8, enum dpni_congestion_unit, \
355 (taildrop)->units); \
356 MC_CMD_OP(cmd, 1, 32, 32, uint32_t, (taildrop)->threshold); \
359 #define DPNI_CMD_SET_TX_CONFIRMATION_MODE(cmd, mode) \
360 MC_CMD_OP(cmd, 0, 32, 8, enum dpni_confirmation_mode, mode)
362 #define DPNI_RSP_GET_TX_CONFIRMATION_MODE(cmd, mode) \
363 MC_RSP_OP(cmd, 0, 32, 8, enum dpni_confirmation_mode, mode)
365 #define DPNI_CMD_SET_CONGESTION_NOTIFICATION(cmd, qtype, tc, cfg) \
367 MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
368 MC_CMD_OP(cmd, 0, 8, 8, uint8_t, tc); \
369 MC_CMD_OP(cmd, 1, 0, 32, uint32_t, (cfg)->dest_cfg.dest_id); \
370 MC_CMD_OP(cmd, 1, 32, 16, uint16_t, (cfg)->notification_mode); \
371 MC_CMD_OP(cmd, 1, 48, 8, uint8_t, (cfg)->dest_cfg.priority); \
372 MC_CMD_OP(cmd, 1, 56, 4, enum dpni_dest, (cfg)->dest_cfg.dest_type); \
373 MC_CMD_OP(cmd, 1, 60, 2, enum dpni_congestion_unit, (cfg)->units); \
374 MC_CMD_OP(cmd, 2, 0, 64, uint64_t, (cfg)->message_iova); \
375 MC_CMD_OP(cmd, 3, 0, 64, uint64_t, (cfg)->message_ctx); \
376 MC_CMD_OP(cmd, 4, 0, 32, uint32_t, (cfg)->threshold_entry); \
377 MC_CMD_OP(cmd, 4, 32, 32, uint32_t, (cfg)->threshold_exit); \
380 #define DPNI_CMD_GET_CONGESTION_NOTIFICATION(cmd, qtype, tc) \
382 MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
383 MC_CMD_OP(cmd, 0, 8, 8, uint8_t, tc); \
386 #define DPNI_RSP_GET_CONGESTION_NOTIFICATION(cmd, cfg) \
388 MC_RSP_OP(cmd, 1, 0, 32, uint32_t, (cfg)->dest_cfg.dest_id); \
389 MC_RSP_OP(cmd, 1, 0, 16, uint16_t, (cfg)->notification_mode); \
390 MC_RSP_OP(cmd, 1, 48, 8, uint8_t, (cfg)->dest_cfg.priority); \
391 MC_RSP_OP(cmd, 1, 56, 4, enum dpni_dest, (cfg)->dest_cfg.dest_type); \
392 MC_RSP_OP(cmd, 1, 60, 2, enum dpni_congestion_unit, (cfg)->units); \
393 MC_RSP_OP(cmd, 2, 0, 64, uint64_t, (cfg)->message_iova); \
394 MC_RSP_OP(cmd, 3, 0, 64, uint64_t, (cfg)->message_ctx); \
395 MC_RSP_OP(cmd, 4, 0, 32, uint32_t, (cfg)->threshold_entry); \
396 MC_RSP_OP(cmd, 4, 32, 32, uint32_t, (cfg)->threshold_exit); \
399 #endif /* _FSL_DPNI_CMD_H */