1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
32 ***************************************************************************/
34 #ifndef _E1000_82571_H_
35 #define _E1000_82571_H_
37 #define ID_LED_RESERVED_F746 0xF746
38 #define ID_LED_DEFAULT_82573 ((ID_LED_DEF1_DEF2 << 12) | \
39 (ID_LED_OFF1_ON2 << 8) | \
40 (ID_LED_DEF1_DEF2 << 4) | \
43 #define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000
44 #define AN_RETRY_COUNT 5 /* Autoneg Retry Count value */
46 /* Intr Throttling - RW */
47 #define E1000_EITR_82574(_n) (0x000E8 + (0x4 * (_n)))
49 #define E1000_EIAC_82574 0x000DC /* Ext. Interrupt Auto Clear - RW */
50 #define E1000_EIAC_MASK_82574 0x01F00000
52 #define E1000_IVAR_INT_ALLOC_VALID 0x8
54 /* Manageability Operation Mode mask */
55 #define E1000_NVM_INIT_CTRL2_MNGM 0x6000
57 #define E1000_BASE1000T_STATUS 10
58 #define E1000_IDLE_ERROR_COUNT_MASK 0xFF
59 #define E1000_RECEIVE_ERROR_COUNTER 21
60 #define E1000_RECEIVE_ERROR_MAX 0xFFFF
61 bool e1000_check_phy_82574(struct e1000_hw *hw);
62 bool e1000_get_laa_state_82571(struct e1000_hw *hw);
63 void e1000_set_laa_state_82571(struct e1000_hw *hw, bool state);