1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2020 Intel Corporation
7 STATIC void e1000_reload_nvm_generic(struct e1000_hw *hw);
10 * e1000_init_nvm_ops_generic - Initialize NVM function pointers
11 * @hw: pointer to the HW structure
13 * Setups up the function pointers to no-op functions
15 void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
17 struct e1000_nvm_info *nvm = &hw->nvm;
18 DEBUGFUNC("e1000_init_nvm_ops_generic");
20 /* Initialize function pointers */
21 nvm->ops.init_params = e1000_null_ops_generic;
22 nvm->ops.acquire = e1000_null_ops_generic;
23 nvm->ops.read = e1000_null_read_nvm;
24 nvm->ops.release = e1000_null_nvm_generic;
25 nvm->ops.reload = e1000_reload_nvm_generic;
26 nvm->ops.update = e1000_null_ops_generic;
27 nvm->ops.valid_led_default = e1000_null_led_default;
28 nvm->ops.validate = e1000_null_ops_generic;
29 nvm->ops.write = e1000_null_write_nvm;
33 * e1000_null_nvm_read - No-op function, return 0
34 * @hw: pointer to the HW structure
39 s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
40 u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
41 u16 E1000_UNUSEDARG *c)
43 DEBUGFUNC("e1000_null_read_nvm");
44 UNREFERENCED_4PARAMETER(hw, a, b, c);
49 * e1000_null_nvm_generic - No-op function, return void
50 * @hw: pointer to the HW structure
52 void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)
54 DEBUGFUNC("e1000_null_nvm_generic");
55 UNREFERENCED_1PARAMETER(hw);
60 * e1000_null_led_default - No-op function, return 0
61 * @hw: pointer to the HW structure
62 * @data: dummy variable
64 s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
65 u16 E1000_UNUSEDARG *data)
67 DEBUGFUNC("e1000_null_led_default");
68 UNREFERENCED_2PARAMETER(hw, data);
73 * e1000_null_write_nvm - No-op function, return 0
74 * @hw: pointer to the HW structure
79 s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
80 u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
81 u16 E1000_UNUSEDARG *c)
83 DEBUGFUNC("e1000_null_write_nvm");
84 UNREFERENCED_4PARAMETER(hw, a, b, c);
89 * e1000_raise_eec_clk - Raise EEPROM clock
90 * @hw: pointer to the HW structure
91 * @eecd: pointer to the EEPROM
93 * Enable/Raise the EEPROM clock bit.
95 STATIC void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
97 *eecd = *eecd | E1000_EECD_SK;
98 E1000_WRITE_REG(hw, E1000_EECD, *eecd);
99 E1000_WRITE_FLUSH(hw);
100 usec_delay(hw->nvm.delay_usec);
104 * e1000_lower_eec_clk - Lower EEPROM clock
105 * @hw: pointer to the HW structure
106 * @eecd: pointer to the EEPROM
108 * Clear/Lower the EEPROM clock bit.
110 STATIC void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
112 *eecd = *eecd & ~E1000_EECD_SK;
113 E1000_WRITE_REG(hw, E1000_EECD, *eecd);
114 E1000_WRITE_FLUSH(hw);
115 usec_delay(hw->nvm.delay_usec);
119 * e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
120 * @hw: pointer to the HW structure
121 * @data: data to send to the EEPROM
122 * @count: number of bits to shift out
124 * We need to shift 'count' bits out to the EEPROM. So, the value in the
125 * "data" parameter will be shifted out to the EEPROM one bit at a time.
126 * In order to do this, "data" must be broken down into bits.
128 STATIC void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
130 struct e1000_nvm_info *nvm = &hw->nvm;
131 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
134 DEBUGFUNC("e1000_shift_out_eec_bits");
136 mask = 0x01 << (count - 1);
137 if (nvm->type == e1000_nvm_eeprom_microwire)
138 eecd &= ~E1000_EECD_DO;
140 if (nvm->type == e1000_nvm_eeprom_spi)
141 eecd |= E1000_EECD_DO;
144 eecd &= ~E1000_EECD_DI;
147 eecd |= E1000_EECD_DI;
149 E1000_WRITE_REG(hw, E1000_EECD, eecd);
150 E1000_WRITE_FLUSH(hw);
152 usec_delay(nvm->delay_usec);
154 e1000_raise_eec_clk(hw, &eecd);
155 e1000_lower_eec_clk(hw, &eecd);
160 eecd &= ~E1000_EECD_DI;
161 E1000_WRITE_REG(hw, E1000_EECD, eecd);
165 * e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
166 * @hw: pointer to the HW structure
167 * @count: number of bits to shift in
169 * In order to read a register from the EEPROM, we need to shift 'count' bits
170 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
171 * the EEPROM (setting the SK bit), and then reading the value of the data out
172 * "DO" bit. During this "shifting in" process the data in "DI" bit should
175 STATIC u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
181 DEBUGFUNC("e1000_shift_in_eec_bits");
183 eecd = E1000_READ_REG(hw, E1000_EECD);
185 eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
188 for (i = 0; i < count; i++) {
190 e1000_raise_eec_clk(hw, &eecd);
192 eecd = E1000_READ_REG(hw, E1000_EECD);
194 eecd &= ~E1000_EECD_DI;
195 if (eecd & E1000_EECD_DO)
198 e1000_lower_eec_clk(hw, &eecd);
205 * e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
206 * @hw: pointer to the HW structure
207 * @ee_reg: EEPROM flag for polling
209 * Polls the EEPROM status bit for either read or write completion based
210 * upon the value of 'ee_reg'.
212 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
214 u32 attempts = 100000;
217 DEBUGFUNC("e1000_poll_eerd_eewr_done");
219 for (i = 0; i < attempts; i++) {
220 if (ee_reg == E1000_NVM_POLL_READ)
221 reg = E1000_READ_REG(hw, E1000_EERD);
223 reg = E1000_READ_REG(hw, E1000_EEWR);
225 if (reg & E1000_NVM_RW_REG_DONE)
226 return E1000_SUCCESS;
231 return -E1000_ERR_NVM;
235 * e1000_acquire_nvm_generic - Generic request for access to EEPROM
236 * @hw: pointer to the HW structure
238 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
239 * Return successful if access grant bit set, else clear the request for
240 * EEPROM access and return -E1000_ERR_NVM (-1).
242 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
244 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
245 s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
247 DEBUGFUNC("e1000_acquire_nvm_generic");
249 E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);
250 eecd = E1000_READ_REG(hw, E1000_EECD);
253 if (eecd & E1000_EECD_GNT)
256 eecd = E1000_READ_REG(hw, E1000_EECD);
261 eecd &= ~E1000_EECD_REQ;
262 E1000_WRITE_REG(hw, E1000_EECD, eecd);
263 DEBUGOUT("Could not acquire NVM grant\n");
264 return -E1000_ERR_NVM;
267 return E1000_SUCCESS;
271 * e1000_standby_nvm - Return EEPROM to standby state
272 * @hw: pointer to the HW structure
274 * Return the EEPROM to a standby state.
276 STATIC void e1000_standby_nvm(struct e1000_hw *hw)
278 struct e1000_nvm_info *nvm = &hw->nvm;
279 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
281 DEBUGFUNC("e1000_standby_nvm");
283 if (nvm->type == e1000_nvm_eeprom_microwire) {
284 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
285 E1000_WRITE_REG(hw, E1000_EECD, eecd);
286 E1000_WRITE_FLUSH(hw);
287 usec_delay(nvm->delay_usec);
289 e1000_raise_eec_clk(hw, &eecd);
292 eecd |= E1000_EECD_CS;
293 E1000_WRITE_REG(hw, E1000_EECD, eecd);
294 E1000_WRITE_FLUSH(hw);
295 usec_delay(nvm->delay_usec);
297 e1000_lower_eec_clk(hw, &eecd);
298 } else if (nvm->type == e1000_nvm_eeprom_spi) {
299 /* Toggle CS to flush commands */
300 eecd |= E1000_EECD_CS;
301 E1000_WRITE_REG(hw, E1000_EECD, eecd);
302 E1000_WRITE_FLUSH(hw);
303 usec_delay(nvm->delay_usec);
304 eecd &= ~E1000_EECD_CS;
305 E1000_WRITE_REG(hw, E1000_EECD, eecd);
306 E1000_WRITE_FLUSH(hw);
307 usec_delay(nvm->delay_usec);
312 * e1000_stop_nvm - Terminate EEPROM command
313 * @hw: pointer to the HW structure
315 * Terminates the current command by inverting the EEPROM's chip select pin.
317 void e1000_stop_nvm(struct e1000_hw *hw)
321 DEBUGFUNC("e1000_stop_nvm");
323 eecd = E1000_READ_REG(hw, E1000_EECD);
324 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
326 eecd |= E1000_EECD_CS;
327 e1000_lower_eec_clk(hw, &eecd);
328 } else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {
329 /* CS on Microwire is active-high */
330 eecd &= ~(E1000_EECD_CS | E1000_EECD_DI);
331 E1000_WRITE_REG(hw, E1000_EECD, eecd);
332 e1000_raise_eec_clk(hw, &eecd);
333 e1000_lower_eec_clk(hw, &eecd);
338 * e1000_release_nvm_generic - Release exclusive access to EEPROM
339 * @hw: pointer to the HW structure
341 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
343 void e1000_release_nvm_generic(struct e1000_hw *hw)
347 DEBUGFUNC("e1000_release_nvm_generic");
351 eecd = E1000_READ_REG(hw, E1000_EECD);
352 eecd &= ~E1000_EECD_REQ;
353 E1000_WRITE_REG(hw, E1000_EECD, eecd);
357 * e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
358 * @hw: pointer to the HW structure
360 * Setups the EEPROM for reading and writing.
362 STATIC s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
364 struct e1000_nvm_info *nvm = &hw->nvm;
365 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
368 DEBUGFUNC("e1000_ready_nvm_eeprom");
370 if (nvm->type == e1000_nvm_eeprom_microwire) {
371 /* Clear SK and DI */
372 eecd &= ~(E1000_EECD_DI | E1000_EECD_SK);
373 E1000_WRITE_REG(hw, E1000_EECD, eecd);
375 eecd |= E1000_EECD_CS;
376 E1000_WRITE_REG(hw, E1000_EECD, eecd);
377 } else if (nvm->type == e1000_nvm_eeprom_spi) {
378 u16 timeout = NVM_MAX_RETRY_SPI;
380 /* Clear SK and CS */
381 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
382 E1000_WRITE_REG(hw, E1000_EECD, eecd);
383 E1000_WRITE_FLUSH(hw);
386 /* Read "Status Register" repeatedly until the LSB is cleared.
387 * The EEPROM will signal that the command has been completed
388 * by clearing bit 0 of the internal status register. If it's
389 * not cleared within 'timeout', then error out.
392 e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
393 hw->nvm.opcode_bits);
394 spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
395 if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
399 e1000_standby_nvm(hw);
404 DEBUGOUT("SPI NVM Status error\n");
405 return -E1000_ERR_NVM;
409 return E1000_SUCCESS;
413 * e1000_read_nvm_spi - Read EEPROM's using SPI
414 * @hw: pointer to the HW structure
415 * @offset: offset of word in the EEPROM to read
416 * @words: number of words to read
417 * @data: word read from the EEPROM
419 * Reads a 16 bit word from the EEPROM.
421 s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
423 struct e1000_nvm_info *nvm = &hw->nvm;
427 u8 read_opcode = NVM_READ_OPCODE_SPI;
429 DEBUGFUNC("e1000_read_nvm_spi");
431 /* A check for invalid values: offset too large, too many words,
432 * and not enough words.
434 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
436 DEBUGOUT("nvm parameter(s) out of bounds\n");
437 return -E1000_ERR_NVM;
440 ret_val = nvm->ops.acquire(hw);
444 ret_val = e1000_ready_nvm_eeprom(hw);
448 e1000_standby_nvm(hw);
450 if ((nvm->address_bits == 8) && (offset >= 128))
451 read_opcode |= NVM_A8_OPCODE_SPI;
453 /* Send the READ command (opcode + addr) */
454 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
455 e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
457 /* Read the data. SPI NVMs increment the address with each byte
458 * read and will roll over if reading beyond the end. This allows
459 * us to read the whole NVM from any offset
461 for (i = 0; i < words; i++) {
462 word_in = e1000_shift_in_eec_bits(hw, 16);
463 data[i] = (word_in >> 8) | (word_in << 8);
467 nvm->ops.release(hw);
473 * e1000_read_nvm_microwire - Reads EEPROM's using microwire
474 * @hw: pointer to the HW structure
475 * @offset: offset of word in the EEPROM to read
476 * @words: number of words to read
477 * @data: word read from the EEPROM
479 * Reads a 16 bit word from the EEPROM.
481 s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
484 struct e1000_nvm_info *nvm = &hw->nvm;
487 u8 read_opcode = NVM_READ_OPCODE_MICROWIRE;
489 DEBUGFUNC("e1000_read_nvm_microwire");
491 /* A check for invalid values: offset too large, too many words,
492 * and not enough words.
494 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
496 DEBUGOUT("nvm parameter(s) out of bounds\n");
497 return -E1000_ERR_NVM;
500 ret_val = nvm->ops.acquire(hw);
504 ret_val = e1000_ready_nvm_eeprom(hw);
508 for (i = 0; i < words; i++) {
509 /* Send the READ command (opcode + addr) */
510 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
511 e1000_shift_out_eec_bits(hw, (u16)(offset + i),
514 /* Read the data. For microwire, each word requires the
515 * overhead of setup and tear-down.
517 data[i] = e1000_shift_in_eec_bits(hw, 16);
518 e1000_standby_nvm(hw);
522 nvm->ops.release(hw);
528 * e1000_read_nvm_eerd - Reads EEPROM using EERD register
529 * @hw: pointer to the HW structure
530 * @offset: offset of word in the EEPROM to read
531 * @words: number of words to read
532 * @data: word read from the EEPROM
534 * Reads a 16 bit word from the EEPROM using the EERD register.
536 s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
538 struct e1000_nvm_info *nvm = &hw->nvm;
540 s32 ret_val = E1000_SUCCESS;
542 DEBUGFUNC("e1000_read_nvm_eerd");
544 /* A check for invalid values: offset too large, too many words,
545 * too many words for the offset, and not enough words.
547 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
549 DEBUGOUT("nvm parameter(s) out of bounds\n");
550 return -E1000_ERR_NVM;
553 for (i = 0; i < words; i++) {
554 eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) +
555 E1000_NVM_RW_REG_START;
557 E1000_WRITE_REG(hw, E1000_EERD, eerd);
558 ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
562 data[i] = (E1000_READ_REG(hw, E1000_EERD) >>
563 E1000_NVM_RW_REG_DATA);
567 DEBUGOUT1("NVM read error: %d\n", ret_val);
573 * e1000_write_nvm_spi - Write to EEPROM using SPI
574 * @hw: pointer to the HW structure
575 * @offset: offset within the EEPROM to be written to
576 * @words: number of words to write
577 * @data: 16 bit word(s) to be written to the EEPROM
579 * Writes data to EEPROM at offset using SPI interface.
581 * If e1000_update_nvm_checksum is not called after this function , the
582 * EEPROM will most likely contain an invalid checksum.
584 s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
586 struct e1000_nvm_info *nvm = &hw->nvm;
587 s32 ret_val = -E1000_ERR_NVM;
590 DEBUGFUNC("e1000_write_nvm_spi");
592 /* A check for invalid values: offset too large, too many words,
593 * and not enough words.
595 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
597 DEBUGOUT("nvm parameter(s) out of bounds\n");
598 return -E1000_ERR_NVM;
601 while (widx < words) {
602 u8 write_opcode = NVM_WRITE_OPCODE_SPI;
604 ret_val = nvm->ops.acquire(hw);
608 ret_val = e1000_ready_nvm_eeprom(hw);
610 nvm->ops.release(hw);
614 e1000_standby_nvm(hw);
616 /* Send the WRITE ENABLE command (8 bit opcode) */
617 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
620 e1000_standby_nvm(hw);
622 /* Some SPI eeproms use the 8th address bit embedded in the
625 if ((nvm->address_bits == 8) && (offset >= 128))
626 write_opcode |= NVM_A8_OPCODE_SPI;
628 /* Send the Write command (8-bit opcode + addr) */
629 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
630 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
633 /* Loop to allow for up to whole page write of eeprom */
634 while (widx < words) {
635 u16 word_out = data[widx];
636 word_out = (word_out >> 8) | (word_out << 8);
637 e1000_shift_out_eec_bits(hw, word_out, 16);
640 if ((((offset + widx) * 2) % nvm->page_size) == 0) {
641 e1000_standby_nvm(hw);
646 nvm->ops.release(hw);
653 * e1000_write_nvm_microwire - Writes EEPROM using microwire
654 * @hw: pointer to the HW structure
655 * @offset: offset within the EEPROM to be written to
656 * @words: number of words to write
657 * @data: 16 bit word(s) to be written to the EEPROM
659 * Writes data to EEPROM at offset using microwire interface.
661 * If e1000_update_nvm_checksum is not called after this function , the
662 * EEPROM will most likely contain an invalid checksum.
664 s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
667 struct e1000_nvm_info *nvm = &hw->nvm;
670 u16 words_written = 0;
673 DEBUGFUNC("e1000_write_nvm_microwire");
675 /* A check for invalid values: offset too large, too many words,
676 * and not enough words.
678 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
680 DEBUGOUT("nvm parameter(s) out of bounds\n");
681 return -E1000_ERR_NVM;
684 ret_val = nvm->ops.acquire(hw);
688 ret_val = e1000_ready_nvm_eeprom(hw);
692 e1000_shift_out_eec_bits(hw, NVM_EWEN_OPCODE_MICROWIRE,
693 (u16)(nvm->opcode_bits + 2));
695 e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
697 e1000_standby_nvm(hw);
699 while (words_written < words) {
700 e1000_shift_out_eec_bits(hw, NVM_WRITE_OPCODE_MICROWIRE,
703 e1000_shift_out_eec_bits(hw, (u16)(offset + words_written),
706 e1000_shift_out_eec_bits(hw, data[words_written], 16);
708 e1000_standby_nvm(hw);
710 for (widx = 0; widx < 200; widx++) {
711 eecd = E1000_READ_REG(hw, E1000_EECD);
712 if (eecd & E1000_EECD_DO)
718 DEBUGOUT("NVM Write did not complete\n");
719 ret_val = -E1000_ERR_NVM;
723 e1000_standby_nvm(hw);
728 e1000_shift_out_eec_bits(hw, NVM_EWDS_OPCODE_MICROWIRE,
729 (u16)(nvm->opcode_bits + 2));
731 e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
734 nvm->ops.release(hw);
740 * e1000_read_pba_string_generic - Read device part number
741 * @hw: pointer to the HW structure
742 * @pba_num: pointer to device part number
743 * @pba_num_size: size of part number buffer
745 * Reads the product board assembly (PBA) number from the EEPROM and stores
746 * the value in pba_num.
748 s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
757 DEBUGFUNC("e1000_read_pba_string_generic");
759 if ((hw->mac.type == e1000_i210 ||
760 hw->mac.type == e1000_i211) &&
761 !e1000_get_flash_presence_i210(hw)) {
762 DEBUGOUT("Flashless no PBA string\n");
763 return -E1000_ERR_NVM_PBA_SECTION;
766 if (pba_num == NULL) {
767 DEBUGOUT("PBA string buffer was null\n");
768 return -E1000_ERR_INVALID_ARGUMENT;
771 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
773 DEBUGOUT("NVM Read Error\n");
777 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
779 DEBUGOUT("NVM Read Error\n");
783 /* if nvm_data is not ptr guard the PBA must be in legacy format which
784 * means pba_ptr is actually our second data word for the PBA number
785 * and we can decode it into an ascii string
787 if (nvm_data != NVM_PBA_PTR_GUARD) {
788 DEBUGOUT("NVM PBA number is not stored as string\n");
790 /* make sure callers buffer is big enough to store the PBA */
791 if (pba_num_size < E1000_PBANUM_LENGTH) {
792 DEBUGOUT("PBA string buffer too small\n");
793 return E1000_ERR_NO_SPACE;
796 /* extract hex string from data and pba_ptr */
797 pba_num[0] = (nvm_data >> 12) & 0xF;
798 pba_num[1] = (nvm_data >> 8) & 0xF;
799 pba_num[2] = (nvm_data >> 4) & 0xF;
800 pba_num[3] = nvm_data & 0xF;
801 pba_num[4] = (pba_ptr >> 12) & 0xF;
802 pba_num[5] = (pba_ptr >> 8) & 0xF;
805 pba_num[8] = (pba_ptr >> 4) & 0xF;
806 pba_num[9] = pba_ptr & 0xF;
808 /* put a null character on the end of our string */
811 /* switch all the data but the '-' to hex char */
812 for (offset = 0; offset < 10; offset++) {
813 if (pba_num[offset] < 0xA)
814 pba_num[offset] += '0';
815 else if (pba_num[offset] < 0x10)
816 pba_num[offset] += 'A' - 0xA;
819 return E1000_SUCCESS;
822 ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
824 DEBUGOUT("NVM Read Error\n");
828 if (length == 0xFFFF || length == 0) {
829 DEBUGOUT("NVM PBA number section invalid length\n");
830 return -E1000_ERR_NVM_PBA_SECTION;
832 /* check if pba_num buffer is big enough */
833 if (pba_num_size < (((u32)length * 2) - 1)) {
834 DEBUGOUT("PBA string buffer too small\n");
835 return -E1000_ERR_NO_SPACE;
838 /* trim pba length from start of string */
842 for (offset = 0; offset < length; offset++) {
843 ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);
845 DEBUGOUT("NVM Read Error\n");
848 pba_num[offset * 2] = (u8)(nvm_data >> 8);
849 pba_num[(offset * 2) + 1] = (u8)(nvm_data & 0xFF);
851 pba_num[offset * 2] = '\0';
853 return E1000_SUCCESS;
857 * e1000_read_pba_length_generic - Read device part number length
858 * @hw: pointer to the HW structure
859 * @pba_num_size: size of part number buffer
861 * Reads the product board assembly (PBA) number length from the EEPROM and
862 * stores the value in pba_num_size.
864 s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size)
871 DEBUGFUNC("e1000_read_pba_length_generic");
873 if (pba_num_size == NULL) {
874 DEBUGOUT("PBA buffer size was null\n");
875 return -E1000_ERR_INVALID_ARGUMENT;
878 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
880 DEBUGOUT("NVM Read Error\n");
884 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
886 DEBUGOUT("NVM Read Error\n");
890 /* if data is not ptr guard the PBA must be in legacy format */
891 if (nvm_data != NVM_PBA_PTR_GUARD) {
892 *pba_num_size = E1000_PBANUM_LENGTH;
893 return E1000_SUCCESS;
896 ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
898 DEBUGOUT("NVM Read Error\n");
902 if (length == 0xFFFF || length == 0) {
903 DEBUGOUT("NVM PBA number section invalid length\n");
904 return -E1000_ERR_NVM_PBA_SECTION;
907 /* Convert from length in u16 values to u8 chars, add 1 for NULL,
908 * and subtract 2 because length field is included in length.
910 *pba_num_size = ((u32)length * 2) - 1;
912 return E1000_SUCCESS;
916 * e1000_read_pba_num_generic - Read device part number
917 * @hw: pointer to the HW structure
918 * @pba_num: pointer to device part number
920 * Reads the product board assembly (PBA) number from the EEPROM and stores
921 * the value in pba_num.
923 s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num)
928 DEBUGFUNC("e1000_read_pba_num_generic");
930 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
932 DEBUGOUT("NVM Read Error\n");
934 } else if (nvm_data == NVM_PBA_PTR_GUARD) {
935 DEBUGOUT("NVM Not Supported\n");
936 return -E1000_NOT_IMPLEMENTED;
938 *pba_num = (u32)(nvm_data << 16);
940 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
942 DEBUGOUT("NVM Read Error\n");
945 *pba_num |= nvm_data;
947 return E1000_SUCCESS;
953 * @hw: pointer to the HW structure
954 * @eeprom_buf: optional pointer to EEPROM image
955 * @eeprom_buf_size: size of EEPROM image in words
956 * @max_pba_block_size: PBA block size limit
957 * @pba: pointer to output PBA structure
959 * Reads PBA from EEPROM image when eeprom_buf is not NULL.
960 * Reads PBA from physical EEPROM device when eeprom_buf is NULL.
963 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
964 u32 eeprom_buf_size, u16 max_pba_block_size,
965 struct e1000_pba *pba)
971 return -E1000_ERR_PARAM;
973 if (eeprom_buf == NULL) {
974 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2,
979 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
980 pba->word[0] = eeprom_buf[NVM_PBA_OFFSET_0];
981 pba->word[1] = eeprom_buf[NVM_PBA_OFFSET_1];
983 return -E1000_ERR_PARAM;
987 if (pba->word[0] == NVM_PBA_PTR_GUARD) {
988 if (pba->pba_block == NULL)
989 return -E1000_ERR_PARAM;
991 ret_val = e1000_get_pba_block_size(hw, eeprom_buf,
997 if (pba_block_size > max_pba_block_size)
998 return -E1000_ERR_PARAM;
1000 if (eeprom_buf == NULL) {
1001 ret_val = e1000_read_nvm(hw, pba->word[1],
1007 if (eeprom_buf_size > (u32)(pba->word[1] +
1009 memcpy(pba->pba_block,
1010 &eeprom_buf[pba->word[1]],
1011 pba_block_size * sizeof(u16));
1013 return -E1000_ERR_PARAM;
1018 return E1000_SUCCESS;
1022 * e1000_write_pba_raw
1023 * @hw: pointer to the HW structure
1024 * @eeprom_buf: optional pointer to EEPROM image
1025 * @eeprom_buf_size: size of EEPROM image in words
1026 * @pba: pointer to PBA structure
1028 * Writes PBA to EEPROM image when eeprom_buf is not NULL.
1029 * Writes PBA to physical EEPROM device when eeprom_buf is NULL.
1032 s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
1033 u32 eeprom_buf_size, struct e1000_pba *pba)
1038 return -E1000_ERR_PARAM;
1040 if (eeprom_buf == NULL) {
1041 ret_val = e1000_write_nvm(hw, NVM_PBA_OFFSET_0, 2,
1046 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
1047 eeprom_buf[NVM_PBA_OFFSET_0] = pba->word[0];
1048 eeprom_buf[NVM_PBA_OFFSET_1] = pba->word[1];
1050 return -E1000_ERR_PARAM;
1054 if (pba->word[0] == NVM_PBA_PTR_GUARD) {
1055 if (pba->pba_block == NULL)
1056 return -E1000_ERR_PARAM;
1058 if (eeprom_buf == NULL) {
1059 ret_val = e1000_write_nvm(hw, pba->word[1],
1065 if (eeprom_buf_size > (u32)(pba->word[1] +
1066 pba->pba_block[0])) {
1067 memcpy(&eeprom_buf[pba->word[1]],
1069 pba->pba_block[0] * sizeof(u16));
1071 return -E1000_ERR_PARAM;
1076 return E1000_SUCCESS;
1080 * e1000_get_pba_block_size
1081 * @hw: pointer to the HW structure
1082 * @eeprom_buf: optional pointer to EEPROM image
1083 * @eeprom_buf_size: size of EEPROM image in words
1084 * @pba_data_size: pointer to output variable
1086 * Returns the size of the PBA block in words. Function operates on EEPROM
1087 * image if the eeprom_buf pointer is not NULL otherwise it accesses physical
1091 s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
1092 u32 eeprom_buf_size, u16 *pba_block_size)
1098 DEBUGFUNC("e1000_get_pba_block_size");
1100 if (eeprom_buf == NULL) {
1101 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2, &pba_word[0]);
1105 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
1106 pba_word[0] = eeprom_buf[NVM_PBA_OFFSET_0];
1107 pba_word[1] = eeprom_buf[NVM_PBA_OFFSET_1];
1109 return -E1000_ERR_PARAM;
1113 if (pba_word[0] == NVM_PBA_PTR_GUARD) {
1114 if (eeprom_buf == NULL) {
1115 ret_val = e1000_read_nvm(hw, pba_word[1] + 0, 1,
1120 if (eeprom_buf_size > pba_word[1])
1121 length = eeprom_buf[pba_word[1] + 0];
1123 return -E1000_ERR_PARAM;
1126 if (length == 0xFFFF || length == 0)
1127 return -E1000_ERR_NVM_PBA_SECTION;
1129 /* PBA number in legacy format, there is no PBA Block. */
1133 if (pba_block_size != NULL)
1134 *pba_block_size = length;
1136 return E1000_SUCCESS;
1140 * e1000_read_mac_addr_generic - Read device MAC address
1141 * @hw: pointer to the HW structure
1143 * Reads the device MAC address from the EEPROM and stores the value.
1144 * Since devices with two ports use the same EEPROM, we increment the
1145 * last bit in the MAC address for the second port.
1147 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
1153 rar_high = E1000_READ_REG(hw, E1000_RAH(0));
1154 rar_low = E1000_READ_REG(hw, E1000_RAL(0));
1156 for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
1157 hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
1159 for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
1160 hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
1162 for (i = 0; i < ETH_ADDR_LEN; i++)
1163 hw->mac.addr[i] = hw->mac.perm_addr[i];
1165 return E1000_SUCCESS;
1169 * e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
1170 * @hw: pointer to the HW structure
1172 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
1173 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
1175 s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
1181 DEBUGFUNC("e1000_validate_nvm_checksum_generic");
1183 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1184 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1186 DEBUGOUT("NVM Read Error\n");
1189 checksum += nvm_data;
1192 if (checksum != (u16) NVM_SUM) {
1193 DEBUGOUT("NVM Checksum Invalid\n");
1194 return -E1000_ERR_NVM;
1197 return E1000_SUCCESS;
1201 * e1000_update_nvm_checksum_generic - Update EEPROM checksum
1202 * @hw: pointer to the HW structure
1204 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
1205 * up to the checksum. Then calculates the EEPROM checksum and writes the
1206 * value to the EEPROM.
1208 s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
1214 DEBUGFUNC("e1000_update_nvm_checksum");
1216 for (i = 0; i < NVM_CHECKSUM_REG; i++) {
1217 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1219 DEBUGOUT("NVM Read Error while updating checksum.\n");
1222 checksum += nvm_data;
1224 checksum = (u16) NVM_SUM - checksum;
1225 ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
1227 DEBUGOUT("NVM Write Error while updating checksum.\n");
1233 * e1000_reload_nvm_generic - Reloads EEPROM
1234 * @hw: pointer to the HW structure
1236 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
1237 * extended control register.
1239 STATIC void e1000_reload_nvm_generic(struct e1000_hw *hw)
1243 DEBUGFUNC("e1000_reload_nvm_generic");
1246 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1247 ctrl_ext |= E1000_CTRL_EXT_EE_RST;
1248 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1249 E1000_WRITE_FLUSH(hw);
1253 * e1000_get_fw_version - Get firmware version information
1254 * @hw: pointer to the HW structure
1255 * @fw_vers: pointer to output version structure
1257 * unsupported/not present features return 0 in version structure
1259 void e1000_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)
1261 u16 eeprom_verh, eeprom_verl, etrack_test, fw_version;
1262 u8 q, hval, rem, result;
1263 u16 comb_verh, comb_verl, comb_offset;
1265 memset(fw_vers, 0, sizeof(struct e1000_fw_version));
1267 /* basic eeprom version numbers, bits used vary by part and by tool
1268 * used to create the nvm images */
1269 /* Check which data format we have */
1270 switch (hw->mac.type) {
1272 e1000_read_invm_version(hw, fw_vers);
1278 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
1279 /* Use this format, unless EETRACK ID exists,
1280 * then use alternate format
1282 if ((etrack_test & NVM_MAJOR_MASK) != NVM_ETRACK_VALID) {
1283 hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
1284 fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)
1286 fw_vers->eep_minor = (fw_version & NVM_MINOR_MASK)
1288 fw_vers->eep_build = (fw_version & NVM_IMAGE_ID_MASK);
1293 if (!(e1000_get_flash_presence_i210(hw))) {
1294 e1000_read_invm_version(hw, fw_vers);
1299 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
1300 /* find combo image version */
1301 hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);
1302 if ((comb_offset != 0x0) &&
1303 (comb_offset != NVM_VER_INVALID)) {
1305 hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset
1306 + 1), 1, &comb_verh);
1307 hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),
1310 /* get Option Rom version if it exists and is valid */
1311 if ((comb_verh && comb_verl) &&
1312 ((comb_verh != NVM_VER_INVALID) &&
1313 (comb_verl != NVM_VER_INVALID))) {
1315 fw_vers->or_valid = true;
1317 comb_verl >> NVM_COMB_VER_SHFT;
1319 (comb_verl << NVM_COMB_VER_SHFT)
1320 | (comb_verh >> NVM_COMB_VER_SHFT);
1322 comb_verh & NVM_COMB_VER_MASK;
1327 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
1330 hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
1331 fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)
1334 /* check for old style version format in newer images*/
1335 if ((fw_version & NVM_NEW_DEC_MASK) == 0x0) {
1336 eeprom_verl = (fw_version & NVM_COMB_VER_MASK);
1338 eeprom_verl = (fw_version & NVM_MINOR_MASK)
1341 /* Convert minor value to hex before assigning to output struct
1342 * Val to be converted will not be higher than 99, per tool output
1344 q = eeprom_verl / NVM_HEX_CONV;
1345 hval = q * NVM_HEX_TENS;
1346 rem = eeprom_verl % NVM_HEX_CONV;
1347 result = hval + rem;
1348 fw_vers->eep_minor = result;
1351 if ((etrack_test & NVM_MAJOR_MASK) == NVM_ETRACK_VALID) {
1352 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);
1353 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);
1354 fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT)
1356 } else if ((etrack_test & NVM_ETRACK_VALID) == 0) {
1357 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);
1358 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);
1359 fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT) |