1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001 - 2015 Intel Corporation
7 STATIC void e1000_reload_nvm_generic(struct e1000_hw *hw);
10 * e1000_init_nvm_ops_generic - Initialize NVM function pointers
11 * @hw: pointer to the HW structure
13 * Setups up the function pointers to no-op functions
15 void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
17 struct e1000_nvm_info *nvm = &hw->nvm;
18 DEBUGFUNC("e1000_init_nvm_ops_generic");
20 /* Initialize function pointers */
21 nvm->ops.init_params = e1000_null_ops_generic;
22 nvm->ops.acquire = e1000_null_ops_generic;
23 nvm->ops.read = e1000_null_read_nvm;
24 nvm->ops.release = e1000_null_nvm_generic;
25 nvm->ops.reload = e1000_reload_nvm_generic;
26 nvm->ops.update = e1000_null_ops_generic;
27 nvm->ops.valid_led_default = e1000_null_led_default;
28 nvm->ops.validate = e1000_null_ops_generic;
29 nvm->ops.write = e1000_null_write_nvm;
33 * e1000_null_nvm_read - No-op function, return 0
34 * @hw: pointer to the HW structure
36 s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
37 u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
38 u16 E1000_UNUSEDARG *c)
40 DEBUGFUNC("e1000_null_read_nvm");
41 UNREFERENCED_4PARAMETER(hw, a, b, c);
46 * e1000_null_nvm_generic - No-op function, return void
47 * @hw: pointer to the HW structure
49 void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)
51 DEBUGFUNC("e1000_null_nvm_generic");
52 UNREFERENCED_1PARAMETER(hw);
57 * e1000_null_led_default - No-op function, return 0
58 * @hw: pointer to the HW structure
60 s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
61 u16 E1000_UNUSEDARG *data)
63 DEBUGFUNC("e1000_null_led_default");
64 UNREFERENCED_2PARAMETER(hw, data);
69 * e1000_null_write_nvm - No-op function, return 0
70 * @hw: pointer to the HW structure
72 s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
73 u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
74 u16 E1000_UNUSEDARG *c)
76 DEBUGFUNC("e1000_null_write_nvm");
77 UNREFERENCED_4PARAMETER(hw, a, b, c);
82 * e1000_raise_eec_clk - Raise EEPROM clock
83 * @hw: pointer to the HW structure
84 * @eecd: pointer to the EEPROM
86 * Enable/Raise the EEPROM clock bit.
88 STATIC void e1000_raise_eec_clk(struct e1000_hw *hw, u32 *eecd)
90 *eecd = *eecd | E1000_EECD_SK;
91 E1000_WRITE_REG(hw, E1000_EECD, *eecd);
92 E1000_WRITE_FLUSH(hw);
93 usec_delay(hw->nvm.delay_usec);
97 * e1000_lower_eec_clk - Lower EEPROM clock
98 * @hw: pointer to the HW structure
99 * @eecd: pointer to the EEPROM
101 * Clear/Lower the EEPROM clock bit.
103 STATIC void e1000_lower_eec_clk(struct e1000_hw *hw, u32 *eecd)
105 *eecd = *eecd & ~E1000_EECD_SK;
106 E1000_WRITE_REG(hw, E1000_EECD, *eecd);
107 E1000_WRITE_FLUSH(hw);
108 usec_delay(hw->nvm.delay_usec);
112 * e1000_shift_out_eec_bits - Shift data bits our to the EEPROM
113 * @hw: pointer to the HW structure
114 * @data: data to send to the EEPROM
115 * @count: number of bits to shift out
117 * We need to shift 'count' bits out to the EEPROM. So, the value in the
118 * "data" parameter will be shifted out to the EEPROM one bit at a time.
119 * In order to do this, "data" must be broken down into bits.
121 STATIC void e1000_shift_out_eec_bits(struct e1000_hw *hw, u16 data, u16 count)
123 struct e1000_nvm_info *nvm = &hw->nvm;
124 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
127 DEBUGFUNC("e1000_shift_out_eec_bits");
129 mask = 0x01 << (count - 1);
130 if (nvm->type == e1000_nvm_eeprom_microwire)
131 eecd &= ~E1000_EECD_DO;
133 if (nvm->type == e1000_nvm_eeprom_spi)
134 eecd |= E1000_EECD_DO;
137 eecd &= ~E1000_EECD_DI;
140 eecd |= E1000_EECD_DI;
142 E1000_WRITE_REG(hw, E1000_EECD, eecd);
143 E1000_WRITE_FLUSH(hw);
145 usec_delay(nvm->delay_usec);
147 e1000_raise_eec_clk(hw, &eecd);
148 e1000_lower_eec_clk(hw, &eecd);
153 eecd &= ~E1000_EECD_DI;
154 E1000_WRITE_REG(hw, E1000_EECD, eecd);
158 * e1000_shift_in_eec_bits - Shift data bits in from the EEPROM
159 * @hw: pointer to the HW structure
160 * @count: number of bits to shift in
162 * In order to read a register from the EEPROM, we need to shift 'count' bits
163 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
164 * the EEPROM (setting the SK bit), and then reading the value of the data out
165 * "DO" bit. During this "shifting in" process the data in "DI" bit should
168 STATIC u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
174 DEBUGFUNC("e1000_shift_in_eec_bits");
176 eecd = E1000_READ_REG(hw, E1000_EECD);
178 eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
181 for (i = 0; i < count; i++) {
183 e1000_raise_eec_clk(hw, &eecd);
185 eecd = E1000_READ_REG(hw, E1000_EECD);
187 eecd &= ~E1000_EECD_DI;
188 if (eecd & E1000_EECD_DO)
191 e1000_lower_eec_clk(hw, &eecd);
198 * e1000_poll_eerd_eewr_done - Poll for EEPROM read/write completion
199 * @hw: pointer to the HW structure
200 * @ee_reg: EEPROM flag for polling
202 * Polls the EEPROM status bit for either read or write completion based
203 * upon the value of 'ee_reg'.
205 s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg)
207 u32 attempts = 100000;
210 DEBUGFUNC("e1000_poll_eerd_eewr_done");
212 for (i = 0; i < attempts; i++) {
213 if (ee_reg == E1000_NVM_POLL_READ)
214 reg = E1000_READ_REG(hw, E1000_EERD);
216 reg = E1000_READ_REG(hw, E1000_EEWR);
218 if (reg & E1000_NVM_RW_REG_DONE)
219 return E1000_SUCCESS;
224 return -E1000_ERR_NVM;
228 * e1000_acquire_nvm_generic - Generic request for access to EEPROM
229 * @hw: pointer to the HW structure
231 * Set the EEPROM access request bit and wait for EEPROM access grant bit.
232 * Return successful if access grant bit set, else clear the request for
233 * EEPROM access and return -E1000_ERR_NVM (-1).
235 s32 e1000_acquire_nvm_generic(struct e1000_hw *hw)
237 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
238 s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
240 DEBUGFUNC("e1000_acquire_nvm_generic");
242 E1000_WRITE_REG(hw, E1000_EECD, eecd | E1000_EECD_REQ);
243 eecd = E1000_READ_REG(hw, E1000_EECD);
246 if (eecd & E1000_EECD_GNT)
249 eecd = E1000_READ_REG(hw, E1000_EECD);
254 eecd &= ~E1000_EECD_REQ;
255 E1000_WRITE_REG(hw, E1000_EECD, eecd);
256 DEBUGOUT("Could not acquire NVM grant\n");
257 return -E1000_ERR_NVM;
260 return E1000_SUCCESS;
264 * e1000_standby_nvm - Return EEPROM to standby state
265 * @hw: pointer to the HW structure
267 * Return the EEPROM to a standby state.
269 STATIC void e1000_standby_nvm(struct e1000_hw *hw)
271 struct e1000_nvm_info *nvm = &hw->nvm;
272 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
274 DEBUGFUNC("e1000_standby_nvm");
276 if (nvm->type == e1000_nvm_eeprom_microwire) {
277 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
278 E1000_WRITE_REG(hw, E1000_EECD, eecd);
279 E1000_WRITE_FLUSH(hw);
280 usec_delay(nvm->delay_usec);
282 e1000_raise_eec_clk(hw, &eecd);
285 eecd |= E1000_EECD_CS;
286 E1000_WRITE_REG(hw, E1000_EECD, eecd);
287 E1000_WRITE_FLUSH(hw);
288 usec_delay(nvm->delay_usec);
290 e1000_lower_eec_clk(hw, &eecd);
291 } else if (nvm->type == e1000_nvm_eeprom_spi) {
292 /* Toggle CS to flush commands */
293 eecd |= E1000_EECD_CS;
294 E1000_WRITE_REG(hw, E1000_EECD, eecd);
295 E1000_WRITE_FLUSH(hw);
296 usec_delay(nvm->delay_usec);
297 eecd &= ~E1000_EECD_CS;
298 E1000_WRITE_REG(hw, E1000_EECD, eecd);
299 E1000_WRITE_FLUSH(hw);
300 usec_delay(nvm->delay_usec);
305 * e1000_stop_nvm - Terminate EEPROM command
306 * @hw: pointer to the HW structure
308 * Terminates the current command by inverting the EEPROM's chip select pin.
310 void e1000_stop_nvm(struct e1000_hw *hw)
314 DEBUGFUNC("e1000_stop_nvm");
316 eecd = E1000_READ_REG(hw, E1000_EECD);
317 if (hw->nvm.type == e1000_nvm_eeprom_spi) {
319 eecd |= E1000_EECD_CS;
320 e1000_lower_eec_clk(hw, &eecd);
321 } else if (hw->nvm.type == e1000_nvm_eeprom_microwire) {
322 /* CS on Microwire is active-high */
323 eecd &= ~(E1000_EECD_CS | E1000_EECD_DI);
324 E1000_WRITE_REG(hw, E1000_EECD, eecd);
325 e1000_raise_eec_clk(hw, &eecd);
326 e1000_lower_eec_clk(hw, &eecd);
331 * e1000_release_nvm_generic - Release exclusive access to EEPROM
332 * @hw: pointer to the HW structure
334 * Stop any current commands to the EEPROM and clear the EEPROM request bit.
336 void e1000_release_nvm_generic(struct e1000_hw *hw)
340 DEBUGFUNC("e1000_release_nvm_generic");
344 eecd = E1000_READ_REG(hw, E1000_EECD);
345 eecd &= ~E1000_EECD_REQ;
346 E1000_WRITE_REG(hw, E1000_EECD, eecd);
350 * e1000_ready_nvm_eeprom - Prepares EEPROM for read/write
351 * @hw: pointer to the HW structure
353 * Setups the EEPROM for reading and writing.
355 STATIC s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
357 struct e1000_nvm_info *nvm = &hw->nvm;
358 u32 eecd = E1000_READ_REG(hw, E1000_EECD);
361 DEBUGFUNC("e1000_ready_nvm_eeprom");
363 if (nvm->type == e1000_nvm_eeprom_microwire) {
364 /* Clear SK and DI */
365 eecd &= ~(E1000_EECD_DI | E1000_EECD_SK);
366 E1000_WRITE_REG(hw, E1000_EECD, eecd);
368 eecd |= E1000_EECD_CS;
369 E1000_WRITE_REG(hw, E1000_EECD, eecd);
370 } else if (nvm->type == e1000_nvm_eeprom_spi) {
371 u16 timeout = NVM_MAX_RETRY_SPI;
373 /* Clear SK and CS */
374 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
375 E1000_WRITE_REG(hw, E1000_EECD, eecd);
376 E1000_WRITE_FLUSH(hw);
379 /* Read "Status Register" repeatedly until the LSB is cleared.
380 * The EEPROM will signal that the command has been completed
381 * by clearing bit 0 of the internal status register. If it's
382 * not cleared within 'timeout', then error out.
385 e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI,
386 hw->nvm.opcode_bits);
387 spi_stat_reg = (u8)e1000_shift_in_eec_bits(hw, 8);
388 if (!(spi_stat_reg & NVM_STATUS_RDY_SPI))
392 e1000_standby_nvm(hw);
397 DEBUGOUT("SPI NVM Status error\n");
398 return -E1000_ERR_NVM;
402 return E1000_SUCCESS;
406 * e1000_read_nvm_spi - Read EEPROM's using SPI
407 * @hw: pointer to the HW structure
408 * @offset: offset of word in the EEPROM to read
409 * @words: number of words to read
410 * @data: word read from the EEPROM
412 * Reads a 16 bit word from the EEPROM.
414 s32 e1000_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
416 struct e1000_nvm_info *nvm = &hw->nvm;
420 u8 read_opcode = NVM_READ_OPCODE_SPI;
422 DEBUGFUNC("e1000_read_nvm_spi");
424 /* A check for invalid values: offset too large, too many words,
425 * and not enough words.
427 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
429 DEBUGOUT("nvm parameter(s) out of bounds\n");
430 return -E1000_ERR_NVM;
433 ret_val = nvm->ops.acquire(hw);
437 ret_val = e1000_ready_nvm_eeprom(hw);
441 e1000_standby_nvm(hw);
443 if ((nvm->address_bits == 8) && (offset >= 128))
444 read_opcode |= NVM_A8_OPCODE_SPI;
446 /* Send the READ command (opcode + addr) */
447 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
448 e1000_shift_out_eec_bits(hw, (u16)(offset*2), nvm->address_bits);
450 /* Read the data. SPI NVMs increment the address with each byte
451 * read and will roll over if reading beyond the end. This allows
452 * us to read the whole NVM from any offset
454 for (i = 0; i < words; i++) {
455 word_in = e1000_shift_in_eec_bits(hw, 16);
456 data[i] = (word_in >> 8) | (word_in << 8);
460 nvm->ops.release(hw);
466 * e1000_read_nvm_microwire - Reads EEPROM's using microwire
467 * @hw: pointer to the HW structure
468 * @offset: offset of word in the EEPROM to read
469 * @words: number of words to read
470 * @data: word read from the EEPROM
472 * Reads a 16 bit word from the EEPROM.
474 s32 e1000_read_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
477 struct e1000_nvm_info *nvm = &hw->nvm;
480 u8 read_opcode = NVM_READ_OPCODE_MICROWIRE;
482 DEBUGFUNC("e1000_read_nvm_microwire");
484 /* A check for invalid values: offset too large, too many words,
485 * and not enough words.
487 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
489 DEBUGOUT("nvm parameter(s) out of bounds\n");
490 return -E1000_ERR_NVM;
493 ret_val = nvm->ops.acquire(hw);
497 ret_val = e1000_ready_nvm_eeprom(hw);
501 for (i = 0; i < words; i++) {
502 /* Send the READ command (opcode + addr) */
503 e1000_shift_out_eec_bits(hw, read_opcode, nvm->opcode_bits);
504 e1000_shift_out_eec_bits(hw, (u16)(offset + i),
507 /* Read the data. For microwire, each word requires the
508 * overhead of setup and tear-down.
510 data[i] = e1000_shift_in_eec_bits(hw, 16);
511 e1000_standby_nvm(hw);
515 nvm->ops.release(hw);
521 * e1000_read_nvm_eerd - Reads EEPROM using EERD register
522 * @hw: pointer to the HW structure
523 * @offset: offset of word in the EEPROM to read
524 * @words: number of words to read
525 * @data: word read from the EEPROM
527 * Reads a 16 bit word from the EEPROM using the EERD register.
529 s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
531 struct e1000_nvm_info *nvm = &hw->nvm;
533 s32 ret_val = E1000_SUCCESS;
535 DEBUGFUNC("e1000_read_nvm_eerd");
537 /* A check for invalid values: offset too large, too many words,
538 * too many words for the offset, and not enough words.
540 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
542 DEBUGOUT("nvm parameter(s) out of bounds\n");
543 return -E1000_ERR_NVM;
546 for (i = 0; i < words; i++) {
547 eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
548 E1000_NVM_RW_REG_START;
550 E1000_WRITE_REG(hw, E1000_EERD, eerd);
551 ret_val = e1000_poll_eerd_eewr_done(hw, E1000_NVM_POLL_READ);
555 data[i] = (E1000_READ_REG(hw, E1000_EERD) >>
556 E1000_NVM_RW_REG_DATA);
560 DEBUGOUT1("NVM read error: %d\n", ret_val);
566 * e1000_write_nvm_spi - Write to EEPROM using SPI
567 * @hw: pointer to the HW structure
568 * @offset: offset within the EEPROM to be written to
569 * @words: number of words to write
570 * @data: 16 bit word(s) to be written to the EEPROM
572 * Writes data to EEPROM at offset using SPI interface.
574 * If e1000_update_nvm_checksum is not called after this function , the
575 * EEPROM will most likely contain an invalid checksum.
577 s32 e1000_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
579 struct e1000_nvm_info *nvm = &hw->nvm;
580 s32 ret_val = -E1000_ERR_NVM;
583 DEBUGFUNC("e1000_write_nvm_spi");
585 /* A check for invalid values: offset too large, too many words,
586 * and not enough words.
588 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
590 DEBUGOUT("nvm parameter(s) out of bounds\n");
591 return -E1000_ERR_NVM;
594 while (widx < words) {
595 u8 write_opcode = NVM_WRITE_OPCODE_SPI;
597 ret_val = nvm->ops.acquire(hw);
601 ret_val = e1000_ready_nvm_eeprom(hw);
603 nvm->ops.release(hw);
607 e1000_standby_nvm(hw);
609 /* Send the WRITE ENABLE command (8 bit opcode) */
610 e1000_shift_out_eec_bits(hw, NVM_WREN_OPCODE_SPI,
613 e1000_standby_nvm(hw);
615 /* Some SPI eeproms use the 8th address bit embedded in the
618 if ((nvm->address_bits == 8) && (offset >= 128))
619 write_opcode |= NVM_A8_OPCODE_SPI;
621 /* Send the Write command (8-bit opcode + addr) */
622 e1000_shift_out_eec_bits(hw, write_opcode, nvm->opcode_bits);
623 e1000_shift_out_eec_bits(hw, (u16)((offset + widx) * 2),
626 /* Loop to allow for up to whole page write of eeprom */
627 while (widx < words) {
628 u16 word_out = data[widx];
629 word_out = (word_out >> 8) | (word_out << 8);
630 e1000_shift_out_eec_bits(hw, word_out, 16);
633 if ((((offset + widx) * 2) % nvm->page_size) == 0) {
634 e1000_standby_nvm(hw);
639 nvm->ops.release(hw);
646 * e1000_write_nvm_microwire - Writes EEPROM using microwire
647 * @hw: pointer to the HW structure
648 * @offset: offset within the EEPROM to be written to
649 * @words: number of words to write
650 * @data: 16 bit word(s) to be written to the EEPROM
652 * Writes data to EEPROM at offset using microwire interface.
654 * If e1000_update_nvm_checksum is not called after this function , the
655 * EEPROM will most likely contain an invalid checksum.
657 s32 e1000_write_nvm_microwire(struct e1000_hw *hw, u16 offset, u16 words,
660 struct e1000_nvm_info *nvm = &hw->nvm;
663 u16 words_written = 0;
666 DEBUGFUNC("e1000_write_nvm_microwire");
668 /* A check for invalid values: offset too large, too many words,
669 * and not enough words.
671 if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
673 DEBUGOUT("nvm parameter(s) out of bounds\n");
674 return -E1000_ERR_NVM;
677 ret_val = nvm->ops.acquire(hw);
681 ret_val = e1000_ready_nvm_eeprom(hw);
685 e1000_shift_out_eec_bits(hw, NVM_EWEN_OPCODE_MICROWIRE,
686 (u16)(nvm->opcode_bits + 2));
688 e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
690 e1000_standby_nvm(hw);
692 while (words_written < words) {
693 e1000_shift_out_eec_bits(hw, NVM_WRITE_OPCODE_MICROWIRE,
696 e1000_shift_out_eec_bits(hw, (u16)(offset + words_written),
699 e1000_shift_out_eec_bits(hw, data[words_written], 16);
701 e1000_standby_nvm(hw);
703 for (widx = 0; widx < 200; widx++) {
704 eecd = E1000_READ_REG(hw, E1000_EECD);
705 if (eecd & E1000_EECD_DO)
711 DEBUGOUT("NVM Write did not complete\n");
712 ret_val = -E1000_ERR_NVM;
716 e1000_standby_nvm(hw);
721 e1000_shift_out_eec_bits(hw, NVM_EWDS_OPCODE_MICROWIRE,
722 (u16)(nvm->opcode_bits + 2));
724 e1000_shift_out_eec_bits(hw, 0, (u16)(nvm->address_bits - 2));
727 nvm->ops.release(hw);
733 * e1000_read_pba_string_generic - Read device part number
734 * @hw: pointer to the HW structure
735 * @pba_num: pointer to device part number
736 * @pba_num_size: size of part number buffer
738 * Reads the product board assembly (PBA) number from the EEPROM and stores
739 * the value in pba_num.
741 s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
750 DEBUGFUNC("e1000_read_pba_string_generic");
752 if ((hw->mac.type == e1000_i210 ||
753 hw->mac.type == e1000_i211) &&
754 !e1000_get_flash_presence_i210(hw)) {
755 DEBUGOUT("Flashless no PBA string\n");
756 return -E1000_ERR_NVM_PBA_SECTION;
759 if (pba_num == NULL) {
760 DEBUGOUT("PBA string buffer was null\n");
761 return -E1000_ERR_INVALID_ARGUMENT;
764 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
766 DEBUGOUT("NVM Read Error\n");
770 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
772 DEBUGOUT("NVM Read Error\n");
776 /* if nvm_data is not ptr guard the PBA must be in legacy format which
777 * means pba_ptr is actually our second data word for the PBA number
778 * and we can decode it into an ascii string
780 if (nvm_data != NVM_PBA_PTR_GUARD) {
781 DEBUGOUT("NVM PBA number is not stored as string\n");
783 /* make sure callers buffer is big enough to store the PBA */
784 if (pba_num_size < E1000_PBANUM_LENGTH) {
785 DEBUGOUT("PBA string buffer too small\n");
786 return E1000_ERR_NO_SPACE;
789 /* extract hex string from data and pba_ptr */
790 pba_num[0] = (nvm_data >> 12) & 0xF;
791 pba_num[1] = (nvm_data >> 8) & 0xF;
792 pba_num[2] = (nvm_data >> 4) & 0xF;
793 pba_num[3] = nvm_data & 0xF;
794 pba_num[4] = (pba_ptr >> 12) & 0xF;
795 pba_num[5] = (pba_ptr >> 8) & 0xF;
798 pba_num[8] = (pba_ptr >> 4) & 0xF;
799 pba_num[9] = pba_ptr & 0xF;
801 /* put a null character on the end of our string */
804 /* switch all the data but the '-' to hex char */
805 for (offset = 0; offset < 10; offset++) {
806 if (pba_num[offset] < 0xA)
807 pba_num[offset] += '0';
808 else if (pba_num[offset] < 0x10)
809 pba_num[offset] += 'A' - 0xA;
812 return E1000_SUCCESS;
815 ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
817 DEBUGOUT("NVM Read Error\n");
821 if (length == 0xFFFF || length == 0) {
822 DEBUGOUT("NVM PBA number section invalid length\n");
823 return -E1000_ERR_NVM_PBA_SECTION;
825 /* check if pba_num buffer is big enough */
826 if (pba_num_size < (((u32)length * 2) - 1)) {
827 DEBUGOUT("PBA string buffer too small\n");
828 return -E1000_ERR_NO_SPACE;
831 /* trim pba length from start of string */
835 for (offset = 0; offset < length; offset++) {
836 ret_val = hw->nvm.ops.read(hw, pba_ptr + offset, 1, &nvm_data);
838 DEBUGOUT("NVM Read Error\n");
841 pba_num[offset * 2] = (u8)(nvm_data >> 8);
842 pba_num[(offset * 2) + 1] = (u8)(nvm_data & 0xFF);
844 pba_num[offset * 2] = '\0';
846 return E1000_SUCCESS;
850 * e1000_read_pba_length_generic - Read device part number length
851 * @hw: pointer to the HW structure
852 * @pba_num_size: size of part number buffer
854 * Reads the product board assembly (PBA) number length from the EEPROM and
855 * stores the value in pba_num_size.
857 s32 e1000_read_pba_length_generic(struct e1000_hw *hw, u32 *pba_num_size)
864 DEBUGFUNC("e1000_read_pba_length_generic");
866 if (pba_num_size == NULL) {
867 DEBUGOUT("PBA buffer size was null\n");
868 return -E1000_ERR_INVALID_ARGUMENT;
871 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
873 DEBUGOUT("NVM Read Error\n");
877 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &pba_ptr);
879 DEBUGOUT("NVM Read Error\n");
883 /* if data is not ptr guard the PBA must be in legacy format */
884 if (nvm_data != NVM_PBA_PTR_GUARD) {
885 *pba_num_size = E1000_PBANUM_LENGTH;
886 return E1000_SUCCESS;
889 ret_val = hw->nvm.ops.read(hw, pba_ptr, 1, &length);
891 DEBUGOUT("NVM Read Error\n");
895 if (length == 0xFFFF || length == 0) {
896 DEBUGOUT("NVM PBA number section invalid length\n");
897 return -E1000_ERR_NVM_PBA_SECTION;
900 /* Convert from length in u16 values to u8 chars, add 1 for NULL,
901 * and subtract 2 because length field is included in length.
903 *pba_num_size = ((u32)length * 2) - 1;
905 return E1000_SUCCESS;
909 * e1000_read_pba_num_generic - Read device part number
910 * @hw: pointer to the HW structure
911 * @pba_num: pointer to device part number
913 * Reads the product board assembly (PBA) number from the EEPROM and stores
914 * the value in pba_num.
916 s32 e1000_read_pba_num_generic(struct e1000_hw *hw, u32 *pba_num)
921 DEBUGFUNC("e1000_read_pba_num_generic");
923 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
925 DEBUGOUT("NVM Read Error\n");
927 } else if (nvm_data == NVM_PBA_PTR_GUARD) {
928 DEBUGOUT("NVM Not Supported\n");
929 return -E1000_NOT_IMPLEMENTED;
931 *pba_num = (u32)(nvm_data << 16);
933 ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
935 DEBUGOUT("NVM Read Error\n");
938 *pba_num |= nvm_data;
940 return E1000_SUCCESS;
946 * @hw: pointer to the HW structure
947 * @eeprom_buf: optional pointer to EEPROM image
948 * @eeprom_buf_size: size of EEPROM image in words
949 * @max_pba_block_size: PBA block size limit
950 * @pba: pointer to output PBA structure
952 * Reads PBA from EEPROM image when eeprom_buf is not NULL.
953 * Reads PBA from physical EEPROM device when eeprom_buf is NULL.
956 s32 e1000_read_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
957 u32 eeprom_buf_size, u16 max_pba_block_size,
958 struct e1000_pba *pba)
964 return -E1000_ERR_PARAM;
966 if (eeprom_buf == NULL) {
967 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2,
972 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
973 pba->word[0] = eeprom_buf[NVM_PBA_OFFSET_0];
974 pba->word[1] = eeprom_buf[NVM_PBA_OFFSET_1];
976 return -E1000_ERR_PARAM;
980 if (pba->word[0] == NVM_PBA_PTR_GUARD) {
981 if (pba->pba_block == NULL)
982 return -E1000_ERR_PARAM;
984 ret_val = e1000_get_pba_block_size(hw, eeprom_buf,
990 if (pba_block_size > max_pba_block_size)
991 return -E1000_ERR_PARAM;
993 if (eeprom_buf == NULL) {
994 ret_val = e1000_read_nvm(hw, pba->word[1],
1000 if (eeprom_buf_size > (u32)(pba->word[1] +
1002 memcpy(pba->pba_block,
1003 &eeprom_buf[pba->word[1]],
1004 pba_block_size * sizeof(u16));
1006 return -E1000_ERR_PARAM;
1011 return E1000_SUCCESS;
1015 * e1000_write_pba_raw
1016 * @hw: pointer to the HW structure
1017 * @eeprom_buf: optional pointer to EEPROM image
1018 * @eeprom_buf_size: size of EEPROM image in words
1019 * @pba: pointer to PBA structure
1021 * Writes PBA to EEPROM image when eeprom_buf is not NULL.
1022 * Writes PBA to physical EEPROM device when eeprom_buf is NULL.
1025 s32 e1000_write_pba_raw(struct e1000_hw *hw, u16 *eeprom_buf,
1026 u32 eeprom_buf_size, struct e1000_pba *pba)
1031 return -E1000_ERR_PARAM;
1033 if (eeprom_buf == NULL) {
1034 ret_val = e1000_write_nvm(hw, NVM_PBA_OFFSET_0, 2,
1039 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
1040 eeprom_buf[NVM_PBA_OFFSET_0] = pba->word[0];
1041 eeprom_buf[NVM_PBA_OFFSET_1] = pba->word[1];
1043 return -E1000_ERR_PARAM;
1047 if (pba->word[0] == NVM_PBA_PTR_GUARD) {
1048 if (pba->pba_block == NULL)
1049 return -E1000_ERR_PARAM;
1051 if (eeprom_buf == NULL) {
1052 ret_val = e1000_write_nvm(hw, pba->word[1],
1058 if (eeprom_buf_size > (u32)(pba->word[1] +
1059 pba->pba_block[0])) {
1060 memcpy(&eeprom_buf[pba->word[1]],
1062 pba->pba_block[0] * sizeof(u16));
1064 return -E1000_ERR_PARAM;
1069 return E1000_SUCCESS;
1073 * e1000_get_pba_block_size
1074 * @hw: pointer to the HW structure
1075 * @eeprom_buf: optional pointer to EEPROM image
1076 * @eeprom_buf_size: size of EEPROM image in words
1077 * @pba_data_size: pointer to output variable
1079 * Returns the size of the PBA block in words. Function operates on EEPROM
1080 * image if the eeprom_buf pointer is not NULL otherwise it accesses physical
1084 s32 e1000_get_pba_block_size(struct e1000_hw *hw, u16 *eeprom_buf,
1085 u32 eeprom_buf_size, u16 *pba_block_size)
1091 DEBUGFUNC("e1000_get_pba_block_size");
1093 if (eeprom_buf == NULL) {
1094 ret_val = e1000_read_nvm(hw, NVM_PBA_OFFSET_0, 2, &pba_word[0]);
1098 if (eeprom_buf_size > NVM_PBA_OFFSET_1) {
1099 pba_word[0] = eeprom_buf[NVM_PBA_OFFSET_0];
1100 pba_word[1] = eeprom_buf[NVM_PBA_OFFSET_1];
1102 return -E1000_ERR_PARAM;
1106 if (pba_word[0] == NVM_PBA_PTR_GUARD) {
1107 if (eeprom_buf == NULL) {
1108 ret_val = e1000_read_nvm(hw, pba_word[1] + 0, 1,
1113 if (eeprom_buf_size > pba_word[1])
1114 length = eeprom_buf[pba_word[1] + 0];
1116 return -E1000_ERR_PARAM;
1119 if (length == 0xFFFF || length == 0)
1120 return -E1000_ERR_NVM_PBA_SECTION;
1122 /* PBA number in legacy format, there is no PBA Block. */
1126 if (pba_block_size != NULL)
1127 *pba_block_size = length;
1129 return E1000_SUCCESS;
1133 * e1000_read_mac_addr_generic - Read device MAC address
1134 * @hw: pointer to the HW structure
1136 * Reads the device MAC address from the EEPROM and stores the value.
1137 * Since devices with two ports use the same EEPROM, we increment the
1138 * last bit in the MAC address for the second port.
1140 s32 e1000_read_mac_addr_generic(struct e1000_hw *hw)
1146 rar_high = E1000_READ_REG(hw, E1000_RAH(0));
1147 rar_low = E1000_READ_REG(hw, E1000_RAL(0));
1149 for (i = 0; i < E1000_RAL_MAC_ADDR_LEN; i++)
1150 hw->mac.perm_addr[i] = (u8)(rar_low >> (i*8));
1152 for (i = 0; i < E1000_RAH_MAC_ADDR_LEN; i++)
1153 hw->mac.perm_addr[i+4] = (u8)(rar_high >> (i*8));
1155 for (i = 0; i < ETH_ADDR_LEN; i++)
1156 hw->mac.addr[i] = hw->mac.perm_addr[i];
1158 return E1000_SUCCESS;
1162 * e1000_validate_nvm_checksum_generic - Validate EEPROM checksum
1163 * @hw: pointer to the HW structure
1165 * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
1166 * and then verifies that the sum of the EEPROM is equal to 0xBABA.
1168 s32 e1000_validate_nvm_checksum_generic(struct e1000_hw *hw)
1174 DEBUGFUNC("e1000_validate_nvm_checksum_generic");
1176 for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
1177 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1179 DEBUGOUT("NVM Read Error\n");
1182 checksum += nvm_data;
1185 if (checksum != (u16) NVM_SUM) {
1186 DEBUGOUT("NVM Checksum Invalid\n");
1187 return -E1000_ERR_NVM;
1190 return E1000_SUCCESS;
1194 * e1000_update_nvm_checksum_generic - Update EEPROM checksum
1195 * @hw: pointer to the HW structure
1197 * Updates the EEPROM checksum by reading/adding each word of the EEPROM
1198 * up to the checksum. Then calculates the EEPROM checksum and writes the
1199 * value to the EEPROM.
1201 s32 e1000_update_nvm_checksum_generic(struct e1000_hw *hw)
1207 DEBUGFUNC("e1000_update_nvm_checksum");
1209 for (i = 0; i < NVM_CHECKSUM_REG; i++) {
1210 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
1212 DEBUGOUT("NVM Read Error while updating checksum.\n");
1215 checksum += nvm_data;
1217 checksum = (u16) NVM_SUM - checksum;
1218 ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
1220 DEBUGOUT("NVM Write Error while updating checksum.\n");
1226 * e1000_reload_nvm_generic - Reloads EEPROM
1227 * @hw: pointer to the HW structure
1229 * Reloads the EEPROM by setting the "Reinitialize from EEPROM" bit in the
1230 * extended control register.
1232 STATIC void e1000_reload_nvm_generic(struct e1000_hw *hw)
1236 DEBUGFUNC("e1000_reload_nvm_generic");
1239 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1240 ctrl_ext |= E1000_CTRL_EXT_EE_RST;
1241 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1242 E1000_WRITE_FLUSH(hw);
1246 * e1000_get_fw_version - Get firmware version information
1247 * @hw: pointer to the HW structure
1248 * @fw_vers: pointer to output version structure
1250 * unsupported/not present features return 0 in version structure
1252 void e1000_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)
1254 u16 eeprom_verh, eeprom_verl, etrack_test, fw_version;
1255 u8 q, hval, rem, result;
1256 u16 comb_verh, comb_verl, comb_offset;
1258 memset(fw_vers, 0, sizeof(struct e1000_fw_version));
1260 /* basic eeprom version numbers, bits used vary by part and by tool
1261 * used to create the nvm images */
1262 /* Check which data format we have */
1263 switch (hw->mac.type) {
1265 e1000_read_invm_version(hw, fw_vers);
1271 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
1272 /* Use this format, unless EETRACK ID exists,
1273 * then use alternate format
1275 if ((etrack_test & NVM_MAJOR_MASK) != NVM_ETRACK_VALID) {
1276 hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
1277 fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)
1279 fw_vers->eep_minor = (fw_version & NVM_MINOR_MASK)
1281 fw_vers->eep_build = (fw_version & NVM_IMAGE_ID_MASK);
1286 if (!(e1000_get_flash_presence_i210(hw))) {
1287 e1000_read_invm_version(hw, fw_vers);
1292 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
1293 /* find combo image version */
1294 hw->nvm.ops.read(hw, NVM_COMB_VER_PTR, 1, &comb_offset);
1295 if ((comb_offset != 0x0) &&
1296 (comb_offset != NVM_VER_INVALID)) {
1298 hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset
1299 + 1), 1, &comb_verh);
1300 hw->nvm.ops.read(hw, (NVM_COMB_VER_OFF + comb_offset),
1303 /* get Option Rom version if it exists and is valid */
1304 if ((comb_verh && comb_verl) &&
1305 ((comb_verh != NVM_VER_INVALID) &&
1306 (comb_verl != NVM_VER_INVALID))) {
1308 fw_vers->or_valid = true;
1310 comb_verl >> NVM_COMB_VER_SHFT;
1312 (comb_verl << NVM_COMB_VER_SHFT)
1313 | (comb_verh >> NVM_COMB_VER_SHFT);
1315 comb_verh & NVM_COMB_VER_MASK;
1320 hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
1323 hw->nvm.ops.read(hw, NVM_VERSION, 1, &fw_version);
1324 fw_vers->eep_major = (fw_version & NVM_MAJOR_MASK)
1327 /* check for old style version format in newer images*/
1328 if ((fw_version & NVM_NEW_DEC_MASK) == 0x0) {
1329 eeprom_verl = (fw_version & NVM_COMB_VER_MASK);
1331 eeprom_verl = (fw_version & NVM_MINOR_MASK)
1334 /* Convert minor value to hex before assigning to output struct
1335 * Val to be converted will not be higher than 99, per tool output
1337 q = eeprom_verl / NVM_HEX_CONV;
1338 hval = q * NVM_HEX_TENS;
1339 rem = eeprom_verl % NVM_HEX_CONV;
1340 result = hval + rem;
1341 fw_vers->eep_minor = result;
1344 if ((etrack_test & NVM_MAJOR_MASK) == NVM_ETRACK_VALID) {
1345 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verl);
1346 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verh);
1347 fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT)
1349 } else if ((etrack_test & NVM_ETRACK_VALID) == 0) {
1350 hw->nvm.ops.read(hw, NVM_ETRACK_WORD, 1, &eeprom_verh);
1351 hw->nvm.ops.read(hw, (NVM_ETRACK_WORD + 1), 1, &eeprom_verl);
1352 fw_vers->etrack_id = (eeprom_verh << NVM_ETRACK_SHIFT) |