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34 #ifndef _E1000_ETHDEV_H_
35 #define _E1000_ETHDEV_H_
38 #define E1000_INTEL_VENDOR_ID 0x8086
40 /* need update link, bit flag */
41 #define E1000_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0)
42 #define E1000_FLAG_MAILBOX (uint32_t)(1 << 1)
45 * Defines that were not part of e1000_hw.h as they are not used by the FreeBSD
48 #define E1000_ADVTXD_POPTS_TXSM 0x00000200 /* L4 Checksum offload request */
49 #define E1000_ADVTXD_POPTS_IXSM 0x00000100 /* IP Checksum offload request */
50 #define E1000_ADVTXD_TUCMD_L4T_RSV 0x00001800 /* L4 Packet TYPE of Reserved */
51 #define E1000_RXD_STAT_TMST 0x10000 /* Timestamped Packet indication */
52 #define E1000_RXD_ERR_CKSUM_BIT 29
53 #define E1000_RXD_ERR_CKSUM_MSK 3
54 #define E1000_ADVTXD_MACLEN_SHIFT 9 /* Bit shift for l2_len */
55 #define E1000_CTRL_EXT_EXTEND_VLAN (1<<26) /* EXTENDED VLAN */
56 #define IGB_VFTA_SIZE 128
58 #define IGB_MAX_RX_QUEUE_NUM 8
59 #define IGB_MAX_RX_QUEUE_NUM_82576 16
61 #define E1000_SYN_FILTER_ENABLE 0x00000001 /* syn filter enable field */
62 #define E1000_SYN_FILTER_QUEUE 0x0000000E /* syn filter queue field */
63 #define E1000_SYN_FILTER_QUEUE_SHIFT 1 /* syn filter queue field */
64 #define E1000_RFCTL_SYNQFP 0x00080000 /* SYNQFP in RFCTL register */
66 #define E1000_ETQF_ETHERTYPE 0x0000FFFF
67 #define E1000_ETQF_QUEUE 0x00070000
68 #define E1000_ETQF_QUEUE_SHIFT 16
69 #define E1000_MAX_ETQF_FILTERS 8
71 #define E1000_IMIR_DSTPORT 0x0000FFFF
72 #define E1000_IMIR_PRIORITY 0xE0000000
73 #define E1000_MAX_TTQF_FILTERS 8
74 #define E1000_2TUPLE_MAX_PRI 7
76 #define E1000_MAX_FLEX_FILTERS 8
77 #define E1000_MAX_FHFT 4
78 #define E1000_MAX_FHFT_EXT 4
79 #define E1000_FHFT_SIZE_IN_DWD 64
80 #define E1000_MAX_FLEX_FILTER_PRI 7
81 #define E1000_MAX_FLEX_FILTER_LEN 128
82 #define E1000_MAX_FLEX_FILTER_DWDS \
83 (E1000_MAX_FLEX_FILTER_LEN / sizeof(uint32_t))
84 #define E1000_FLEX_FILTERS_MASK_SIZE \
85 (E1000_MAX_FLEX_FILTER_DWDS / 4)
86 #define E1000_FHFT_QUEUEING_LEN 0x0000007F
87 #define E1000_FHFT_QUEUEING_QUEUE 0x00000700
88 #define E1000_FHFT_QUEUEING_PRIO 0x00070000
89 #define E1000_FHFT_QUEUEING_OFFSET 0xFC
90 #define E1000_FHFT_QUEUEING_QUEUE_SHIFT 8
91 #define E1000_FHFT_QUEUEING_PRIO_SHIFT 16
92 #define E1000_WUFC_FLEX_HQ 0x00004000
94 #define E1000_SPQF_SRCPORT 0x0000FFFF
96 #define E1000_MAX_FTQF_FILTERS 8
97 #define E1000_FTQF_PROTOCOL_MASK 0x000000FF
98 #define E1000_FTQF_5TUPLE_MASK_SHIFT 28
99 #define E1000_FTQF_QUEUE_MASK 0x03ff0000
100 #define E1000_FTQF_QUEUE_SHIFT 16
101 #define E1000_FTQF_QUEUE_ENABLE 0x00000100
103 #define IGB_RSS_OFFLOAD_ALL ( \
105 ETH_RSS_NONFRAG_IPV4_TCP | \
106 ETH_RSS_NONFRAG_IPV4_UDP | \
108 ETH_RSS_NONFRAG_IPV6_TCP | \
109 ETH_RSS_NONFRAG_IPV6_UDP | \
111 ETH_RSS_IPV6_TCP_EX | \
115 * Maximum number of Ring Descriptors.
117 * Since RDLEN/TDLEN should be multiple of 128 bytes, the number of ring
118 * desscriptors should meet the following condition:
119 * (num_ring_desc * sizeof(struct e1000_rx/tx_desc)) % 128 == 0
121 #define E1000_MIN_RING_DESC 32
122 #define E1000_MAX_RING_DESC 4096
125 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
126 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary.
127 * This will also optimize cache line size effect.
128 * H/W supports up to cache line size 128.
130 #define E1000_ALIGN 128
132 #define IGB_RXD_ALIGN (E1000_ALIGN / sizeof(union e1000_adv_rx_desc))
133 #define IGB_TXD_ALIGN (E1000_ALIGN / sizeof(union e1000_adv_tx_desc))
135 #define EM_RXD_ALIGN (E1000_ALIGN / sizeof(struct e1000_rx_desc))
136 #define EM_TXD_ALIGN (E1000_ALIGN / sizeof(struct e1000_data_desc))
138 #define E1000_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
139 #define E1000_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET
141 #define IGB_TX_MAX_SEG UINT8_MAX
142 #define IGB_TX_MAX_MTU_SEG UINT8_MAX
143 #define EM_TX_MAX_SEG UINT8_MAX
144 #define EM_TX_MAX_MTU_SEG UINT8_MAX
146 /* structure for interrupt relative data */
147 struct e1000_interrupt {
152 /* local vfta copy */
154 uint32_t vfta[IGB_VFTA_SIZE];
158 * VF data which used by PF host only
160 #define E1000_MAX_VF_MC_ENTRIES 30
161 struct e1000_vf_info {
162 uint8_t vf_mac_addresses[ETHER_ADDR_LEN];
163 uint16_t vf_mc_hashes[E1000_MAX_VF_MC_ENTRIES];
164 uint16_t num_vf_mc_hashes;
165 uint16_t default_vf_vlan_id;
166 uint16_t vlans_enabled;
172 TAILQ_HEAD(e1000_flex_filter_list, e1000_flex_filter);
174 struct e1000_flex_filter_info {
176 uint32_t dwords[E1000_MAX_FLEX_FILTER_DWDS]; /* flex bytes in dword. */
177 /* if mask bit is 1b, do not compare corresponding byte in dwords. */
178 uint8_t mask[E1000_FLEX_FILTERS_MASK_SIZE];
182 /* Flex filter structure */
183 struct e1000_flex_filter {
184 TAILQ_ENTRY(e1000_flex_filter) entries;
185 uint16_t index; /* index of flex filter */
186 struct e1000_flex_filter_info filter_info;
187 uint16_t queue; /* rx queue assigned to */
190 TAILQ_HEAD(e1000_5tuple_filter_list, e1000_5tuple_filter);
191 TAILQ_HEAD(e1000_2tuple_filter_list, e1000_2tuple_filter);
193 struct e1000_5tuple_filter_info {
198 uint8_t proto; /* l4 protocol. */
199 /* the packet matched above 5tuple and contain any set bit will hit this filter. */
201 uint8_t priority; /* seven levels (001b-111b), 111b is highest,
202 used when more than one filter matches. */
203 uint8_t dst_ip_mask:1, /* if mask is 1b, do not compare dst ip. */
204 src_ip_mask:1, /* if mask is 1b, do not compare src ip. */
205 dst_port_mask:1, /* if mask is 1b, do not compare dst port. */
206 src_port_mask:1, /* if mask is 1b, do not compare src port. */
207 proto_mask:1; /* if mask is 1b, do not compare protocol. */
210 struct e1000_2tuple_filter_info {
212 uint8_t proto; /* l4 protocol. */
213 /* the packet matched above 2tuple and contain any set bit will hit this filter. */
215 uint8_t priority; /* seven levels (001b-111b), 111b is highest,
216 used when more than one filter matches. */
217 uint8_t dst_ip_mask:1, /* if mask is 1b, do not compare dst ip. */
218 src_ip_mask:1, /* if mask is 1b, do not compare src ip. */
219 dst_port_mask:1, /* if mask is 1b, do not compare dst port. */
220 src_port_mask:1, /* if mask is 1b, do not compare src port. */
221 proto_mask:1; /* if mask is 1b, do not compare protocol. */
224 /* 5tuple filter structure */
225 struct e1000_5tuple_filter {
226 TAILQ_ENTRY(e1000_5tuple_filter) entries;
227 uint16_t index; /* the index of 5tuple filter */
228 struct e1000_5tuple_filter_info filter_info;
229 uint16_t queue; /* rx queue assigned to */
232 /* 2tuple filter structure */
233 struct e1000_2tuple_filter {
234 TAILQ_ENTRY(e1000_2tuple_filter) entries;
235 uint16_t index; /* the index of 2tuple filter */
236 struct e1000_2tuple_filter_info filter_info;
237 uint16_t queue; /* rx queue assigned to */
241 * Structure to store filters' info.
243 struct e1000_filter_info {
244 uint8_t ethertype_mask; /* Bit mask for every used ethertype filter */
245 /* store used ethertype filters*/
246 uint16_t ethertype_filters[E1000_MAX_ETQF_FILTERS];
247 uint8_t flex_mask; /* Bit mask for every used flex filter */
248 struct e1000_flex_filter_list flex_list;
249 /* Bit mask for every used 5tuple filter */
250 uint8_t fivetuple_mask;
251 struct e1000_5tuple_filter_list fivetuple_list;
252 /* Bit mask for every used 2tuple filter */
253 uint8_t twotuple_mask;
254 struct e1000_2tuple_filter_list twotuple_list;
258 * Structure to store private data for each driver instance (for each port).
260 struct e1000_adapter {
262 struct e1000_hw_stats stats;
263 struct e1000_interrupt intr;
264 struct e1000_vfta shadow_vfta;
265 struct e1000_vf_info *vfdata;
266 struct e1000_filter_info filter;
268 struct rte_timecounter systime_tc;
269 struct rte_timecounter rx_tstamp_tc;
270 struct rte_timecounter tx_tstamp_tc;
273 #define E1000_DEV_PRIVATE(adapter) \
274 ((struct e1000_adapter *)adapter)
276 #define E1000_DEV_PRIVATE_TO_HW(adapter) \
277 (&((struct e1000_adapter *)adapter)->hw)
279 #define E1000_DEV_PRIVATE_TO_STATS(adapter) \
280 (&((struct e1000_adapter *)adapter)->stats)
282 #define E1000_DEV_PRIVATE_TO_INTR(adapter) \
283 (&((struct e1000_adapter *)adapter)->intr)
285 #define E1000_DEV_PRIVATE_TO_VFTA(adapter) \
286 (&((struct e1000_adapter *)adapter)->shadow_vfta)
288 #define E1000_DEV_PRIVATE_TO_P_VFDATA(adapter) \
289 (&((struct e1000_adapter *)adapter)->vfdata)
291 #define E1000_DEV_PRIVATE_TO_FILTER_INFO(adapter) \
292 (&((struct e1000_adapter *)adapter)->filter)
294 #define E1000_DEV_TO_PCI(eth_dev) \
295 RTE_DEV_TO_PCI((eth_dev)->device)
297 * RX/TX IGB function prototypes
299 void eth_igb_tx_queue_release(void *txq);
300 void eth_igb_rx_queue_release(void *rxq);
301 void igb_dev_clear_queues(struct rte_eth_dev *dev);
302 void igb_dev_free_queues(struct rte_eth_dev *dev);
304 int eth_igb_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
305 uint16_t nb_rx_desc, unsigned int socket_id,
306 const struct rte_eth_rxconf *rx_conf,
307 struct rte_mempool *mb_pool);
309 uint32_t eth_igb_rx_queue_count(struct rte_eth_dev *dev,
310 uint16_t rx_queue_id);
312 int eth_igb_rx_descriptor_done(void *rx_queue, uint16_t offset);
314 int eth_igb_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
315 uint16_t nb_tx_desc, unsigned int socket_id,
316 const struct rte_eth_txconf *tx_conf);
318 int eth_igb_rx_init(struct rte_eth_dev *dev);
320 void eth_igb_tx_init(struct rte_eth_dev *dev);
322 uint16_t eth_igb_xmit_pkts(void *txq, struct rte_mbuf **tx_pkts,
325 uint16_t eth_igb_prep_pkts(void *txq, struct rte_mbuf **tx_pkts,
328 uint16_t eth_igb_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts,
331 uint16_t eth_igb_recv_scattered_pkts(void *rxq,
332 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
334 int eth_igb_rss_hash_update(struct rte_eth_dev *dev,
335 struct rte_eth_rss_conf *rss_conf);
337 int eth_igb_rss_hash_conf_get(struct rte_eth_dev *dev,
338 struct rte_eth_rss_conf *rss_conf);
340 int eth_igbvf_rx_init(struct rte_eth_dev *dev);
342 void eth_igbvf_tx_init(struct rte_eth_dev *dev);
345 * misc function prototypes
347 void igb_pf_host_init(struct rte_eth_dev *eth_dev);
349 void igb_pf_mbx_process(struct rte_eth_dev *eth_dev);
351 int igb_pf_host_configure(struct rte_eth_dev *eth_dev);
353 void igb_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
354 struct rte_eth_rxq_info *qinfo);
356 void igb_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
357 struct rte_eth_txq_info *qinfo);
360 * RX/TX EM function prototypes
362 void eth_em_tx_queue_release(void *txq);
363 void eth_em_rx_queue_release(void *rxq);
365 void em_dev_clear_queues(struct rte_eth_dev *dev);
366 void em_dev_free_queues(struct rte_eth_dev *dev);
368 int eth_em_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
369 uint16_t nb_rx_desc, unsigned int socket_id,
370 const struct rte_eth_rxconf *rx_conf,
371 struct rte_mempool *mb_pool);
373 uint32_t eth_em_rx_queue_count(struct rte_eth_dev *dev,
374 uint16_t rx_queue_id);
376 int eth_em_rx_descriptor_done(void *rx_queue, uint16_t offset);
378 int eth_em_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
379 uint16_t nb_tx_desc, unsigned int socket_id,
380 const struct rte_eth_txconf *tx_conf);
382 int eth_em_rx_init(struct rte_eth_dev *dev);
384 void eth_em_tx_init(struct rte_eth_dev *dev);
386 uint16_t eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
389 uint16_t eth_em_prep_pkts(void *txq, struct rte_mbuf **tx_pkts,
392 uint16_t eth_em_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
395 uint16_t eth_em_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
398 void em_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
399 struct rte_eth_rxq_info *qinfo);
401 void em_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
402 struct rte_eth_txq_info *qinfo);
404 void igb_pf_host_uninit(struct rte_eth_dev *dev);
406 #endif /* _E1000_ETHDEV_H_ */