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34 #ifndef _E1000_ETHDEV_H_
35 #define _E1000_ETHDEV_H_
38 #define E1000_INTEL_VENDOR_ID 0x8086
40 /* need update link, bit flag */
41 #define E1000_FLAG_NEED_LINK_UPDATE (uint32_t)(1 << 0)
42 #define E1000_FLAG_MAILBOX (uint32_t)(1 << 1)
45 * Defines that were not part of e1000_hw.h as they are not used by the FreeBSD
48 #define E1000_ADVTXD_POPTS_TXSM 0x00000200 /* L4 Checksum offload request */
49 #define E1000_ADVTXD_POPTS_IXSM 0x00000100 /* IP Checksum offload request */
50 #define E1000_ADVTXD_TUCMD_L4T_RSV 0x00001800 /* L4 Packet TYPE of Reserved */
51 #define E1000_RXD_STAT_TMST 0x10000 /* Timestamped Packet indication */
52 #define E1000_RXD_ERR_CKSUM_BIT 29
53 #define E1000_RXD_ERR_CKSUM_MSK 3
54 #define E1000_ADVTXD_MACLEN_SHIFT 9 /* Bit shift for l2_len */
55 #define E1000_CTRL_EXT_EXTEND_VLAN (1<<26) /* EXTENDED VLAN */
56 #define IGB_VFTA_SIZE 128
58 #define IGB_MAX_RX_QUEUE_NUM 8
59 #define IGB_MAX_RX_QUEUE_NUM_82576 16
61 #define E1000_SYN_FILTER_ENABLE 0x00000001 /* syn filter enable field */
62 #define E1000_SYN_FILTER_QUEUE 0x0000000E /* syn filter queue field */
63 #define E1000_SYN_FILTER_QUEUE_SHIFT 1 /* syn filter queue field */
64 #define E1000_RFCTL_SYNQFP 0x00080000 /* SYNQFP in RFCTL register */
66 #define E1000_ETQF_ETHERTYPE 0x0000FFFF
67 #define E1000_ETQF_QUEUE 0x00070000
68 #define E1000_ETQF_QUEUE_SHIFT 16
69 #define E1000_MAX_ETQF_FILTERS 8
71 #define E1000_IMIR_DSTPORT 0x0000FFFF
72 #define E1000_IMIR_PRIORITY 0xE0000000
73 #define E1000_MAX_TTQF_FILTERS 8
74 #define E1000_2TUPLE_MAX_PRI 7
76 #define E1000_MAX_FLEX_FILTERS 8
77 #define E1000_MAX_FHFT 4
78 #define E1000_MAX_FHFT_EXT 4
79 #define E1000_FHFT_SIZE_IN_DWD 64
80 #define E1000_MAX_FLEX_FILTER_PRI 7
81 #define E1000_MAX_FLEX_FILTER_LEN 128
82 #define E1000_MAX_FLEX_FILTER_DWDS \
83 (E1000_MAX_FLEX_FILTER_LEN / sizeof(uint32_t))
84 #define E1000_FLEX_FILTERS_MASK_SIZE \
85 (E1000_MAX_FLEX_FILTER_DWDS / 4)
86 #define E1000_FHFT_QUEUEING_LEN 0x0000007F
87 #define E1000_FHFT_QUEUEING_QUEUE 0x00000700
88 #define E1000_FHFT_QUEUEING_PRIO 0x00070000
89 #define E1000_FHFT_QUEUEING_OFFSET 0xFC
90 #define E1000_FHFT_QUEUEING_QUEUE_SHIFT 8
91 #define E1000_FHFT_QUEUEING_PRIO_SHIFT 16
92 #define E1000_WUFC_FLEX_HQ 0x00004000
94 #define E1000_SPQF_SRCPORT 0x0000FFFF
96 #define E1000_MAX_FTQF_FILTERS 8
97 #define E1000_FTQF_PROTOCOL_MASK 0x000000FF
98 #define E1000_FTQF_5TUPLE_MASK_SHIFT 28
99 #define E1000_FTQF_QUEUE_MASK 0x03ff0000
100 #define E1000_FTQF_QUEUE_SHIFT 16
101 #define E1000_FTQF_QUEUE_ENABLE 0x00000100
103 #define IGB_RSS_OFFLOAD_ALL ( \
105 ETH_RSS_NONFRAG_IPV4_TCP | \
106 ETH_RSS_NONFRAG_IPV4_UDP | \
108 ETH_RSS_NONFRAG_IPV6_TCP | \
109 ETH_RSS_NONFRAG_IPV6_UDP | \
111 ETH_RSS_IPV6_TCP_EX | \
115 * Maximum number of Ring Descriptors.
117 * Since RDLEN/TDLEN should be multiple of 128 bytes, the number of ring
118 * desscriptors should meet the following condition:
119 * (num_ring_desc * sizeof(struct e1000_rx/tx_desc)) % 128 == 0
121 #define E1000_MIN_RING_DESC 32
122 #define E1000_MAX_RING_DESC 4096
125 * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be
126 * multiple of 128 bytes. So we align TDBA/RDBA on 128 byte boundary.
127 * This will also optimize cache line size effect.
128 * H/W supports up to cache line size 128.
130 #define E1000_ALIGN 128
132 #define IGB_RXD_ALIGN (E1000_ALIGN / sizeof(union e1000_adv_rx_desc))
133 #define IGB_TXD_ALIGN (E1000_ALIGN / sizeof(union e1000_adv_tx_desc))
135 #define EM_RXD_ALIGN (E1000_ALIGN / sizeof(struct e1000_rx_desc))
136 #define EM_TXD_ALIGN (E1000_ALIGN / sizeof(struct e1000_data_desc))
138 #define E1000_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET
139 #define E1000_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET
141 #define IGB_TX_MAX_SEG UINT8_MAX
142 #define IGB_TX_MAX_MTU_SEG UINT8_MAX
143 #define EM_TX_MAX_SEG UINT8_MAX
144 #define EM_TX_MAX_MTU_SEG UINT8_MAX
146 #define MAC_TYPE_FILTER_SUP(type) do {\
147 if ((type) != e1000_82580 && (type) != e1000_i350 &&\
148 (type) != e1000_82576 && (type) != e1000_i210 &&\
149 (type) != e1000_i211)\
153 /* structure for interrupt relative data */
154 struct e1000_interrupt {
159 /* local vfta copy */
161 uint32_t vfta[IGB_VFTA_SIZE];
165 * VF data which used by PF host only
167 #define E1000_MAX_VF_MC_ENTRIES 30
168 struct e1000_vf_info {
169 uint8_t vf_mac_addresses[ETHER_ADDR_LEN];
170 uint16_t vf_mc_hashes[E1000_MAX_VF_MC_ENTRIES];
171 uint16_t num_vf_mc_hashes;
172 uint16_t default_vf_vlan_id;
173 uint16_t vlans_enabled;
179 TAILQ_HEAD(e1000_flex_filter_list, e1000_flex_filter);
181 struct e1000_flex_filter_info {
183 uint32_t dwords[E1000_MAX_FLEX_FILTER_DWDS]; /* flex bytes in dword. */
184 /* if mask bit is 1b, do not compare corresponding byte in dwords. */
185 uint8_t mask[E1000_FLEX_FILTERS_MASK_SIZE];
189 /* Flex filter structure */
190 struct e1000_flex_filter {
191 TAILQ_ENTRY(e1000_flex_filter) entries;
192 uint16_t index; /* index of flex filter */
193 struct e1000_flex_filter_info filter_info;
194 uint16_t queue; /* rx queue assigned to */
197 TAILQ_HEAD(e1000_5tuple_filter_list, e1000_5tuple_filter);
198 TAILQ_HEAD(e1000_2tuple_filter_list, e1000_2tuple_filter);
200 struct e1000_5tuple_filter_info {
205 uint8_t proto; /* l4 protocol. */
206 /* the packet matched above 5tuple and contain any set bit will hit this filter. */
208 uint8_t priority; /* seven levels (001b-111b), 111b is highest,
209 used when more than one filter matches. */
210 uint8_t dst_ip_mask:1, /* if mask is 1b, do not compare dst ip. */
211 src_ip_mask:1, /* if mask is 1b, do not compare src ip. */
212 dst_port_mask:1, /* if mask is 1b, do not compare dst port. */
213 src_port_mask:1, /* if mask is 1b, do not compare src port. */
214 proto_mask:1; /* if mask is 1b, do not compare protocol. */
217 struct e1000_2tuple_filter_info {
219 uint8_t proto; /* l4 protocol. */
220 /* the packet matched above 2tuple and contain any set bit will hit this filter. */
222 uint8_t priority; /* seven levels (001b-111b), 111b is highest,
223 used when more than one filter matches. */
224 uint8_t dst_ip_mask:1, /* if mask is 1b, do not compare dst ip. */
225 src_ip_mask:1, /* if mask is 1b, do not compare src ip. */
226 dst_port_mask:1, /* if mask is 1b, do not compare dst port. */
227 src_port_mask:1, /* if mask is 1b, do not compare src port. */
228 proto_mask:1; /* if mask is 1b, do not compare protocol. */
231 /* 5tuple filter structure */
232 struct e1000_5tuple_filter {
233 TAILQ_ENTRY(e1000_5tuple_filter) entries;
234 uint16_t index; /* the index of 5tuple filter */
235 struct e1000_5tuple_filter_info filter_info;
236 uint16_t queue; /* rx queue assigned to */
239 /* 2tuple filter structure */
240 struct e1000_2tuple_filter {
241 TAILQ_ENTRY(e1000_2tuple_filter) entries;
242 uint16_t index; /* the index of 2tuple filter */
243 struct e1000_2tuple_filter_info filter_info;
244 uint16_t queue; /* rx queue assigned to */
247 /* ethertype filter structure */
248 struct igb_ethertype_filter {
254 * Structure to store filters'info.
256 struct e1000_filter_info {
257 uint8_t ethertype_mask; /* Bit mask for every used ethertype filter */
258 /* store used ethertype filters*/
259 struct igb_ethertype_filter ethertype_filters[E1000_MAX_ETQF_FILTERS];
260 uint8_t flex_mask; /* Bit mask for every used flex filter */
261 struct e1000_flex_filter_list flex_list;
262 /* Bit mask for every used 5tuple filter */
263 uint8_t fivetuple_mask;
264 struct e1000_5tuple_filter_list fivetuple_list;
265 /* Bit mask for every used 2tuple filter */
266 uint8_t twotuple_mask;
267 struct e1000_2tuple_filter_list twotuple_list;
268 /* store the SYN filter info */
273 * Structure to store private data for each driver instance (for each port).
275 struct e1000_adapter {
277 struct e1000_hw_stats stats;
278 struct e1000_interrupt intr;
279 struct e1000_vfta shadow_vfta;
280 struct e1000_vf_info *vfdata;
281 struct e1000_filter_info filter;
283 struct rte_timecounter systime_tc;
284 struct rte_timecounter rx_tstamp_tc;
285 struct rte_timecounter tx_tstamp_tc;
288 #define E1000_DEV_PRIVATE(adapter) \
289 ((struct e1000_adapter *)adapter)
291 #define E1000_DEV_PRIVATE_TO_HW(adapter) \
292 (&((struct e1000_adapter *)adapter)->hw)
294 #define E1000_DEV_PRIVATE_TO_STATS(adapter) \
295 (&((struct e1000_adapter *)adapter)->stats)
297 #define E1000_DEV_PRIVATE_TO_INTR(adapter) \
298 (&((struct e1000_adapter *)adapter)->intr)
300 #define E1000_DEV_PRIVATE_TO_VFTA(adapter) \
301 (&((struct e1000_adapter *)adapter)->shadow_vfta)
303 #define E1000_DEV_PRIVATE_TO_P_VFDATA(adapter) \
304 (&((struct e1000_adapter *)adapter)->vfdata)
306 #define E1000_DEV_PRIVATE_TO_FILTER_INFO(adapter) \
307 (&((struct e1000_adapter *)adapter)->filter)
309 extern const struct rte_flow_ops igb_flow_ops;
312 * RX/TX IGB function prototypes
314 void eth_igb_tx_queue_release(void *txq);
315 void eth_igb_rx_queue_release(void *rxq);
316 void igb_dev_clear_queues(struct rte_eth_dev *dev);
317 void igb_dev_free_queues(struct rte_eth_dev *dev);
319 int eth_igb_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
320 uint16_t nb_rx_desc, unsigned int socket_id,
321 const struct rte_eth_rxconf *rx_conf,
322 struct rte_mempool *mb_pool);
324 uint32_t eth_igb_rx_queue_count(struct rte_eth_dev *dev,
325 uint16_t rx_queue_id);
327 int eth_igb_rx_descriptor_done(void *rx_queue, uint16_t offset);
329 int eth_igb_rx_descriptor_status(void *rx_queue, uint16_t offset);
330 int eth_igb_tx_descriptor_status(void *tx_queue, uint16_t offset);
332 int eth_igb_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
333 uint16_t nb_tx_desc, unsigned int socket_id,
334 const struct rte_eth_txconf *tx_conf);
336 int eth_igb_tx_done_cleanup(void *txq, uint32_t free_cnt);
338 int eth_igb_rx_init(struct rte_eth_dev *dev);
340 void eth_igb_tx_init(struct rte_eth_dev *dev);
342 uint16_t eth_igb_xmit_pkts(void *txq, struct rte_mbuf **tx_pkts,
345 uint16_t eth_igb_prep_pkts(void *txq, struct rte_mbuf **tx_pkts,
348 uint16_t eth_igb_recv_pkts(void *rxq, struct rte_mbuf **rx_pkts,
351 uint16_t eth_igb_recv_scattered_pkts(void *rxq,
352 struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
354 int eth_igb_rss_hash_update(struct rte_eth_dev *dev,
355 struct rte_eth_rss_conf *rss_conf);
357 int eth_igb_rss_hash_conf_get(struct rte_eth_dev *dev,
358 struct rte_eth_rss_conf *rss_conf);
360 int eth_igbvf_rx_init(struct rte_eth_dev *dev);
362 void eth_igbvf_tx_init(struct rte_eth_dev *dev);
365 * misc function prototypes
367 void igb_pf_host_init(struct rte_eth_dev *eth_dev);
369 void igb_pf_mbx_process(struct rte_eth_dev *eth_dev);
371 int igb_pf_host_configure(struct rte_eth_dev *eth_dev);
373 void igb_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
374 struct rte_eth_rxq_info *qinfo);
376 void igb_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
377 struct rte_eth_txq_info *qinfo);
380 * RX/TX EM function prototypes
382 void eth_em_tx_queue_release(void *txq);
383 void eth_em_rx_queue_release(void *rxq);
385 void em_dev_clear_queues(struct rte_eth_dev *dev);
386 void em_dev_free_queues(struct rte_eth_dev *dev);
388 int eth_em_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
389 uint16_t nb_rx_desc, unsigned int socket_id,
390 const struct rte_eth_rxconf *rx_conf,
391 struct rte_mempool *mb_pool);
393 uint32_t eth_em_rx_queue_count(struct rte_eth_dev *dev,
394 uint16_t rx_queue_id);
396 int eth_em_rx_descriptor_done(void *rx_queue, uint16_t offset);
398 int eth_em_rx_descriptor_status(void *rx_queue, uint16_t offset);
399 int eth_em_tx_descriptor_status(void *tx_queue, uint16_t offset);
401 int eth_em_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
402 uint16_t nb_tx_desc, unsigned int socket_id,
403 const struct rte_eth_txconf *tx_conf);
405 int eth_em_rx_init(struct rte_eth_dev *dev);
407 void eth_em_tx_init(struct rte_eth_dev *dev);
409 uint16_t eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
412 uint16_t eth_em_prep_pkts(void *txq, struct rte_mbuf **tx_pkts,
415 uint16_t eth_em_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
418 uint16_t eth_em_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
421 void em_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
422 struct rte_eth_rxq_info *qinfo);
424 void em_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
425 struct rte_eth_txq_info *qinfo);
427 void igb_pf_host_uninit(struct rte_eth_dev *dev);
429 #endif /* _E1000_ETHDEV_H_ */