1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
11 #define ENA_MAX_NUM_IO_QUEUES 128U
12 /* We need to queues for each IO (on for Tx and one for Rx) */
13 #define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
15 #define ENA_MAX_HANDLERS 256
17 #define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
20 #define ENA_REG_READ_TIMEOUT 200000
22 #define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
23 #define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
24 #define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
26 /*****************************************************************************/
27 /*****************************************************************************/
28 /* ENA adaptive interrupt moderation settings */
30 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS ENA_INTR_INITIAL_TX_INTERVAL_USECS_PLAT
31 #define ENA_INTR_INITIAL_RX_INTERVAL_USECS 0
32 #define ENA_DEFAULT_INTR_DELAY_RESOLUTION 1
34 #define ENA_HASH_KEY_SIZE 40
36 #define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
38 #define ENA_FEATURE_MAX_QUEUE_EXT_VER 1
40 struct ena_llq_configurations {
41 enum ena_admin_llq_header_location llq_header_location;
42 enum ena_admin_llq_ring_entry_size llq_ring_entry_size;
43 enum ena_admin_llq_stride_ctrl llq_stride_ctrl;
44 enum ena_admin_llq_num_descs_before_header llq_num_decs_before_header;
45 u16 llq_ring_entry_size_value;
48 enum queue_direction {
49 ENA_COM_IO_QUEUE_DIRECTION_TX,
50 ENA_COM_IO_QUEUE_DIRECTION_RX
54 dma_addr_t paddr; /**< Buffer physical address */
55 u16 len; /**< Buffer length in bytes */
58 struct ena_com_rx_buf_info {
63 struct ena_com_io_desc_addr {
64 u8 __iomem *pbuf_dev_addr; /* LLQ address */
67 ena_mem_handle_t mem_handle;
70 struct ena_com_tx_meta {
74 u16 l4_hdr_len; /* In words */
77 struct ena_com_llq_info {
78 u16 header_location_ctrl;
80 u16 desc_list_entry_size_ctrl;
81 u16 desc_list_entry_size;
82 u16 descs_num_before_header;
84 u16 max_entries_in_tx_burst;
85 bool disable_meta_caching;
88 struct ena_com_io_cq {
89 struct ena_com_io_desc_addr cdesc_addr;
92 /* Interrupt unmask register */
93 u32 __iomem *unmask_reg;
95 /* The completion queue head doorbell register */
96 u32 __iomem *cq_head_db_reg;
98 /* numa configuration register (for TPH) */
99 u32 __iomem *numa_node_cfg_reg;
101 /* The value to write to the above register to unmask
102 * the interrupt of this queue
106 enum queue_direction direction;
108 /* holds the number of cdesc of the current packet */
109 u16 cur_rx_pkt_cdesc_count;
110 /* save the firt cdesc idx of the current packet */
111 u16 cur_rx_pkt_cdesc_start_idx;
117 /* Device queue index */
120 u16 last_head_update;
122 u8 cdesc_entry_size_in_bytes;
124 } ____cacheline_aligned;
126 struct ena_com_io_bounce_buffer_control {
130 u16 buffers_num; /* Must be a power of 2 */
133 /* This struct is to keep tracking the current location of the next llq entry */
134 struct ena_com_llq_pkt_ctrl {
137 u16 descs_left_in_line;
140 struct ena_com_io_sq {
141 struct ena_com_io_desc_addr desc_addr;
144 u32 __iomem *db_addr;
145 u8 __iomem *header_addr;
147 enum queue_direction direction;
148 enum ena_admin_placement_policy_type mem_queue_type;
150 bool disable_meta_caching;
153 struct ena_com_tx_meta cached_tx_meta;
154 struct ena_com_llq_info llq_info;
155 struct ena_com_llq_pkt_ctrl llq_buf_ctrl;
156 struct ena_com_io_bounce_buffer_control bounce_buf_ctrl;
164 u16 llq_last_copy_tail;
165 u32 tx_max_header_size;
169 u16 entries_in_tx_burst_left;
170 } ____cacheline_aligned;
172 struct ena_com_admin_cq {
173 struct ena_admin_acq_entry *entries;
174 ena_mem_handle_t mem_handle;
181 struct ena_com_admin_sq {
182 struct ena_admin_aq_entry *entries;
183 ena_mem_handle_t mem_handle;
186 u32 __iomem *db_addr;
194 struct ena_com_stats_admin {
202 struct ena_com_admin_queue {
205 ena_spinlock_t q_lock; /* spinlock for the admin queue */
207 struct ena_comp_ctx *comp_ctx;
208 u32 completion_timeout;
210 struct ena_com_admin_cq cq;
211 struct ena_com_admin_sq sq;
213 /* Indicate if the admin queue should poll for completion */
216 /* Define if fallback to polling mode should occur */
221 /* Indicate that the ena was initialized and can
222 * process new admin commands
226 /* Count the number of outstanding admin commands */
227 ena_atomic32_t outstanding_cmds;
229 struct ena_com_stats_admin stats;
232 struct ena_aenq_handlers;
234 struct ena_com_aenq {
237 struct ena_admin_aenq_entry *entries;
239 ena_mem_handle_t mem_handle;
241 struct ena_aenq_handlers *aenq_handlers;
244 struct ena_com_mmio_read {
245 struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
246 dma_addr_t read_resp_dma_addr;
247 ena_mem_handle_t read_resp_mem_handle;
248 u32 reg_read_to; /* in us */
250 bool readless_supported;
251 /* spin lock to ensure a single outstanding read */
257 u16 *host_rss_ind_tbl;
258 struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
259 dma_addr_t rss_ind_tbl_dma_addr;
260 ena_mem_handle_t rss_ind_tbl_mem_handle;
264 enum ena_admin_hash_functions hash_func;
265 struct ena_admin_feature_rss_flow_hash_control *hash_key;
266 dma_addr_t hash_key_dma_addr;
267 ena_mem_handle_t hash_key_mem_handle;
271 struct ena_admin_feature_rss_hash_control *hash_ctrl;
272 dma_addr_t hash_ctrl_dma_addr;
273 ena_mem_handle_t hash_ctrl_mem_handle;
277 struct ena_host_attribute {
279 u8 *debug_area_virt_addr;
280 dma_addr_t debug_area_dma_addr;
281 ena_mem_handle_t debug_area_dma_handle;
284 /* Host information */
285 struct ena_admin_host_info *host_info;
286 dma_addr_t host_info_dma_addr;
287 ena_mem_handle_t host_info_dma_handle;
290 /* Each ena_dev is a PCI function. */
292 struct ena_com_admin_queue admin_queue;
293 struct ena_com_aenq aenq;
294 struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
295 struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
297 void __iomem *mem_bar;
301 enum ena_admin_placement_policy_type tx_mem_queue_type;
302 u32 tx_max_header_size;
303 u16 stats_func; /* Selected function for extended statistic dump */
304 u16 stats_queue; /* Selected queue for extended statistic dump */
306 struct ena_com_mmio_read mmio_read;
309 u32 supported_features;
312 struct ena_host_attribute host_attr;
313 bool adaptive_coalescing;
314 u16 intr_delay_resolution;
316 /* interrupt moderation intervals are in usec divided by
317 * intr_delay_resolution, which is supplied by the device.
319 u32 intr_moder_tx_interval;
320 u32 intr_moder_rx_interval;
322 struct ena_intr_moder_entry *intr_moder_tbl;
324 struct ena_com_llq_info llq_info;
327 struct ena_com_dev_get_features_ctx {
328 struct ena_admin_queue_feature_desc max_queues;
329 struct ena_admin_queue_ext_feature_desc max_queue_ext;
330 struct ena_admin_device_attr_feature_desc dev_attr;
331 struct ena_admin_feature_aenq_desc aenq;
332 struct ena_admin_feature_offload_desc offload;
333 struct ena_admin_ena_hw_hints hw_hints;
334 struct ena_admin_feature_llq_desc llq;
335 struct ena_admin_feature_rss_ind_table ind_table;
338 struct ena_com_create_io_ctx {
339 enum ena_admin_placement_policy_type mem_queue_type;
340 enum queue_direction direction;
347 typedef void (*ena_aenq_handler)(void *data,
348 struct ena_admin_aenq_entry *aenq_e);
350 /* Holds aenq handlers. Indexed by AENQ event group */
351 struct ena_aenq_handlers {
352 ena_aenq_handler handlers[ENA_MAX_HANDLERS];
353 ena_aenq_handler unimplemented_handler;
356 /*****************************************************************************/
357 /*****************************************************************************/
358 #if defined(__cplusplus)
362 /* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
363 * @ena_dev: ENA communication layer struct
365 * Initialize the register read mechanism.
367 * @note: This method must be the first stage in the initialization sequence.
369 * @return - 0 on success, negative value on failure.
371 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
373 /* ena_com_set_mmio_read_mode - Enable/disable the indirect mmio reg read mechanism
374 * @ena_dev: ENA communication layer struct
375 * @readless_supported: readless mode (enable/disable)
377 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
378 bool readless_supported);
380 /* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
381 * value physical address.
382 * @ena_dev: ENA communication layer struct
384 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
386 /* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
387 * @ena_dev: ENA communication layer struct
389 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
391 /* ena_com_admin_init - Init the admin and the async queues
392 * @ena_dev: ENA communication layer struct
393 * @aenq_handlers: Those handlers to be called upon event.
395 * Initialize the admin submission and completion queues.
396 * Initialize the asynchronous events notification queues.
398 * @return - 0 on success, negative value on failure.
400 int ena_com_admin_init(struct ena_com_dev *ena_dev,
401 struct ena_aenq_handlers *aenq_handlers);
403 /* ena_com_admin_destroy - Destroy the admin and the async events queues.
404 * @ena_dev: ENA communication layer struct
406 * @note: Before calling this method, the caller must validate that the device
407 * won't send any additional admin completions/aenq.
408 * To achieve that, a FLR is recommended.
410 void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
412 /* ena_com_dev_reset - Perform device FLR to the device.
413 * @ena_dev: ENA communication layer struct
414 * @reset_reason: Specify what is the trigger for the reset in case of an error.
416 * @return - 0 on success, negative value on failure.
418 int ena_com_dev_reset(struct ena_com_dev *ena_dev,
419 enum ena_regs_reset_reason_types reset_reason);
421 /* ena_com_create_io_queue - Create io queue.
422 * @ena_dev: ENA communication layer struct
423 * @ctx - create context structure
425 * Create the submission and the completion queues.
427 * @return - 0 on success, negative value on failure.
429 int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
430 struct ena_com_create_io_ctx *ctx);
432 /* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
433 * @ena_dev: ENA communication layer struct
434 * @qid - the caller virtual queue id.
436 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
438 /* ena_com_get_io_handlers - Return the io queue handlers
439 * @ena_dev: ENA communication layer struct
440 * @qid - the caller virtual queue id.
441 * @io_sq - IO submission queue handler
442 * @io_cq - IO completion queue handler.
444 * @return - 0 on success, negative value on failure.
446 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
447 struct ena_com_io_sq **io_sq,
448 struct ena_com_io_cq **io_cq);
450 /* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
451 * @ena_dev: ENA communication layer struct
453 * After this method, aenq event can be received via AENQ.
455 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
457 /* ena_com_set_admin_running_state - Set the state of the admin queue
458 * @ena_dev: ENA communication layer struct
460 * Change the state of the admin queue (enable/disable)
462 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
464 /* ena_com_get_admin_running_state - Get the admin queue state
465 * @ena_dev: ENA communication layer struct
467 * Retrieve the state of the admin queue (enable/disable)
469 * @return - current polling mode (enable/disable)
471 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
473 /* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
474 * @ena_dev: ENA communication layer struct
475 * @polling: ENAble/Disable polling mode
477 * Set the admin completion mode.
479 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
481 /* ena_com_get_admin_polling_mode - Get the admin completion queue polling mode
482 * @ena_dev: ENA communication layer struct
484 * Get the admin completion mode.
485 * If polling mode is on, ena_com_execute_admin_command will perform a
486 * polling on the admin completion queue for the commands completion,
487 * otherwise it will wait on wait event.
491 bool ena_com_get_admin_polling_mode(struct ena_com_dev *ena_dev);
493 /* ena_com_set_admin_auto_polling_mode - Enable autoswitch to polling mode
494 * @ena_dev: ENA communication layer struct
495 * @polling: Enable/Disable polling mode
497 * Set the autopolling mode.
498 * If autopolling is on:
499 * In case of missing interrupt when data is available switch to polling.
501 void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev,
504 /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
505 * @ena_dev: ENA communication layer struct
507 * This method goes over the admin completion queue and wakes up all the pending
508 * threads that wait on the commands wait event.
510 * @note: Should be called after MSI-X interrupt.
512 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
514 /* ena_com_aenq_intr_handler - AENQ interrupt handler
515 * @ena_dev: ENA communication layer struct
517 * This method goes over the async event notification queue and calls the proper
520 void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data);
522 /* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
523 * @ena_dev: ENA communication layer struct
525 * This method aborts all the outstanding admin commands.
526 * The caller should then call ena_com_wait_for_abort_completion to make sure
527 * all the commands were completed.
529 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
531 /* ena_com_wait_for_abort_completion - Wait for admin commands abort.
532 * @ena_dev: ENA communication layer struct
534 * This method waits until all the outstanding admin commands are completed.
536 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
538 /* ena_com_validate_version - Validate the device parameters
539 * @ena_dev: ENA communication layer struct
541 * This method verifies the device parameters are the same as the saved
542 * parameters in ena_dev.
543 * This method is useful after device reset, to validate the device mac address
544 * and the device offloads are the same as before the reset.
546 * @return - 0 on success negative value otherwise.
548 int ena_com_validate_version(struct ena_com_dev *ena_dev);
550 /* ena_com_get_link_params - Retrieve physical link parameters.
551 * @ena_dev: ENA communication layer struct
552 * @resp: Link parameters
554 * Retrieve the physical link parameters,
555 * like speed, auto-negotiation and full duplex support.
557 * @return - 0 on Success negative value otherwise.
559 int ena_com_get_link_params(struct ena_com_dev *ena_dev,
560 struct ena_admin_get_feat_resp *resp);
562 /* ena_com_get_dma_width - Retrieve physical dma address width the device
564 * @ena_dev: ENA communication layer struct
566 * Retrieve the maximum physical address bits the device can handle.
568 * @return: > 0 on Success and negative value otherwise.
570 int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
572 /* ena_com_set_aenq_config - Set aenq groups configurations
573 * @ena_dev: ENA communication layer struct
574 * @groups flag: bit fields flags of enum ena_admin_aenq_group.
576 * Configure which aenq event group the driver would like to receive.
578 * @return: 0 on Success and negative value otherwise.
580 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
582 /* ena_com_get_dev_attr_feat - Get device features
583 * @ena_dev: ENA communication layer struct
584 * @get_feat_ctx: returned context that contain the get features.
586 * @return: 0 on Success and negative value otherwise.
588 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
589 struct ena_com_dev_get_features_ctx *get_feat_ctx);
591 /* ena_com_get_dev_basic_stats - Get device basic statistics
592 * @ena_dev: ENA communication layer struct
593 * @stats: stats return value
595 * @return: 0 on Success and negative value otherwise.
597 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
598 struct ena_admin_basic_stats *stats);
600 /* ena_com_set_dev_mtu - Configure the device mtu.
601 * @ena_dev: ENA communication layer struct
604 * @return: 0 on Success and negative value otherwise.
606 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu);
608 /* ena_com_get_offload_settings - Retrieve the device offloads capabilities
609 * @ena_dev: ENA communication layer struct
610 * @offlad: offload return value
612 * @return: 0 on Success and negative value otherwise.
614 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
615 struct ena_admin_feature_offload_desc *offload);
617 /* ena_com_rss_init - Init RSS
618 * @ena_dev: ENA communication layer struct
619 * @log_size: indirection log size
621 * Allocate RSS/RFS resources.
622 * The caller then can configure rss using ena_com_set_hash_function,
623 * ena_com_set_hash_ctrl and ena_com_indirect_table_set.
625 * @return: 0 on Success and negative value otherwise.
627 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
629 /* ena_com_rss_destroy - Destroy rss
630 * @ena_dev: ENA communication layer struct
632 * Free all the RSS/RFS resources.
634 void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
636 /* ena_com_fill_hash_function - Fill RSS hash function
637 * @ena_dev: ENA communication layer struct
638 * @func: The hash function (Toeplitz or crc)
639 * @key: Hash key (for toeplitz hash)
640 * @key_len: key length (max length 10 DW)
641 * @init_val: initial value for the hash function
643 * Fill the ena_dev resources with the desire hash function, hash key, key_len
644 * and key initial value (if needed by the hash function).
645 * To flush the key into the device the caller should call
646 * ena_com_set_hash_function.
648 * @return: 0 on Success and negative value otherwise.
650 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
651 enum ena_admin_hash_functions func,
652 const u8 *key, u16 key_len, u32 init_val);
654 /* ena_com_set_hash_function - Flush the hash function and it dependencies to
656 * @ena_dev: ENA communication layer struct
658 * Flush the hash function and it dependencies (key, key length and
659 * initial value) if needed.
661 * @note: Prior to this method the caller should call ena_com_fill_hash_function
663 * @return: 0 on Success and negative value otherwise.
665 int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
667 /* ena_com_get_hash_function - Retrieve the hash function and the hash key
669 * @ena_dev: ENA communication layer struct
670 * @func: hash function
673 * Retrieve the hash function and the hash key from the device.
675 * @note: If the caller called ena_com_fill_hash_function but didn't flash
676 * it to the device, the new configuration will be lost.
678 * @return: 0 on Success and negative value otherwise.
680 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
681 enum ena_admin_hash_functions *func,
684 /* ena_com_fill_hash_ctrl - Fill RSS hash control
685 * @ena_dev: ENA communication layer struct.
686 * @proto: The protocol to configure.
687 * @hash_fields: bit mask of ena_admin_flow_hash_fields
689 * Fill the ena_dev resources with the desire hash control (the ethernet
690 * fields that take part of the hash) for a specific protocol.
691 * To flush the hash control to the device, the caller should call
692 * ena_com_set_hash_ctrl.
694 * @return: 0 on Success and negative value otherwise.
696 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
697 enum ena_admin_flow_hash_proto proto,
700 /* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
701 * @ena_dev: ENA communication layer struct
703 * Flush the hash control (the ethernet fields that take part of the hash)
705 * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
707 * @return: 0 on Success and negative value otherwise.
709 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
711 /* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
712 * @ena_dev: ENA communication layer struct
713 * @proto: The protocol to retrieve.
714 * @fields: bit mask of ena_admin_flow_hash_fields.
716 * Retrieve the hash control from the device.
718 * @note: If the caller called ena_com_fill_hash_ctrl but didn't flash
719 * it to the device, the new configuration will be lost.
721 * @return: 0 on Success and negative value otherwise.
723 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
724 enum ena_admin_flow_hash_proto proto,
727 /* ena_com_set_default_hash_ctrl - Set the hash control to a default
729 * @ena_dev: ENA communication layer struct
731 * Fill the ena_dev resources with the default hash control configuration.
732 * To flush the hash control to the device, the caller should call
733 * ena_com_set_hash_ctrl.
735 * @return: 0 on Success and negative value otherwise.
737 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
739 /* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
741 * @ena_dev: ENA communication layer struct.
742 * @entry_idx - indirection table entry.
743 * @entry_value - redirection value
745 * Fill a single entry of the RSS indirection table in the ena_dev resources.
746 * To flush the indirection table to the device, the called should call
747 * ena_com_indirect_table_set.
749 * @return: 0 on Success and negative value otherwise.
751 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
752 u16 entry_idx, u16 entry_value);
754 /* ena_com_indirect_table_set - Flush the indirection table to the device.
755 * @ena_dev: ENA communication layer struct
757 * Flush the indirection hash control to the device.
758 * Prior to this method the caller should call ena_com_indirect_table_fill_entry
760 * @return: 0 on Success and negative value otherwise.
762 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
764 /* ena_com_indirect_table_get - Retrieve the indirection table from the device.
765 * @ena_dev: ENA communication layer struct
766 * @ind_tbl: indirection table
768 * Retrieve the RSS indirection table from the device.
770 * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flush
771 * it to the device, the new configuration will be lost.
773 * @return: 0 on Success and negative value otherwise.
775 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
777 /* ena_com_allocate_host_info - Allocate host info resources.
778 * @ena_dev: ENA communication layer struct
780 * @return: 0 on Success and negative value otherwise.
782 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
784 /* ena_com_allocate_debug_area - Allocate debug area.
785 * @ena_dev: ENA communication layer struct
786 * @debug_area_size - debug area size.
788 * @return: 0 on Success and negative value otherwise.
790 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
791 u32 debug_area_size);
793 /* ena_com_delete_debug_area - Free the debug area resources.
794 * @ena_dev: ENA communication layer struct
796 * Free the allocated debug area.
798 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
800 /* ena_com_delete_host_info - Free the host info resources.
801 * @ena_dev: ENA communication layer struct
803 * Free the allocated host info.
805 void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
807 /* ena_com_set_host_attributes - Update the device with the host
808 * attributes (debug area and host info) base address.
809 * @ena_dev: ENA communication layer struct
811 * @return: 0 on Success and negative value otherwise.
813 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
815 /* ena_com_create_io_cq - Create io completion queue.
816 * @ena_dev: ENA communication layer struct
817 * @io_cq - io completion queue handler
819 * Create IO completion queue.
821 * @return - 0 on success, negative value on failure.
823 int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
824 struct ena_com_io_cq *io_cq);
826 /* ena_com_destroy_io_cq - Destroy io completion queue.
827 * @ena_dev: ENA communication layer struct
828 * @io_cq - io completion queue handler
830 * Destroy IO completion queue.
832 * @return - 0 on success, negative value on failure.
834 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
835 struct ena_com_io_cq *io_cq);
837 /* ena_com_execute_admin_command - Execute admin command
838 * @admin_queue: admin queue.
839 * @cmd: the admin command to execute.
840 * @cmd_size: the command size.
841 * @cmd_completion: command completion return value.
842 * @cmd_comp_size: command completion size.
844 * Submit an admin command and then wait until the device returns a
846 * The completion will be copied into cmd_comp.
848 * @return - 0 on success, negative value on failure.
850 int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
851 struct ena_admin_aq_entry *cmd,
853 struct ena_admin_acq_entry *cmd_comp,
854 size_t cmd_comp_size);
856 /* ena_com_init_interrupt_moderation - Init interrupt moderation
857 * @ena_dev: ENA communication layer struct
859 * @return - 0 on success, negative value on failure.
861 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
863 /* ena_com_interrupt_moderation_supported - Return if interrupt moderation
864 * capability is supported by the device.
866 * @return - supported or not.
868 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
870 /* ena_com_update_nonadaptive_moderation_interval_tx - Update the
871 * non-adaptive interval in Tx direction.
872 * @ena_dev: ENA communication layer struct
873 * @tx_coalesce_usecs: Interval in usec.
875 * @return - 0 on success, negative value on failure.
877 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
878 u32 tx_coalesce_usecs);
880 /* ena_com_update_nonadaptive_moderation_interval_rx - Update the
881 * non-adaptive interval in Rx direction.
882 * @ena_dev: ENA communication layer struct
883 * @rx_coalesce_usecs: Interval in usec.
885 * @return - 0 on success, negative value on failure.
887 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
888 u32 rx_coalesce_usecs);
890 /* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
891 * non-adaptive interval in Tx direction.
892 * @ena_dev: ENA communication layer struct
894 * @return - interval in usec
896 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
898 /* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
899 * non-adaptive interval in Rx direction.
900 * @ena_dev: ENA communication layer struct
902 * @return - interval in usec
904 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
906 /* ena_com_config_dev_mode - Configure the placement policy of the device.
907 * @ena_dev: ENA communication layer struct
908 * @llq_features: LLQ feature descriptor, retrieve via
909 * ena_com_get_dev_attr_feat.
910 * @ena_llq_config: The default driver LLQ parameters configurations
912 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,
913 struct ena_admin_feature_llq_desc *llq_features,
914 struct ena_llq_configurations *llq_default_config);
916 static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
918 return ena_dev->adaptive_coalescing;
921 static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
923 ena_dev->adaptive_coalescing = true;
926 static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
928 ena_dev->adaptive_coalescing = false;
931 /* ena_com_update_intr_reg - Prepare interrupt register
932 * @intr_reg: interrupt register to update.
933 * @rx_delay_interval: Rx interval in usecs
934 * @tx_delay_interval: Tx interval in usecs
935 * @unmask: unmask enable/disable
937 * Prepare interrupt update register with the supplied parameters.
939 static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
940 u32 rx_delay_interval,
941 u32 tx_delay_interval,
944 intr_reg->intr_control = 0;
945 intr_reg->intr_control |= rx_delay_interval &
946 ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
948 intr_reg->intr_control |=
949 (tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
950 & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
953 intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
956 static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl)
958 u16 size, buffers_num;
961 size = bounce_buf_ctrl->buffer_size;
962 buffers_num = bounce_buf_ctrl->buffers_num;
964 buf = bounce_buf_ctrl->base_buffer +
965 (bounce_buf_ctrl->next_to_use++ & (buffers_num - 1)) * size;
967 prefetchw(bounce_buf_ctrl->base_buffer +
968 (bounce_buf_ctrl->next_to_use & (buffers_num - 1)) * size);
973 #if defined(__cplusplus)
975 #endif /* __cplusplus */
976 #endif /* !(ENA_COM) */