1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
11 #define ENA_MAX_NUM_IO_QUEUES 128U
12 /* We need to queues for each IO (on for Tx and one for Rx) */
13 #define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
15 #define ENA_MAX_HANDLERS 256
17 #define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
20 #define ENA_REG_READ_TIMEOUT 200000
22 #define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
23 #define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
24 #define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
26 /*****************************************************************************/
27 /*****************************************************************************/
28 /* ENA adaptive interrupt moderation settings */
30 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS ENA_INTR_INITIAL_TX_INTERVAL_USECS_PLAT
31 #define ENA_INTR_INITIAL_RX_INTERVAL_USECS 0
32 #define ENA_DEFAULT_INTR_DELAY_RESOLUTION 1
34 #define ENA_HASH_KEY_SIZE 40
36 #define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
38 #define ENA_FEATURE_MAX_QUEUE_EXT_VER 1
40 struct ena_llq_configurations {
41 enum ena_admin_llq_header_location llq_header_location;
42 enum ena_admin_llq_ring_entry_size llq_ring_entry_size;
43 enum ena_admin_llq_stride_ctrl llq_stride_ctrl;
44 enum ena_admin_llq_num_descs_before_header llq_num_decs_before_header;
45 u16 llq_ring_entry_size_value;
48 enum queue_direction {
49 ENA_COM_IO_QUEUE_DIRECTION_TX,
50 ENA_COM_IO_QUEUE_DIRECTION_RX
54 dma_addr_t paddr; /**< Buffer physical address */
55 u16 len; /**< Buffer length in bytes */
58 struct ena_com_rx_buf_info {
63 struct ena_com_io_desc_addr {
64 u8 __iomem *pbuf_dev_addr; /* LLQ address */
67 ena_mem_handle_t mem_handle;
70 struct ena_com_tx_meta {
74 u16 l4_hdr_len; /* In words */
77 struct ena_com_llq_info {
78 u16 header_location_ctrl;
80 u16 desc_list_entry_size_ctrl;
81 u16 desc_list_entry_size;
82 u16 descs_num_before_header;
84 u16 max_entries_in_tx_burst;
87 struct ena_com_io_cq {
88 struct ena_com_io_desc_addr cdesc_addr;
91 /* Interrupt unmask register */
92 u32 __iomem *unmask_reg;
94 /* The completion queue head doorbell register */
95 u32 __iomem *cq_head_db_reg;
97 /* numa configuration register (for TPH) */
98 u32 __iomem *numa_node_cfg_reg;
100 /* The value to write to the above register to unmask
101 * the interrupt of this queue
105 enum queue_direction direction;
107 /* holds the number of cdesc of the current packet */
108 u16 cur_rx_pkt_cdesc_count;
109 /* save the firt cdesc idx of the current packet */
110 u16 cur_rx_pkt_cdesc_start_idx;
116 /* Device queue index */
119 u16 last_head_update;
121 u8 cdesc_entry_size_in_bytes;
123 } ____cacheline_aligned;
125 struct ena_com_io_bounce_buffer_control {
129 u16 buffers_num; /* Must be a power of 2 */
132 /* This struct is to keep tracking the current location of the next llq entry */
133 struct ena_com_llq_pkt_ctrl {
136 u16 descs_left_in_line;
139 struct ena_com_io_sq {
140 struct ena_com_io_desc_addr desc_addr;
143 u32 __iomem *db_addr;
144 u8 __iomem *header_addr;
146 enum queue_direction direction;
147 enum ena_admin_placement_policy_type mem_queue_type;
150 struct ena_com_tx_meta cached_tx_meta;
151 struct ena_com_llq_info llq_info;
152 struct ena_com_llq_pkt_ctrl llq_buf_ctrl;
153 struct ena_com_io_bounce_buffer_control bounce_buf_ctrl;
161 u16 llq_last_copy_tail;
162 u32 tx_max_header_size;
166 u16 entries_in_tx_burst_left;
167 } ____cacheline_aligned;
169 struct ena_com_admin_cq {
170 struct ena_admin_acq_entry *entries;
171 ena_mem_handle_t mem_handle;
178 struct ena_com_admin_sq {
179 struct ena_admin_aq_entry *entries;
180 ena_mem_handle_t mem_handle;
183 u32 __iomem *db_addr;
191 struct ena_com_stats_admin {
199 struct ena_com_admin_queue {
202 ena_spinlock_t q_lock; /* spinlock for the admin queue */
204 struct ena_comp_ctx *comp_ctx;
205 u32 completion_timeout;
207 struct ena_com_admin_cq cq;
208 struct ena_com_admin_sq sq;
210 /* Indicate if the admin queue should poll for completion */
213 /* Define if fallback to polling mode should occur */
218 /* Indicate that the ena was initialized and can
219 * process new admin commands
223 /* Count the number of outstanding admin commands */
224 ena_atomic32_t outstanding_cmds;
226 struct ena_com_stats_admin stats;
229 struct ena_aenq_handlers;
231 struct ena_com_aenq {
234 struct ena_admin_aenq_entry *entries;
236 ena_mem_handle_t mem_handle;
238 struct ena_aenq_handlers *aenq_handlers;
241 struct ena_com_mmio_read {
242 struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
243 dma_addr_t read_resp_dma_addr;
244 ena_mem_handle_t read_resp_mem_handle;
245 u32 reg_read_to; /* in us */
247 bool readless_supported;
248 /* spin lock to ensure a single outstanding read */
254 u16 *host_rss_ind_tbl;
255 struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
256 dma_addr_t rss_ind_tbl_dma_addr;
257 ena_mem_handle_t rss_ind_tbl_mem_handle;
261 enum ena_admin_hash_functions hash_func;
262 struct ena_admin_feature_rss_flow_hash_control *hash_key;
263 dma_addr_t hash_key_dma_addr;
264 ena_mem_handle_t hash_key_mem_handle;
268 struct ena_admin_feature_rss_hash_control *hash_ctrl;
269 dma_addr_t hash_ctrl_dma_addr;
270 ena_mem_handle_t hash_ctrl_mem_handle;
274 struct ena_host_attribute {
276 u8 *debug_area_virt_addr;
277 dma_addr_t debug_area_dma_addr;
278 ena_mem_handle_t debug_area_dma_handle;
281 /* Host information */
282 struct ena_admin_host_info *host_info;
283 dma_addr_t host_info_dma_addr;
284 ena_mem_handle_t host_info_dma_handle;
287 /* Each ena_dev is a PCI function. */
289 struct ena_com_admin_queue admin_queue;
290 struct ena_com_aenq aenq;
291 struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
292 struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
294 void __iomem *mem_bar;
298 enum ena_admin_placement_policy_type tx_mem_queue_type;
299 u32 tx_max_header_size;
300 u16 stats_func; /* Selected function for extended statistic dump */
301 u16 stats_queue; /* Selected queue for extended statistic dump */
303 struct ena_com_mmio_read mmio_read;
306 u32 supported_features;
309 struct ena_host_attribute host_attr;
310 bool adaptive_coalescing;
311 u16 intr_delay_resolution;
313 /* interrupt moderation intervals are in usec divided by
314 * intr_delay_resolution, which is supplied by the device.
316 u32 intr_moder_tx_interval;
317 u32 intr_moder_rx_interval;
319 struct ena_intr_moder_entry *intr_moder_tbl;
321 struct ena_com_llq_info llq_info;
324 struct ena_com_dev_get_features_ctx {
325 struct ena_admin_queue_feature_desc max_queues;
326 struct ena_admin_queue_ext_feature_desc max_queue_ext;
327 struct ena_admin_device_attr_feature_desc dev_attr;
328 struct ena_admin_feature_aenq_desc aenq;
329 struct ena_admin_feature_offload_desc offload;
330 struct ena_admin_ena_hw_hints hw_hints;
331 struct ena_admin_feature_llq_desc llq;
332 struct ena_admin_feature_rss_ind_table ind_table;
335 struct ena_com_create_io_ctx {
336 enum ena_admin_placement_policy_type mem_queue_type;
337 enum queue_direction direction;
344 typedef void (*ena_aenq_handler)(void *data,
345 struct ena_admin_aenq_entry *aenq_e);
347 /* Holds aenq handlers. Indexed by AENQ event group */
348 struct ena_aenq_handlers {
349 ena_aenq_handler handlers[ENA_MAX_HANDLERS];
350 ena_aenq_handler unimplemented_handler;
353 /*****************************************************************************/
354 /*****************************************************************************/
355 #if defined(__cplusplus)
359 /* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
360 * @ena_dev: ENA communication layer struct
362 * Initialize the register read mechanism.
364 * @note: This method must be the first stage in the initialization sequence.
366 * @return - 0 on success, negative value on failure.
368 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
370 /* ena_com_set_mmio_read_mode - Enable/disable the mmio reg read mechanism
371 * @ena_dev: ENA communication layer struct
372 * @readless_supported: readless mode (enable/disable)
374 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
375 bool readless_supported);
377 /* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
378 * value physical address.
379 * @ena_dev: ENA communication layer struct
381 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
383 /* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
384 * @ena_dev: ENA communication layer struct
386 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
388 /* ena_com_admin_init - Init the admin and the async queues
389 * @ena_dev: ENA communication layer struct
390 * @aenq_handlers: Those handlers to be called upon event.
392 * Initialize the admin submission and completion queues.
393 * Initialize the asynchronous events notification queues.
395 * @return - 0 on success, negative value on failure.
397 int ena_com_admin_init(struct ena_com_dev *ena_dev,
398 struct ena_aenq_handlers *aenq_handlers);
400 /* ena_com_admin_destroy - Destroy the admin and the async events queues.
401 * @ena_dev: ENA communication layer struct
403 * @note: Before calling this method, the caller must validate that the device
404 * won't send any additional admin completions/aenq.
405 * To achieve that, a FLR is recommended.
407 void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
409 /* ena_com_dev_reset - Perform device FLR to the device.
410 * @ena_dev: ENA communication layer struct
411 * @reset_reason: Specify what is the trigger for the reset in case of an error.
413 * @return - 0 on success, negative value on failure.
415 int ena_com_dev_reset(struct ena_com_dev *ena_dev,
416 enum ena_regs_reset_reason_types reset_reason);
418 /* ena_com_create_io_queue - Create io queue.
419 * @ena_dev: ENA communication layer struct
420 * @ctx - create context structure
422 * Create the submission and the completion queues.
424 * @return - 0 on success, negative value on failure.
426 int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
427 struct ena_com_create_io_ctx *ctx);
429 /* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
430 * @ena_dev: ENA communication layer struct
431 * @qid - the caller virtual queue id.
433 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
435 /* ena_com_get_io_handlers - Return the io queue handlers
436 * @ena_dev: ENA communication layer struct
437 * @qid - the caller virtual queue id.
438 * @io_sq - IO submission queue handler
439 * @io_cq - IO completion queue handler.
441 * @return - 0 on success, negative value on failure.
443 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
444 struct ena_com_io_sq **io_sq,
445 struct ena_com_io_cq **io_cq);
447 /* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
448 * @ena_dev: ENA communication layer struct
450 * After this method, aenq event can be received via AENQ.
452 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
454 /* ena_com_set_admin_running_state - Set the state of the admin queue
455 * @ena_dev: ENA communication layer struct
457 * Change the state of the admin queue (enable/disable)
459 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
461 /* ena_com_get_admin_running_state - Get the admin queue state
462 * @ena_dev: ENA communication layer struct
464 * Retrieve the state of the admin queue (enable/disable)
466 * @return - current polling mode (enable/disable)
468 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
470 /* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
471 * @ena_dev: ENA communication layer struct
472 * @polling: ENAble/Disable polling mode
474 * Set the admin completion mode.
476 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
478 /* ena_com_get_admin_polling_mode - Get the admin completion queue polling mode
479 * @ena_dev: ENA communication layer struct
481 * Get the admin completion mode.
482 * If polling mode is on, ena_com_execute_admin_command will perform a
483 * polling on the admin completion queue for the commands completion,
484 * otherwise it will wait on wait event.
488 bool ena_com_get_admin_polling_mode(struct ena_com_dev *ena_dev);
490 /* ena_com_set_admin_auto_polling_mode - Enable autoswitch to polling mode
491 * @ena_dev: ENA communication layer struct
492 * @polling: Enable/Disable polling mode
494 * Set the autopolling mode.
495 * If autopolling is on:
496 * In case of missing interrupt when data is available switch to polling.
498 void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev,
501 /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
502 * @ena_dev: ENA communication layer struct
504 * This method go over the admin completion queue and wake up all the pending
505 * threads that wait on the commands wait event.
507 * @note: Should be called after MSI-X interrupt.
509 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
511 /* ena_com_aenq_intr_handler - AENQ interrupt handler
512 * @ena_dev: ENA communication layer struct
514 * This method go over the async event notification queue and call the proper
517 void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data);
519 /* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
520 * @ena_dev: ENA communication layer struct
522 * This method aborts all the outstanding admin commands.
523 * The caller should then call ena_com_wait_for_abort_completion to make sure
524 * all the commands were completed.
526 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
528 /* ena_com_wait_for_abort_completion - Wait for admin commands abort.
529 * @ena_dev: ENA communication layer struct
531 * This method wait until all the outstanding admin commands will be completed.
533 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
535 /* ena_com_validate_version - Validate the device parameters
536 * @ena_dev: ENA communication layer struct
538 * This method validate the device parameters are the same as the saved
539 * parameters in ena_dev.
540 * This method is useful after device reset, to validate the device mac address
541 * and the device offloads are the same as before the reset.
543 * @return - 0 on success negative value otherwise.
545 int ena_com_validate_version(struct ena_com_dev *ena_dev);
547 /* ena_com_get_link_params - Retrieve physical link parameters.
548 * @ena_dev: ENA communication layer struct
549 * @resp: Link parameters
551 * Retrieve the physical link parameters,
552 * like speed, auto-negotiation and full duplex support.
554 * @return - 0 on Success negative value otherwise.
556 int ena_com_get_link_params(struct ena_com_dev *ena_dev,
557 struct ena_admin_get_feat_resp *resp);
559 /* ena_com_get_dma_width - Retrieve physical dma address width the device
561 * @ena_dev: ENA communication layer struct
563 * Retrieve the maximum physical address bits the device can handle.
565 * @return: > 0 on Success and negative value otherwise.
567 int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
569 /* ena_com_set_aenq_config - Set aenq groups configurations
570 * @ena_dev: ENA communication layer struct
571 * @groups flag: bit fields flags of enum ena_admin_aenq_group.
573 * Configure which aenq event group the driver would like to receive.
575 * @return: 0 on Success and negative value otherwise.
577 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
579 /* ena_com_get_dev_attr_feat - Get device features
580 * @ena_dev: ENA communication layer struct
581 * @get_feat_ctx: returned context that contain the get features.
583 * @return: 0 on Success and negative value otherwise.
585 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
586 struct ena_com_dev_get_features_ctx *get_feat_ctx);
588 /* ena_com_get_dev_basic_stats - Get device basic statistics
589 * @ena_dev: ENA communication layer struct
590 * @stats: stats return value
592 * @return: 0 on Success and negative value otherwise.
594 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
595 struct ena_admin_basic_stats *stats);
597 /* ena_com_set_dev_mtu - Configure the device mtu.
598 * @ena_dev: ENA communication layer struct
601 * @return: 0 on Success and negative value otherwise.
603 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu);
605 /* ena_com_get_offload_settings - Retrieve the device offloads capabilities
606 * @ena_dev: ENA communication layer struct
607 * @offlad: offload return value
609 * @return: 0 on Success and negative value otherwise.
611 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
612 struct ena_admin_feature_offload_desc *offload);
614 /* ena_com_rss_init - Init RSS
615 * @ena_dev: ENA communication layer struct
616 * @log_size: indirection log size
618 * Allocate RSS/RFS resources.
619 * The caller then can configure rss using ena_com_set_hash_function,
620 * ena_com_set_hash_ctrl and ena_com_indirect_table_set.
622 * @return: 0 on Success and negative value otherwise.
624 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
626 /* ena_com_rss_destroy - Destroy rss
627 * @ena_dev: ENA communication layer struct
629 * Free all the RSS/RFS resources.
631 void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
633 /* ena_com_fill_hash_function - Fill RSS hash function
634 * @ena_dev: ENA communication layer struct
635 * @func: The hash function (Toeplitz or crc)
636 * @key: Hash key (for toeplitz hash)
637 * @key_len: key length (max length 10 DW)
638 * @init_val: initial value for the hash function
640 * Fill the ena_dev resources with the desire hash function, hash key, key_len
641 * and key initial value (if needed by the hash function).
642 * To flush the key into the device the caller should call
643 * ena_com_set_hash_function.
645 * @return: 0 on Success and negative value otherwise.
647 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
648 enum ena_admin_hash_functions func,
649 const u8 *key, u16 key_len, u32 init_val);
651 /* ena_com_set_hash_function - Flush the hash function and it dependencies to
653 * @ena_dev: ENA communication layer struct
655 * Flush the hash function and it dependencies (key, key length and
656 * initial value) if needed.
658 * @note: Prior to this method the caller should call ena_com_fill_hash_function
660 * @return: 0 on Success and negative value otherwise.
662 int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
664 /* ena_com_get_hash_function - Retrieve the hash function and the hash key
666 * @ena_dev: ENA communication layer struct
667 * @func: hash function
670 * Retrieve the hash function and the hash key from the device.
672 * @note: If the caller called ena_com_fill_hash_function but didn't flash
673 * it to the device, the new configuration will be lost.
675 * @return: 0 on Success and negative value otherwise.
677 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
678 enum ena_admin_hash_functions *func,
681 /* ena_com_fill_hash_ctrl - Fill RSS hash control
682 * @ena_dev: ENA communication layer struct.
683 * @proto: The protocol to configure.
684 * @hash_fields: bit mask of ena_admin_flow_hash_fields
686 * Fill the ena_dev resources with the desire hash control (the ethernet
687 * fields that take part of the hash) for a specific protocol.
688 * To flush the hash control to the device, the caller should call
689 * ena_com_set_hash_ctrl.
691 * @return: 0 on Success and negative value otherwise.
693 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
694 enum ena_admin_flow_hash_proto proto,
697 /* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
698 * @ena_dev: ENA communication layer struct
700 * Flush the hash control (the ethernet fields that take part of the hash)
702 * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
704 * @return: 0 on Success and negative value otherwise.
706 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
708 /* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
709 * @ena_dev: ENA communication layer struct
710 * @proto: The protocol to retrieve.
711 * @fields: bit mask of ena_admin_flow_hash_fields.
713 * Retrieve the hash control from the device.
715 * @note, If the caller called ena_com_fill_hash_ctrl but didn't flash
716 * it to the device, the new configuration will be lost.
718 * @return: 0 on Success and negative value otherwise.
720 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
721 enum ena_admin_flow_hash_proto proto,
724 /* ena_com_set_default_hash_ctrl - Set the hash control to a default
726 * @ena_dev: ENA communication layer struct
728 * Fill the ena_dev resources with the default hash control configuration.
729 * To flush the hash control to the device, the caller should call
730 * ena_com_set_hash_ctrl.
732 * @return: 0 on Success and negative value otherwise.
734 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
736 /* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
738 * @ena_dev: ENA communication layer struct.
739 * @entry_idx - indirection table entry.
740 * @entry_value - redirection value
742 * Fill a single entry of the RSS indirection table in the ena_dev resources.
743 * To flush the indirection table to the device, the called should call
744 * ena_com_indirect_table_set.
746 * @return: 0 on Success and negative value otherwise.
748 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
749 u16 entry_idx, u16 entry_value);
751 /* ena_com_indirect_table_set - Flush the indirection table to the device.
752 * @ena_dev: ENA communication layer struct
754 * Flush the indirection hash control to the device.
755 * Prior to this method the caller should call ena_com_indirect_table_fill_entry
757 * @return: 0 on Success and negative value otherwise.
759 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
761 /* ena_com_indirect_table_get - Retrieve the indirection table from the device.
762 * @ena_dev: ENA communication layer struct
763 * @ind_tbl: indirection table
765 * Retrieve the RSS indirection table from the device.
767 * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flash
768 * it to the device, the new configuration will be lost.
770 * @return: 0 on Success and negative value otherwise.
772 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
774 /* ena_com_allocate_host_info - Allocate host info resources.
775 * @ena_dev: ENA communication layer struct
777 * @return: 0 on Success and negative value otherwise.
779 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
781 /* ena_com_allocate_debug_area - Allocate debug area.
782 * @ena_dev: ENA communication layer struct
783 * @debug_area_size - debug area size.
785 * @return: 0 on Success and negative value otherwise.
787 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
788 u32 debug_area_size);
790 /* ena_com_delete_debug_area - Free the debug area resources.
791 * @ena_dev: ENA communication layer struct
793 * Free the allocate debug area.
795 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
797 /* ena_com_delete_host_info - Free the host info resources.
798 * @ena_dev: ENA communication layer struct
800 * Free the allocate host info.
802 void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
804 /* ena_com_set_host_attributes - Update the device with the host
805 * attributes (debug area and host info) base address.
806 * @ena_dev: ENA communication layer struct
808 * @return: 0 on Success and negative value otherwise.
810 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
812 /* ena_com_create_io_cq - Create io completion queue.
813 * @ena_dev: ENA communication layer struct
814 * @io_cq - io completion queue handler
816 * Create IO completion queue.
818 * @return - 0 on success, negative value on failure.
820 int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
821 struct ena_com_io_cq *io_cq);
823 /* ena_com_destroy_io_cq - Destroy io completion queue.
824 * @ena_dev: ENA communication layer struct
825 * @io_cq - io completion queue handler
827 * Destroy IO completion queue.
829 * @return - 0 on success, negative value on failure.
831 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
832 struct ena_com_io_cq *io_cq);
834 /* ena_com_execute_admin_command - Execute admin command
835 * @admin_queue: admin queue.
836 * @cmd: the admin command to execute.
837 * @cmd_size: the command size.
838 * @cmd_completion: command completion return value.
839 * @cmd_comp_size: command completion size.
841 * Submit an admin command and then wait until the device will return a
843 * The completion will be copyed into cmd_comp.
845 * @return - 0 on success, negative value on failure.
847 int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
848 struct ena_admin_aq_entry *cmd,
850 struct ena_admin_acq_entry *cmd_comp,
851 size_t cmd_comp_size);
853 /* ena_com_init_interrupt_moderation - Init interrupt moderation
854 * @ena_dev: ENA communication layer struct
856 * @return - 0 on success, negative value on failure.
858 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
860 /* ena_com_interrupt_moderation_supported - Return if interrupt moderation
861 * capability is supported by the device.
863 * @return - supported or not.
865 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
867 /* ena_com_update_nonadaptive_moderation_interval_tx - Update the
868 * non-adaptive interval in Tx direction.
869 * @ena_dev: ENA communication layer struct
870 * @tx_coalesce_usecs: Interval in usec.
872 * @return - 0 on success, negative value on failure.
874 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
875 u32 tx_coalesce_usecs);
877 /* ena_com_update_nonadaptive_moderation_interval_rx - Update the
878 * non-adaptive interval in Rx direction.
879 * @ena_dev: ENA communication layer struct
880 * @rx_coalesce_usecs: Interval in usec.
882 * @return - 0 on success, negative value on failure.
884 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
885 u32 rx_coalesce_usecs);
887 /* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
888 * non-adaptive interval in Tx direction.
889 * @ena_dev: ENA communication layer struct
891 * @return - interval in usec
893 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
895 /* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
896 * non-adaptive interval in Rx direction.
897 * @ena_dev: ENA communication layer struct
899 * @return - interval in usec
901 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
903 /* ena_com_config_dev_mode - Configure the placement policy of the device.
904 * @ena_dev: ENA communication layer struct
905 * @llq_features: LLQ feature descriptor, retrieve via
906 * ena_com_get_dev_attr_feat.
907 * @ena_llq_config: The default driver LLQ parameters configurations
909 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,
910 struct ena_admin_feature_llq_desc *llq_features,
911 struct ena_llq_configurations *llq_default_config);
913 static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
915 return ena_dev->adaptive_coalescing;
918 static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
920 ena_dev->adaptive_coalescing = true;
923 static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
925 ena_dev->adaptive_coalescing = false;
928 /* ena_com_update_intr_reg - Prepare interrupt register
929 * @intr_reg: interrupt register to update.
930 * @rx_delay_interval: Rx interval in usecs
931 * @tx_delay_interval: Tx interval in usecs
932 * @unmask: unask enable/disable
934 * Prepare interrupt update register with the supplied parameters.
936 static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
937 u32 rx_delay_interval,
938 u32 tx_delay_interval,
941 intr_reg->intr_control = 0;
942 intr_reg->intr_control |= rx_delay_interval &
943 ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
945 intr_reg->intr_control |=
946 (tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
947 & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
950 intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
953 static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl)
955 u16 size, buffers_num;
958 size = bounce_buf_ctrl->buffer_size;
959 buffers_num = bounce_buf_ctrl->buffers_num;
961 buf = bounce_buf_ctrl->base_buffer +
962 (bounce_buf_ctrl->next_to_use++ & (buffers_num - 1)) * size;
964 prefetchw(bounce_buf_ctrl->base_buffer +
965 (bounce_buf_ctrl->next_to_use & (buffers_num - 1)) * size);
970 #if defined(__cplusplus)
972 #endif /* __cplusplus */
973 #endif /* !(ENA_COM) */