1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
11 #define ENA_MAX_NUM_IO_QUEUES 128U
12 /* We need to queues for each IO (on for Tx and one for Rx) */
13 #define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
15 #define ENA_MAX_HANDLERS 256
17 #define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
20 #define ENA_REG_READ_TIMEOUT 200000
22 #define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
23 #define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
24 #define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
26 /*****************************************************************************/
27 /*****************************************************************************/
28 /* ENA adaptive interrupt moderation settings */
30 #define ENA_INTR_LOWEST_USECS (0)
31 #define ENA_INTR_LOWEST_PKTS (3)
32 #define ENA_INTR_LOWEST_BYTES (2 * 1524)
34 #define ENA_INTR_LOW_USECS (32)
35 #define ENA_INTR_LOW_PKTS (12)
36 #define ENA_INTR_LOW_BYTES (16 * 1024)
38 #define ENA_INTR_MID_USECS (80)
39 #define ENA_INTR_MID_PKTS (48)
40 #define ENA_INTR_MID_BYTES (64 * 1024)
42 #define ENA_INTR_HIGH_USECS (128)
43 #define ENA_INTR_HIGH_PKTS (96)
44 #define ENA_INTR_HIGH_BYTES (128 * 1024)
46 #define ENA_INTR_HIGHEST_USECS (192)
47 #define ENA_INTR_HIGHEST_PKTS (128)
48 #define ENA_INTR_HIGHEST_BYTES (192 * 1024)
50 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS 196
51 #define ENA_INTR_INITIAL_RX_INTERVAL_USECS 4
52 #define ENA_INTR_DELAY_OLD_VALUE_WEIGHT 6
53 #define ENA_INTR_DELAY_NEW_VALUE_WEIGHT 4
54 #define ENA_INTR_MODER_LEVEL_STRIDE 1
55 #define ENA_INTR_BYTE_COUNT_NOT_SUPPORTED 0xFFFFFF
56 #define ENA_HASH_KEY_SIZE 40
58 #define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
60 #define ENA_FEATURE_MAX_QUEUE_EXT_VER 1
62 enum ena_intr_moder_level {
63 ENA_INTR_MODER_LOWEST = 0,
67 ENA_INTR_MODER_HIGHEST,
68 ENA_INTR_MAX_NUM_OF_LEVELS,
71 struct ena_llq_configurations {
72 enum ena_admin_llq_header_location llq_header_location;
73 enum ena_admin_llq_ring_entry_size llq_ring_entry_size;
74 enum ena_admin_llq_stride_ctrl llq_stride_ctrl;
75 enum ena_admin_llq_num_descs_before_header llq_num_decs_before_header;
76 u16 llq_ring_entry_size_value;
79 struct ena_intr_moder_entry {
80 unsigned int intr_moder_interval;
81 unsigned int pkts_per_interval;
82 unsigned int bytes_per_interval;
85 enum queue_direction {
86 ENA_COM_IO_QUEUE_DIRECTION_TX,
87 ENA_COM_IO_QUEUE_DIRECTION_RX
91 dma_addr_t paddr; /**< Buffer physical address */
92 u16 len; /**< Buffer length in bytes */
95 struct ena_com_rx_buf_info {
100 struct ena_com_io_desc_addr {
101 u8 __iomem *pbuf_dev_addr; /* LLQ address */
103 dma_addr_t phys_addr;
104 ena_mem_handle_t mem_handle;
107 struct ena_com_tx_meta {
111 u16 l4_hdr_len; /* In words */
114 struct ena_com_llq_info {
115 u16 header_location_ctrl;
116 u16 desc_stride_ctrl;
117 u16 desc_list_entry_size_ctrl;
118 u16 desc_list_entry_size;
119 u16 descs_num_before_header;
121 u16 max_entries_in_tx_burst;
124 struct ena_com_io_cq {
125 struct ena_com_io_desc_addr cdesc_addr;
128 /* Interrupt unmask register */
129 u32 __iomem *unmask_reg;
131 /* The completion queue head doorbell register */
132 u32 __iomem *cq_head_db_reg;
134 /* numa configuration register (for TPH) */
135 u32 __iomem *numa_node_cfg_reg;
137 /* The value to write to the above register to unmask
138 * the interrupt of this queue
142 enum queue_direction direction;
144 /* holds the number of cdesc of the current packet */
145 u16 cur_rx_pkt_cdesc_count;
146 /* save the firt cdesc idx of the current packet */
147 u16 cur_rx_pkt_cdesc_start_idx;
153 /* Device queue index */
156 u16 last_head_update;
158 u8 cdesc_entry_size_in_bytes;
160 } ____cacheline_aligned;
162 struct ena_com_io_bounce_buffer_control {
166 u16 buffers_num; /* Must be a power of 2 */
169 /* This struct is to keep tracking the current location of the next llq entry */
170 struct ena_com_llq_pkt_ctrl {
173 u16 descs_left_in_line;
176 struct ena_com_io_sq {
177 struct ena_com_io_desc_addr desc_addr;
180 u32 __iomem *db_addr;
181 u8 __iomem *header_addr;
183 enum queue_direction direction;
184 enum ena_admin_placement_policy_type mem_queue_type;
187 struct ena_com_tx_meta cached_tx_meta;
188 struct ena_com_llq_info llq_info;
189 struct ena_com_llq_pkt_ctrl llq_buf_ctrl;
190 struct ena_com_io_bounce_buffer_control bounce_buf_ctrl;
198 u16 llq_last_copy_tail;
199 u32 tx_max_header_size;
203 u16 entries_in_tx_burst_left;
204 } ____cacheline_aligned;
206 struct ena_com_admin_cq {
207 struct ena_admin_acq_entry *entries;
208 ena_mem_handle_t mem_handle;
215 struct ena_com_admin_sq {
216 struct ena_admin_aq_entry *entries;
217 ena_mem_handle_t mem_handle;
220 u32 __iomem *db_addr;
228 struct ena_com_stats_admin {
236 struct ena_com_admin_queue {
239 ena_spinlock_t q_lock; /* spinlock for the admin queue */
241 struct ena_comp_ctx *comp_ctx;
242 u32 completion_timeout;
244 struct ena_com_admin_cq cq;
245 struct ena_com_admin_sq sq;
247 /* Indicate if the admin queue should poll for completion */
250 /* Define if fallback to polling mode should occur */
255 /* Indicate that the ena was initialized and can
256 * process new admin commands
260 /* Count the number of outstanding admin commands */
261 ena_atomic32_t outstanding_cmds;
263 struct ena_com_stats_admin stats;
266 struct ena_aenq_handlers;
268 struct ena_com_aenq {
271 struct ena_admin_aenq_entry *entries;
273 ena_mem_handle_t mem_handle;
275 struct ena_aenq_handlers *aenq_handlers;
278 struct ena_com_mmio_read {
279 struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
280 dma_addr_t read_resp_dma_addr;
281 ena_mem_handle_t read_resp_mem_handle;
282 u32 reg_read_to; /* in us */
284 bool readless_supported;
285 /* spin lock to ensure a single outstanding read */
291 u16 *host_rss_ind_tbl;
292 struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
293 dma_addr_t rss_ind_tbl_dma_addr;
294 ena_mem_handle_t rss_ind_tbl_mem_handle;
298 enum ena_admin_hash_functions hash_func;
299 struct ena_admin_feature_rss_flow_hash_control *hash_key;
300 dma_addr_t hash_key_dma_addr;
301 ena_mem_handle_t hash_key_mem_handle;
305 struct ena_admin_feature_rss_hash_control *hash_ctrl;
306 dma_addr_t hash_ctrl_dma_addr;
307 ena_mem_handle_t hash_ctrl_mem_handle;
311 struct ena_host_attribute {
313 u8 *debug_area_virt_addr;
314 dma_addr_t debug_area_dma_addr;
315 ena_mem_handle_t debug_area_dma_handle;
318 /* Host information */
319 struct ena_admin_host_info *host_info;
320 dma_addr_t host_info_dma_addr;
321 ena_mem_handle_t host_info_dma_handle;
324 struct ena_extra_properties_strings {
327 ena_mem_handle_t dma_handle;
331 /* Each ena_dev is a PCI function. */
333 struct ena_com_admin_queue admin_queue;
334 struct ena_com_aenq aenq;
335 struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
336 struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
338 void __iomem *mem_bar;
342 enum ena_admin_placement_policy_type tx_mem_queue_type;
343 u32 tx_max_header_size;
344 u16 stats_func; /* Selected function for extended statistic dump */
345 u16 stats_queue; /* Selected queue for extended statistic dump */
347 struct ena_com_mmio_read mmio_read;
350 u32 supported_features;
353 struct ena_host_attribute host_attr;
354 bool adaptive_coalescing;
355 u16 intr_delay_resolution;
356 u32 intr_moder_tx_interval;
357 struct ena_intr_moder_entry *intr_moder_tbl;
359 struct ena_com_llq_info llq_info;
360 struct ena_extra_properties_strings extra_properties_strings;
363 struct ena_com_dev_get_features_ctx {
364 struct ena_admin_queue_feature_desc max_queues;
365 struct ena_admin_queue_ext_feature_desc max_queue_ext;
366 struct ena_admin_device_attr_feature_desc dev_attr;
367 struct ena_admin_feature_aenq_desc aenq;
368 struct ena_admin_feature_offload_desc offload;
369 struct ena_admin_ena_hw_hints hw_hints;
370 struct ena_admin_feature_llq_desc llq;
371 struct ena_admin_feature_rss_ind_table ind_table;
374 struct ena_com_create_io_ctx {
375 enum ena_admin_placement_policy_type mem_queue_type;
376 enum queue_direction direction;
383 typedef void (*ena_aenq_handler)(void *data,
384 struct ena_admin_aenq_entry *aenq_e);
386 /* Holds aenq handlers. Indexed by AENQ event group */
387 struct ena_aenq_handlers {
388 ena_aenq_handler handlers[ENA_MAX_HANDLERS];
389 ena_aenq_handler unimplemented_handler;
392 /*****************************************************************************/
393 /*****************************************************************************/
394 #if defined(__cplusplus)
398 /* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
399 * @ena_dev: ENA communication layer struct
401 * Initialize the register read mechanism.
403 * @note: This method must be the first stage in the initialization sequence.
405 * @return - 0 on success, negative value on failure.
407 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
409 /* ena_com_set_mmio_read_mode - Enable/disable the mmio reg read mechanism
410 * @ena_dev: ENA communication layer struct
411 * @readless_supported: readless mode (enable/disable)
413 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
414 bool readless_supported);
416 /* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
417 * value physical address.
418 * @ena_dev: ENA communication layer struct
420 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
422 /* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
423 * @ena_dev: ENA communication layer struct
425 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
427 /* ena_com_admin_init - Init the admin and the async queues
428 * @ena_dev: ENA communication layer struct
429 * @aenq_handlers: Those handlers to be called upon event.
431 * Initialize the admin submission and completion queues.
432 * Initialize the asynchronous events notification queues.
434 * @return - 0 on success, negative value on failure.
436 int ena_com_admin_init(struct ena_com_dev *ena_dev,
437 struct ena_aenq_handlers *aenq_handlers);
439 /* ena_com_admin_destroy - Destroy the admin and the async events queues.
440 * @ena_dev: ENA communication layer struct
442 * @note: Before calling this method, the caller must validate that the device
443 * won't send any additional admin completions/aenq.
444 * To achieve that, a FLR is recommended.
446 void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
448 /* ena_com_dev_reset - Perform device FLR to the device.
449 * @ena_dev: ENA communication layer struct
450 * @reset_reason: Specify what is the trigger for the reset in case of an error.
452 * @return - 0 on success, negative value on failure.
454 int ena_com_dev_reset(struct ena_com_dev *ena_dev,
455 enum ena_regs_reset_reason_types reset_reason);
457 /* ena_com_create_io_queue - Create io queue.
458 * @ena_dev: ENA communication layer struct
459 * @ctx - create context structure
461 * Create the submission and the completion queues.
463 * @return - 0 on success, negative value on failure.
465 int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
466 struct ena_com_create_io_ctx *ctx);
468 /* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
469 * @ena_dev: ENA communication layer struct
470 * @qid - the caller virtual queue id.
472 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
474 /* ena_com_get_io_handlers - Return the io queue handlers
475 * @ena_dev: ENA communication layer struct
476 * @qid - the caller virtual queue id.
477 * @io_sq - IO submission queue handler
478 * @io_cq - IO completion queue handler.
480 * @return - 0 on success, negative value on failure.
482 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
483 struct ena_com_io_sq **io_sq,
484 struct ena_com_io_cq **io_cq);
486 /* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
487 * @ena_dev: ENA communication layer struct
489 * After this method, aenq event can be received via AENQ.
491 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
493 /* ena_com_set_admin_running_state - Set the state of the admin queue
494 * @ena_dev: ENA communication layer struct
496 * Change the state of the admin queue (enable/disable)
498 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
500 /* ena_com_get_admin_running_state - Get the admin queue state
501 * @ena_dev: ENA communication layer struct
503 * Retrieve the state of the admin queue (enable/disable)
505 * @return - current polling mode (enable/disable)
507 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
509 /* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
510 * @ena_dev: ENA communication layer struct
511 * @polling: ENAble/Disable polling mode
513 * Set the admin completion mode.
515 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
517 /* ena_com_get_admin_polling_mode - Get the admin completion queue polling mode
518 * @ena_dev: ENA communication layer struct
520 * Get the admin completion mode.
521 * If polling mode is on, ena_com_execute_admin_command will perform a
522 * polling on the admin completion queue for the commands completion,
523 * otherwise it will wait on wait event.
527 bool ena_com_get_admin_polling_mode(struct ena_com_dev *ena_dev);
529 /* ena_com_set_admin_auto_polling_mode - Enable autoswitch to polling mode
530 * @ena_dev: ENA communication layer struct
531 * @polling: Enable/Disable polling mode
533 * Set the autopolling mode.
534 * If autopolling is on:
535 * In case of missing interrupt when data is available switch to polling.
537 void ena_com_set_admin_auto_polling_mode(struct ena_com_dev *ena_dev,
540 /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
541 * @ena_dev: ENA communication layer struct
543 * This method go over the admin completion queue and wake up all the pending
544 * threads that wait on the commands wait event.
546 * @note: Should be called after MSI-X interrupt.
548 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
550 /* ena_com_aenq_intr_handler - AENQ interrupt handler
551 * @ena_dev: ENA communication layer struct
553 * This method go over the async event notification queue and call the proper
556 void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data);
558 /* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
559 * @ena_dev: ENA communication layer struct
561 * This method aborts all the outstanding admin commands.
562 * The caller should then call ena_com_wait_for_abort_completion to make sure
563 * all the commands were completed.
565 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
567 /* ena_com_wait_for_abort_completion - Wait for admin commands abort.
568 * @ena_dev: ENA communication layer struct
570 * This method wait until all the outstanding admin commands will be completed.
572 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
574 /* ena_com_validate_version - Validate the device parameters
575 * @ena_dev: ENA communication layer struct
577 * This method validate the device parameters are the same as the saved
578 * parameters in ena_dev.
579 * This method is useful after device reset, to validate the device mac address
580 * and the device offloads are the same as before the reset.
582 * @return - 0 on success negative value otherwise.
584 int ena_com_validate_version(struct ena_com_dev *ena_dev);
586 /* ena_com_get_link_params - Retrieve physical link parameters.
587 * @ena_dev: ENA communication layer struct
588 * @resp: Link parameters
590 * Retrieve the physical link parameters,
591 * like speed, auto-negotiation and full duplex support.
593 * @return - 0 on Success negative value otherwise.
595 int ena_com_get_link_params(struct ena_com_dev *ena_dev,
596 struct ena_admin_get_feat_resp *resp);
598 /* ena_com_extra_properties_strings_init - Initialize the extra properties strings buffer.
599 * @ena_dev: ENA communication layer struct
601 * Initialize the extra properties strings buffer.
603 int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev);
605 /* ena_com_delete_extra_properties_strings - Free the extra properties strings buffer.
606 * @ena_dev: ENA communication layer struct
608 * Free the allocated extra properties strings buffer.
610 void ena_com_delete_extra_properties_strings(struct ena_com_dev *ena_dev);
612 /* ena_com_get_extra_properties_flags - Retrieve extra properties flags.
613 * @ena_dev: ENA communication layer struct
614 * @resp: Extra properties flags.
616 * Retrieve the extra properties flags.
618 * @return - 0 on Success negative value otherwise.
620 int ena_com_get_extra_properties_flags(struct ena_com_dev *ena_dev,
621 struct ena_admin_get_feat_resp *resp);
623 /* ena_com_get_dma_width - Retrieve physical dma address width the device
625 * @ena_dev: ENA communication layer struct
627 * Retrieve the maximum physical address bits the device can handle.
629 * @return: > 0 on Success and negative value otherwise.
631 int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
633 /* ena_com_set_aenq_config - Set aenq groups configurations
634 * @ena_dev: ENA communication layer struct
635 * @groups flag: bit fields flags of enum ena_admin_aenq_group.
637 * Configure which aenq event group the driver would like to receive.
639 * @return: 0 on Success and negative value otherwise.
641 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
643 /* ena_com_get_dev_attr_feat - Get device features
644 * @ena_dev: ENA communication layer struct
645 * @get_feat_ctx: returned context that contain the get features.
647 * @return: 0 on Success and negative value otherwise.
649 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
650 struct ena_com_dev_get_features_ctx *get_feat_ctx);
652 /* ena_com_get_dev_basic_stats - Get device basic statistics
653 * @ena_dev: ENA communication layer struct
654 * @stats: stats return value
656 * @return: 0 on Success and negative value otherwise.
658 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
659 struct ena_admin_basic_stats *stats);
661 /* ena_com_set_dev_mtu - Configure the device mtu.
662 * @ena_dev: ENA communication layer struct
665 * @return: 0 on Success and negative value otherwise.
667 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu);
669 /* ena_com_get_offload_settings - Retrieve the device offloads capabilities
670 * @ena_dev: ENA communication layer struct
671 * @offlad: offload return value
673 * @return: 0 on Success and negative value otherwise.
675 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
676 struct ena_admin_feature_offload_desc *offload);
678 /* ena_com_rss_init - Init RSS
679 * @ena_dev: ENA communication layer struct
680 * @log_size: indirection log size
682 * Allocate RSS/RFS resources.
683 * The caller then can configure rss using ena_com_set_hash_function,
684 * ena_com_set_hash_ctrl and ena_com_indirect_table_set.
686 * @return: 0 on Success and negative value otherwise.
688 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
690 /* ena_com_rss_destroy - Destroy rss
691 * @ena_dev: ENA communication layer struct
693 * Free all the RSS/RFS resources.
695 void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
697 /* ena_com_fill_hash_function - Fill RSS hash function
698 * @ena_dev: ENA communication layer struct
699 * @func: The hash function (Toeplitz or crc)
700 * @key: Hash key (for toeplitz hash)
701 * @key_len: key length (max length 10 DW)
702 * @init_val: initial value for the hash function
704 * Fill the ena_dev resources with the desire hash function, hash key, key_len
705 * and key initial value (if needed by the hash function).
706 * To flush the key into the device the caller should call
707 * ena_com_set_hash_function.
709 * @return: 0 on Success and negative value otherwise.
711 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
712 enum ena_admin_hash_functions func,
713 const u8 *key, u16 key_len, u32 init_val);
715 /* ena_com_set_hash_function - Flush the hash function and it dependencies to
717 * @ena_dev: ENA communication layer struct
719 * Flush the hash function and it dependencies (key, key length and
720 * initial value) if needed.
722 * @note: Prior to this method the caller should call ena_com_fill_hash_function
724 * @return: 0 on Success and negative value otherwise.
726 int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
728 /* ena_com_get_hash_function - Retrieve the hash function and the hash key
730 * @ena_dev: ENA communication layer struct
731 * @func: hash function
734 * Retrieve the hash function and the hash key from the device.
736 * @note: If the caller called ena_com_fill_hash_function but didn't flash
737 * it to the device, the new configuration will be lost.
739 * @return: 0 on Success and negative value otherwise.
741 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
742 enum ena_admin_hash_functions *func,
745 /* ena_com_fill_hash_ctrl - Fill RSS hash control
746 * @ena_dev: ENA communication layer struct.
747 * @proto: The protocol to configure.
748 * @hash_fields: bit mask of ena_admin_flow_hash_fields
750 * Fill the ena_dev resources with the desire hash control (the ethernet
751 * fields that take part of the hash) for a specific protocol.
752 * To flush the hash control to the device, the caller should call
753 * ena_com_set_hash_ctrl.
755 * @return: 0 on Success and negative value otherwise.
757 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
758 enum ena_admin_flow_hash_proto proto,
761 /* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
762 * @ena_dev: ENA communication layer struct
764 * Flush the hash control (the ethernet fields that take part of the hash)
766 * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
768 * @return: 0 on Success and negative value otherwise.
770 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
772 /* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
773 * @ena_dev: ENA communication layer struct
774 * @proto: The protocol to retrieve.
775 * @fields: bit mask of ena_admin_flow_hash_fields.
777 * Retrieve the hash control from the device.
779 * @note, If the caller called ena_com_fill_hash_ctrl but didn't flash
780 * it to the device, the new configuration will be lost.
782 * @return: 0 on Success and negative value otherwise.
784 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
785 enum ena_admin_flow_hash_proto proto,
788 /* ena_com_set_default_hash_ctrl - Set the hash control to a default
790 * @ena_dev: ENA communication layer struct
792 * Fill the ena_dev resources with the default hash control configuration.
793 * To flush the hash control to the device, the caller should call
794 * ena_com_set_hash_ctrl.
796 * @return: 0 on Success and negative value otherwise.
798 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
800 /* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
802 * @ena_dev: ENA communication layer struct.
803 * @entry_idx - indirection table entry.
804 * @entry_value - redirection value
806 * Fill a single entry of the RSS indirection table in the ena_dev resources.
807 * To flush the indirection table to the device, the called should call
808 * ena_com_indirect_table_set.
810 * @return: 0 on Success and negative value otherwise.
812 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
813 u16 entry_idx, u16 entry_value);
815 /* ena_com_indirect_table_set - Flush the indirection table to the device.
816 * @ena_dev: ENA communication layer struct
818 * Flush the indirection hash control to the device.
819 * Prior to this method the caller should call ena_com_indirect_table_fill_entry
821 * @return: 0 on Success and negative value otherwise.
823 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
825 /* ena_com_indirect_table_get - Retrieve the indirection table from the device.
826 * @ena_dev: ENA communication layer struct
827 * @ind_tbl: indirection table
829 * Retrieve the RSS indirection table from the device.
831 * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flash
832 * it to the device, the new configuration will be lost.
834 * @return: 0 on Success and negative value otherwise.
836 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
838 /* ena_com_allocate_host_info - Allocate host info resources.
839 * @ena_dev: ENA communication layer struct
841 * @return: 0 on Success and negative value otherwise.
843 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
845 /* ena_com_allocate_debug_area - Allocate debug area.
846 * @ena_dev: ENA communication layer struct
847 * @debug_area_size - debug area size.
849 * @return: 0 on Success and negative value otherwise.
851 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
852 u32 debug_area_size);
854 /* ena_com_delete_debug_area - Free the debug area resources.
855 * @ena_dev: ENA communication layer struct
857 * Free the allocate debug area.
859 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
861 /* ena_com_delete_host_info - Free the host info resources.
862 * @ena_dev: ENA communication layer struct
864 * Free the allocate host info.
866 void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
868 /* ena_com_set_host_attributes - Update the device with the host
869 * attributes (debug area and host info) base address.
870 * @ena_dev: ENA communication layer struct
872 * @return: 0 on Success and negative value otherwise.
874 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
876 /* ena_com_create_io_cq - Create io completion queue.
877 * @ena_dev: ENA communication layer struct
878 * @io_cq - io completion queue handler
880 * Create IO completion queue.
882 * @return - 0 on success, negative value on failure.
884 int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
885 struct ena_com_io_cq *io_cq);
887 /* ena_com_destroy_io_cq - Destroy io completion queue.
888 * @ena_dev: ENA communication layer struct
889 * @io_cq - io completion queue handler
891 * Destroy IO completion queue.
893 * @return - 0 on success, negative value on failure.
895 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
896 struct ena_com_io_cq *io_cq);
898 /* ena_com_execute_admin_command - Execute admin command
899 * @admin_queue: admin queue.
900 * @cmd: the admin command to execute.
901 * @cmd_size: the command size.
902 * @cmd_completion: command completion return value.
903 * @cmd_comp_size: command completion size.
905 * Submit an admin command and then wait until the device will return a
907 * The completion will be copyed into cmd_comp.
909 * @return - 0 on success, negative value on failure.
911 int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
912 struct ena_admin_aq_entry *cmd,
914 struct ena_admin_acq_entry *cmd_comp,
915 size_t cmd_comp_size);
917 /* ena_com_init_interrupt_moderation - Init interrupt moderation
918 * @ena_dev: ENA communication layer struct
920 * @return - 0 on success, negative value on failure.
922 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
924 /* ena_com_destroy_interrupt_moderation - Destroy interrupt moderation resources
925 * @ena_dev: ENA communication layer struct
927 void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev);
929 /* ena_com_interrupt_moderation_supported - Return if interrupt moderation
930 * capability is supported by the device.
932 * @return - supported or not.
934 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
936 /* ena_com_config_default_interrupt_moderation_table - Restore the interrupt
937 * moderation table back to the default parameters.
938 * @ena_dev: ENA communication layer struct
940 void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev);
942 /* ena_com_update_nonadaptive_moderation_interval_tx - Update the
943 * non-adaptive interval in Tx direction.
944 * @ena_dev: ENA communication layer struct
945 * @tx_coalesce_usecs: Interval in usec.
947 * @return - 0 on success, negative value on failure.
949 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
950 u32 tx_coalesce_usecs);
952 /* ena_com_update_nonadaptive_moderation_interval_rx - Update the
953 * non-adaptive interval in Rx direction.
954 * @ena_dev: ENA communication layer struct
955 * @rx_coalesce_usecs: Interval in usec.
957 * @return - 0 on success, negative value on failure.
959 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
960 u32 rx_coalesce_usecs);
962 /* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
963 * non-adaptive interval in Tx direction.
964 * @ena_dev: ENA communication layer struct
966 * @return - interval in usec
968 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
970 /* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
971 * non-adaptive interval in Rx direction.
972 * @ena_dev: ENA communication layer struct
974 * @return - interval in usec
976 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
978 /* ena_com_init_intr_moderation_entry - Update a single entry in the interrupt
980 * @ena_dev: ENA communication layer struct
981 * @level: Interrupt moderation table level
982 * @entry: Entry value
984 * Update a single entry in the interrupt moderation table.
986 void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,
987 enum ena_intr_moder_level level,
988 struct ena_intr_moder_entry *entry);
990 /* ena_com_get_intr_moderation_entry - Init ena_intr_moder_entry.
991 * @ena_dev: ENA communication layer struct
992 * @level: Interrupt moderation table level
993 * @entry: Entry to fill.
995 * Initialize the entry according to the adaptive interrupt moderation table.
997 void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,
998 enum ena_intr_moder_level level,
999 struct ena_intr_moder_entry *entry);
1001 /* ena_com_config_dev_mode - Configure the placement policy of the device.
1002 * @ena_dev: ENA communication layer struct
1003 * @llq_features: LLQ feature descriptor, retrieve via
1004 * ena_com_get_dev_attr_feat.
1005 * @ena_llq_config: The default driver LLQ parameters configurations
1007 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,
1008 struct ena_admin_feature_llq_desc *llq_features,
1009 struct ena_llq_configurations *llq_default_config);
1011 static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
1013 return ena_dev->adaptive_coalescing;
1016 static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
1018 ena_dev->adaptive_coalescing = true;
1021 static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
1023 ena_dev->adaptive_coalescing = false;
1026 /* ena_com_calculate_interrupt_delay - Calculate new interrupt delay
1027 * @ena_dev: ENA communication layer struct
1028 * @pkts: Number of packets since the last update
1029 * @bytes: Number of bytes received since the last update.
1030 * @smoothed_interval: Returned interval
1031 * @moder_tbl_idx: Current table level as input update new level as return
1034 static inline void ena_com_calculate_interrupt_delay(struct ena_com_dev *ena_dev,
1037 unsigned int *smoothed_interval,
1038 unsigned int *moder_tbl_idx)
1040 enum ena_intr_moder_level curr_moder_idx, new_moder_idx;
1041 struct ena_intr_moder_entry *curr_moder_entry;
1042 struct ena_intr_moder_entry *pred_moder_entry;
1043 struct ena_intr_moder_entry *new_moder_entry;
1044 struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
1045 unsigned int interval;
1047 /* We apply adaptive moderation on Rx path only.
1048 * Tx uses static interrupt moderation.
1050 if (!pkts || !bytes)
1051 /* Tx interrupt, or spurious interrupt,
1052 * in both cases we just use same delay values
1056 curr_moder_idx = (enum ena_intr_moder_level)(*moder_tbl_idx);
1057 if (unlikely(curr_moder_idx >= ENA_INTR_MAX_NUM_OF_LEVELS)) {
1058 ena_trc_err("Wrong moderation index %u\n", curr_moder_idx);
1062 curr_moder_entry = &intr_moder_tbl[curr_moder_idx];
1063 new_moder_idx = curr_moder_idx;
1065 if (curr_moder_idx == ENA_INTR_MODER_LOWEST) {
1066 if ((pkts > curr_moder_entry->pkts_per_interval) ||
1067 (bytes > curr_moder_entry->bytes_per_interval))
1069 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1071 pred_moder_entry = &intr_moder_tbl[curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE];
1073 if ((pkts <= pred_moder_entry->pkts_per_interval) ||
1074 (bytes <= pred_moder_entry->bytes_per_interval))
1076 (enum ena_intr_moder_level)(curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE);
1077 else if ((pkts > curr_moder_entry->pkts_per_interval) ||
1078 (bytes > curr_moder_entry->bytes_per_interval)) {
1079 if (curr_moder_idx != ENA_INTR_MODER_HIGHEST)
1081 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1084 new_moder_entry = &intr_moder_tbl[new_moder_idx];
1086 interval = new_moder_entry->intr_moder_interval;
1087 *smoothed_interval = (
1088 (interval * ENA_INTR_DELAY_NEW_VALUE_WEIGHT +
1089 ENA_INTR_DELAY_OLD_VALUE_WEIGHT * (*smoothed_interval)) + 5) /
1092 *moder_tbl_idx = new_moder_idx;
1095 /* ena_com_update_intr_reg - Prepare interrupt register
1096 * @intr_reg: interrupt register to update.
1097 * @rx_delay_interval: Rx interval in usecs
1098 * @tx_delay_interval: Tx interval in usecs
1099 * @unmask: unask enable/disable
1101 * Prepare interrupt update register with the supplied parameters.
1103 static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
1104 u32 rx_delay_interval,
1105 u32 tx_delay_interval,
1108 intr_reg->intr_control = 0;
1109 intr_reg->intr_control |= rx_delay_interval &
1110 ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
1112 intr_reg->intr_control |=
1113 (tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
1114 & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
1117 intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
1120 static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl)
1122 u16 size, buffers_num;
1125 size = bounce_buf_ctrl->buffer_size;
1126 buffers_num = bounce_buf_ctrl->buffers_num;
1128 buf = bounce_buf_ctrl->base_buffer +
1129 (bounce_buf_ctrl->next_to_use++ & (buffers_num - 1)) * size;
1131 prefetchw(bounce_buf_ctrl->base_buffer +
1132 (bounce_buf_ctrl->next_to_use & (buffers_num - 1)) * size);
1137 #if defined(__cplusplus)
1139 #endif /* __cplusplus */
1140 #endif /* !(ENA_COM) */