1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2019 Amazon.com, Inc. or its affiliates.
10 #include "ena_includes.h"
12 #define ENA_MAX_NUM_IO_QUEUES 128U
13 /* We need to queues for each IO (on for Tx and one for Rx) */
14 #define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
16 #define ENA_MAX_HANDLERS 256
18 #define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
21 #define ENA_REG_READ_TIMEOUT 200000
23 #define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
24 #define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
25 #define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
27 /*****************************************************************************/
28 /*****************************************************************************/
29 /* ENA adaptive interrupt moderation settings */
31 #define ENA_INTR_LOWEST_USECS (0)
32 #define ENA_INTR_LOWEST_PKTS (3)
33 #define ENA_INTR_LOWEST_BYTES (2 * 1524)
35 #define ENA_INTR_LOW_USECS (32)
36 #define ENA_INTR_LOW_PKTS (12)
37 #define ENA_INTR_LOW_BYTES (16 * 1024)
39 #define ENA_INTR_MID_USECS (80)
40 #define ENA_INTR_MID_PKTS (48)
41 #define ENA_INTR_MID_BYTES (64 * 1024)
43 #define ENA_INTR_HIGH_USECS (128)
44 #define ENA_INTR_HIGH_PKTS (96)
45 #define ENA_INTR_HIGH_BYTES (128 * 1024)
47 #define ENA_INTR_HIGHEST_USECS (192)
48 #define ENA_INTR_HIGHEST_PKTS (128)
49 #define ENA_INTR_HIGHEST_BYTES (192 * 1024)
51 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS 196
52 #define ENA_INTR_INITIAL_RX_INTERVAL_USECS 4
53 #define ENA_INTR_DELAY_OLD_VALUE_WEIGHT 6
54 #define ENA_INTR_DELAY_NEW_VALUE_WEIGHT 4
55 #define ENA_INTR_MODER_LEVEL_STRIDE 1
56 #define ENA_INTR_BYTE_COUNT_NOT_SUPPORTED 0xFFFFFF
58 #define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
60 #define ENA_FEATURE_MAX_QUEUE_EXT_VER 1
62 enum ena_intr_moder_level {
63 ENA_INTR_MODER_LOWEST = 0,
67 ENA_INTR_MODER_HIGHEST,
68 ENA_INTR_MAX_NUM_OF_LEVELS,
71 struct ena_llq_configurations {
72 enum ena_admin_llq_header_location llq_header_location;
73 enum ena_admin_llq_ring_entry_size llq_ring_entry_size;
74 enum ena_admin_llq_stride_ctrl llq_stride_ctrl;
75 enum ena_admin_llq_num_descs_before_header llq_num_decs_before_header;
76 u16 llq_ring_entry_size_value;
79 struct ena_intr_moder_entry {
80 unsigned int intr_moder_interval;
81 unsigned int pkts_per_interval;
82 unsigned int bytes_per_interval;
85 enum queue_direction {
86 ENA_COM_IO_QUEUE_DIRECTION_TX,
87 ENA_COM_IO_QUEUE_DIRECTION_RX
91 dma_addr_t paddr; /**< Buffer physical address */
92 u16 len; /**< Buffer length in bytes */
95 struct ena_com_rx_buf_info {
100 struct ena_com_io_desc_addr {
101 u8 __iomem *pbuf_dev_addr; /* LLQ address */
103 dma_addr_t phys_addr;
104 ena_mem_handle_t mem_handle;
107 struct ena_com_tx_meta {
111 u16 l4_hdr_len; /* In words */
114 struct ena_com_llq_info {
116 u16 header_location_ctrl;
117 u16 desc_stride_ctrl;
118 u16 desc_list_entry_size_ctrl;
119 u16 desc_list_entry_size;
120 u16 descs_num_before_header;
122 u16 max_entries_in_tx_burst;
125 struct ena_com_io_cq {
126 struct ena_com_io_desc_addr cdesc_addr;
129 /* Interrupt unmask register */
130 u32 __iomem *unmask_reg;
132 /* The completion queue head doorbell register */
133 u32 __iomem *cq_head_db_reg;
135 /* numa configuration register (for TPH) */
136 u32 __iomem *numa_node_cfg_reg;
138 /* The value to write to the above register to unmask
139 * the interrupt of this queue
143 enum queue_direction direction;
145 /* holds the number of cdesc of the current packet */
146 u16 cur_rx_pkt_cdesc_count;
147 /* save the firt cdesc idx of the current packet */
148 u16 cur_rx_pkt_cdesc_start_idx;
154 /* Device queue index */
157 u16 last_head_update;
159 u8 cdesc_entry_size_in_bytes;
161 } ____cacheline_aligned;
163 struct ena_com_io_bounce_buffer_control {
167 u16 buffers_num; /* Must be a power of 2 */
170 /* This struct is to keep tracking the current location of the next llq entry */
171 struct ena_com_llq_pkt_ctrl {
174 u16 descs_left_in_line;
177 struct ena_com_io_sq {
178 struct ena_com_io_desc_addr desc_addr;
181 u32 __iomem *db_addr;
182 u8 __iomem *header_addr;
184 enum queue_direction direction;
185 enum ena_admin_placement_policy_type mem_queue_type;
188 struct ena_com_tx_meta cached_tx_meta;
189 struct ena_com_llq_info llq_info;
190 struct ena_com_llq_pkt_ctrl llq_buf_ctrl;
191 struct ena_com_io_bounce_buffer_control bounce_buf_ctrl;
199 u16 llq_last_copy_tail;
200 u32 tx_max_header_size;
204 u16 entries_in_tx_burst_left;
205 } ____cacheline_aligned;
207 struct ena_com_admin_cq {
208 struct ena_admin_acq_entry *entries;
209 ena_mem_handle_t mem_handle;
216 struct ena_com_admin_sq {
217 struct ena_admin_aq_entry *entries;
218 ena_mem_handle_t mem_handle;
221 u32 __iomem *db_addr;
229 struct ena_com_stats_admin {
237 struct ena_com_admin_queue {
240 ena_spinlock_t q_lock; /* spinlock for the admin queue */
242 struct ena_comp_ctx *comp_ctx;
243 u32 completion_timeout;
245 struct ena_com_admin_cq cq;
246 struct ena_com_admin_sq sq;
248 /* Indicate if the admin queue should poll for completion */
253 /* Indicate that the ena was initialized and can
254 * process new admin commands
258 /* Count the number of outstanding admin commands */
259 ena_atomic32_t outstanding_cmds;
261 struct ena_com_stats_admin stats;
264 struct ena_aenq_handlers;
266 struct ena_com_aenq {
269 struct ena_admin_aenq_entry *entries;
271 ena_mem_handle_t mem_handle;
273 struct ena_aenq_handlers *aenq_handlers;
276 struct ena_com_mmio_read {
277 struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
278 dma_addr_t read_resp_dma_addr;
279 ena_mem_handle_t read_resp_mem_handle;
280 u32 reg_read_to; /* in us */
282 bool readless_supported;
283 /* spin lock to ensure a single outstanding read */
289 u16 *host_rss_ind_tbl;
290 struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
291 dma_addr_t rss_ind_tbl_dma_addr;
292 ena_mem_handle_t rss_ind_tbl_mem_handle;
296 enum ena_admin_hash_functions hash_func;
297 struct ena_admin_feature_rss_flow_hash_control *hash_key;
298 dma_addr_t hash_key_dma_addr;
299 ena_mem_handle_t hash_key_mem_handle;
303 struct ena_admin_feature_rss_hash_control *hash_ctrl;
304 dma_addr_t hash_ctrl_dma_addr;
305 ena_mem_handle_t hash_ctrl_mem_handle;
309 struct ena_host_attribute {
311 u8 *debug_area_virt_addr;
312 dma_addr_t debug_area_dma_addr;
313 ena_mem_handle_t debug_area_dma_handle;
316 /* Host information */
317 struct ena_admin_host_info *host_info;
318 dma_addr_t host_info_dma_addr;
319 ena_mem_handle_t host_info_dma_handle;
322 struct ena_extra_properties_strings {
325 ena_mem_handle_t dma_handle;
329 /* Each ena_dev is a PCI function. */
331 struct ena_com_admin_queue admin_queue;
332 struct ena_com_aenq aenq;
333 struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
334 struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
336 void __iomem *mem_bar;
340 enum ena_admin_placement_policy_type tx_mem_queue_type;
341 u32 tx_max_header_size;
342 u16 stats_func; /* Selected function for extended statistic dump */
343 u16 stats_queue; /* Selected queue for extended statistic dump */
345 struct ena_com_mmio_read mmio_read;
348 u32 supported_features;
351 struct ena_host_attribute host_attr;
352 bool adaptive_coalescing;
353 u16 intr_delay_resolution;
354 u32 intr_moder_tx_interval;
355 struct ena_intr_moder_entry *intr_moder_tbl;
357 struct ena_com_llq_info llq_info;
358 struct ena_extra_properties_strings extra_properties_strings;
361 struct ena_com_dev_get_features_ctx {
362 struct ena_admin_queue_feature_desc max_queues;
363 struct ena_admin_queue_ext_feature_desc max_queue_ext;
364 struct ena_admin_device_attr_feature_desc dev_attr;
365 struct ena_admin_feature_aenq_desc aenq;
366 struct ena_admin_feature_offload_desc offload;
367 struct ena_admin_ena_hw_hints hw_hints;
368 struct ena_admin_feature_llq_desc llq;
369 struct ena_admin_feature_rss_ind_table ind_table;
372 struct ena_com_create_io_ctx {
373 enum ena_admin_placement_policy_type mem_queue_type;
374 enum queue_direction direction;
381 typedef void (*ena_aenq_handler)(void *data,
382 struct ena_admin_aenq_entry *aenq_e);
384 /* Holds aenq handlers. Indexed by AENQ event group */
385 struct ena_aenq_handlers {
386 ena_aenq_handler handlers[ENA_MAX_HANDLERS];
387 ena_aenq_handler unimplemented_handler;
390 /*****************************************************************************/
391 /*****************************************************************************/
392 #if defined(__cplusplus)
396 /* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
397 * @ena_dev: ENA communication layer struct
399 * Initialize the register read mechanism.
401 * @note: This method must be the first stage in the initialization sequence.
403 * @return - 0 on success, negative value on failure.
405 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
407 /* ena_com_set_mmio_read_mode - Enable/disable the mmio reg read mechanism
408 * @ena_dev: ENA communication layer struct
409 * @readless_supported: readless mode (enable/disable)
411 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
412 bool readless_supported);
414 /* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
415 * value physical address.
416 * @ena_dev: ENA communication layer struct
418 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
420 /* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
421 * @ena_dev: ENA communication layer struct
423 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
425 /* ena_com_admin_init - Init the admin and the async queues
426 * @ena_dev: ENA communication layer struct
427 * @aenq_handlers: Those handlers to be called upon event.
429 * Initialize the admin submission and completion queues.
430 * Initialize the asynchronous events notification queues.
432 * @return - 0 on success, negative value on failure.
434 int ena_com_admin_init(struct ena_com_dev *ena_dev,
435 struct ena_aenq_handlers *aenq_handlers);
437 /* ena_com_admin_destroy - Destroy the admin and the async events queues.
438 * @ena_dev: ENA communication layer struct
440 * @note: Before calling this method, the caller must validate that the device
441 * won't send any additional admin completions/aenq.
442 * To achieve that, a FLR is recommended.
444 void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
446 /* ena_com_dev_reset - Perform device FLR to the device.
447 * @ena_dev: ENA communication layer struct
448 * @reset_reason: Specify what is the trigger for the reset in case of an error.
450 * @return - 0 on success, negative value on failure.
452 int ena_com_dev_reset(struct ena_com_dev *ena_dev,
453 enum ena_regs_reset_reason_types reset_reason);
455 /* ena_com_create_io_queue - Create io queue.
456 * @ena_dev: ENA communication layer struct
457 * @ctx - create context structure
459 * Create the submission and the completion queues.
461 * @return - 0 on success, negative value on failure.
463 int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
464 struct ena_com_create_io_ctx *ctx);
466 /* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
467 * @ena_dev: ENA communication layer struct
468 * @qid - the caller virtual queue id.
470 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
472 /* ena_com_get_io_handlers - Return the io queue handlers
473 * @ena_dev: ENA communication layer struct
474 * @qid - the caller virtual queue id.
475 * @io_sq - IO submission queue handler
476 * @io_cq - IO completion queue handler.
478 * @return - 0 on success, negative value on failure.
480 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
481 struct ena_com_io_sq **io_sq,
482 struct ena_com_io_cq **io_cq);
484 /* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
485 * @ena_dev: ENA communication layer struct
487 * After this method, aenq event can be received via AENQ.
489 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
491 /* ena_com_set_admin_running_state - Set the state of the admin queue
492 * @ena_dev: ENA communication layer struct
494 * Change the state of the admin queue (enable/disable)
496 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
498 /* ena_com_get_admin_running_state - Get the admin queue state
499 * @ena_dev: ENA communication layer struct
501 * Retrieve the state of the admin queue (enable/disable)
503 * @return - current polling mode (enable/disable)
505 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
507 /* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
508 * @ena_dev: ENA communication layer struct
509 * @polling: ENAble/Disable polling mode
511 * Set the admin completion mode.
513 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
515 /* ena_com_set_admin_polling_mode - Get the admin completion queue polling mode
516 * @ena_dev: ENA communication layer struct
518 * Get the admin completion mode.
519 * If polling mode is on, ena_com_execute_admin_command will perform a
520 * polling on the admin completion queue for the commands completion,
521 * otherwise it will wait on wait event.
525 bool ena_com_get_ena_admin_polling_mode(struct ena_com_dev *ena_dev);
527 /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
528 * @ena_dev: ENA communication layer struct
530 * This method go over the admin completion queue and wake up all the pending
531 * threads that wait on the commands wait event.
533 * @note: Should be called after MSI-X interrupt.
535 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
537 /* ena_com_aenq_intr_handler - AENQ interrupt handler
538 * @ena_dev: ENA communication layer struct
540 * This method go over the async event notification queue and call the proper
543 void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data);
545 /* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
546 * @ena_dev: ENA communication layer struct
548 * This method aborts all the outstanding admin commands.
549 * The caller should then call ena_com_wait_for_abort_completion to make sure
550 * all the commands were completed.
552 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
554 /* ena_com_wait_for_abort_completion - Wait for admin commands abort.
555 * @ena_dev: ENA communication layer struct
557 * This method wait until all the outstanding admin commands will be completed.
559 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
561 /* ena_com_validate_version - Validate the device parameters
562 * @ena_dev: ENA communication layer struct
564 * This method validate the device parameters are the same as the saved
565 * parameters in ena_dev.
566 * This method is useful after device reset, to validate the device mac address
567 * and the device offloads are the same as before the reset.
569 * @return - 0 on success negative value otherwise.
571 int ena_com_validate_version(struct ena_com_dev *ena_dev);
573 /* ena_com_get_link_params - Retrieve physical link parameters.
574 * @ena_dev: ENA communication layer struct
575 * @resp: Link parameters
577 * Retrieve the physical link parameters,
578 * like speed, auto-negotiation and full duplex support.
580 * @return - 0 on Success negative value otherwise.
582 int ena_com_get_link_params(struct ena_com_dev *ena_dev,
583 struct ena_admin_get_feat_resp *resp);
585 /* ena_com_extra_properties_strings_init - Initialize the extra properties strings buffer.
586 * @ena_dev: ENA communication layer struct
588 * Initialize the extra properties strings buffer.
590 int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev);
592 /* ena_com_delete_extra_properties_strings - Free the extra properties strings buffer.
593 * @ena_dev: ENA communication layer struct
595 * Free the allocated extra properties strings buffer.
597 void ena_com_delete_extra_properties_strings(struct ena_com_dev *ena_dev);
599 /* ena_com_get_extra_properties_flags - Retrieve extra properties flags.
600 * @ena_dev: ENA communication layer struct
601 * @resp: Extra properties flags.
603 * Retrieve the extra properties flags.
605 * @return - 0 on Success negative value otherwise.
607 int ena_com_get_extra_properties_flags(struct ena_com_dev *ena_dev,
608 struct ena_admin_get_feat_resp *resp);
610 /* ena_com_get_dma_width - Retrieve physical dma address width the device
612 * @ena_dev: ENA communication layer struct
614 * Retrieve the maximum physical address bits the device can handle.
616 * @return: > 0 on Success and negative value otherwise.
618 int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
620 /* ena_com_set_aenq_config - Set aenq groups configurations
621 * @ena_dev: ENA communication layer struct
622 * @groups flag: bit fields flags of enum ena_admin_aenq_group.
624 * Configure which aenq event group the driver would like to receive.
626 * @return: 0 on Success and negative value otherwise.
628 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
630 /* ena_com_get_dev_attr_feat - Get device features
631 * @ena_dev: ENA communication layer struct
632 * @get_feat_ctx: returned context that contain the get features.
634 * @return: 0 on Success and negative value otherwise.
636 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
637 struct ena_com_dev_get_features_ctx *get_feat_ctx);
639 /* ena_com_get_dev_basic_stats - Get device basic statistics
640 * @ena_dev: ENA communication layer struct
641 * @stats: stats return value
643 * @return: 0 on Success and negative value otherwise.
645 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
646 struct ena_admin_basic_stats *stats);
648 /* ena_com_set_dev_mtu - Configure the device mtu.
649 * @ena_dev: ENA communication layer struct
652 * @return: 0 on Success and negative value otherwise.
654 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu);
656 /* ena_com_get_offload_settings - Retrieve the device offloads capabilities
657 * @ena_dev: ENA communication layer struct
658 * @offlad: offload return value
660 * @return: 0 on Success and negative value otherwise.
662 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
663 struct ena_admin_feature_offload_desc *offload);
665 /* ena_com_rss_init - Init RSS
666 * @ena_dev: ENA communication layer struct
667 * @log_size: indirection log size
669 * Allocate RSS/RFS resources.
670 * The caller then can configure rss using ena_com_set_hash_function,
671 * ena_com_set_hash_ctrl and ena_com_indirect_table_set.
673 * @return: 0 on Success and negative value otherwise.
675 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
677 /* ena_com_rss_destroy - Destroy rss
678 * @ena_dev: ENA communication layer struct
680 * Free all the RSS/RFS resources.
682 void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
684 /* ena_com_fill_hash_function - Fill RSS hash function
685 * @ena_dev: ENA communication layer struct
686 * @func: The hash function (Toeplitz or crc)
687 * @key: Hash key (for toeplitz hash)
688 * @key_len: key length (max length 10 DW)
689 * @init_val: initial value for the hash function
691 * Fill the ena_dev resources with the desire hash function, hash key, key_len
692 * and key initial value (if needed by the hash function).
693 * To flush the key into the device the caller should call
694 * ena_com_set_hash_function.
696 * @return: 0 on Success and negative value otherwise.
698 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
699 enum ena_admin_hash_functions func,
700 const u8 *key, u16 key_len, u32 init_val);
702 /* ena_com_set_hash_function - Flush the hash function and it dependencies to
704 * @ena_dev: ENA communication layer struct
706 * Flush the hash function and it dependencies (key, key length and
707 * initial value) if needed.
709 * @note: Prior to this method the caller should call ena_com_fill_hash_function
711 * @return: 0 on Success and negative value otherwise.
713 int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
715 /* ena_com_get_hash_function - Retrieve the hash function and the hash key
717 * @ena_dev: ENA communication layer struct
718 * @func: hash function
721 * Retrieve the hash function and the hash key from the device.
723 * @note: If the caller called ena_com_fill_hash_function but didn't flash
724 * it to the device, the new configuration will be lost.
726 * @return: 0 on Success and negative value otherwise.
728 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
729 enum ena_admin_hash_functions *func,
732 /* ena_com_fill_hash_ctrl - Fill RSS hash control
733 * @ena_dev: ENA communication layer struct.
734 * @proto: The protocol to configure.
735 * @hash_fields: bit mask of ena_admin_flow_hash_fields
737 * Fill the ena_dev resources with the desire hash control (the ethernet
738 * fields that take part of the hash) for a specific protocol.
739 * To flush the hash control to the device, the caller should call
740 * ena_com_set_hash_ctrl.
742 * @return: 0 on Success and negative value otherwise.
744 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
745 enum ena_admin_flow_hash_proto proto,
748 /* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
749 * @ena_dev: ENA communication layer struct
751 * Flush the hash control (the ethernet fields that take part of the hash)
753 * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
755 * @return: 0 on Success and negative value otherwise.
757 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
759 /* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
760 * @ena_dev: ENA communication layer struct
761 * @proto: The protocol to retrieve.
762 * @fields: bit mask of ena_admin_flow_hash_fields.
764 * Retrieve the hash control from the device.
766 * @note, If the caller called ena_com_fill_hash_ctrl but didn't flash
767 * it to the device, the new configuration will be lost.
769 * @return: 0 on Success and negative value otherwise.
771 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
772 enum ena_admin_flow_hash_proto proto,
775 /* ena_com_set_default_hash_ctrl - Set the hash control to a default
777 * @ena_dev: ENA communication layer struct
779 * Fill the ena_dev resources with the default hash control configuration.
780 * To flush the hash control to the device, the caller should call
781 * ena_com_set_hash_ctrl.
783 * @return: 0 on Success and negative value otherwise.
785 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
787 /* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
789 * @ena_dev: ENA communication layer struct.
790 * @entry_idx - indirection table entry.
791 * @entry_value - redirection value
793 * Fill a single entry of the RSS indirection table in the ena_dev resources.
794 * To flush the indirection table to the device, the called should call
795 * ena_com_indirect_table_set.
797 * @return: 0 on Success and negative value otherwise.
799 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
800 u16 entry_idx, u16 entry_value);
802 /* ena_com_indirect_table_set - Flush the indirection table to the device.
803 * @ena_dev: ENA communication layer struct
805 * Flush the indirection hash control to the device.
806 * Prior to this method the caller should call ena_com_indirect_table_fill_entry
808 * @return: 0 on Success and negative value otherwise.
810 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
812 /* ena_com_indirect_table_get - Retrieve the indirection table from the device.
813 * @ena_dev: ENA communication layer struct
814 * @ind_tbl: indirection table
816 * Retrieve the RSS indirection table from the device.
818 * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flash
819 * it to the device, the new configuration will be lost.
821 * @return: 0 on Success and negative value otherwise.
823 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
825 /* ena_com_allocate_host_info - Allocate host info resources.
826 * @ena_dev: ENA communication layer struct
828 * @return: 0 on Success and negative value otherwise.
830 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
832 /* ena_com_allocate_debug_area - Allocate debug area.
833 * @ena_dev: ENA communication layer struct
834 * @debug_area_size - debug area size.
836 * @return: 0 on Success and negative value otherwise.
838 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
839 u32 debug_area_size);
841 /* ena_com_delete_debug_area - Free the debug area resources.
842 * @ena_dev: ENA communication layer struct
844 * Free the allocate debug area.
846 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
848 /* ena_com_delete_host_info - Free the host info resources.
849 * @ena_dev: ENA communication layer struct
851 * Free the allocate host info.
853 void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
855 /* ena_com_set_host_attributes - Update the device with the host
856 * attributes (debug area and host info) base address.
857 * @ena_dev: ENA communication layer struct
859 * @return: 0 on Success and negative value otherwise.
861 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
863 /* ena_com_create_io_cq - Create io completion queue.
864 * @ena_dev: ENA communication layer struct
865 * @io_cq - io completion queue handler
867 * Create IO completion queue.
869 * @return - 0 on success, negative value on failure.
871 int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
872 struct ena_com_io_cq *io_cq);
874 /* ena_com_destroy_io_cq - Destroy io completion queue.
875 * @ena_dev: ENA communication layer struct
876 * @io_cq - io completion queue handler
878 * Destroy IO completion queue.
880 * @return - 0 on success, negative value on failure.
882 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
883 struct ena_com_io_cq *io_cq);
885 /* ena_com_execute_admin_command - Execute admin command
886 * @admin_queue: admin queue.
887 * @cmd: the admin command to execute.
888 * @cmd_size: the command size.
889 * @cmd_completion: command completion return value.
890 * @cmd_comp_size: command completion size.
892 * Submit an admin command and then wait until the device will return a
894 * The completion will be copyed into cmd_comp.
896 * @return - 0 on success, negative value on failure.
898 int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
899 struct ena_admin_aq_entry *cmd,
901 struct ena_admin_acq_entry *cmd_comp,
902 size_t cmd_comp_size);
904 /* ena_com_init_interrupt_moderation - Init interrupt moderation
905 * @ena_dev: ENA communication layer struct
907 * @return - 0 on success, negative value on failure.
909 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
911 /* ena_com_destroy_interrupt_moderation - Destroy interrupt moderation resources
912 * @ena_dev: ENA communication layer struct
914 void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev);
916 /* ena_com_interrupt_moderation_supported - Return if interrupt moderation
917 * capability is supported by the device.
919 * @return - supported or not.
921 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
923 /* ena_com_config_default_interrupt_moderation_table - Restore the interrupt
924 * moderation table back to the default parameters.
925 * @ena_dev: ENA communication layer struct
927 void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev);
929 /* ena_com_update_nonadaptive_moderation_interval_tx - Update the
930 * non-adaptive interval in Tx direction.
931 * @ena_dev: ENA communication layer struct
932 * @tx_coalesce_usecs: Interval in usec.
934 * @return - 0 on success, negative value on failure.
936 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
937 u32 tx_coalesce_usecs);
939 /* ena_com_update_nonadaptive_moderation_interval_rx - Update the
940 * non-adaptive interval in Rx direction.
941 * @ena_dev: ENA communication layer struct
942 * @rx_coalesce_usecs: Interval in usec.
944 * @return - 0 on success, negative value on failure.
946 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
947 u32 rx_coalesce_usecs);
949 /* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
950 * non-adaptive interval in Tx direction.
951 * @ena_dev: ENA communication layer struct
953 * @return - interval in usec
955 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
957 /* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
958 * non-adaptive interval in Rx direction.
959 * @ena_dev: ENA communication layer struct
961 * @return - interval in usec
963 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
965 /* ena_com_init_intr_moderation_entry - Update a single entry in the interrupt
967 * @ena_dev: ENA communication layer struct
968 * @level: Interrupt moderation table level
969 * @entry: Entry value
971 * Update a single entry in the interrupt moderation table.
973 void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,
974 enum ena_intr_moder_level level,
975 struct ena_intr_moder_entry *entry);
977 /* ena_com_get_intr_moderation_entry - Init ena_intr_moder_entry.
978 * @ena_dev: ENA communication layer struct
979 * @level: Interrupt moderation table level
980 * @entry: Entry to fill.
982 * Initialize the entry according to the adaptive interrupt moderation table.
984 void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,
985 enum ena_intr_moder_level level,
986 struct ena_intr_moder_entry *entry);
989 /* ena_com_config_dev_mode - Configure the placement policy of the device.
990 * @ena_dev: ENA communication layer struct
991 * @llq_features: LLQ feature descriptor, retrieve via ena_com_get_dev_attr_feat.
992 * @ena_llq_config: The default driver LLQ parameters configurations
994 int ena_com_config_dev_mode(struct ena_com_dev *ena_dev,
995 struct ena_admin_feature_llq_desc *llq_features,
996 struct ena_llq_configurations *llq_default_config);
998 static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
1000 return ena_dev->adaptive_coalescing;
1003 static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
1005 ena_dev->adaptive_coalescing = true;
1008 static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
1010 ena_dev->adaptive_coalescing = false;
1013 /* ena_com_calculate_interrupt_delay - Calculate new interrupt delay
1014 * @ena_dev: ENA communication layer struct
1015 * @pkts: Number of packets since the last update
1016 * @bytes: Number of bytes received since the last update.
1017 * @smoothed_interval: Returned interval
1018 * @moder_tbl_idx: Current table level as input update new level as return
1021 static inline void ena_com_calculate_interrupt_delay(struct ena_com_dev *ena_dev,
1024 unsigned int *smoothed_interval,
1025 unsigned int *moder_tbl_idx)
1027 enum ena_intr_moder_level curr_moder_idx, new_moder_idx;
1028 struct ena_intr_moder_entry *curr_moder_entry;
1029 struct ena_intr_moder_entry *pred_moder_entry;
1030 struct ena_intr_moder_entry *new_moder_entry;
1031 struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
1032 unsigned int interval;
1034 /* We apply adaptive moderation on Rx path only.
1035 * Tx uses static interrupt moderation.
1037 if (!pkts || !bytes)
1038 /* Tx interrupt, or spurious interrupt,
1039 * in both cases we just use same delay values
1043 curr_moder_idx = (enum ena_intr_moder_level)(*moder_tbl_idx);
1044 if (unlikely(curr_moder_idx >= ENA_INTR_MAX_NUM_OF_LEVELS)) {
1045 ena_trc_err("Wrong moderation index %u\n", curr_moder_idx);
1049 curr_moder_entry = &intr_moder_tbl[curr_moder_idx];
1050 new_moder_idx = curr_moder_idx;
1052 if (curr_moder_idx == ENA_INTR_MODER_LOWEST) {
1053 if ((pkts > curr_moder_entry->pkts_per_interval) ||
1054 (bytes > curr_moder_entry->bytes_per_interval))
1056 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1058 pred_moder_entry = &intr_moder_tbl[curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE];
1060 if ((pkts <= pred_moder_entry->pkts_per_interval) ||
1061 (bytes <= pred_moder_entry->bytes_per_interval))
1063 (enum ena_intr_moder_level)(curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE);
1064 else if ((pkts > curr_moder_entry->pkts_per_interval) ||
1065 (bytes > curr_moder_entry->bytes_per_interval)) {
1066 if (curr_moder_idx != ENA_INTR_MODER_HIGHEST)
1068 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1071 new_moder_entry = &intr_moder_tbl[new_moder_idx];
1073 interval = new_moder_entry->intr_moder_interval;
1074 *smoothed_interval = (
1075 (interval * ENA_INTR_DELAY_NEW_VALUE_WEIGHT +
1076 ENA_INTR_DELAY_OLD_VALUE_WEIGHT * (*smoothed_interval)) + 5) /
1079 *moder_tbl_idx = new_moder_idx;
1082 /* ena_com_update_intr_reg - Prepare interrupt register
1083 * @intr_reg: interrupt register to update.
1084 * @rx_delay_interval: Rx interval in usecs
1085 * @tx_delay_interval: Tx interval in usecs
1086 * @unmask: unask enable/disable
1088 * Prepare interrupt update register with the supplied parameters.
1090 static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
1091 u32 rx_delay_interval,
1092 u32 tx_delay_interval,
1095 intr_reg->intr_control = 0;
1096 intr_reg->intr_control |= rx_delay_interval &
1097 ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
1099 intr_reg->intr_control |=
1100 (tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
1101 & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
1104 intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
1107 static inline u8 *ena_com_get_next_bounce_buffer(struct ena_com_io_bounce_buffer_control *bounce_buf_ctrl)
1109 u16 size, buffers_num;
1112 size = bounce_buf_ctrl->buffer_size;
1113 buffers_num = bounce_buf_ctrl->buffers_num;
1115 buf = bounce_buf_ctrl->base_buffer +
1116 (bounce_buf_ctrl->next_to_use++ & (buffers_num - 1)) * size;
1118 prefetch(bounce_buf_ctrl->base_buffer +
1119 (bounce_buf_ctrl->next_to_use & (buffers_num - 1)) * size);
1124 #if defined(__cplusplus)
1126 #endif /* __cplusplus */
1127 #endif /* !(ENA_COM) */