4 * Copyright (c) 2015-2016 Amazon.com, Inc. or its affiliates.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 #include "ena_includes.h"
40 #define ENA_MAX_NUM_IO_QUEUES 128U
41 /* We need to queues for each IO (on for Tx and one for Rx) */
42 #define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
44 #define ENA_MAX_HANDLERS 256
46 #define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
49 #define ENA_REG_READ_TIMEOUT 200000
51 #define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
52 #define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
53 #define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
55 /*****************************************************************************/
56 /*****************************************************************************/
57 /* ENA adaptive interrupt moderation settings */
59 #define ENA_INTR_LOWEST_USECS (0)
60 #define ENA_INTR_LOWEST_PKTS (3)
61 #define ENA_INTR_LOWEST_BYTES (2 * 1524)
63 #define ENA_INTR_LOW_USECS (32)
64 #define ENA_INTR_LOW_PKTS (12)
65 #define ENA_INTR_LOW_BYTES (16 * 1024)
67 #define ENA_INTR_MID_USECS (80)
68 #define ENA_INTR_MID_PKTS (48)
69 #define ENA_INTR_MID_BYTES (64 * 1024)
71 #define ENA_INTR_HIGH_USECS (128)
72 #define ENA_INTR_HIGH_PKTS (96)
73 #define ENA_INTR_HIGH_BYTES (128 * 1024)
75 #define ENA_INTR_HIGHEST_USECS (192)
76 #define ENA_INTR_HIGHEST_PKTS (128)
77 #define ENA_INTR_HIGHEST_BYTES (192 * 1024)
79 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS 196
80 #define ENA_INTR_INITIAL_RX_INTERVAL_USECS 4
81 #define ENA_INTR_DELAY_OLD_VALUE_WEIGHT 6
82 #define ENA_INTR_DELAY_NEW_VALUE_WEIGHT 4
84 #define ENA_INTR_MODER_LEVEL_STRIDE 1
85 #define ENA_INTR_BYTE_COUNT_NOT_SUPPORTED 0xFFFFFF
87 #define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
89 enum ena_intr_moder_level {
90 ENA_INTR_MODER_LOWEST = 0,
94 ENA_INTR_MODER_HIGHEST,
95 ENA_INTR_MAX_NUM_OF_LEVELS,
98 struct ena_intr_moder_entry {
99 unsigned int intr_moder_interval;
100 unsigned int pkts_per_interval;
101 unsigned int bytes_per_interval;
104 enum queue_direction {
105 ENA_COM_IO_QUEUE_DIRECTION_TX,
106 ENA_COM_IO_QUEUE_DIRECTION_RX
110 dma_addr_t paddr; /**< Buffer physical address */
111 u16 len; /**< Buffer length in bytes */
114 struct ena_com_rx_buf_info {
119 struct ena_com_io_desc_addr {
120 u8 __iomem *pbuf_dev_addr; /* LLQ address */
122 dma_addr_t phys_addr;
123 ena_mem_handle_t mem_handle;
126 struct ena_com_tx_meta {
130 u16 l4_hdr_len; /* In words */
133 struct ena_com_io_cq {
134 struct ena_com_io_desc_addr cdesc_addr;
137 /* Interrupt unmask register */
138 u32 __iomem *unmask_reg;
140 /* The completion queue head doorbell register */
141 u32 __iomem *cq_head_db_reg;
143 /* numa configuration register (for TPH) */
144 u32 __iomem *numa_node_cfg_reg;
146 /* The value to write to the above register to unmask
147 * the interrupt of this queue
151 enum queue_direction direction;
153 /* holds the number of cdesc of the current packet */
154 u16 cur_rx_pkt_cdesc_count;
155 /* save the firt cdesc idx of the current packet */
156 u16 cur_rx_pkt_cdesc_start_idx;
162 /* Device queue index */
165 u16 last_head_update;
167 u8 cdesc_entry_size_in_bytes;
169 } ____cacheline_aligned;
171 struct ena_com_io_sq {
172 struct ena_com_io_desc_addr desc_addr;
175 u32 __iomem *db_addr;
176 u8 __iomem *header_addr;
178 enum queue_direction direction;
179 enum ena_admin_placement_policy_type mem_queue_type;
182 struct ena_com_tx_meta cached_tx_meta;
190 u32 tx_max_header_size;
194 } ____cacheline_aligned;
196 struct ena_com_admin_cq {
197 struct ena_admin_acq_entry *entries;
198 ena_mem_handle_t mem_handle;
205 struct ena_com_admin_sq {
206 struct ena_admin_aq_entry *entries;
207 ena_mem_handle_t mem_handle;
210 u32 __iomem *db_addr;
218 struct ena_com_stats_admin {
226 struct ena_com_admin_queue {
229 ena_spinlock_t q_lock; /* spinlock for the admin queue */
231 struct ena_comp_ctx *comp_ctx;
232 u32 completion_timeout;
234 struct ena_com_admin_cq cq;
235 struct ena_com_admin_sq sq;
237 /* Indicate if the admin queue should poll for completion */
242 /* Indicate that the ena was initialized and can
243 * process new admin commands
247 /* Count the number of outstanding admin commands */
248 ena_atomic32_t outstanding_cmds;
250 struct ena_com_stats_admin stats;
253 struct ena_aenq_handlers;
255 struct ena_com_aenq {
258 struct ena_admin_aenq_entry *entries;
260 ena_mem_handle_t mem_handle;
262 struct ena_aenq_handlers *aenq_handlers;
265 struct ena_com_mmio_read {
266 struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
267 dma_addr_t read_resp_dma_addr;
268 ena_mem_handle_t read_resp_mem_handle;
269 u32 reg_read_to; /* in us */
271 bool readless_supported;
272 /* spin lock to ensure a single outstanding read */
278 u16 *host_rss_ind_tbl;
279 struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
280 dma_addr_t rss_ind_tbl_dma_addr;
281 ena_mem_handle_t rss_ind_tbl_mem_handle;
285 enum ena_admin_hash_functions hash_func;
286 struct ena_admin_feature_rss_flow_hash_control *hash_key;
287 dma_addr_t hash_key_dma_addr;
288 ena_mem_handle_t hash_key_mem_handle;
292 struct ena_admin_feature_rss_hash_control *hash_ctrl;
293 dma_addr_t hash_ctrl_dma_addr;
294 ena_mem_handle_t hash_ctrl_mem_handle;
298 struct ena_host_attribute {
300 u8 *debug_area_virt_addr;
301 dma_addr_t debug_area_dma_addr;
302 ena_mem_handle_t debug_area_dma_handle;
305 /* Host information */
306 struct ena_admin_host_info *host_info;
307 dma_addr_t host_info_dma_addr;
308 ena_mem_handle_t host_info_dma_handle;
311 /* Each ena_dev is a PCI function. */
313 struct ena_com_admin_queue admin_queue;
314 struct ena_com_aenq aenq;
315 struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
316 struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
318 void __iomem *mem_bar;
322 enum ena_admin_placement_policy_type tx_mem_queue_type;
323 u32 tx_max_header_size;
324 u16 stats_func; /* Selected function for extended statistic dump */
325 u16 stats_queue; /* Selected queue for extended statistic dump */
327 struct ena_com_mmio_read mmio_read;
330 u32 supported_features;
333 struct ena_host_attribute host_attr;
334 bool adaptive_coalescing;
335 u16 intr_delay_resolution;
336 u32 intr_moder_tx_interval;
337 struct ena_intr_moder_entry *intr_moder_tbl;
340 struct ena_com_dev_get_features_ctx {
341 struct ena_admin_queue_feature_desc max_queues;
342 struct ena_admin_device_attr_feature_desc dev_attr;
343 struct ena_admin_feature_aenq_desc aenq;
344 struct ena_admin_feature_offload_desc offload;
345 struct ena_admin_ena_hw_hints hw_hints;
348 struct ena_com_create_io_ctx {
349 enum ena_admin_placement_policy_type mem_queue_type;
350 enum queue_direction direction;
357 typedef void (*ena_aenq_handler)(void *data,
358 struct ena_admin_aenq_entry *aenq_e);
360 /* Holds aenq handlers. Indexed by AENQ event group */
361 struct ena_aenq_handlers {
362 ena_aenq_handler handlers[ENA_MAX_HANDLERS];
363 ena_aenq_handler unimplemented_handler;
366 /*****************************************************************************/
367 /*****************************************************************************/
368 #if defined(__cplusplus)
372 /* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
373 * @ena_dev: ENA communication layer struct
375 * Initialize the register read mechanism.
377 * @note: This method must be the first stage in the initialization sequence.
379 * @return - 0 on success, negative value on failure.
381 int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
383 /* ena_com_set_mmio_read_mode - Enable/disable the mmio reg read mechanism
384 * @ena_dev: ENA communication layer struct
385 * @readless_supported: readless mode (enable/disable)
387 void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
388 bool readless_supported);
390 /* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
391 * value physical address.
392 * @ena_dev: ENA communication layer struct
394 void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
396 /* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
397 * @ena_dev: ENA communication layer struct
399 void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
401 /* ena_com_admin_init - Init the admin and the async queues
402 * @ena_dev: ENA communication layer struct
403 * @aenq_handlers: Those handlers to be called upon event.
404 * @init_spinlock: Indicate if this method should init the admin spinlock or
405 * the spinlock was init before (for example, in a case of FLR).
407 * Initialize the admin submission and completion queues.
408 * Initialize the asynchronous events notification queues.
410 * @return - 0 on success, negative value on failure.
412 int ena_com_admin_init(struct ena_com_dev *ena_dev,
413 struct ena_aenq_handlers *aenq_handlers,
416 /* ena_com_admin_destroy - Destroy the admin and the async events queues.
417 * @ena_dev: ENA communication layer struct
419 * @note: Before calling this method, the caller must validate that the device
420 * won't send any additional admin completions/aenq.
421 * To achieve that, a FLR is recommended.
423 void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
425 /* ena_com_dev_reset - Perform device FLR to the device.
426 * @ena_dev: ENA communication layer struct
427 * @reset_reason: Specify what is the trigger for the reset in case of an error.
429 * @return - 0 on success, negative value on failure.
431 int ena_com_dev_reset(struct ena_com_dev *ena_dev,
432 enum ena_regs_reset_reason_types reset_reason);
434 /* ena_com_create_io_queue - Create io queue.
435 * @ena_dev: ENA communication layer struct
436 * @ctx - create context structure
438 * Create the submission and the completion queues.
440 * @return - 0 on success, negative value on failure.
442 int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
443 struct ena_com_create_io_ctx *ctx);
445 /* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
446 * @ena_dev: ENA communication layer struct
447 * @qid - the caller virtual queue id.
449 void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
451 /* ena_com_get_io_handlers - Return the io queue handlers
452 * @ena_dev: ENA communication layer struct
453 * @qid - the caller virtual queue id.
454 * @io_sq - IO submission queue handler
455 * @io_cq - IO completion queue handler.
457 * @return - 0 on success, negative value on failure.
459 int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
460 struct ena_com_io_sq **io_sq,
461 struct ena_com_io_cq **io_cq);
463 /* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
464 * @ena_dev: ENA communication layer struct
466 * After this method, aenq event can be received via AENQ.
468 void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
470 /* ena_com_set_admin_running_state - Set the state of the admin queue
471 * @ena_dev: ENA communication layer struct
473 * Change the state of the admin queue (enable/disable)
475 void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
477 /* ena_com_get_admin_running_state - Get the admin queue state
478 * @ena_dev: ENA communication layer struct
480 * Retrieve the state of the admin queue (enable/disable)
482 * @return - current polling mode (enable/disable)
484 bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
486 /* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
487 * @ena_dev: ENA communication layer struct
488 * @polling: ENAble/Disable polling mode
490 * Set the admin completion mode.
492 void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
494 /* ena_com_set_admin_polling_mode - Get the admin completion queue polling mode
495 * @ena_dev: ENA communication layer struct
497 * Get the admin completion mode.
498 * If polling mode is on, ena_com_execute_admin_command will perform a
499 * polling on the admin completion queue for the commands completion,
500 * otherwise it will wait on wait event.
504 bool ena_com_get_ena_admin_polling_mode(struct ena_com_dev *ena_dev);
506 /* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
507 * @ena_dev: ENA communication layer struct
509 * This method go over the admin completion queue and wake up all the pending
510 * threads that wait on the commands wait event.
512 * @note: Should be called after MSI-X interrupt.
514 void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
516 /* ena_com_aenq_intr_handler - AENQ interrupt handler
517 * @ena_dev: ENA communication layer struct
519 * This method go over the async event notification queue and call the proper
522 void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data);
524 /* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
525 * @ena_dev: ENA communication layer struct
527 * This method aborts all the outstanding admin commands.
528 * The caller should then call ena_com_wait_for_abort_completion to make sure
529 * all the commands were completed.
531 void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
533 /* ena_com_wait_for_abort_completion - Wait for admin commands abort.
534 * @ena_dev: ENA communication layer struct
536 * This method wait until all the outstanding admin commands will be completed.
538 void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
540 /* ena_com_validate_version - Validate the device parameters
541 * @ena_dev: ENA communication layer struct
543 * This method validate the device parameters are the same as the saved
544 * parameters in ena_dev.
545 * This method is useful after device reset, to validate the device mac address
546 * and the device offloads are the same as before the reset.
548 * @return - 0 on success negative value otherwise.
550 int ena_com_validate_version(struct ena_com_dev *ena_dev);
552 /* ena_com_get_link_params - Retrieve physical link parameters.
553 * @ena_dev: ENA communication layer struct
554 * @resp: Link parameters
556 * Retrieve the physical link parameters,
557 * like speed, auto-negotiation and full duplex support.
559 * @return - 0 on Success negative value otherwise.
561 int ena_com_get_link_params(struct ena_com_dev *ena_dev,
562 struct ena_admin_get_feat_resp *resp);
564 /* ena_com_get_dma_width - Retrieve physical dma address width the device
566 * @ena_dev: ENA communication layer struct
568 * Retrieve the maximum physical address bits the device can handle.
570 * @return: > 0 on Success and negative value otherwise.
572 int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
574 /* ena_com_set_aenq_config - Set aenq groups configurations
575 * @ena_dev: ENA communication layer struct
576 * @groups flag: bit fields flags of enum ena_admin_aenq_group.
578 * Configure which aenq event group the driver would like to receive.
580 * @return: 0 on Success and negative value otherwise.
582 int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
584 /* ena_com_get_dev_attr_feat - Get device features
585 * @ena_dev: ENA communication layer struct
586 * @get_feat_ctx: returned context that contain the get features.
588 * @return: 0 on Success and negative value otherwise.
590 int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
591 struct ena_com_dev_get_features_ctx *get_feat_ctx);
593 /* ena_com_get_dev_basic_stats - Get device basic statistics
594 * @ena_dev: ENA communication layer struct
595 * @stats: stats return value
597 * @return: 0 on Success and negative value otherwise.
599 int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
600 struct ena_admin_basic_stats *stats);
602 /* ena_com_set_dev_mtu - Configure the device mtu.
603 * @ena_dev: ENA communication layer struct
606 * @return: 0 on Success and negative value otherwise.
608 int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu);
610 /* ena_com_get_offload_settings - Retrieve the device offloads capabilities
611 * @ena_dev: ENA communication layer struct
612 * @offlad: offload return value
614 * @return: 0 on Success and negative value otherwise.
616 int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
617 struct ena_admin_feature_offload_desc *offload);
619 /* ena_com_rss_init - Init RSS
620 * @ena_dev: ENA communication layer struct
621 * @log_size: indirection log size
623 * Allocate RSS/RFS resources.
624 * The caller then can configure rss using ena_com_set_hash_function,
625 * ena_com_set_hash_ctrl and ena_com_indirect_table_set.
627 * @return: 0 on Success and negative value otherwise.
629 int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
631 /* ena_com_rss_destroy - Destroy rss
632 * @ena_dev: ENA communication layer struct
634 * Free all the RSS/RFS resources.
636 void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
638 /* ena_com_fill_hash_function - Fill RSS hash function
639 * @ena_dev: ENA communication layer struct
640 * @func: The hash function (Toeplitz or crc)
641 * @key: Hash key (for toeplitz hash)
642 * @key_len: key length (max length 10 DW)
643 * @init_val: initial value for the hash function
645 * Fill the ena_dev resources with the desire hash function, hash key, key_len
646 * and key initial value (if needed by the hash function).
647 * To flush the key into the device the caller should call
648 * ena_com_set_hash_function.
650 * @return: 0 on Success and negative value otherwise.
652 int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
653 enum ena_admin_hash_functions func,
654 const u8 *key, u16 key_len, u32 init_val);
656 /* ena_com_set_hash_function - Flush the hash function and it dependencies to
658 * @ena_dev: ENA communication layer struct
660 * Flush the hash function and it dependencies (key, key length and
661 * initial value) if needed.
663 * @note: Prior to this method the caller should call ena_com_fill_hash_function
665 * @return: 0 on Success and negative value otherwise.
667 int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
669 /* ena_com_get_hash_function - Retrieve the hash function and the hash key
671 * @ena_dev: ENA communication layer struct
672 * @func: hash function
675 * Retrieve the hash function and the hash key from the device.
677 * @note: If the caller called ena_com_fill_hash_function but didn't flash
678 * it to the device, the new configuration will be lost.
680 * @return: 0 on Success and negative value otherwise.
682 int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
683 enum ena_admin_hash_functions *func,
686 /* ena_com_fill_hash_ctrl - Fill RSS hash control
687 * @ena_dev: ENA communication layer struct.
688 * @proto: The protocol to configure.
689 * @hash_fields: bit mask of ena_admin_flow_hash_fields
691 * Fill the ena_dev resources with the desire hash control (the ethernet
692 * fields that take part of the hash) for a specific protocol.
693 * To flush the hash control to the device, the caller should call
694 * ena_com_set_hash_ctrl.
696 * @return: 0 on Success and negative value otherwise.
698 int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
699 enum ena_admin_flow_hash_proto proto,
702 /* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
703 * @ena_dev: ENA communication layer struct
705 * Flush the hash control (the ethernet fields that take part of the hash)
707 * @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
709 * @return: 0 on Success and negative value otherwise.
711 int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
713 /* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
714 * @ena_dev: ENA communication layer struct
715 * @proto: The protocol to retrieve.
716 * @fields: bit mask of ena_admin_flow_hash_fields.
718 * Retrieve the hash control from the device.
720 * @note, If the caller called ena_com_fill_hash_ctrl but didn't flash
721 * it to the device, the new configuration will be lost.
723 * @return: 0 on Success and negative value otherwise.
725 int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
726 enum ena_admin_flow_hash_proto proto,
729 /* ena_com_set_default_hash_ctrl - Set the hash control to a default
731 * @ena_dev: ENA communication layer struct
733 * Fill the ena_dev resources with the default hash control configuration.
734 * To flush the hash control to the device, the caller should call
735 * ena_com_set_hash_ctrl.
737 * @return: 0 on Success and negative value otherwise.
739 int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
741 /* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
743 * @ena_dev: ENA communication layer struct.
744 * @entry_idx - indirection table entry.
745 * @entry_value - redirection value
747 * Fill a single entry of the RSS indirection table in the ena_dev resources.
748 * To flush the indirection table to the device, the called should call
749 * ena_com_indirect_table_set.
751 * @return: 0 on Success and negative value otherwise.
753 int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
754 u16 entry_idx, u16 entry_value);
756 /* ena_com_indirect_table_set - Flush the indirection table to the device.
757 * @ena_dev: ENA communication layer struct
759 * Flush the indirection hash control to the device.
760 * Prior to this method the caller should call ena_com_indirect_table_fill_entry
762 * @return: 0 on Success and negative value otherwise.
764 int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
766 /* ena_com_indirect_table_get - Retrieve the indirection table from the device.
767 * @ena_dev: ENA communication layer struct
768 * @ind_tbl: indirection table
770 * Retrieve the RSS indirection table from the device.
772 * @note: If the caller called ena_com_indirect_table_fill_entry but didn't flash
773 * it to the device, the new configuration will be lost.
775 * @return: 0 on Success and negative value otherwise.
777 int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
779 /* ena_com_allocate_host_info - Allocate host info resources.
780 * @ena_dev: ENA communication layer struct
782 * @return: 0 on Success and negative value otherwise.
784 int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
786 /* ena_com_allocate_debug_area - Allocate debug area.
787 * @ena_dev: ENA communication layer struct
788 * @debug_area_size - debug area size.
790 * @return: 0 on Success and negative value otherwise.
792 int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
793 u32 debug_area_size);
795 /* ena_com_delete_debug_area - Free the debug area resources.
796 * @ena_dev: ENA communication layer struct
798 * Free the allocate debug area.
800 void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
802 /* ena_com_delete_host_info - Free the host info resources.
803 * @ena_dev: ENA communication layer struct
805 * Free the allocate host info.
807 void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
809 /* ena_com_set_host_attributes - Update the device with the host
810 * attributes (debug area and host info) base address.
811 * @ena_dev: ENA communication layer struct
813 * @return: 0 on Success and negative value otherwise.
815 int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
817 /* ena_com_create_io_cq - Create io completion queue.
818 * @ena_dev: ENA communication layer struct
819 * @io_cq - io completion queue handler
821 * Create IO completion queue.
823 * @return - 0 on success, negative value on failure.
825 int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
826 struct ena_com_io_cq *io_cq);
828 /* ena_com_destroy_io_cq - Destroy io completion queue.
829 * @ena_dev: ENA communication layer struct
830 * @io_cq - io completion queue handler
832 * Destroy IO completion queue.
834 * @return - 0 on success, negative value on failure.
836 int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
837 struct ena_com_io_cq *io_cq);
839 /* ena_com_execute_admin_command - Execute admin command
840 * @admin_queue: admin queue.
841 * @cmd: the admin command to execute.
842 * @cmd_size: the command size.
843 * @cmd_completion: command completion return value.
844 * @cmd_comp_size: command completion size.
846 * Submit an admin command and then wait until the device will return a
848 * The completion will be copyed into cmd_comp.
850 * @return - 0 on success, negative value on failure.
852 int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
853 struct ena_admin_aq_entry *cmd,
855 struct ena_admin_acq_entry *cmd_comp,
856 size_t cmd_comp_size);
858 /* ena_com_init_interrupt_moderation - Init interrupt moderation
859 * @ena_dev: ENA communication layer struct
861 * @return - 0 on success, negative value on failure.
863 int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
865 /* ena_com_destroy_interrupt_moderation - Destroy interrupt moderation resources
866 * @ena_dev: ENA communication layer struct
868 void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev);
870 /* ena_com_interrupt_moderation_supported - Return if interrupt moderation
871 * capability is supported by the device.
873 * @return - supported or not.
875 bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
877 /* ena_com_config_default_interrupt_moderation_table - Restore the interrupt
878 * moderation table back to the default parameters.
879 * @ena_dev: ENA communication layer struct
881 void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev);
883 /* ena_com_update_nonadaptive_moderation_interval_tx - Update the
884 * non-adaptive interval in Tx direction.
885 * @ena_dev: ENA communication layer struct
886 * @tx_coalesce_usecs: Interval in usec.
888 * @return - 0 on success, negative value on failure.
890 int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
891 u32 tx_coalesce_usecs);
893 /* ena_com_update_nonadaptive_moderation_interval_rx - Update the
894 * non-adaptive interval in Rx direction.
895 * @ena_dev: ENA communication layer struct
896 * @rx_coalesce_usecs: Interval in usec.
898 * @return - 0 on success, negative value on failure.
900 int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
901 u32 rx_coalesce_usecs);
903 /* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
904 * non-adaptive interval in Tx direction.
905 * @ena_dev: ENA communication layer struct
907 * @return - interval in usec
909 unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
911 /* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
912 * non-adaptive interval in Rx direction.
913 * @ena_dev: ENA communication layer struct
915 * @return - interval in usec
917 unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
919 /* ena_com_init_intr_moderation_entry - Update a single entry in the interrupt
921 * @ena_dev: ENA communication layer struct
922 * @level: Interrupt moderation table level
923 * @entry: Entry value
925 * Update a single entry in the interrupt moderation table.
927 void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,
928 enum ena_intr_moder_level level,
929 struct ena_intr_moder_entry *entry);
931 /* ena_com_get_intr_moderation_entry - Init ena_intr_moder_entry.
932 * @ena_dev: ENA communication layer struct
933 * @level: Interrupt moderation table level
934 * @entry: Entry to fill.
936 * Initialize the entry according to the adaptive interrupt moderation table.
938 void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,
939 enum ena_intr_moder_level level,
940 struct ena_intr_moder_entry *entry);
942 static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
944 return ena_dev->adaptive_coalescing;
947 static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
949 ena_dev->adaptive_coalescing = true;
952 static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
954 ena_dev->adaptive_coalescing = false;
957 /* ena_com_calculate_interrupt_delay - Calculate new interrupt delay
958 * @ena_dev: ENA communication layer struct
959 * @pkts: Number of packets since the last update
960 * @bytes: Number of bytes received since the last update.
961 * @smoothed_interval: Returned interval
962 * @moder_tbl_idx: Current table level as input update new level as return
965 static inline void ena_com_calculate_interrupt_delay(struct ena_com_dev *ena_dev,
968 unsigned int *smoothed_interval,
969 unsigned int *moder_tbl_idx)
971 enum ena_intr_moder_level curr_moder_idx, new_moder_idx;
972 struct ena_intr_moder_entry *curr_moder_entry;
973 struct ena_intr_moder_entry *pred_moder_entry;
974 struct ena_intr_moder_entry *new_moder_entry;
975 struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
976 unsigned int interval;
978 /* We apply adaptive moderation on Rx path only.
979 * Tx uses static interrupt moderation.
982 /* Tx interrupt, or spurious interrupt,
983 * in both cases we just use same delay values
987 curr_moder_idx = (enum ena_intr_moder_level)(*moder_tbl_idx);
988 if (unlikely(curr_moder_idx >= ENA_INTR_MAX_NUM_OF_LEVELS)) {
989 ena_trc_err("Wrong moderation index %u\n", curr_moder_idx);
993 curr_moder_entry = &intr_moder_tbl[curr_moder_idx];
994 new_moder_idx = curr_moder_idx;
996 if (curr_moder_idx == ENA_INTR_MODER_LOWEST) {
997 if ((pkts > curr_moder_entry->pkts_per_interval) ||
998 (bytes > curr_moder_entry->bytes_per_interval))
1000 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1002 pred_moder_entry = &intr_moder_tbl[curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE];
1004 if ((pkts <= pred_moder_entry->pkts_per_interval) ||
1005 (bytes <= pred_moder_entry->bytes_per_interval))
1007 (enum ena_intr_moder_level)(curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE);
1008 else if ((pkts > curr_moder_entry->pkts_per_interval) ||
1009 (bytes > curr_moder_entry->bytes_per_interval)) {
1010 if (curr_moder_idx != ENA_INTR_MODER_HIGHEST)
1012 (enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
1015 new_moder_entry = &intr_moder_tbl[new_moder_idx];
1017 interval = new_moder_entry->intr_moder_interval;
1018 *smoothed_interval = (
1019 (interval * ENA_INTR_DELAY_NEW_VALUE_WEIGHT +
1020 ENA_INTR_DELAY_OLD_VALUE_WEIGHT * (*smoothed_interval)) + 5) /
1023 *moder_tbl_idx = new_moder_idx;
1026 /* ena_com_update_intr_reg - Prepare interrupt register
1027 * @intr_reg: interrupt register to update.
1028 * @rx_delay_interval: Rx interval in usecs
1029 * @tx_delay_interval: Tx interval in usecs
1030 * @unmask: unask enable/disable
1032 * Prepare interrupt update register with the supplied parameters.
1034 static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
1035 u32 rx_delay_interval,
1036 u32 tx_delay_interval,
1039 intr_reg->intr_control = 0;
1040 intr_reg->intr_control |= rx_delay_interval &
1041 ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
1043 intr_reg->intr_control |=
1044 (tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
1045 & ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
1048 intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
1051 #if defined(__cplusplus)
1053 #endif /* __cplusplus */
1054 #endif /* !(ENA_COM) */