drivers/net/ena/base/ena_plat_dpdk.h

   1 /*-
   2 * BSD LICENSE
   3 *
   4 * Copyright (c) 2015-2016 Amazon.com, Inc. or its affiliates.
   5 * All rights reserved.
   6 *
   7 * Redistribution and use in source and binary forms, with or without
   8 * modification, are permitted provided that the following conditions
   9 * are met:
  10 *
  11 * * Redistributions of source code must retain the above copyright
  12 * notice, this list of conditions and the following disclaimer.
  13 * * Redistributions in binary form must reproduce the above copyright
  14 * notice, this list of conditions and the following disclaimer in
  15 * the documentation and/or other materials provided with the
  16 * distribution.
  17 * * Neither the name of copyright holder nor the names of its
  18 * contributors may be used to endorse or promote products derived
  19 * from this software without specific prior written permission.
  20 *
  21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32 */
  33
  34 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
  35 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
  36
  37 #include <stdbool.h>
  38 #include <stdlib.h>
  39 #include <pthread.h>
  40 #include <stdint.h>
  41 #include <string.h>
  42 #include <errno.h>
  43
  44 #include <rte_atomic.h>
  45 #include <rte_branch_prediction.h>
  46 #include <rte_cycles.h>
  47 #include <rte_io.h>
  48 #include <rte_log.h>
  49 #include <rte_malloc.h>
  50 #include <rte_memzone.h>
  51 #include <rte_spinlock.h>
  52
  53 #include <sys/time.h>
  54
  55 typedef uint64_t u64;
  56 typedef uint32_t u32;
  57 typedef uint16_t u16;
  58 typedef uint8_t u8;
  59
  60 typedef uint64_t dma_addr_t;
  61 #ifndef ETIME
  62 #define ETIME ETIMEDOUT
  63 #endif
  64
  65 #define ena_atomic32_t rte_atomic32_t
  66 #define ena_mem_handle_t const struct rte_memzone *
  67
  68 #define SZ_256 (256U)
  69 #define SZ_4K (4096U)
  70
  71 #define ENA_COM_OK      0
  72 #define ENA_COM_NO_MEM  -ENOMEM
  73 #define ENA_COM_INVAL   -EINVAL
  74 #define ENA_COM_NO_SPACE        -ENOSPC
  75 #define ENA_COM_NO_DEVICE       -ENODEV
  76 #define ENA_COM_TIMER_EXPIRED   -ETIME
  77 #define ENA_COM_FAULT   -EFAULT
  78 #define ENA_COM_TRY_AGAIN       -EAGAIN
  79 #define ENA_COM_UNSUPPORTED    -EOPNOTSUPP
  80
  81 #define ____cacheline_aligned __rte_cache_aligned
  82
  83 #define ENA_ABORT() abort()
  84
  85 #define ENA_MSLEEP(x) rte_delay_ms(x)
  86 #define ENA_UDELAY(x) rte_delay_us(x)
  87
  88 #define ENA_TOUCH(x) ((void)(x))
  89 #define memcpy_toio memcpy
  90 #define wmb rte_wmb
  91 #define rmb rte_wmb
  92 #define mb rte_mb
  93 #define __iomem
  94
  95 #define US_PER_S 1000000
  96 #define ENA_GET_SYSTEM_USECS()                                          \
  97         (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
  98
  99 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
 100 #define ENA_ASSERT(cond, format, arg...)                                \
 101         do {                                                            \
 102                 if (unlikely(!(cond))) {                                \
 103                         RTE_LOG(ERR, PMD, format, ##arg);               \
 104                         rte_panic("line %d\tassert \"" #cond "\""       \
 105                                         "failed\n", __LINE__);          \
 106                 }                                                       \
 107         } while (0)
 108 #else
 109 #define ENA_ASSERT(cond, format, arg...) do {} while (0)
 110 #endif
 111
 112 #define ENA_MAX32(x, y) RTE_MAX((x), (y))
 113 #define ENA_MAX16(x, y) RTE_MAX((x), (y))
 114 #define ENA_MAX8(x, y) RTE_MAX((x), (y))
 115 #define ENA_MIN32(x, y) RTE_MIN((x), (y))
 116 #define ENA_MIN16(x, y) RTE_MIN((x), (y))
 117 #define ENA_MIN8(x, y) RTE_MIN((x), (y))
 118
 119 #define U64_C(x) x ## ULL
 120 #define BIT(nr)         (1UL << (nr))
 121 #define BITS_PER_LONG   (__SIZEOF_LONG__ * 8)
 122 #define GENMASK(h, l)   (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
 123 #define GENMASK_ULL(h, l) (((U64_C(1) << ((h) - (l) + 1)) - 1) << (l))
 124
 125 #ifdef RTE_LIBRTE_ENA_COM_DEBUG
 126 #define ena_trc_dbg(format, arg...)                                     \
 127         RTE_LOG(DEBUG, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
 128 #define ena_trc_info(format, arg...)                                    \
 129         RTE_LOG(INFO, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
 130 #define ena_trc_warn(format, arg...)                                    \
 131         RTE_LOG(ERR, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
 132 #define ena_trc_err(format, arg...)                                     \
 133         RTE_LOG(ERR, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
 134 #else
 135 #define ena_trc_dbg(format, arg...) do { } while (0)
 136 #define ena_trc_info(format, arg...) do { } while (0)
 137 #define ena_trc_warn(format, arg...) do { } while (0)
 138 #define ena_trc_err(format, arg...) do { } while (0)
 139 #endif /* RTE_LIBRTE_ENA_COM_DEBUG */
 140
 141 #define ENA_WARN(cond, format, arg...)                                 \
 142 do {                                                                   \
 143        if (unlikely(cond)) {                                           \
 144                ena_trc_err(                                            \
 145                        "Warn failed on %s:%s:%d:" format,              \
 146                        __FILE__, __func__, __LINE__, ##arg);           \
 147        }                                                               \
 148 } while (0)
 149
 150 /* Spinlock related methods */
 151 #define ena_spinlock_t rte_spinlock_t
 152 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&spinlock)
 153 #define ENA_SPINLOCK_LOCK(spinlock, flags)                              \
 154         ({(void)flags; rte_spinlock_lock(&spinlock); })
 155 #define ENA_SPINLOCK_UNLOCK(spinlock, flags)                            \
 156         ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
 157
 158 #define q_waitqueue_t                   \
 159         struct {                        \
 160                 pthread_cond_t cond;    \
 161                 pthread_mutex_t mutex;  \
 162         }
 163
 164 #define ena_wait_queue_t q_waitqueue_t
 165
 166 #define ENA_WAIT_EVENT_INIT(waitqueue)                                  \
 167         do {                                                            \
 168                 pthread_mutex_init(&(waitqueue).mutex, NULL);           \
 169                 pthread_cond_init(&(waitqueue).cond, NULL);             \
 170         } while (0)
 171
 172 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout)                         \
 173         do {                                                            \
 174                 struct timespec wait;                                   \
 175                 struct timeval now;                                     \
 176                 unsigned long timeout_us;                               \
 177                 gettimeofday(&now, NULL);                               \
 178                 wait.tv_sec = now.tv_sec + timeout / 1000000UL;         \
 179                 timeout_us = timeout % 1000000UL;                       \
 180                 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL;     \
 181                 pthread_mutex_lock(&waitevent.mutex);                   \
 182                 pthread_cond_timedwait(&waitevent.cond,                 \
 183                                 &waitevent.mutex, &wait);               \
 184                 pthread_mutex_unlock(&waitevent.mutex);                 \
 185         } while (0)
 186 #define ENA_WAIT_EVENT_SIGNAL(waitevent) pthread_cond_signal(&waitevent.cond)
 187 /* pthread condition doesn't need to be rearmed after usage */
 188 #define ENA_WAIT_EVENT_CLEAR(...)
 189 #define ENA_WAIT_EVENT_DESTROY(waitqueue) ((void)(waitqueue))
 190
 191 #define ena_wait_event_t ena_wait_queue_t
 192 #define ENA_MIGHT_SLEEP()
 193
 194 #define ENA_TIME_EXPIRE(timeout)  (timeout < rte_get_timer_cycles())
 195 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us)                             \
 196        (timeout_us * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
 197
 198 /*
 199  * Each rte_memzone should have unique name.
 200  * To satisfy it, count number of allocations and add it to name.
 201  */
 202 extern uint32_t ena_alloc_cnt;
 203
 204 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, handle)        \
 205         do {                                                            \
 206                 const struct rte_memzone *mz;                           \
 207                 char z_name[RTE_MEMZONE_NAMESIZE];                      \
 208                 ENA_TOUCH(dmadev); ENA_TOUCH(handle);                   \
 209                 snprintf(z_name, sizeof(z_name),                        \
 210                                 "ena_alloc_%d", ena_alloc_cnt++);       \
 211                 mz = rte_memzone_reserve(z_name, size, SOCKET_ID_ANY,   \
 212                                 RTE_MEMZONE_IOVA_CONTIG);               \
 213                 handle = mz;                                            \
 214                 if (mz == NULL) {                                       \
 215                         virt = NULL;                                    \
 216                         phys = 0;                                       \
 217                 } else {                                                \
 218                         memset(mz->addr, 0, size);                      \
 219                         virt = mz->addr;                                \
 220                         phys = mz->iova;                                \
 221                 }                                                       \
 222         } while (0)
 223 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, handle)         \
 224                 ({ ENA_TOUCH(size); ENA_TOUCH(phys);                    \
 225                    ENA_TOUCH(dmadev);                                   \
 226                    rte_memzone_free(handle); })
 227
 228 #define ENA_MEM_ALLOC_COHERENT_NODE(                                    \
 229         dmadev, size, virt, phys, mem_handle, node, dev_node)           \
 230         do {                                                            \
 231                 const struct rte_memzone *mz;                           \
 232                 char z_name[RTE_MEMZONE_NAMESIZE];                      \
 233                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                 \
 234                 snprintf(z_name, sizeof(z_name),                        \
 235                                 "ena_alloc_%d", ena_alloc_cnt++);       \
 236                 mz = rte_memzone_reserve(z_name, size, node,            \
 237                                 RTE_MEMZONE_IOVA_CONTIG);               \
 238                 if (mz == NULL) {                                       \
 239                         virt = NULL;                                    \
 240                         phys = 0;                                       \
 241                 } else {                                                \
 242                         memset(mz->addr, 0, size);                      \
 243                         virt = mz->addr;                                \
 244                         phys = mz->iova;                                \
 245                 }                                                       \
 246                 (void)mem_handle;                                       \
 247         } while (0)
 248
 249 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) \
 250         do {                                                            \
 251                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                 \
 252                 virt = rte_zmalloc_socket(NULL, size, 0, node);         \
 253         } while (0)
 254
 255 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
 256 #define ENA_MEM_FREE(dmadev, ptr) ({ENA_TOUCH(dmadev); rte_free(ptr); })
 257
 258 #define ENA_REG_WRITE32(bus, value, reg)                                \
 259         ({ (void)(bus); rte_write32_relaxed((value), (reg)); })
 260 #define ENA_REG_READ32(bus, reg)                                        \
 261         ({ (void)(bus); rte_read32_relaxed((reg)); })
 262
 263 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
 264 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
 265 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
 266 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
 267
 268 #define msleep(x) rte_delay_us(x * 1000)
 269 #define udelay(x) rte_delay_us(x)
 270
 271 #define MAX_ERRNO       4095
 272 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
 273 #define ERR_PTR(error) ((void *)(long)error)
 274 #define PTR_ERR(error) ((long)(void *)error)
 275 #define might_sleep()
 276
 277 #define lower_32_bits(x) ((uint32_t)(x))
 278 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
 279
 280 #ifndef READ_ONCE
 281 #define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
 282 #endif
 283
 284 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */