common/mlx5: fix default devargs initialization
[dpdk.git] / drivers / net / ena / base / ena_plat_dpdk.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
3  * All rights reserved.
4  */
5
6 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
7 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
8
9 #include <stdbool.h>
10 #include <stdlib.h>
11 #include <pthread.h>
12 #include <stdint.h>
13 #include <inttypes.h>
14 #include <string.h>
15 #include <errno.h>
16
17 #include <ethdev_driver.h>
18 #include <rte_atomic.h>
19 #include <rte_branch_prediction.h>
20 #include <rte_cycles.h>
21 #include <rte_io.h>
22 #include <rte_log.h>
23 #include <rte_malloc.h>
24 #include <rte_memzone.h>
25 #include <rte_prefetch.h>
26 #include <rte_spinlock.h>
27
28 #include <sys/time.h>
29 #include <rte_memcpy.h>
30
31 typedef uint64_t u64;
32 typedef uint32_t u32;
33 typedef uint16_t u16;
34 typedef uint8_t u8;
35
36 typedef struct rte_eth_dev ena_netdev;
37 typedef uint64_t dma_addr_t;
38
39 #ifndef ETIME
40 #define ETIME ETIMEDOUT
41 #endif
42
43 #define ENA_PRIu64 PRIu64
44 #define ena_atomic32_t rte_atomic32_t
45 #define ena_mem_handle_t const struct rte_memzone *
46
47 #define SZ_256 (256U)
48 #define SZ_4K (4096U)
49
50 #define ENA_COM_OK      0
51 #define ENA_COM_NO_MEM  -ENOMEM
52 #define ENA_COM_INVAL   -EINVAL
53 #define ENA_COM_NO_SPACE        -ENOSPC
54 #define ENA_COM_NO_DEVICE       -ENODEV
55 #define ENA_COM_TIMER_EXPIRED   -ETIME
56 #define ENA_COM_FAULT   -EFAULT
57 #define ENA_COM_TRY_AGAIN       -EAGAIN
58 #define ENA_COM_UNSUPPORTED    -EOPNOTSUPP
59 #define ENA_COM_EIO    -EIO
60
61 #define ____cacheline_aligned __rte_cache_aligned
62
63 #define ENA_ABORT() abort()
64
65 #define ENA_MSLEEP(x) rte_delay_us_sleep(x * 1000)
66 #define ENA_USLEEP(x) rte_delay_us_sleep(x)
67 #define ENA_UDELAY(x) rte_delay_us_block(x)
68
69 #define ENA_TOUCH(x) ((void)(x))
70 /* Redefine memcpy with caution: rte_memcpy can be simply aliased to memcpy, so
71  * make the redefinition only if it's safe (and beneficial) to do so.
72  */
73 #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64_MEMCPY) || \
74         defined(RTE_ARCH_ARM_NEON_MEMCPY)
75 #undef memcpy
76 #define memcpy rte_memcpy
77 #endif
78 #define wmb rte_wmb
79 #define rmb rte_rmb
80 #define mb rte_mb
81 #define mmiowb rte_io_wmb
82 #define __iomem
83
84 #ifndef READ_ONCE
85 #define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
86 #endif
87
88 #define READ_ONCE8(var) READ_ONCE(var)
89 #define READ_ONCE16(var) READ_ONCE(var)
90 #define READ_ONCE32(var) READ_ONCE(var)
91
92 #define US_PER_S 1000000
93 #define ENA_GET_SYSTEM_USECS()                                                 \
94         (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
95
96 extern int ena_logtype_com;
97
98 #define ENA_MAX_T(type, x, y) RTE_MAX((type)(x), (type)(y))
99 #define ENA_MAX32(x, y) ENA_MAX_T(uint32_t, (x), (y))
100 #define ENA_MAX16(x, y) ENA_MAX_T(uint16_t, (x), (y))
101 #define ENA_MAX8(x, y) ENA_MAX_T(uint8_t, (x), (y))
102 #define ENA_MIN_T(type, x, y) RTE_MIN((type)(x), (type)(y))
103 #define ENA_MIN32(x, y) ENA_MIN_T(uint32_t, (x), (y))
104 #define ENA_MIN16(x, y) ENA_MIN_T(uint16_t, (x), (y))
105 #define ENA_MIN8(x, y) ENA_MIN_T(uint8_t, (x), (y))
106
107 #define BITS_PER_LONG_LONG (__SIZEOF_LONG_LONG__ * 8)
108 #define U64_C(x) x ## ULL
109 #define BIT(nr)         (1UL << (nr))
110 #define BITS_PER_LONG   (__SIZEOF_LONG__ * 8)
111 #define GENMASK(h, l)   (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
112 #define GENMASK_ULL(h, l) (((~0ULL) - (1ULL << (l)) + 1) &                     \
113                           (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
114
115 #define ena_trc_log(dev, level, fmt, arg...)                                   \
116         (                                                                      \
117                 ENA_TOUCH(dev),                                                \
118                 rte_log(RTE_LOG_ ## level, ena_logtype_com,                    \
119                         "[ENA_COM: %s]" fmt, __func__, ##arg)                  \
120         )
121
122 #define ena_trc_dbg(dev, format, arg...) ena_trc_log(dev, DEBUG, format, ##arg)
123 #define ena_trc_info(dev, format, arg...) ena_trc_log(dev, INFO, format, ##arg)
124 #define ena_trc_warn(dev, format, arg...)                                      \
125         ena_trc_log(dev, WARNING, format, ##arg)
126 #define ena_trc_err(dev, format, arg...) ena_trc_log(dev, ERR, format, ##arg)
127
128 #define ENA_WARN(cond, dev, format, arg...)                                    \
129         do {                                                                   \
130                 if (unlikely(cond)) {                                          \
131                         ena_trc_err(dev,                                       \
132                                 "Warn failed on %s:%s:%d:" format,             \
133                                 __FILE__, __func__, __LINE__, ##arg);          \
134                 }                                                              \
135         } while (0)
136
137 /* Spinlock related methods */
138 #define ena_spinlock_t rte_spinlock_t
139 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&(spinlock))
140 #define ENA_SPINLOCK_LOCK(spinlock, flags)                                     \
141         ({(void)flags; rte_spinlock_lock(&(spinlock)); })
142 #define ENA_SPINLOCK_UNLOCK(spinlock, flags)                                   \
143         ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
144 #define ENA_SPINLOCK_DESTROY(spinlock) ((void)(spinlock))
145
146 typedef struct {
147         pthread_cond_t cond;
148         pthread_mutex_t mutex;
149         uint8_t flag;
150 } ena_wait_event_t;
151
152 #define ENA_WAIT_EVENT_INIT(waitevent)                                         \
153         do {                                                                   \
154                 ena_wait_event_t *_we = &(waitevent);                          \
155                 pthread_mutex_init(&_we->mutex, NULL);                         \
156                 pthread_cond_init(&_we->cond, NULL);                           \
157                 _we->flag = 0;                                                 \
158         } while (0)
159
160 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout)                                \
161         do {                                                                   \
162                 ena_wait_event_t *_we = &(waitevent);                          \
163                 typeof(timeout) _tmo = (timeout);                              \
164                 int ret = 0;                                                   \
165                 struct timespec wait;                                          \
166                 struct timeval now;                                            \
167                 unsigned long timeout_us;                                      \
168                 gettimeofday(&now, NULL);                                      \
169                 wait.tv_sec = now.tv_sec + _tmo / 1000000UL;                   \
170                 timeout_us = _tmo % 1000000UL;                                 \
171                 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL;            \
172                 pthread_mutex_lock(&_we->mutex);                               \
173                 while (ret == 0 && !_we->flag) {                               \
174                         ret = pthread_cond_timedwait(&_we->cond,               \
175                                 &_we->mutex, &wait);                           \
176                 }                                                              \
177                 /* Asserts only if not working on ena_wait_event_t */          \
178                 if (unlikely(ret != 0 && ret != ETIMEDOUT))                    \
179                         ena_trc_err(NULL,                                      \
180                                 "Invalid wait event. pthread ret: %d\n", ret); \
181                 else if (unlikely(ret == ETIMEDOUT))                           \
182                         ena_trc_err(NULL,                                      \
183                                 "Timeout waiting for " #waitevent "\n");       \
184                 _we->flag = 0;                                                 \
185                 pthread_mutex_unlock(&_we->mutex);                             \
186         } while (0)
187 #define ENA_WAIT_EVENT_SIGNAL(waitevent)                                       \
188         do {                                                                   \
189                 ena_wait_event_t *_we = &(waitevent);                          \
190                 pthread_mutex_lock(&_we->mutex);                               \
191                 _we->flag = 1;                                                 \
192                 pthread_cond_signal(&_we->cond);                               \
193                 pthread_mutex_unlock(&_we->mutex);                             \
194         } while (0)
195 /* pthread condition doesn't need to be rearmed after usage */
196 #define ENA_WAIT_EVENT_CLEAR(...)
197 #define ENA_WAIT_EVENT_DESTROY(waitevent) ((void)(waitevent))
198
199 #define ENA_MIGHT_SLEEP()
200
201 #define ena_time_t uint64_t
202 #define ENA_TIME_EXPIRE(timeout)  (timeout < rte_get_timer_cycles())
203 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us)                                     \
204         ((timeout_us) * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
205
206 const struct rte_memzone *
207 ena_mem_alloc_coherent(struct rte_eth_dev_data *data, size_t size,
208                        int socket_id, unsigned int alignment, void **virt_addr,
209                        dma_addr_t *phys_addr);
210
211 #define ENA_MEM_ALLOC_COHERENT_ALIGNED(                                        \
212         dmadev, size, virt, phys, mem_handle, alignment)                       \
213         do {                                                                   \
214                 void *virt_addr;                                               \
215                 dma_addr_t phys_addr;                                          \
216                 (mem_handle) = ena_mem_alloc_coherent((dmadev), (size),        \
217                         SOCKET_ID_ANY, (alignment), &virt_addr, &phys_addr);   \
218                 (virt) = virt_addr;                                            \
219                 (phys) = phys_addr;                                            \
220         } while (0)
221 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, mem_handle)           \
222                 ENA_MEM_ALLOC_COHERENT_ALIGNED(dmadev, size, virt, phys,       \
223                         mem_handle, RTE_CACHE_LINE_SIZE)
224 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, mem_handle)            \
225                 ({ ENA_TOUCH(size); ENA_TOUCH(phys); ENA_TOUCH(dmadev);        \
226                    rte_memzone_free(mem_handle); })
227
228 #define ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED(                                   \
229         dmadev, size, virt, phys, mem_handle, node, dev_node, alignment)       \
230         do {                                                                   \
231                 void *virt_addr;                                               \
232                 dma_addr_t phys_addr;                                          \
233                 ENA_TOUCH(dev_node);                                           \
234                 (mem_handle) = ena_mem_alloc_coherent((dmadev), (size),        \
235                         (node), (alignment), &virt_addr, &phys_addr);      \
236                 (virt) = virt_addr;                                            \
237                 (phys) = phys_addr;                                            \
238         } while (0)
239 #define ENA_MEM_ALLOC_COHERENT_NODE(                                           \
240         dmadev, size, virt, phys, mem_handle, node, dev_node)                  \
241                 ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED(dmadev, size, virt, phys,  \
242                         mem_handle, node, dev_node, RTE_CACHE_LINE_SIZE)
243 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node)                 \
244         do {                                                                   \
245                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                        \
246                 virt = rte_zmalloc_socket(NULL, size, 0, node);                \
247         } while (0)
248
249 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
250 #define ENA_MEM_FREE(dmadev, ptr, size)                                        \
251         ({ ENA_TOUCH(dmadev); ENA_TOUCH(size); rte_free(ptr); })
252
253 #define ENA_DB_SYNC(mem_handle) ((void)mem_handle)
254
255 #define ENA_REG_WRITE32(bus, value, reg)                                       \
256         ({ (void)(bus); rte_write32((value), (reg)); })
257 #define ENA_REG_WRITE32_RELAXED(bus, value, reg)                               \
258         ({ (void)(bus); rte_write32_relaxed((value), (reg)); })
259 #define ENA_REG_READ32(bus, reg)                                               \
260         ({ (void)(bus); rte_read32_relaxed((reg)); })
261
262 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
263 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
264 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
265 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
266
267 #define msleep(x) rte_delay_us(x * 1000)
268 #define udelay(x) rte_delay_us(x)
269
270 #define dma_rmb() rmb()
271
272 #define MAX_ERRNO       4095
273 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
274 #define ERR_PTR(error) ((void *)(long)error)
275 #define PTR_ERR(error) ((long)(void *)error)
276 #define might_sleep()
277
278 #define prefetch(x) rte_prefetch0(x)
279 #define prefetchw(x) rte_prefetch0_write(x)
280
281 #define lower_32_bits(x) ((uint32_t)(x))
282 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
283
284 #define ENA_TIME_EXPIRE(timeout)  (timeout < rte_get_timer_cycles())
285 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us)                                     \
286         ((timeout_us) * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
287 #define ENA_WAIT_EVENTS_DESTROY(admin_queue) ((void)(admin_queue))
288
289 /* The size must be 8 byte align */
290 #define ENA_MEMCPY_TO_DEVICE_64(dst, src, size)                                \
291         do {                                                                   \
292                 int count, i;                                                  \
293                 uint64_t *to = (uint64_t *)(dst);                              \
294                 const uint64_t *from = (const uint64_t *)(src);                \
295                 count = (size) / 8;                                            \
296                 for (i = 0; i < count; i++, from++, to++)                      \
297                         rte_write64_relaxed(*from, to);                        \
298         } while(0)
299
300 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
301
302 #define ENA_FFS(x) ffs(x)
303
304 void ena_rss_key_fill(void *key, size_t size);
305
306 #define ENA_RSS_FILL_KEY(key, size) ena_rss_key_fill(key, size)
307
308 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS_PLAT 0
309
310 #include "ena_includes.h"
311 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */