1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2019 Amazon.com, Inc. or its affiliates.
6 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
7 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
16 #include <rte_atomic.h>
17 #include <rte_branch_prediction.h>
18 #include <rte_cycles.h>
21 #include <rte_malloc.h>
22 #include <rte_memzone.h>
23 #include <rte_prefetch.h>
24 #include <rte_spinlock.h>
33 typedef uint64_t dma_addr_t;
35 #define ETIME ETIMEDOUT
38 #define ena_atomic32_t rte_atomic32_t
39 #define ena_mem_handle_t const struct rte_memzone *
45 #define ENA_COM_NO_MEM -ENOMEM
46 #define ENA_COM_INVAL -EINVAL
47 #define ENA_COM_NO_SPACE -ENOSPC
48 #define ENA_COM_NO_DEVICE -ENODEV
49 #define ENA_COM_TIMER_EXPIRED -ETIME
50 #define ENA_COM_FAULT -EFAULT
51 #define ENA_COM_TRY_AGAIN -EAGAIN
52 #define ENA_COM_UNSUPPORTED -EOPNOTSUPP
54 #define ____cacheline_aligned __rte_cache_aligned
56 #define ENA_ABORT() abort()
58 #define ENA_MSLEEP(x) rte_delay_ms(x)
59 #define ENA_UDELAY(x) rte_delay_us(x)
61 #define ENA_TOUCH(x) ((void)(x))
62 #define memcpy_toio memcpy
66 #define mmiowb rte_io_wmb
69 #define US_PER_S 1000000
70 #define ENA_GET_SYSTEM_USECS() \
71 (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
73 extern int ena_logtype_com;
74 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
75 #define ENA_ASSERT(cond, format, arg...) \
77 if (unlikely(!(cond))) { \
78 rte_log(RTE_LOGTYPE_ERR, ena_logtype_com, \
80 rte_panic("line %d\tassert \"" #cond "\"" \
81 "failed\n", __LINE__); \
85 #define ENA_ASSERT(cond, format, arg...) do {} while (0)
88 #define ENA_MAX32(x, y) RTE_MAX((x), (y))
89 #define ENA_MAX16(x, y) RTE_MAX((x), (y))
90 #define ENA_MAX8(x, y) RTE_MAX((x), (y))
91 #define ENA_MIN32(x, y) RTE_MIN((x), (y))
92 #define ENA_MIN16(x, y) RTE_MIN((x), (y))
93 #define ENA_MIN8(x, y) RTE_MIN((x), (y))
95 #define BITS_PER_LONG_LONG (__SIZEOF_LONG_LONG__ * 8)
96 #define U64_C(x) x ## ULL
97 #define BIT(nr) (1UL << (nr))
98 #define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
99 #define GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
100 #define GENMASK_ULL(h, l) (((~0ULL) - (1ULL << (l)) + 1) & \
101 (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
103 #ifdef RTE_LIBRTE_ENA_COM_DEBUG
104 #define ena_trc_log(level, fmt, arg...) \
105 rte_log(RTE_LOG_ ## level, ena_logtype_com, \
106 "[ENA_COM: %s]" fmt, __func__, ##arg)
108 #define ena_trc_dbg(format, arg...) ena_trc_log(DEBUG, format, ##arg)
109 #define ena_trc_info(format, arg...) ena_trc_log(INFO, format, ##arg)
110 #define ena_trc_warn(format, arg...) ena_trc_log(WARNING, format, ##arg)
111 #define ena_trc_err(format, arg...) ena_trc_log(ERR, format, ##arg)
113 #define ena_trc_dbg(format, arg...) do { } while (0)
114 #define ena_trc_info(format, arg...) do { } while (0)
115 #define ena_trc_warn(format, arg...) do { } while (0)
116 #define ena_trc_err(format, arg...) do { } while (0)
117 #endif /* RTE_LIBRTE_ENA_COM_DEBUG */
119 #define ENA_WARN(cond, format, arg...) \
121 if (unlikely(cond)) { \
123 "Warn failed on %s:%s:%d:" format, \
124 __FILE__, __func__, __LINE__, ##arg); \
128 /* Spinlock related methods */
129 #define ena_spinlock_t rte_spinlock_t
130 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&spinlock)
131 #define ENA_SPINLOCK_LOCK(spinlock, flags) \
132 ({(void)flags; rte_spinlock_lock(&spinlock); })
133 #define ENA_SPINLOCK_UNLOCK(spinlock, flags) \
134 ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
135 #define ENA_SPINLOCK_DESTROY(spinlock) ((void)spinlock)
137 #define q_waitqueue_t \
139 pthread_cond_t cond; \
140 pthread_mutex_t mutex; \
143 #define ena_wait_queue_t q_waitqueue_t
145 #define ENA_WAIT_EVENT_INIT(waitqueue) \
147 pthread_mutex_init(&(waitqueue).mutex, NULL); \
148 pthread_cond_init(&(waitqueue).cond, NULL); \
151 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout) \
153 struct timespec wait; \
154 struct timeval now; \
155 unsigned long timeout_us; \
156 gettimeofday(&now, NULL); \
157 wait.tv_sec = now.tv_sec + timeout / 1000000UL; \
158 timeout_us = timeout % 1000000UL; \
159 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL; \
160 pthread_mutex_lock(&waitevent.mutex); \
161 pthread_cond_timedwait(&waitevent.cond, \
162 &waitevent.mutex, &wait); \
163 pthread_mutex_unlock(&waitevent.mutex); \
165 #define ENA_WAIT_EVENT_SIGNAL(waitevent) pthread_cond_signal(&waitevent.cond)
166 /* pthread condition doesn't need to be rearmed after usage */
167 #define ENA_WAIT_EVENT_CLEAR(...)
168 #define ENA_WAIT_EVENT_DESTROY(waitqueue) ((void)(waitqueue))
170 #define ena_wait_event_t ena_wait_queue_t
171 #define ENA_MIGHT_SLEEP()
173 #define ENA_TIME_EXPIRE(timeout) (timeout < rte_get_timer_cycles())
174 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us) \
175 (timeout_us * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
178 * Each rte_memzone should have unique name.
179 * To satisfy it, count number of allocations and add it to name.
181 extern uint32_t ena_alloc_cnt;
183 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, handle) \
185 const struct rte_memzone *mz; \
186 char z_name[RTE_MEMZONE_NAMESIZE]; \
187 ENA_TOUCH(dmadev); ENA_TOUCH(handle); \
188 snprintf(z_name, sizeof(z_name), \
189 "ena_alloc_%d", ena_alloc_cnt++); \
190 mz = rte_memzone_reserve(z_name, size, SOCKET_ID_ANY, \
191 RTE_MEMZONE_IOVA_CONTIG); \
197 memset(mz->addr, 0, size); \
202 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, handle) \
203 ({ ENA_TOUCH(size); ENA_TOUCH(phys); \
205 rte_memzone_free(handle); })
207 #define ENA_MEM_ALLOC_COHERENT_NODE( \
208 dmadev, size, virt, phys, mem_handle, node, dev_node) \
210 const struct rte_memzone *mz; \
211 char z_name[RTE_MEMZONE_NAMESIZE]; \
212 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \
213 snprintf(z_name, sizeof(z_name), \
214 "ena_alloc_%d", ena_alloc_cnt++); \
215 mz = rte_memzone_reserve(z_name, size, node, \
216 RTE_MEMZONE_IOVA_CONTIG); \
222 memset(mz->addr, 0, size); \
228 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) \
230 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \
231 virt = rte_zmalloc_socket(NULL, size, 0, node); \
234 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
235 #define ENA_MEM_FREE(dmadev, ptr) ({ENA_TOUCH(dmadev); rte_free(ptr); })
237 #define ENA_DB_SYNC(mem_handle) ((void)mem_handle)
239 #define ENA_REG_WRITE32(bus, value, reg) \
240 ({ (void)(bus); rte_write32((value), (reg)); })
241 #define ENA_REG_WRITE32_RELAXED(bus, value, reg) \
242 ({ (void)(bus); rte_write32_relaxed((value), (reg)); })
243 #define ENA_REG_READ32(bus, reg) \
244 ({ (void)(bus); rte_read32_relaxed((reg)); })
246 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
247 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
248 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
249 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
251 #define msleep(x) rte_delay_us(x * 1000)
252 #define udelay(x) rte_delay_us(x)
254 #define dma_rmb() rmb()
256 #define MAX_ERRNO 4095
257 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
258 #define ERR_PTR(error) ((void *)(long)error)
259 #define PTR_ERR(error) ((long)(void *)error)
260 #define might_sleep()
262 #define prefetch(x) rte_prefetch0(x)
264 #define lower_32_bits(x) ((uint32_t)(x))
265 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
267 #define ENA_TIME_EXPIRE(timeout) (timeout < rte_get_timer_cycles())
268 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us) \
269 (timeout_us * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
270 #define ENA_WAIT_EVENT_DESTROY(waitqueue) ((void)(waitqueue))
273 #define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
276 #define READ_ONCE8(var) READ_ONCE(var)
277 #define READ_ONCE16(var) READ_ONCE(var)
278 #define READ_ONCE32(var) READ_ONCE(var)
280 /* The size must be 8 byte align */
281 #define ENA_MEMCPY_TO_DEVICE_64(dst, src, size) \
284 uint64_t *to = (uint64_t *)(dst); \
285 const uint64_t *from = (const uint64_t *)(src); \
286 count = (size) / 8; \
287 for (i = 0; i < count; i++, from++, to++) \
288 rte_write64_relaxed(*from, to); \
291 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
293 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */