1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
6 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
7 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
17 #include <rte_atomic.h>
18 #include <rte_branch_prediction.h>
19 #include <rte_cycles.h>
22 #include <rte_malloc.h>
23 #include <rte_memzone.h>
24 #include <rte_prefetch.h>
25 #include <rte_spinlock.h>
34 typedef uint64_t dma_addr_t;
36 #define ETIME ETIMEDOUT
39 #define ena_atomic32_t rte_atomic32_t
40 #define ena_mem_handle_t const struct rte_memzone *
46 #define ENA_COM_NO_MEM -ENOMEM
47 #define ENA_COM_INVAL -EINVAL
48 #define ENA_COM_NO_SPACE -ENOSPC
49 #define ENA_COM_NO_DEVICE -ENODEV
50 #define ENA_COM_TIMER_EXPIRED -ETIME
51 #define ENA_COM_FAULT -EFAULT
52 #define ENA_COM_TRY_AGAIN -EAGAIN
53 #define ENA_COM_UNSUPPORTED -EOPNOTSUPP
54 #define ENA_COM_EIO -EIO
56 #define ____cacheline_aligned __rte_cache_aligned
58 #define ENA_ABORT() abort()
60 #define ENA_MSLEEP(x) rte_delay_us_sleep(x * 1000)
61 #define ENA_USLEEP(x) rte_delay_us_sleep(x)
62 #define ENA_UDELAY(x) rte_delay_us_block(x)
64 #define ENA_TOUCH(x) ((void)(x))
65 #define memcpy_toio memcpy
69 #define mmiowb rte_io_wmb
72 #define US_PER_S 1000000
73 #define ENA_GET_SYSTEM_USECS() \
74 (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
76 extern int ena_logtype_com;
78 #define ENA_MAX_T(type, x, y) RTE_MAX((type)(x), (type)(y))
79 #define ENA_MAX32(x, y) ENA_MAX_T(uint32_t, (x), (y))
80 #define ENA_MAX16(x, y) ENA_MAX_T(uint16_t, (x), (y))
81 #define ENA_MAX8(x, y) ENA_MAX_T(uint8_t, (x), (y))
82 #define ENA_MIN_T(type, x, y) RTE_MIN((type)(x), (type)(y))
83 #define ENA_MIN32(x, y) ENA_MIN_T(uint32_t, (x), (y))
84 #define ENA_MIN16(x, y) ENA_MIN_T(uint16_t, (x), (y))
85 #define ENA_MIN8(x, y) ENA_MIN_T(uint8_t, (x), (y))
87 #define BITS_PER_LONG_LONG (__SIZEOF_LONG_LONG__ * 8)
88 #define U64_C(x) x ## ULL
89 #define BIT(nr) (1UL << (nr))
90 #define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
91 #define GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
92 #define GENMASK_ULL(h, l) (((~0ULL) - (1ULL << (l)) + 1) & \
93 (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
95 #ifdef RTE_LIBRTE_ENA_COM_DEBUG
96 #define ena_trc_log(level, fmt, arg...) \
97 rte_log(RTE_LOG_ ## level, ena_logtype_com, \
98 "[ENA_COM: %s]" fmt, __func__, ##arg)
100 #define ena_trc_dbg(format, arg...) ena_trc_log(DEBUG, format, ##arg)
101 #define ena_trc_info(format, arg...) ena_trc_log(INFO, format, ##arg)
102 #define ena_trc_warn(format, arg...) ena_trc_log(WARNING, format, ##arg)
103 #define ena_trc_err(format, arg...) ena_trc_log(ERR, format, ##arg)
105 #define ena_trc_dbg(format, arg...) do { } while (0)
106 #define ena_trc_info(format, arg...) do { } while (0)
107 #define ena_trc_warn(format, arg...) do { } while (0)
108 #define ena_trc_err(format, arg...) do { } while (0)
109 #endif /* RTE_LIBRTE_ENA_COM_DEBUG */
111 #define ENA_WARN(cond, format, arg...) \
113 if (unlikely(cond)) { \
115 "Warn failed on %s:%s:%d:" format, \
116 __FILE__, __func__, __LINE__, ##arg); \
120 /* Spinlock related methods */
121 #define ena_spinlock_t rte_spinlock_t
122 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&spinlock)
123 #define ENA_SPINLOCK_LOCK(spinlock, flags) \
124 ({(void)flags; rte_spinlock_lock(&spinlock); })
125 #define ENA_SPINLOCK_UNLOCK(spinlock, flags) \
126 ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
127 #define ENA_SPINLOCK_DESTROY(spinlock) ((void)spinlock)
129 #define q_waitqueue_t \
131 pthread_cond_t cond; \
132 pthread_mutex_t mutex; \
135 #define ena_wait_queue_t q_waitqueue_t
137 #define ENA_WAIT_EVENT_INIT(waitqueue) \
139 pthread_mutex_init(&(waitqueue).mutex, NULL); \
140 pthread_cond_init(&(waitqueue).cond, NULL); \
143 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout) \
145 struct timespec wait; \
146 struct timeval now; \
147 unsigned long timeout_us; \
148 gettimeofday(&now, NULL); \
149 wait.tv_sec = now.tv_sec + timeout / 1000000UL; \
150 timeout_us = timeout % 1000000UL; \
151 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL; \
152 pthread_mutex_lock(&waitevent.mutex); \
153 pthread_cond_timedwait(&waitevent.cond, \
154 &waitevent.mutex, &wait); \
155 pthread_mutex_unlock(&waitevent.mutex); \
157 #define ENA_WAIT_EVENT_SIGNAL(waitevent) pthread_cond_signal(&waitevent.cond)
158 /* pthread condition doesn't need to be rearmed after usage */
159 #define ENA_WAIT_EVENT_CLEAR(...)
160 #define ENA_WAIT_EVENT_DESTROY(waitqueue) ((void)(waitqueue))
162 #define ena_wait_event_t ena_wait_queue_t
163 #define ENA_MIGHT_SLEEP()
165 #define ena_time_t uint64_t
166 #define ENA_TIME_EXPIRE(timeout) (timeout < rte_get_timer_cycles())
167 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us) \
168 (timeout_us * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
171 * Each rte_memzone should have unique name.
172 * To satisfy it, count number of allocations and add it to name.
174 extern rte_atomic32_t ena_alloc_cnt;
176 #define ENA_MEM_ALLOC_COHERENT_ALIGNED( \
177 dmadev, size, virt, phys, handle, alignment) \
179 const struct rte_memzone *mz = NULL; \
180 ENA_TOUCH(dmadev); ENA_TOUCH(handle); \
182 char z_name[RTE_MEMZONE_NAMESIZE]; \
183 snprintf(z_name, sizeof(z_name), \
185 rte_atomic32_add_return(&ena_alloc_cnt, 1)); \
186 mz = rte_memzone_reserve_aligned(z_name, size, \
188 RTE_MEMZONE_IOVA_CONTIG, \
196 memset(mz->addr, 0, size); \
201 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, handle) \
202 ENA_MEM_ALLOC_COHERENT_ALIGNED( \
209 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, handle) \
210 ({ ENA_TOUCH(size); ENA_TOUCH(phys); \
212 rte_memzone_free(handle); })
214 #define ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED( \
215 dmadev, size, virt, phys, mem_handle, node, dev_node, alignment) \
217 const struct rte_memzone *mz = NULL; \
218 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \
220 char z_name[RTE_MEMZONE_NAMESIZE]; \
221 snprintf(z_name, sizeof(z_name), \
223 rte_atomic32_add_return(&ena_alloc_cnt, 1)); \
224 mz = rte_memzone_reserve_aligned(z_name, size, node, \
225 RTE_MEMZONE_IOVA_CONTIG, alignment); \
232 memset(mz->addr, 0, size); \
237 #define ENA_MEM_ALLOC_COHERENT_NODE( \
238 dmadev, size, virt, phys, mem_handle, node, dev_node) \
239 ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED( \
248 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) \
250 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \
251 virt = rte_zmalloc_socket(NULL, size, 0, node); \
254 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
255 #define ENA_MEM_FREE(dmadev, ptr, size) \
256 ({ ENA_TOUCH(dmadev); ENA_TOUCH(size); rte_free(ptr); })
258 #define ENA_DB_SYNC(mem_handle) ((void)mem_handle)
260 #define ENA_REG_WRITE32(bus, value, reg) \
261 ({ (void)(bus); rte_write32((value), (reg)); })
262 #define ENA_REG_WRITE32_RELAXED(bus, value, reg) \
263 ({ (void)(bus); rte_write32_relaxed((value), (reg)); })
264 #define ENA_REG_READ32(bus, reg) \
265 ({ (void)(bus); rte_read32_relaxed((reg)); })
267 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
268 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
269 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
270 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
272 #define msleep(x) rte_delay_us(x * 1000)
273 #define udelay(x) rte_delay_us(x)
275 #define dma_rmb() rmb()
277 #define MAX_ERRNO 4095
278 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
279 #define ERR_PTR(error) ((void *)(long)error)
280 #define PTR_ERR(error) ((long)(void *)error)
281 #define might_sleep()
283 #define prefetch(x) rte_prefetch0(x)
284 #define prefetchw(x) prefetch(x)
286 #define lower_32_bits(x) ((uint32_t)(x))
287 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
289 #define ENA_TIME_EXPIRE(timeout) (timeout < rte_get_timer_cycles())
290 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us) \
291 (timeout_us * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
292 #define ENA_WAIT_EVENT_DESTROY(waitqueue) ((void)(waitqueue))
295 #define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
298 #define READ_ONCE8(var) READ_ONCE(var)
299 #define READ_ONCE16(var) READ_ONCE(var)
300 #define READ_ONCE32(var) READ_ONCE(var)
302 /* The size must be 8 byte align */
303 #define ENA_MEMCPY_TO_DEVICE_64(dst, src, size) \
306 uint64_t *to = (uint64_t *)(dst); \
307 const uint64_t *from = (const uint64_t *)(src); \
308 count = (size) / 8; \
309 for (i = 0; i < count; i++, from++, to++) \
310 rte_write64_relaxed(*from, to); \
313 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
315 #define ENA_FFS(x) ffs(x)
317 void ena_rss_key_fill(void *key, size_t size);
319 #define ENA_RSS_FILL_KEY(key, size) ena_rss_key_fill(key, size)
321 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS_PLAT 0
323 #define ENA_PRIu64 PRIu64
325 #include "ena_includes.h"
326 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */