net/mlx5: add free on completion queue
[dpdk.git] / drivers / net / ena / base / ena_plat_dpdk.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright (c) 2015-2019 Amazon.com, Inc. or its affiliates.
3  * All rights reserved.
4  */
5
6 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
7 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
8
9 #include <stdbool.h>
10 #include <stdlib.h>
11 #include <pthread.h>
12 #include <stdint.h>
13 #include <inttypes.h>
14 #include <string.h>
15 #include <errno.h>
16
17 #include <rte_atomic.h>
18 #include <rte_branch_prediction.h>
19 #include <rte_cycles.h>
20 #include <rte_io.h>
21 #include <rte_log.h>
22 #include <rte_malloc.h>
23 #include <rte_memzone.h>
24 #include <rte_prefetch.h>
25 #include <rte_spinlock.h>
26
27 #include <sys/time.h>
28
29 typedef uint64_t u64;
30 typedef uint32_t u32;
31 typedef uint16_t u16;
32 typedef uint8_t u8;
33
34 typedef uint64_t dma_addr_t;
35 #ifndef ETIME
36 #define ETIME ETIMEDOUT
37 #endif
38
39 #define ena_atomic32_t rte_atomic32_t
40 #define ena_mem_handle_t const struct rte_memzone *
41
42 #define SZ_256 (256U)
43 #define SZ_4K (4096U)
44
45 #define ENA_COM_OK      0
46 #define ENA_COM_NO_MEM  -ENOMEM
47 #define ENA_COM_INVAL   -EINVAL
48 #define ENA_COM_NO_SPACE        -ENOSPC
49 #define ENA_COM_NO_DEVICE       -ENODEV
50 #define ENA_COM_TIMER_EXPIRED   -ETIME
51 #define ENA_COM_FAULT   -EFAULT
52 #define ENA_COM_TRY_AGAIN       -EAGAIN
53 #define ENA_COM_UNSUPPORTED    -EOPNOTSUPP
54
55 #define ____cacheline_aligned __rte_cache_aligned
56
57 #define ENA_ABORT() abort()
58
59 #define ENA_MSLEEP(x) rte_delay_ms(x)
60 #define ENA_UDELAY(x) rte_delay_us(x)
61
62 #define ENA_TOUCH(x) ((void)(x))
63 #define memcpy_toio memcpy
64 #define wmb rte_wmb
65 #define rmb rte_rmb
66 #define mb rte_mb
67 #define mmiowb rte_io_wmb
68 #define __iomem
69
70 #define US_PER_S 1000000
71 #define ENA_GET_SYSTEM_USECS()                                          \
72         (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
73
74 extern int ena_logtype_com;
75 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
76 #define ENA_ASSERT(cond, format, arg...)                                \
77         do {                                                            \
78                 if (unlikely(!(cond))) {                                \
79                         rte_log(RTE_LOGTYPE_ERR, ena_logtype_com,       \
80                                 format, ##arg);                         \
81                         rte_panic("line %d\tassert \"" #cond "\""       \
82                                         "failed\n", __LINE__);          \
83                 }                                                       \
84         } while (0)
85 #else
86 #define ENA_ASSERT(cond, format, arg...) do {} while (0)
87 #endif
88
89 #define ENA_MAX32(x, y) RTE_MAX((x), (y))
90 #define ENA_MAX16(x, y) RTE_MAX((x), (y))
91 #define ENA_MAX8(x, y) RTE_MAX((x), (y))
92 #define ENA_MIN32(x, y) RTE_MIN((x), (y))
93 #define ENA_MIN16(x, y) RTE_MIN((x), (y))
94 #define ENA_MIN8(x, y) RTE_MIN((x), (y))
95
96 #define BITS_PER_LONG_LONG (__SIZEOF_LONG_LONG__ * 8)
97 #define U64_C(x) x ## ULL
98 #define BIT(nr)         (1UL << (nr))
99 #define BITS_PER_LONG   (__SIZEOF_LONG__ * 8)
100 #define GENMASK(h, l)   (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
101 #define GENMASK_ULL(h, l) (((~0ULL) - (1ULL << (l)) + 1) & \
102                           (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
103
104 #ifdef RTE_LIBRTE_ENA_COM_DEBUG
105 #define ena_trc_log(level, fmt, arg...) \
106         rte_log(RTE_LOG_ ## level, ena_logtype_com, \
107                 "[ENA_COM: %s]" fmt, __func__, ##arg)
108
109 #define ena_trc_dbg(format, arg...)     ena_trc_log(DEBUG, format, ##arg)
110 #define ena_trc_info(format, arg...)    ena_trc_log(INFO, format, ##arg)
111 #define ena_trc_warn(format, arg...)    ena_trc_log(WARNING, format, ##arg)
112 #define ena_trc_err(format, arg...)     ena_trc_log(ERR, format, ##arg)
113 #else
114 #define ena_trc_dbg(format, arg...) do { } while (0)
115 #define ena_trc_info(format, arg...) do { } while (0)
116 #define ena_trc_warn(format, arg...) do { } while (0)
117 #define ena_trc_err(format, arg...) do { } while (0)
118 #endif /* RTE_LIBRTE_ENA_COM_DEBUG */
119
120 #define ENA_WARN(cond, format, arg...)                                 \
121 do {                                                                   \
122        if (unlikely(cond)) {                                           \
123                ena_trc_err(                                            \
124                        "Warn failed on %s:%s:%d:" format,              \
125                        __FILE__, __func__, __LINE__, ##arg);           \
126        }                                                               \
127 } while (0)
128
129 /* Spinlock related methods */
130 #define ena_spinlock_t rte_spinlock_t
131 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&spinlock)
132 #define ENA_SPINLOCK_LOCK(spinlock, flags)                              \
133         ({(void)flags; rte_spinlock_lock(&spinlock); })
134 #define ENA_SPINLOCK_UNLOCK(spinlock, flags)                            \
135         ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
136 #define ENA_SPINLOCK_DESTROY(spinlock) ((void)spinlock)
137
138 #define q_waitqueue_t                   \
139         struct {                        \
140                 pthread_cond_t cond;    \
141                 pthread_mutex_t mutex;  \
142         }
143
144 #define ena_wait_queue_t q_waitqueue_t
145
146 #define ENA_WAIT_EVENT_INIT(waitqueue)                                  \
147         do {                                                            \
148                 pthread_mutex_init(&(waitqueue).mutex, NULL);           \
149                 pthread_cond_init(&(waitqueue).cond, NULL);             \
150         } while (0)
151
152 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout)                         \
153         do {                                                            \
154                 struct timespec wait;                                   \
155                 struct timeval now;                                     \
156                 unsigned long timeout_us;                               \
157                 gettimeofday(&now, NULL);                               \
158                 wait.tv_sec = now.tv_sec + timeout / 1000000UL;         \
159                 timeout_us = timeout % 1000000UL;                       \
160                 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL;     \
161                 pthread_mutex_lock(&waitevent.mutex);                   \
162                 pthread_cond_timedwait(&waitevent.cond,                 \
163                                 &waitevent.mutex, &wait);               \
164                 pthread_mutex_unlock(&waitevent.mutex);                 \
165         } while (0)
166 #define ENA_WAIT_EVENT_SIGNAL(waitevent) pthread_cond_signal(&waitevent.cond)
167 /* pthread condition doesn't need to be rearmed after usage */
168 #define ENA_WAIT_EVENT_CLEAR(...)
169 #define ENA_WAIT_EVENT_DESTROY(waitqueue) ((void)(waitqueue))
170
171 #define ena_wait_event_t ena_wait_queue_t
172 #define ENA_MIGHT_SLEEP()
173
174 #define ena_time_t uint64_t
175 #define ENA_TIME_EXPIRE(timeout)  (timeout < rte_get_timer_cycles())
176 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us)                             \
177        (timeout_us * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
178
179 /*
180  * Each rte_memzone should have unique name.
181  * To satisfy it, count number of allocations and add it to name.
182  */
183 extern uint32_t ena_alloc_cnt;
184
185 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, handle)        \
186         do {                                                            \
187                 const struct rte_memzone *mz;                           \
188                 char z_name[RTE_MEMZONE_NAMESIZE];                      \
189                 ENA_TOUCH(dmadev); ENA_TOUCH(handle);                   \
190                 snprintf(z_name, sizeof(z_name),                        \
191                                 "ena_alloc_%d", ena_alloc_cnt++);       \
192                 mz = rte_memzone_reserve(z_name, size, SOCKET_ID_ANY,   \
193                                 RTE_MEMZONE_IOVA_CONTIG);               \
194                 handle = mz;                                            \
195                 if (mz == NULL) {                                       \
196                         virt = NULL;                                    \
197                         phys = 0;                                       \
198                 } else {                                                \
199                         memset(mz->addr, 0, size);                      \
200                         virt = mz->addr;                                \
201                         phys = mz->iova;                                \
202                 }                                                       \
203         } while (0)
204 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, handle)         \
205                 ({ ENA_TOUCH(size); ENA_TOUCH(phys);                    \
206                    ENA_TOUCH(dmadev);                                   \
207                    rte_memzone_free(handle); })
208
209 #define ENA_MEM_ALLOC_COHERENT_NODE(                                    \
210         dmadev, size, virt, phys, mem_handle, node, dev_node)           \
211         do {                                                            \
212                 const struct rte_memzone *mz;                           \
213                 char z_name[RTE_MEMZONE_NAMESIZE];                      \
214                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                 \
215                 snprintf(z_name, sizeof(z_name),                        \
216                                 "ena_alloc_%d", ena_alloc_cnt++);       \
217                 mz = rte_memzone_reserve(z_name, size, node,            \
218                                 RTE_MEMZONE_IOVA_CONTIG);               \
219                 mem_handle = mz;                                        \
220                 if (mz == NULL) {                                       \
221                         virt = NULL;                                    \
222                         phys = 0;                                       \
223                 } else {                                                \
224                         memset(mz->addr, 0, size);                      \
225                         virt = mz->addr;                                \
226                         phys = mz->iova;                                \
227                 }                                                       \
228         } while (0)
229
230 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) \
231         do {                                                            \
232                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                 \
233                 virt = rte_zmalloc_socket(NULL, size, 0, node);         \
234         } while (0)
235
236 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
237 #define ENA_MEM_FREE(dmadev, ptr, size)                                 \
238         ({ ENA_TOUCH(dmadev); ENA_TOUCH(size); rte_free(ptr); })
239
240 #define ENA_DB_SYNC(mem_handle) ((void)mem_handle)
241
242 #define ENA_REG_WRITE32(bus, value, reg)                                \
243         ({ (void)(bus); rte_write32((value), (reg)); })
244 #define ENA_REG_WRITE32_RELAXED(bus, value, reg)                        \
245         ({ (void)(bus); rte_write32_relaxed((value), (reg)); })
246 #define ENA_REG_READ32(bus, reg)                                        \
247         ({ (void)(bus); rte_read32_relaxed((reg)); })
248
249 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
250 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
251 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
252 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
253
254 #define msleep(x) rte_delay_us(x * 1000)
255 #define udelay(x) rte_delay_us(x)
256
257 #define dma_rmb() rmb()
258
259 #define MAX_ERRNO       4095
260 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
261 #define ERR_PTR(error) ((void *)(long)error)
262 #define PTR_ERR(error) ((long)(void *)error)
263 #define might_sleep()
264
265 #define prefetch(x) rte_prefetch0(x)
266 #define prefetchw(x) prefetch(x)
267
268 #define lower_32_bits(x) ((uint32_t)(x))
269 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
270
271 #define ENA_TIME_EXPIRE(timeout)  (timeout < rte_get_timer_cycles())
272 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us)                              \
273     (timeout_us * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
274 #define ENA_WAIT_EVENT_DESTROY(waitqueue) ((void)(waitqueue))
275
276 #ifndef READ_ONCE
277 #define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
278 #endif
279
280 #define READ_ONCE8(var) READ_ONCE(var)
281 #define READ_ONCE16(var) READ_ONCE(var)
282 #define READ_ONCE32(var) READ_ONCE(var)
283
284 /* The size must be 8 byte align */
285 #define ENA_MEMCPY_TO_DEVICE_64(dst, src, size)                         \
286         do {                                                            \
287                 int count, i;                                           \
288                 uint64_t *to = (uint64_t *)(dst);                       \
289                 const uint64_t *from = (const uint64_t *)(src);         \
290                 count = (size) / 8;                                     \
291                 for (i = 0; i < count; i++, from++, to++)               \
292                         rte_write64_relaxed(*from, to);                 \
293         } while(0)
294
295 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
296
297 #include "ena_includes.h"
298
299 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */