1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
6 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
7 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
17 #include <rte_atomic.h>
18 #include <rte_branch_prediction.h>
19 #include <rte_cycles.h>
22 #include <rte_malloc.h>
23 #include <rte_memzone.h>
24 #include <rte_prefetch.h>
25 #include <rte_spinlock.h>
28 #include <rte_memcpy.h>
35 typedef struct rte_eth_dev ena_netdev;
36 typedef uint64_t dma_addr_t;
39 #define ETIME ETIMEDOUT
42 #define ENA_PRIu64 PRIu64
43 #define ena_atomic32_t rte_atomic32_t
44 #define ena_mem_handle_t const struct rte_memzone *
50 #define ENA_COM_NO_MEM -ENOMEM
51 #define ENA_COM_INVAL -EINVAL
52 #define ENA_COM_NO_SPACE -ENOSPC
53 #define ENA_COM_NO_DEVICE -ENODEV
54 #define ENA_COM_TIMER_EXPIRED -ETIME
55 #define ENA_COM_FAULT -EFAULT
56 #define ENA_COM_TRY_AGAIN -EAGAIN
57 #define ENA_COM_UNSUPPORTED -EOPNOTSUPP
58 #define ENA_COM_EIO -EIO
60 #define ____cacheline_aligned __rte_cache_aligned
62 #define ENA_ABORT() abort()
64 #define ENA_MSLEEP(x) rte_delay_us_sleep(x * 1000)
65 #define ENA_USLEEP(x) rte_delay_us_sleep(x)
66 #define ENA_UDELAY(x) rte_delay_us_block(x)
68 #define ENA_TOUCH(x) ((void)(x))
69 /* Avoid nested declaration on arm64, as it may define rte_memcpy as memcpy. */
70 #if defined(RTE_ARCH_X86)
72 #define memcpy rte_memcpy
77 #define mmiowb rte_io_wmb
81 #define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
84 #define READ_ONCE8(var) READ_ONCE(var)
85 #define READ_ONCE16(var) READ_ONCE(var)
86 #define READ_ONCE32(var) READ_ONCE(var)
88 #define US_PER_S 1000000
89 #define ENA_GET_SYSTEM_USECS() \
90 (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
92 extern int ena_logtype_com;
94 #define ENA_MAX_T(type, x, y) RTE_MAX((type)(x), (type)(y))
95 #define ENA_MAX32(x, y) ENA_MAX_T(uint32_t, (x), (y))
96 #define ENA_MAX16(x, y) ENA_MAX_T(uint16_t, (x), (y))
97 #define ENA_MAX8(x, y) ENA_MAX_T(uint8_t, (x), (y))
98 #define ENA_MIN_T(type, x, y) RTE_MIN((type)(x), (type)(y))
99 #define ENA_MIN32(x, y) ENA_MIN_T(uint32_t, (x), (y))
100 #define ENA_MIN16(x, y) ENA_MIN_T(uint16_t, (x), (y))
101 #define ENA_MIN8(x, y) ENA_MIN_T(uint8_t, (x), (y))
103 #define BITS_PER_LONG_LONG (__SIZEOF_LONG_LONG__ * 8)
104 #define U64_C(x) x ## ULL
105 #define BIT(nr) (1UL << (nr))
106 #define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
107 #define GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
108 #define GENMASK_ULL(h, l) (((~0ULL) - (1ULL << (l)) + 1) & \
109 (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
111 #ifdef RTE_LIBRTE_ENA_COM_DEBUG
112 #define ena_trc_log(dev, level, fmt, arg...) \
115 rte_log(RTE_LOG_ ## level, ena_logtype_com, \
116 "[ENA_COM: %s]" fmt, __func__, ##arg) \
119 #define ena_trc_dbg(dev, format, arg...) ena_trc_log(dev, DEBUG, format, ##arg)
120 #define ena_trc_info(dev, format, arg...) ena_trc_log(dev, INFO, format, ##arg)
121 #define ena_trc_warn(dev, format, arg...) \
122 ena_trc_log(dev, WARNING, format, ##arg)
123 #define ena_trc_err(dev, format, arg...) ena_trc_log(dev, ERR, format, ##arg)
125 #define ena_trc_dbg(dev, format, arg...) ENA_TOUCH(dev)
126 #define ena_trc_info(dev, format, arg...) ENA_TOUCH(dev)
127 #define ena_trc_warn(dev, format, arg...) ENA_TOUCH(dev)
128 #define ena_trc_err(dev, format, arg...) ENA_TOUCH(dev)
129 #endif /* RTE_LIBRTE_ENA_COM_DEBUG */
131 #define ENA_WARN(cond, dev, format, arg...) \
133 if (unlikely(cond)) { \
135 "Warn failed on %s:%s:%d:" format, \
136 __FILE__, __func__, __LINE__, ##arg); \
140 /* Spinlock related methods */
141 #define ena_spinlock_t rte_spinlock_t
142 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&(spinlock))
143 #define ENA_SPINLOCK_LOCK(spinlock, flags) \
144 ({(void)flags; rte_spinlock_lock(&(spinlock)); })
145 #define ENA_SPINLOCK_UNLOCK(spinlock, flags) \
146 ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
147 #define ENA_SPINLOCK_DESTROY(spinlock) ((void)(spinlock))
151 pthread_mutex_t mutex;
155 #define ENA_WAIT_EVENT_INIT(waitevent) \
157 ena_wait_event_t *_we = &(waitevent); \
158 pthread_mutex_init(&_we->mutex, NULL); \
159 pthread_cond_init(&_we->cond, NULL); \
163 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout) \
165 ena_wait_event_t *_we = &(waitevent); \
166 typeof(timeout) _tmo = (timeout); \
168 struct timespec wait; \
169 struct timeval now; \
170 unsigned long timeout_us; \
171 gettimeofday(&now, NULL); \
172 wait.tv_sec = now.tv_sec + _tmo / 1000000UL; \
173 timeout_us = _tmo % 1000000UL; \
174 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL; \
175 pthread_mutex_lock(&_we->mutex); \
176 while (ret == 0 && !_we->flag) { \
177 ret = pthread_cond_timedwait(&_we->cond, \
178 &_we->mutex, &wait); \
180 /* Asserts only if not working on ena_wait_event_t */ \
181 if (unlikely(ret != 0 && ret != ETIMEDOUT)) \
183 "Invalid wait event. pthread ret: %d\n", ret); \
184 else if (unlikely(ret == ETIMEDOUT)) \
186 "Timeout waiting for " #waitevent "\n"); \
188 pthread_mutex_unlock(&_we->mutex); \
190 #define ENA_WAIT_EVENT_SIGNAL(waitevent) \
192 ena_wait_event_t *_we = &(waitevent); \
193 pthread_mutex_lock(&_we->mutex); \
195 pthread_cond_signal(&_we->cond); \
196 pthread_mutex_unlock(&_we->mutex); \
198 /* pthread condition doesn't need to be rearmed after usage */
199 #define ENA_WAIT_EVENT_CLEAR(...)
200 #define ENA_WAIT_EVENT_DESTROY(waitevent) ((void)(waitevent))
202 #define ENA_MIGHT_SLEEP()
204 #define ena_time_t uint64_t
205 #define ENA_TIME_EXPIRE(timeout) (timeout < rte_get_timer_cycles())
206 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us) \
207 ((timeout_us) * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
210 * Each rte_memzone should have unique name.
211 * To satisfy it, count number of allocations and add it to name.
213 extern rte_atomic64_t ena_alloc_cnt;
215 #define ENA_MEM_ALLOC_COHERENT_ALIGNED( \
216 dmadev, size, virt, phys, mem_handle, alignment) \
218 const struct rte_memzone *mz = NULL; \
221 char z_name[RTE_MEMZONE_NAMESIZE]; \
222 snprintf(z_name, sizeof(z_name), \
223 "ena_alloc_%" PRIi64 "", \
224 rte_atomic64_add_return(&ena_alloc_cnt, 1)); \
225 mz = rte_memzone_reserve_aligned(z_name, (size), \
226 SOCKET_ID_ANY, RTE_MEMZONE_IOVA_CONTIG,\
234 memset(mz->addr, 0, (size)); \
239 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, mem_handle) \
240 ENA_MEM_ALLOC_COHERENT_ALIGNED(dmadev, size, virt, phys, \
241 mem_handle, RTE_CACHE_LINE_SIZE)
242 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, mem_handle) \
243 ({ ENA_TOUCH(size); ENA_TOUCH(phys); ENA_TOUCH(dmadev); \
244 rte_memzone_free(mem_handle); })
246 #define ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED( \
247 dmadev, size, virt, phys, mem_handle, node, dev_node, alignment) \
249 const struct rte_memzone *mz = NULL; \
250 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \
252 char z_name[RTE_MEMZONE_NAMESIZE]; \
253 snprintf(z_name, sizeof(z_name), \
254 "ena_alloc_%" PRIi64 "", \
255 rte_atomic64_add_return(&ena_alloc_cnt, 1)); \
256 mz = rte_memzone_reserve_aligned(z_name, (size), \
257 node, RTE_MEMZONE_IOVA_CONTIG, alignment); \
264 memset(mz->addr, 0, (size)); \
269 #define ENA_MEM_ALLOC_COHERENT_NODE( \
270 dmadev, size, virt, phys, mem_handle, node, dev_node) \
271 ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED(dmadev, size, virt, phys, \
272 mem_handle, node, dev_node, RTE_CACHE_LINE_SIZE)
273 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) \
275 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \
276 virt = rte_zmalloc_socket(NULL, size, 0, node); \
279 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
280 #define ENA_MEM_FREE(dmadev, ptr, size) \
281 ({ ENA_TOUCH(dmadev); ENA_TOUCH(size); rte_free(ptr); })
283 #define ENA_DB_SYNC(mem_handle) ((void)mem_handle)
285 #define ENA_REG_WRITE32(bus, value, reg) \
286 ({ (void)(bus); rte_write32((value), (reg)); })
287 #define ENA_REG_WRITE32_RELAXED(bus, value, reg) \
288 ({ (void)(bus); rte_write32_relaxed((value), (reg)); })
289 #define ENA_REG_READ32(bus, reg) \
290 ({ (void)(bus); rte_read32_relaxed((reg)); })
292 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
293 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
294 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
295 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
297 #define msleep(x) rte_delay_us(x * 1000)
298 #define udelay(x) rte_delay_us(x)
300 #define dma_rmb() rmb()
302 #define MAX_ERRNO 4095
303 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
304 #define ERR_PTR(error) ((void *)(long)error)
305 #define PTR_ERR(error) ((long)(void *)error)
306 #define might_sleep()
308 #define prefetch(x) rte_prefetch0(x)
309 #define prefetchw(x) rte_prefetch0_write(x)
311 #define lower_32_bits(x) ((uint32_t)(x))
312 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
314 #define ENA_TIME_EXPIRE(timeout) (timeout < rte_get_timer_cycles())
315 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us) \
316 ((timeout_us) * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
317 #define ENA_WAIT_EVENTS_DESTROY(admin_queue) ((void)(admin_queue))
319 /* The size must be 8 byte align */
320 #define ENA_MEMCPY_TO_DEVICE_64(dst, src, size) \
323 uint64_t *to = (uint64_t *)(dst); \
324 const uint64_t *from = (const uint64_t *)(src); \
325 count = (size) / 8; \
326 for (i = 0; i < count; i++, from++, to++) \
327 rte_write64_relaxed(*from, to); \
330 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
332 #define ENA_FFS(x) ffs(x)
334 void ena_rss_key_fill(void *key, size_t size);
336 #define ENA_RSS_FILL_KEY(key, size) ena_rss_key_fill(key, size)
338 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS_PLAT 0
340 #include "ena_includes.h"
341 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */