4 * Copyright (c) 2015-2016 Amazon.com, Inc. or its affiliates.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
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13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
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18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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34 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
35 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
44 #include <rte_atomic.h>
45 #include <rte_branch_prediction.h>
46 #include <rte_cycles.h>
48 #include <rte_malloc.h>
49 #include <rte_memzone.h>
50 #include <rte_spinlock.h>
59 typedef uint64_t dma_addr_t;
61 #define ETIME ETIMEDOUT
64 #define ena_atomic32_t rte_atomic32_t
65 #define ena_mem_handle_t void *
71 #define ENA_COM_NO_MEM -ENOMEM
72 #define ENA_COM_INVAL -EINVAL
73 #define ENA_COM_NO_SPACE -ENOSPC
74 #define ENA_COM_NO_DEVICE -ENODEV
75 #define ENA_COM_PERMISSION -EPERM
76 #define ENA_COM_TIMER_EXPIRED -ETIME
77 #define ENA_COM_FAULT -EFAULT
79 #define ____cacheline_aligned __rte_cache_aligned
81 #define ENA_ABORT() abort()
83 #define ENA_MSLEEP(x) rte_delay_ms(x)
84 #define ENA_UDELAY(x) rte_delay_us(x)
86 #define memcpy_toio memcpy
92 #define US_PER_S 1000000
93 #define ENA_GET_SYSTEM_USECS() \
94 (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
96 #define ENA_ASSERT(cond, format, arg...) \
98 if (unlikely(!(cond))) { \
99 printf("Assertion failed on %s:%s:%d: " format, \
100 __FILE__, __func__, __LINE__, ##arg); \
101 rte_exit(EXIT_FAILURE, "ASSERTION FAILED\n"); \
105 #define ENA_MAX32(x, y) RTE_MAX((x), (y))
106 #define ENA_MAX16(x, y) RTE_MAX((x), (y))
107 #define ENA_MAX8(x, y) RTE_MAX((x), (y))
108 #define ENA_MIN32(x, y) RTE_MIN((x), (y))
109 #define ENA_MIN16(x, y) RTE_MIN((x), (y))
110 #define ENA_MIN8(x, y) RTE_MIN((x), (y))
112 #define U64_C(x) x ## ULL
113 #define BIT(nr) (1UL << (nr))
114 #define BITS_PER_LONG (__SIZEOF_LONG__ * 8)
115 #define GENMASK(h, l) (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
116 #define GENMASK_ULL(h, l) (((U64_C(1) << ((h) - (l) + 1)) - 1) << (l))
118 #ifdef RTE_LIBRTE_ENA_COM_DEBUG
119 #define ena_trc_dbg(format, arg...) \
120 RTE_LOG(DEBUG, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
121 #define ena_trc_info(format, arg...) \
122 RTE_LOG(INFO, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
123 #define ena_trc_warn(format, arg...) \
124 RTE_LOG(ERR, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
125 #define ena_trc_err(format, arg...) \
126 RTE_LOG(ERR, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
128 #define ena_trc_dbg(format, arg...) do { } while (0)
129 #define ena_trc_info(format, arg...) do { } while (0)
130 #define ena_trc_warn(format, arg...) do { } while (0)
131 #define ena_trc_err(format, arg...) do { } while (0)
132 #endif /* RTE_LIBRTE_ENA_COM_DEBUG */
134 /* Spinlock related methods */
135 #define ena_spinlock_t rte_spinlock_t
136 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&spinlock)
137 #define ENA_SPINLOCK_LOCK(spinlock, flags) \
138 ({(void)flags; rte_spinlock_lock(&spinlock); })
139 #define ENA_SPINLOCK_UNLOCK(spinlock, flags) \
140 ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
142 #define q_waitqueue_t \
144 pthread_cond_t cond; \
145 pthread_mutex_t mutex; \
148 #define ena_wait_queue_t q_waitqueue_t
150 #define ENA_WAIT_EVENT_INIT(waitqueue) \
152 pthread_mutex_init(&(waitqueue).mutex, NULL); \
153 pthread_cond_init(&(waitqueue).cond, NULL); \
156 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout) \
158 struct timespec wait; \
159 struct timeval now; \
160 unsigned long timeout_us; \
161 gettimeofday(&now, NULL); \
162 wait.tv_sec = now.tv_sec + timeout / 1000000UL; \
163 timeout_us = timeout % 1000000UL; \
164 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL; \
165 pthread_mutex_lock(&waitevent.mutex); \
166 pthread_cond_timedwait(&waitevent.cond, \
167 &waitevent.mutex, &wait); \
168 pthread_mutex_unlock(&waitevent.mutex); \
170 #define ENA_WAIT_EVENT_SIGNAL(waitevent) pthread_cond_signal(&waitevent.cond)
171 /* pthread condition doesn't need to be rearmed after usage */
172 #define ENA_WAIT_EVENT_CLEAR(...)
174 #define ena_wait_event_t ena_wait_queue_t
175 #define ENA_MIGHT_SLEEP()
177 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, handle) \
179 const struct rte_memzone *mz; \
180 char z_name[RTE_MEMZONE_NAMESIZE]; \
181 (void)dmadev; (void)handle; \
182 snprintf(z_name, sizeof(z_name), \
183 "ena_alloc_%d", ena_alloc_cnt++); \
184 mz = rte_memzone_reserve(z_name, size, SOCKET_ID_ANY, 0); \
186 phys = mz->phys_addr; \
188 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, handle) \
189 ({(void)size; rte_free(virt); })
190 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
191 #define ENA_MEM_FREE(dmadev, ptr) ({(void)dmadev; rte_free(ptr); })
193 static inline void writel(u32 value, volatile void *addr)
195 *(volatile u32 *)addr = value;
198 static inline u32 readl(const volatile void *addr)
200 return *(const volatile u32 *)addr;
203 #define ENA_REG_WRITE32(value, reg) writel((value), (reg))
204 #define ENA_REG_READ32(reg) readl((reg))
206 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
207 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
208 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
209 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
211 #define msleep(x) rte_delay_us(x * 1000)
212 #define udelay(x) rte_delay_us(x)
214 #define MAX_ERRNO 4095
215 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
216 #define ERR_PTR(error) ((void *)(long)error)
217 #define PTR_ERR(error) ((long)(void *)error)
218 #define might_sleep()
220 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */