1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018-2019 NXP
6 #include <rte_ethdev_pci.h>
8 #include "enetc_logs.h"
11 int enetc_logtype_pmd;
14 enetc_dev_start(struct rte_eth_dev *dev)
16 struct enetc_eth_hw *hw =
17 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
18 struct enetc_hw *enetc_hw = &hw->hw;
21 PMD_INIT_FUNC_TRACE();
22 val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
23 enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
24 val | ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
27 val = enetc_port_rd(enetc_hw, ENETC_PMR);
28 enetc_port_wr(enetc_hw, ENETC_PMR, val | ENETC_PMR_EN);
30 /* set auto-speed for RGMII */
31 if (enetc_port_rd(enetc_hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG) {
32 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
33 ENETC_PM0_IFM_RGAUTO);
34 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
35 ENETC_PM0_IFM_RGAUTO);
37 if (enetc_global_rd(enetc_hw,
38 ENETC_G_EPFBLPR(1)) == ENETC_G_EPFBLPR1_XGMII) {
39 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
41 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
49 enetc_dev_stop(struct rte_eth_dev *dev)
51 struct enetc_eth_hw *hw =
52 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
53 struct enetc_hw *enetc_hw = &hw->hw;
56 PMD_INIT_FUNC_TRACE();
58 val = enetc_port_rd(enetc_hw, ENETC_PMR);
59 enetc_port_wr(enetc_hw, ENETC_PMR, val & (~ENETC_PMR_EN));
61 val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
62 enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
63 val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
66 static const uint32_t *
67 enetc_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
69 static const uint32_t ptypes[] = {
83 /* return 0 means link status changed, -1 means not changed */
85 enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
87 struct enetc_eth_hw *hw =
88 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
89 struct enetc_hw *enetc_hw = &hw->hw;
90 struct rte_eth_link link;
93 PMD_INIT_FUNC_TRACE();
95 memset(&link, 0, sizeof(link));
97 status = enetc_port_rd(enetc_hw, ENETC_PM0_STATUS);
99 if (status & ENETC_LINK_MODE)
100 link.link_duplex = ETH_LINK_FULL_DUPLEX;
102 link.link_duplex = ETH_LINK_HALF_DUPLEX;
104 if (status & ENETC_LINK_STATUS)
105 link.link_status = ETH_LINK_UP;
107 link.link_status = ETH_LINK_DOWN;
109 switch (status & ENETC_LINK_SPEED_MASK) {
110 case ENETC_LINK_SPEED_1G:
111 link.link_speed = ETH_SPEED_NUM_1G;
114 case ENETC_LINK_SPEED_100M:
115 link.link_speed = ETH_SPEED_NUM_100M;
119 case ENETC_LINK_SPEED_10M:
120 link.link_speed = ETH_SPEED_NUM_10M;
123 return rte_eth_linkstatus_set(dev, &link);
127 enetc_hardware_init(struct enetc_eth_hw *hw)
129 struct enetc_hw *enetc_hw = &hw->hw;
130 uint32_t *mac = (uint32_t *)hw->mac.addr;
132 PMD_INIT_FUNC_TRACE();
133 /* Calculating and storing the base HW addresses */
134 hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);
135 hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);
137 /* Enabling Station Interface */
138 enetc_wr(enetc_hw, ENETC_SIMR, ENETC_SIMR_EN);
140 *mac = (uint32_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR0(0));
142 *mac = (uint16_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR1(0));
148 enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
149 struct rte_eth_dev_info *dev_info)
151 PMD_INIT_FUNC_TRACE();
152 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
153 .nb_max = MAX_BD_COUNT,
154 .nb_min = MIN_BD_COUNT,
155 .nb_align = BD_ALIGN,
157 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
158 .nb_max = MAX_BD_COUNT,
159 .nb_min = MIN_BD_COUNT,
160 .nb_align = BD_ALIGN,
162 dev_info->max_rx_queues = MAX_RX_RINGS;
163 dev_info->max_tx_queues = MAX_TX_RINGS;
164 dev_info->max_rx_pktlen = ENETC_MAC_MAXFRM_SIZE;
165 dev_info->rx_offload_capa = DEV_RX_OFFLOAD_JUMBO_FRAME;
169 enetc_alloc_txbdr(struct enetc_bdr *txr, uint16_t nb_desc)
173 size = nb_desc * sizeof(struct enetc_swbd);
174 txr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
175 if (txr->q_swbd == NULL)
178 size = nb_desc * sizeof(struct enetc_tx_bd);
179 txr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
180 if (txr->bd_base == NULL) {
181 rte_free(txr->q_swbd);
186 txr->bd_count = nb_desc;
187 txr->next_to_clean = 0;
188 txr->next_to_use = 0;
194 enetc_free_bdr(struct enetc_bdr *rxr)
196 rte_free(rxr->q_swbd);
197 rte_free(rxr->bd_base);
203 enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
205 int idx = tx_ring->index;
207 phys_addr_t bd_address;
209 bd_address = (phys_addr_t)
210 rte_mem_virt2iova((const void *)tx_ring->bd_base);
211 enetc_txbdr_wr(hw, idx, ENETC_TBBAR0,
212 lower_32_bits((uint64_t)bd_address));
213 enetc_txbdr_wr(hw, idx, ENETC_TBBAR1,
214 upper_32_bits((uint64_t)bd_address));
215 enetc_txbdr_wr(hw, idx, ENETC_TBLENR,
216 ENETC_RTBLENR_LEN(tx_ring->bd_count));
218 tbmr = ENETC_TBMR_EN;
220 enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);
221 enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);
222 enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);
223 tx_ring->tcir = (void *)((size_t)hw->reg +
224 ENETC_BDR(TX, idx, ENETC_TBCIR));
225 tx_ring->tcisr = (void *)((size_t)hw->reg +
226 ENETC_BDR(TX, idx, ENETC_TBCISR));
230 enetc_alloc_tx_resources(struct rte_eth_dev *dev,
235 struct enetc_bdr *tx_ring;
236 struct rte_eth_dev_data *data = dev->data;
237 struct enetc_eth_adapter *priv =
238 ENETC_DEV_PRIVATE(data->dev_private);
240 tx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
241 if (tx_ring == NULL) {
242 ENETC_PMD_ERR("Failed to allocate TX ring memory");
247 err = enetc_alloc_txbdr(tx_ring, nb_desc);
251 tx_ring->index = queue_idx;
253 enetc_setup_txbdr(&priv->hw.hw, tx_ring);
254 data->tx_queues[queue_idx] = tx_ring;
264 enetc_tx_queue_setup(struct rte_eth_dev *dev,
267 unsigned int socket_id __rte_unused,
268 const struct rte_eth_txconf *tx_conf __rte_unused)
272 PMD_INIT_FUNC_TRACE();
273 if (nb_desc > MAX_BD_COUNT)
276 err = enetc_alloc_tx_resources(dev, queue_idx, nb_desc);
282 enetc_tx_queue_release(void *txq)
287 struct enetc_bdr *tx_ring = (struct enetc_bdr *)txq;
288 struct enetc_eth_hw *eth_hw =
289 ENETC_DEV_PRIVATE_TO_HW(tx_ring->ndev->data->dev_private);
291 struct enetc_swbd *tx_swbd;
295 /* Disable the ring */
297 val = enetc_txbdr_rd(hw, tx_ring->index, ENETC_TBMR);
298 val &= (~ENETC_TBMR_EN);
299 enetc_txbdr_wr(hw, tx_ring->index, ENETC_TBMR, val);
302 i = tx_ring->next_to_clean;
303 tx_swbd = &tx_ring->q_swbd[i];
304 while (tx_swbd->buffer_addr != NULL) {
305 rte_pktmbuf_free(tx_swbd->buffer_addr);
306 tx_swbd->buffer_addr = NULL;
309 if (unlikely(i == tx_ring->bd_count)) {
311 tx_swbd = &tx_ring->q_swbd[i];
315 enetc_free_bdr(tx_ring);
320 enetc_alloc_rxbdr(struct enetc_bdr *rxr,
325 size = nb_rx_desc * sizeof(struct enetc_swbd);
326 rxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
327 if (rxr->q_swbd == NULL)
330 size = nb_rx_desc * sizeof(union enetc_rx_bd);
331 rxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
332 if (rxr->bd_base == NULL) {
333 rte_free(rxr->q_swbd);
338 rxr->bd_count = nb_rx_desc;
339 rxr->next_to_clean = 0;
340 rxr->next_to_use = 0;
341 rxr->next_to_alloc = 0;
347 enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,
348 struct rte_mempool *mb_pool)
350 int idx = rx_ring->index;
352 phys_addr_t bd_address;
354 bd_address = (phys_addr_t)
355 rte_mem_virt2iova((const void *)rx_ring->bd_base);
356 enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,
357 lower_32_bits((uint64_t)bd_address));
358 enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,
359 upper_32_bits((uint64_t)bd_address));
360 enetc_rxbdr_wr(hw, idx, ENETC_RBLENR,
361 ENETC_RTBLENR_LEN(rx_ring->bd_count));
363 rx_ring->mb_pool = mb_pool;
364 rx_ring->rcir = (void *)((size_t)hw->reg +
365 ENETC_BDR(RX, idx, ENETC_RBCIR));
366 enetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring)));
367 buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -
368 RTE_PKTMBUF_HEADROOM);
369 enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);
371 enetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN);
372 enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);
376 enetc_alloc_rx_resources(struct rte_eth_dev *dev,
377 uint16_t rx_queue_id,
379 struct rte_mempool *mb_pool)
382 struct enetc_bdr *rx_ring;
383 struct rte_eth_dev_data *data = dev->data;
384 struct enetc_eth_adapter *adapter =
385 ENETC_DEV_PRIVATE(data->dev_private);
387 rx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
388 if (rx_ring == NULL) {
389 ENETC_PMD_ERR("Failed to allocate RX ring memory");
394 err = enetc_alloc_rxbdr(rx_ring, nb_rx_desc);
398 rx_ring->index = rx_queue_id;
400 enetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool);
401 data->rx_queues[rx_queue_id] = rx_ring;
411 enetc_rx_queue_setup(struct rte_eth_dev *dev,
412 uint16_t rx_queue_id,
414 unsigned int socket_id __rte_unused,
415 const struct rte_eth_rxconf *rx_conf __rte_unused,
416 struct rte_mempool *mb_pool)
420 PMD_INIT_FUNC_TRACE();
421 if (nb_rx_desc > MAX_BD_COUNT)
424 err = enetc_alloc_rx_resources(dev, rx_queue_id,
432 enetc_rx_queue_release(void *rxq)
437 struct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq;
438 struct enetc_eth_hw *eth_hw =
439 ENETC_DEV_PRIVATE_TO_HW(rx_ring->ndev->data->dev_private);
440 struct enetc_swbd *q_swbd;
445 /* Disable the ring */
447 val = enetc_rxbdr_rd(hw, rx_ring->index, ENETC_RBMR);
448 val &= (~ENETC_RBMR_EN);
449 enetc_rxbdr_wr(hw, rx_ring->index, ENETC_RBMR, val);
452 i = rx_ring->next_to_clean;
453 q_swbd = &rx_ring->q_swbd[i];
454 while (i != rx_ring->next_to_use) {
455 rte_pktmbuf_free(q_swbd->buffer_addr);
456 q_swbd->buffer_addr = NULL;
459 if (unlikely(i == rx_ring->bd_count)) {
461 q_swbd = &rx_ring->q_swbd[i];
465 enetc_free_bdr(rx_ring);
470 int enetc_stats_get(struct rte_eth_dev *dev,
471 struct rte_eth_stats *stats)
473 struct enetc_eth_hw *hw =
474 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
475 struct enetc_hw *enetc_hw = &hw->hw;
477 /* Total received packets, bad + good, if we want to get counters of
478 * only good received packets then use ENETC_PM0_RFRM,
479 * ENETC_PM0_TFRM registers.
481 stats->ipackets = enetc_port_rd(enetc_hw, ENETC_PM0_RPKT);
482 stats->opackets = enetc_port_rd(enetc_hw, ENETC_PM0_TPKT);
483 stats->ibytes = enetc_port_rd(enetc_hw, ENETC_PM0_REOCT);
484 stats->obytes = enetc_port_rd(enetc_hw, ENETC_PM0_TEOCT);
485 /* Dropped + Truncated packets, use ENETC_PM0_RDRNTP for without
488 stats->imissed = enetc_port_rd(enetc_hw, ENETC_PM0_RDRP);
489 stats->ierrors = enetc_port_rd(enetc_hw, ENETC_PM0_RERR);
490 stats->oerrors = enetc_port_rd(enetc_hw, ENETC_PM0_TERR);
496 enetc_stats_reset(struct rte_eth_dev *dev)
498 struct enetc_eth_hw *hw =
499 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
500 struct enetc_hw *enetc_hw = &hw->hw;
502 enetc_port_wr(enetc_hw, ENETC_PM0_STAT_CONFIG, ENETC_CLEAR_STATS);
506 enetc_dev_close(struct rte_eth_dev *dev)
510 PMD_INIT_FUNC_TRACE();
513 for (i = 0; i < dev->data->nb_rx_queues; i++) {
514 enetc_rx_queue_release(dev->data->rx_queues[i]);
515 dev->data->rx_queues[i] = NULL;
517 dev->data->nb_rx_queues = 0;
519 for (i = 0; i < dev->data->nb_tx_queues; i++) {
520 enetc_tx_queue_release(dev->data->tx_queues[i]);
521 dev->data->tx_queues[i] = NULL;
523 dev->data->nb_tx_queues = 0;
527 enetc_promiscuous_enable(struct rte_eth_dev *dev)
529 struct enetc_eth_hw *hw =
530 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
531 struct enetc_hw *enetc_hw = &hw->hw;
534 psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
536 /* Setting to enable promiscuous mode*/
537 psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0);
539 enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
543 enetc_promiscuous_disable(struct rte_eth_dev *dev)
545 struct enetc_eth_hw *hw =
546 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
547 struct enetc_hw *enetc_hw = &hw->hw;
550 /* Setting to disable promiscuous mode for SI0*/
551 psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
552 psipmr &= (~ENETC_PSIPMR_SET_UP(0));
554 if (dev->data->all_multicast == 0)
555 psipmr &= (~ENETC_PSIPMR_SET_MP(0));
557 enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
561 enetc_allmulticast_enable(struct rte_eth_dev *dev)
563 struct enetc_eth_hw *hw =
564 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
565 struct enetc_hw *enetc_hw = &hw->hw;
568 psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
570 /* Setting to enable allmulticast mode for SI0*/
571 psipmr |= ENETC_PSIPMR_SET_MP(0);
573 enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
577 enetc_allmulticast_disable(struct rte_eth_dev *dev)
579 struct enetc_eth_hw *hw =
580 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
581 struct enetc_hw *enetc_hw = &hw->hw;
584 if (dev->data->promiscuous == 1)
585 return; /* must remain in all_multicast mode */
587 /* Setting to disable all multicast mode for SI0*/
588 psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR) &
589 ~(ENETC_PSIPMR_SET_MP(0));
591 enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
595 enetc_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
597 struct enetc_eth_hw *hw =
598 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
599 struct enetc_hw *enetc_hw = &hw->hw;
600 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
602 /* check that mtu is within the allowed range */
603 if (mtu < ENETC_MAC_MINFRM_SIZE || frame_size > ENETC_MAC_MAXFRM_SIZE)
607 * Refuse mtu that requires the support of scattered packets
608 * when this feature has not been enabled before.
610 if (dev->data->min_rx_buf_size &&
611 !dev->data->scattered_rx && frame_size >
612 dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM) {
613 ENETC_PMD_ERR("SG not enabled, will not fit in one buffer");
617 if (frame_size > ETHER_MAX_LEN)
618 dev->data->dev_conf.rxmode.offloads &=
619 DEV_RX_OFFLOAD_JUMBO_FRAME;
621 dev->data->dev_conf.rxmode.offloads &=
622 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
624 enetc_port_wr(enetc_hw, ENETC_PTCMSDUR(0), ENETC_MAC_MAXFRM_SIZE);
625 enetc_port_wr(enetc_hw, ENETC_PTXMBAR, 2 * ENETC_MAC_MAXFRM_SIZE);
627 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
630 enetc_port_wr(enetc_hw, ENETC_PM0_MAXFRM, ENETC_SET_MAXFRM(frame_size) |
631 ENETC_SET_TX_MTU(ENETC_MAC_MAXFRM_SIZE));
637 enetc_dev_configure(struct rte_eth_dev *dev)
639 struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
640 uint64_t rx_offloads = eth_conf->rxmode.offloads;
641 struct enetc_eth_hw *hw =
642 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
643 struct enetc_hw *enetc_hw = &hw->hw;
645 PMD_INIT_FUNC_TRACE();
647 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
650 max_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
652 enetc_port_wr(enetc_hw, ENETC_PM0_MAXFRM,
653 ENETC_SET_MAXFRM(max_len));
654 enetc_port_wr(enetc_hw, ENETC_PTCMSDUR(0),
655 ENETC_MAC_MAXFRM_SIZE);
656 enetc_port_wr(enetc_hw, ENETC_PTXMBAR,
657 2 * ENETC_MAC_MAXFRM_SIZE);
658 dev->data->mtu = ETHER_MAX_LEN - ETHER_HDR_LEN - ETHER_CRC_LEN;
665 * The set of PCI devices this driver supports
667 static const struct rte_pci_id pci_id_enetc_map[] = {
668 { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) },
669 { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) },
670 { .vendor_id = 0, /* sentinel */ },
673 /* Features supported by this driver */
674 static const struct eth_dev_ops enetc_ops = {
675 .dev_configure = enetc_dev_configure,
676 .dev_start = enetc_dev_start,
677 .dev_stop = enetc_dev_stop,
678 .dev_close = enetc_dev_close,
679 .link_update = enetc_link_update,
680 .stats_get = enetc_stats_get,
681 .stats_reset = enetc_stats_reset,
682 .promiscuous_enable = enetc_promiscuous_enable,
683 .promiscuous_disable = enetc_promiscuous_disable,
684 .allmulticast_enable = enetc_allmulticast_enable,
685 .allmulticast_disable = enetc_allmulticast_disable,
686 .dev_infos_get = enetc_dev_infos_get,
687 .mtu_set = enetc_mtu_set,
688 .rx_queue_setup = enetc_rx_queue_setup,
689 .rx_queue_release = enetc_rx_queue_release,
690 .tx_queue_setup = enetc_tx_queue_setup,
691 .tx_queue_release = enetc_tx_queue_release,
692 .dev_supported_ptypes_get = enetc_supported_ptypes_get,
696 * Initialisation of the enetc device
699 * - Pointer to the structure rte_eth_dev
702 * - On success, zero.
703 * - On failure, negative value.
706 enetc_dev_init(struct rte_eth_dev *eth_dev)
709 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
710 struct enetc_eth_hw *hw =
711 ENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
713 PMD_INIT_FUNC_TRACE();
714 eth_dev->dev_ops = &enetc_ops;
715 eth_dev->rx_pkt_burst = &enetc_recv_pkts;
716 eth_dev->tx_pkt_burst = &enetc_xmit_pkts;
718 /* Retrieving and storing the HW base address of device */
719 hw->hw.reg = (void *)pci_dev->mem_resource[0].addr;
720 hw->device_id = pci_dev->id.device_id;
722 error = enetc_hardware_init(hw);
724 ENETC_PMD_ERR("Hardware initialization failed");
728 /* Allocate memory for storing MAC addresses */
729 eth_dev->data->mac_addrs = rte_zmalloc("enetc_eth", ETHER_ADDR_LEN, 0);
730 if (!eth_dev->data->mac_addrs) {
731 ENETC_PMD_ERR("Failed to allocate %d bytes needed to "
732 "store MAC addresses",
738 /* Copy the permanent MAC address */
739 ether_addr_copy((struct ether_addr *)hw->mac.addr,
740 ð_dev->data->mac_addrs[0]);
743 enetc_port_wr(&hw->hw, ENETC_PM0_MAXFRM,
744 ENETC_SET_MAXFRM(ETHER_MAX_LEN));
745 eth_dev->data->mtu = ETHER_MAX_LEN - ETHER_HDR_LEN - ETHER_CRC_LEN;
747 ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x",
748 eth_dev->data->port_id, pci_dev->id.vendor_id,
749 pci_dev->id.device_id);
754 enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
756 PMD_INIT_FUNC_TRACE();
761 enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
762 struct rte_pci_device *pci_dev)
764 return rte_eth_dev_pci_generic_probe(pci_dev,
765 sizeof(struct enetc_eth_adapter),
770 enetc_pci_remove(struct rte_pci_device *pci_dev)
772 return rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit);
775 static struct rte_pci_driver rte_enetc_pmd = {
776 .id_table = pci_id_enetc_map,
777 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
778 .probe = enetc_pci_probe,
779 .remove = enetc_pci_remove,
782 RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);
783 RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);
784 RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci");
786 RTE_INIT(enetc_pmd_init_log)
788 enetc_logtype_pmd = rte_log_register("pmd.net.enetc");
789 if (enetc_logtype_pmd >= 0)
790 rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);