1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018-2019 NXP
6 #include <rte_ethdev_pci.h>
8 #include "enetc_logs.h"
11 int enetc_logtype_pmd;
14 enetc_dev_configure(struct rte_eth_dev *dev __rte_unused)
16 PMD_INIT_FUNC_TRACE();
21 enetc_dev_start(struct rte_eth_dev *dev)
23 struct enetc_eth_hw *hw =
24 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
25 struct enetc_hw *enetc_hw = &hw->hw;
28 PMD_INIT_FUNC_TRACE();
29 val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
30 enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
31 val | ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
34 val = enetc_port_rd(enetc_hw, ENETC_PMR);
35 enetc_port_wr(enetc_hw, ENETC_PMR, val | ENETC_PMR_EN);
37 /* set auto-speed for RGMII */
38 if (enetc_port_rd(enetc_hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG) {
39 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
40 ENETC_PM0_IFM_RGAUTO);
41 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
42 ENETC_PM0_IFM_RGAUTO);
44 if (enetc_global_rd(enetc_hw,
45 ENETC_G_EPFBLPR(1)) == ENETC_G_EPFBLPR1_XGMII) {
46 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
48 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
56 enetc_dev_stop(struct rte_eth_dev *dev)
58 struct enetc_eth_hw *hw =
59 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
60 struct enetc_hw *enetc_hw = &hw->hw;
63 PMD_INIT_FUNC_TRACE();
65 val = enetc_port_rd(enetc_hw, ENETC_PMR);
66 enetc_port_wr(enetc_hw, ENETC_PMR, val & (~ENETC_PMR_EN));
68 val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
69 enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
70 val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
73 static const uint32_t *
74 enetc_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
76 static const uint32_t ptypes[] = {
90 /* return 0 means link status changed, -1 means not changed */
92 enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
94 struct enetc_eth_hw *hw =
95 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
96 struct enetc_hw *enetc_hw = &hw->hw;
97 struct rte_eth_link link;
100 PMD_INIT_FUNC_TRACE();
102 memset(&link, 0, sizeof(link));
104 status = enetc_port_rd(enetc_hw, ENETC_PM0_STATUS);
106 if (status & ENETC_LINK_MODE)
107 link.link_duplex = ETH_LINK_FULL_DUPLEX;
109 link.link_duplex = ETH_LINK_HALF_DUPLEX;
111 if (status & ENETC_LINK_STATUS)
112 link.link_status = ETH_LINK_UP;
114 link.link_status = ETH_LINK_DOWN;
116 switch (status & ENETC_LINK_SPEED_MASK) {
117 case ENETC_LINK_SPEED_1G:
118 link.link_speed = ETH_SPEED_NUM_1G;
121 case ENETC_LINK_SPEED_100M:
122 link.link_speed = ETH_SPEED_NUM_100M;
126 case ENETC_LINK_SPEED_10M:
127 link.link_speed = ETH_SPEED_NUM_10M;
130 return rte_eth_linkstatus_set(dev, &link);
134 enetc_hardware_init(struct enetc_eth_hw *hw)
136 struct enetc_hw *enetc_hw = &hw->hw;
137 uint32_t *mac = (uint32_t *)hw->mac.addr;
139 PMD_INIT_FUNC_TRACE();
140 /* Calculating and storing the base HW addresses */
141 hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);
142 hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);
144 /* Enabling Station Interface */
145 enetc_wr(enetc_hw, ENETC_SIMR, ENETC_SIMR_EN);
147 *mac = (uint32_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR0(0));
149 *mac = (uint16_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR1(0));
155 enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
156 struct rte_eth_dev_info *dev_info)
158 PMD_INIT_FUNC_TRACE();
159 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
160 .nb_max = MAX_BD_COUNT,
161 .nb_min = MIN_BD_COUNT,
162 .nb_align = BD_ALIGN,
164 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
165 .nb_max = MAX_BD_COUNT,
166 .nb_min = MIN_BD_COUNT,
167 .nb_align = BD_ALIGN,
169 dev_info->max_rx_queues = MAX_RX_RINGS;
170 dev_info->max_tx_queues = MAX_TX_RINGS;
171 dev_info->max_rx_pktlen = 1500;
175 enetc_alloc_txbdr(struct enetc_bdr *txr, uint16_t nb_desc)
179 size = nb_desc * sizeof(struct enetc_swbd);
180 txr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
181 if (txr->q_swbd == NULL)
184 size = nb_desc * sizeof(struct enetc_tx_bd);
185 txr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
186 if (txr->bd_base == NULL) {
187 rte_free(txr->q_swbd);
192 txr->bd_count = nb_desc;
193 txr->next_to_clean = 0;
194 txr->next_to_use = 0;
200 enetc_free_bdr(struct enetc_bdr *rxr)
202 rte_free(rxr->q_swbd);
203 rte_free(rxr->bd_base);
209 enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
211 int idx = tx_ring->index;
213 phys_addr_t bd_address;
215 bd_address = (phys_addr_t)
216 rte_mem_virt2iova((const void *)tx_ring->bd_base);
217 enetc_txbdr_wr(hw, idx, ENETC_TBBAR0,
218 lower_32_bits((uint64_t)bd_address));
219 enetc_txbdr_wr(hw, idx, ENETC_TBBAR1,
220 upper_32_bits((uint64_t)bd_address));
221 enetc_txbdr_wr(hw, idx, ENETC_TBLENR,
222 ENETC_RTBLENR_LEN(tx_ring->bd_count));
224 tbmr = ENETC_TBMR_EN;
226 enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);
227 enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);
228 enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);
229 tx_ring->tcir = (void *)((size_t)hw->reg +
230 ENETC_BDR(TX, idx, ENETC_TBCIR));
231 tx_ring->tcisr = (void *)((size_t)hw->reg +
232 ENETC_BDR(TX, idx, ENETC_TBCISR));
236 enetc_alloc_tx_resources(struct rte_eth_dev *dev,
241 struct enetc_bdr *tx_ring;
242 struct rte_eth_dev_data *data = dev->data;
243 struct enetc_eth_adapter *priv =
244 ENETC_DEV_PRIVATE(data->dev_private);
246 tx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
247 if (tx_ring == NULL) {
248 ENETC_PMD_ERR("Failed to allocate TX ring memory");
253 err = enetc_alloc_txbdr(tx_ring, nb_desc);
257 tx_ring->index = queue_idx;
259 enetc_setup_txbdr(&priv->hw.hw, tx_ring);
260 data->tx_queues[queue_idx] = tx_ring;
270 enetc_tx_queue_setup(struct rte_eth_dev *dev,
273 unsigned int socket_id __rte_unused,
274 const struct rte_eth_txconf *tx_conf __rte_unused)
278 PMD_INIT_FUNC_TRACE();
279 if (nb_desc > MAX_BD_COUNT)
282 err = enetc_alloc_tx_resources(dev, queue_idx, nb_desc);
288 enetc_tx_queue_release(void *txq)
293 struct enetc_bdr *tx_ring = (struct enetc_bdr *)txq;
294 struct enetc_eth_hw *eth_hw =
295 ENETC_DEV_PRIVATE_TO_HW(tx_ring->ndev->data->dev_private);
297 struct enetc_swbd *tx_swbd;
301 /* Disable the ring */
303 val = enetc_txbdr_rd(hw, tx_ring->index, ENETC_TBMR);
304 val &= (~ENETC_TBMR_EN);
305 enetc_txbdr_wr(hw, tx_ring->index, ENETC_TBMR, val);
308 i = tx_ring->next_to_clean;
309 tx_swbd = &tx_ring->q_swbd[i];
310 while (tx_swbd->buffer_addr != NULL) {
311 rte_pktmbuf_free(tx_swbd->buffer_addr);
312 tx_swbd->buffer_addr = NULL;
315 if (unlikely(i == tx_ring->bd_count)) {
317 tx_swbd = &tx_ring->q_swbd[i];
321 enetc_free_bdr(tx_ring);
326 enetc_alloc_rxbdr(struct enetc_bdr *rxr,
331 size = nb_rx_desc * sizeof(struct enetc_swbd);
332 rxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
333 if (rxr->q_swbd == NULL)
336 size = nb_rx_desc * sizeof(union enetc_rx_bd);
337 rxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
338 if (rxr->bd_base == NULL) {
339 rte_free(rxr->q_swbd);
344 rxr->bd_count = nb_rx_desc;
345 rxr->next_to_clean = 0;
346 rxr->next_to_use = 0;
347 rxr->next_to_alloc = 0;
353 enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,
354 struct rte_mempool *mb_pool)
356 int idx = rx_ring->index;
358 phys_addr_t bd_address;
360 bd_address = (phys_addr_t)
361 rte_mem_virt2iova((const void *)rx_ring->bd_base);
362 enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,
363 lower_32_bits((uint64_t)bd_address));
364 enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,
365 upper_32_bits((uint64_t)bd_address));
366 enetc_rxbdr_wr(hw, idx, ENETC_RBLENR,
367 ENETC_RTBLENR_LEN(rx_ring->bd_count));
369 rx_ring->mb_pool = mb_pool;
370 rx_ring->rcir = (void *)((size_t)hw->reg +
371 ENETC_BDR(RX, idx, ENETC_RBCIR));
372 enetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring)));
373 buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -
374 RTE_PKTMBUF_HEADROOM);
375 enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);
377 enetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN);
378 enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);
382 enetc_alloc_rx_resources(struct rte_eth_dev *dev,
383 uint16_t rx_queue_id,
385 struct rte_mempool *mb_pool)
388 struct enetc_bdr *rx_ring;
389 struct rte_eth_dev_data *data = dev->data;
390 struct enetc_eth_adapter *adapter =
391 ENETC_DEV_PRIVATE(data->dev_private);
393 rx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
394 if (rx_ring == NULL) {
395 ENETC_PMD_ERR("Failed to allocate RX ring memory");
400 err = enetc_alloc_rxbdr(rx_ring, nb_rx_desc);
404 rx_ring->index = rx_queue_id;
406 enetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool);
407 data->rx_queues[rx_queue_id] = rx_ring;
417 enetc_rx_queue_setup(struct rte_eth_dev *dev,
418 uint16_t rx_queue_id,
420 unsigned int socket_id __rte_unused,
421 const struct rte_eth_rxconf *rx_conf __rte_unused,
422 struct rte_mempool *mb_pool)
426 PMD_INIT_FUNC_TRACE();
427 if (nb_rx_desc > MAX_BD_COUNT)
430 err = enetc_alloc_rx_resources(dev, rx_queue_id,
438 enetc_rx_queue_release(void *rxq)
443 struct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq;
444 struct enetc_eth_hw *eth_hw =
445 ENETC_DEV_PRIVATE_TO_HW(rx_ring->ndev->data->dev_private);
446 struct enetc_swbd *q_swbd;
451 /* Disable the ring */
453 val = enetc_rxbdr_rd(hw, rx_ring->index, ENETC_RBMR);
454 val &= (~ENETC_RBMR_EN);
455 enetc_rxbdr_wr(hw, rx_ring->index, ENETC_RBMR, val);
458 i = rx_ring->next_to_clean;
459 q_swbd = &rx_ring->q_swbd[i];
460 while (i != rx_ring->next_to_use) {
461 rte_pktmbuf_free(q_swbd->buffer_addr);
462 q_swbd->buffer_addr = NULL;
465 if (unlikely(i == rx_ring->bd_count)) {
467 q_swbd = &rx_ring->q_swbd[i];
471 enetc_free_bdr(rx_ring);
476 int enetc_stats_get(struct rte_eth_dev *dev,
477 struct rte_eth_stats *stats)
479 struct enetc_eth_hw *hw =
480 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
481 struct enetc_hw *enetc_hw = &hw->hw;
483 /* Total received packets, bad + good, if we want to get counters of
484 * only good received packets then use ENETC_PM0_RFRM,
485 * ENETC_PM0_TFRM registers.
487 stats->ipackets = enetc_port_rd(enetc_hw, ENETC_PM0_RPKT);
488 stats->opackets = enetc_port_rd(enetc_hw, ENETC_PM0_TPKT);
489 stats->ibytes = enetc_port_rd(enetc_hw, ENETC_PM0_REOCT);
490 stats->obytes = enetc_port_rd(enetc_hw, ENETC_PM0_TEOCT);
491 /* Dropped + Truncated packets, use ENETC_PM0_RDRNTP for without
494 stats->imissed = enetc_port_rd(enetc_hw, ENETC_PM0_RDRP);
495 stats->ierrors = enetc_port_rd(enetc_hw, ENETC_PM0_RERR);
496 stats->oerrors = enetc_port_rd(enetc_hw, ENETC_PM0_TERR);
502 enetc_stats_reset(struct rte_eth_dev *dev)
504 struct enetc_eth_hw *hw =
505 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
506 struct enetc_hw *enetc_hw = &hw->hw;
508 enetc_port_wr(enetc_hw, ENETC_PM0_STAT_CONFIG, ENETC_CLEAR_STATS);
512 enetc_dev_close(struct rte_eth_dev *dev)
516 PMD_INIT_FUNC_TRACE();
519 for (i = 0; i < dev->data->nb_rx_queues; i++) {
520 enetc_rx_queue_release(dev->data->rx_queues[i]);
521 dev->data->rx_queues[i] = NULL;
523 dev->data->nb_rx_queues = 0;
525 for (i = 0; i < dev->data->nb_tx_queues; i++) {
526 enetc_tx_queue_release(dev->data->tx_queues[i]);
527 dev->data->tx_queues[i] = NULL;
529 dev->data->nb_tx_queues = 0;
533 enetc_promiscuous_enable(struct rte_eth_dev *dev)
535 struct enetc_eth_hw *hw =
536 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
537 struct enetc_hw *enetc_hw = &hw->hw;
540 psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
542 /* Setting to enable promiscuous mode*/
543 psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0);
545 enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
549 enetc_promiscuous_disable(struct rte_eth_dev *dev)
551 struct enetc_eth_hw *hw =
552 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
553 struct enetc_hw *enetc_hw = &hw->hw;
556 /* Setting to disable promiscuous mode for SI0*/
557 psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
558 psipmr &= (~ENETC_PSIPMR_SET_UP(0));
560 if (dev->data->all_multicast == 0)
561 psipmr &= (~ENETC_PSIPMR_SET_MP(0));
563 enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
567 enetc_allmulticast_enable(struct rte_eth_dev *dev)
569 struct enetc_eth_hw *hw =
570 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
571 struct enetc_hw *enetc_hw = &hw->hw;
574 psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
576 /* Setting to enable allmulticast mode for SI0*/
577 psipmr |= ENETC_PSIPMR_SET_MP(0);
579 enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
583 enetc_allmulticast_disable(struct rte_eth_dev *dev)
585 struct enetc_eth_hw *hw =
586 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
587 struct enetc_hw *enetc_hw = &hw->hw;
590 if (dev->data->promiscuous == 1)
591 return; /* must remain in all_multicast mode */
593 /* Setting to disable all multicast mode for SI0*/
594 psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR) &
595 ~(ENETC_PSIPMR_SET_MP(0));
597 enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
601 * The set of PCI devices this driver supports
603 static const struct rte_pci_id pci_id_enetc_map[] = {
604 { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) },
605 { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) },
606 { .vendor_id = 0, /* sentinel */ },
609 /* Features supported by this driver */
610 static const struct eth_dev_ops enetc_ops = {
611 .dev_configure = enetc_dev_configure,
612 .dev_start = enetc_dev_start,
613 .dev_stop = enetc_dev_stop,
614 .dev_close = enetc_dev_close,
615 .link_update = enetc_link_update,
616 .stats_get = enetc_stats_get,
617 .stats_reset = enetc_stats_reset,
618 .promiscuous_enable = enetc_promiscuous_enable,
619 .promiscuous_disable = enetc_promiscuous_disable,
620 .allmulticast_enable = enetc_allmulticast_enable,
621 .allmulticast_disable = enetc_allmulticast_disable,
622 .dev_infos_get = enetc_dev_infos_get,
623 .rx_queue_setup = enetc_rx_queue_setup,
624 .rx_queue_release = enetc_rx_queue_release,
625 .tx_queue_setup = enetc_tx_queue_setup,
626 .tx_queue_release = enetc_tx_queue_release,
627 .dev_supported_ptypes_get = enetc_supported_ptypes_get,
631 * Initialisation of the enetc device
634 * - Pointer to the structure rte_eth_dev
637 * - On success, zero.
638 * - On failure, negative value.
641 enetc_dev_init(struct rte_eth_dev *eth_dev)
644 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
645 struct enetc_eth_hw *hw =
646 ENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
648 PMD_INIT_FUNC_TRACE();
649 eth_dev->dev_ops = &enetc_ops;
650 eth_dev->rx_pkt_burst = &enetc_recv_pkts;
651 eth_dev->tx_pkt_burst = &enetc_xmit_pkts;
653 /* Retrieving and storing the HW base address of device */
654 hw->hw.reg = (void *)pci_dev->mem_resource[0].addr;
655 hw->device_id = pci_dev->id.device_id;
657 error = enetc_hardware_init(hw);
659 ENETC_PMD_ERR("Hardware initialization failed");
663 /* Allocate memory for storing MAC addresses */
664 eth_dev->data->mac_addrs = rte_zmalloc("enetc_eth", ETHER_ADDR_LEN, 0);
665 if (!eth_dev->data->mac_addrs) {
666 ENETC_PMD_ERR("Failed to allocate %d bytes needed to "
667 "store MAC addresses",
673 /* Copy the permanent MAC address */
674 ether_addr_copy((struct ether_addr *)hw->mac.addr,
675 ð_dev->data->mac_addrs[0]);
677 ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x",
678 eth_dev->data->port_id, pci_dev->id.vendor_id,
679 pci_dev->id.device_id);
684 enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
686 PMD_INIT_FUNC_TRACE();
691 enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
692 struct rte_pci_device *pci_dev)
694 return rte_eth_dev_pci_generic_probe(pci_dev,
695 sizeof(struct enetc_eth_adapter),
700 enetc_pci_remove(struct rte_pci_device *pci_dev)
702 return rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit);
705 static struct rte_pci_driver rte_enetc_pmd = {
706 .id_table = pci_id_enetc_map,
707 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
708 .probe = enetc_pci_probe,
709 .remove = enetc_pci_remove,
712 RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);
713 RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);
714 RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci");
716 RTE_INIT(enetc_pmd_init_log)
718 enetc_logtype_pmd = rte_log_register("pmd.net.enetc");
719 if (enetc_logtype_pmd >= 0)
720 rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);