drivers/net/enetc/enetc_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018-2019 NXP
   3  */
   4
   5 #include <stdbool.h>
   6 #include <rte_ethdev_pci.h>
   7 #include <rte_random.h>
   8
   9 #include "enetc_logs.h"
  10 #include "enetc.h"
  11
  12 int enetc_logtype_pmd;
  13
  14 static int
  15 enetc_dev_start(struct rte_eth_dev *dev)
  16 {
  17         struct enetc_eth_hw *hw =
  18                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  19         struct enetc_hw *enetc_hw = &hw->hw;
  20         uint32_t val;
  21
  22         PMD_INIT_FUNC_TRACE();
  23         val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
  24         enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
  25                       val | ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
  26
  27         /* Enable port */
  28         val = enetc_port_rd(enetc_hw, ENETC_PMR);
  29         enetc_port_wr(enetc_hw, ENETC_PMR, val | ENETC_PMR_EN);
  30
  31         /* set auto-speed for RGMII */
  32         if (enetc_port_rd(enetc_hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG) {
  33                 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
  34                               ENETC_PM0_IFM_RGAUTO);
  35                 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
  36                               ENETC_PM0_IFM_RGAUTO);
  37         }
  38         if (enetc_global_rd(enetc_hw,
  39                             ENETC_G_EPFBLPR(1)) == ENETC_G_EPFBLPR1_XGMII) {
  40                 enetc_port_wr(enetc_hw, ENETC_PM0_IF_MODE,
  41                               ENETC_PM0_IFM_XGMII);
  42                 enetc_port_wr(enetc_hw, ENETC_PM1_IF_MODE,
  43                               ENETC_PM0_IFM_XGMII);
  44         }
  45
  46         return 0;
  47 }
  48
  49 static void
  50 enetc_dev_stop(struct rte_eth_dev *dev)
  51 {
  52         struct enetc_eth_hw *hw =
  53                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  54         struct enetc_hw *enetc_hw = &hw->hw;
  55         uint32_t val;
  56
  57         PMD_INIT_FUNC_TRACE();
  58         /* Disable port */
  59         val = enetc_port_rd(enetc_hw, ENETC_PMR);
  60         enetc_port_wr(enetc_hw, ENETC_PMR, val & (~ENETC_PMR_EN));
  61
  62         val = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
  63         enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG,
  64                       val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
  65 }
  66
  67 static const uint32_t *
  68 enetc_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
  69 {
  70         static const uint32_t ptypes[] = {
  71                 RTE_PTYPE_L2_ETHER,
  72                 RTE_PTYPE_L3_IPV4,
  73                 RTE_PTYPE_L3_IPV6,
  74                 RTE_PTYPE_L4_TCP,
  75                 RTE_PTYPE_L4_UDP,
  76                 RTE_PTYPE_L4_SCTP,
  77                 RTE_PTYPE_L4_ICMP,
  78                 RTE_PTYPE_UNKNOWN
  79         };
  80
  81         return ptypes;
  82 }
  83
  84 /* return 0 means link status changed, -1 means not changed */
  85 static int
  86 enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
  87 {
  88         struct enetc_eth_hw *hw =
  89                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
  90         struct enetc_hw *enetc_hw = &hw->hw;
  91         struct rte_eth_link link;
  92         uint32_t status;
  93
  94         PMD_INIT_FUNC_TRACE();
  95
  96         memset(&link, 0, sizeof(link));
  97
  98         status = enetc_port_rd(enetc_hw, ENETC_PM0_STATUS);
  99
 100         if (status & ENETC_LINK_MODE)
 101                 link.link_duplex = ETH_LINK_FULL_DUPLEX;
 102         else
 103                 link.link_duplex = ETH_LINK_HALF_DUPLEX;
 104
 105         if (status & ENETC_LINK_STATUS)
 106                 link.link_status = ETH_LINK_UP;
 107         else
 108                 link.link_status = ETH_LINK_DOWN;
 109
 110         switch (status & ENETC_LINK_SPEED_MASK) {
 111         case ENETC_LINK_SPEED_1G:
 112                 link.link_speed = ETH_SPEED_NUM_1G;
 113                 break;
 114
 115         case ENETC_LINK_SPEED_100M:
 116                 link.link_speed = ETH_SPEED_NUM_100M;
 117                 break;
 118
 119         default:
 120         case ENETC_LINK_SPEED_10M:
 121                 link.link_speed = ETH_SPEED_NUM_10M;
 122         }
 123
 124         return rte_eth_linkstatus_set(dev, &link);
 125 }
 126
 127 static void
 128 print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr)
 129 {
 130         char buf[RTE_ETHER_ADDR_FMT_SIZE];
 131
 132         rte_ether_format_addr(buf, RTE_ETHER_ADDR_FMT_SIZE, eth_addr);
 133         ENETC_PMD_INFO("%s%s\n", name, buf);
 134 }
 135
 136 static int
 137 enetc_hardware_init(struct enetc_eth_hw *hw)
 138 {
 139         struct enetc_hw *enetc_hw = &hw->hw;
 140         uint32_t *mac = (uint32_t *)hw->mac.addr;
 141         uint32_t high_mac = 0;
 142         uint16_t low_mac = 0;
 143
 144         PMD_INIT_FUNC_TRACE();
 145         /* Calculating and storing the base HW addresses */
 146         hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);
 147         hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);
 148
 149         /* Enabling Station Interface */
 150         enetc_wr(enetc_hw, ENETC_SIMR, ENETC_SIMR_EN);
 151
 152         *mac = (uint32_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR0(0));
 153         high_mac = (uint32_t)*mac;
 154         mac++;
 155         *mac = (uint16_t)enetc_port_rd(enetc_hw, ENETC_PSIPMAR1(0));
 156         low_mac = (uint16_t)*mac;
 157
 158         if ((high_mac | low_mac) == 0) {
 159                 char *first_byte;
 160
 161                 mac = (uint32_t *)hw->mac.addr;
 162                 *mac = (uint32_t)rte_rand();
 163                 first_byte = (char *)mac;
 164                 *first_byte &= 0xfe;    /* clear multicast bit */
 165                 *first_byte |= 0x02;    /* set local assignment bit (IEEE802) */
 166
 167                 enetc_port_wr(enetc_hw, ENETC_PSIPMAR0(0), *mac);
 168                 mac++;
 169                 *mac = (uint16_t)rte_rand();
 170                 enetc_port_wr(enetc_hw, ENETC_PSIPMAR1(0), *mac);
 171                 print_ethaddr("New address: ",
 172                               (const struct rte_ether_addr *)hw->mac.addr);
 173         }
 174
 175         return 0;
 176 }
 177
 178 static int
 179 enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
 180                     struct rte_eth_dev_info *dev_info)
 181 {
 182         PMD_INIT_FUNC_TRACE();
 183         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 184                 .nb_max = MAX_BD_COUNT,
 185                 .nb_min = MIN_BD_COUNT,
 186                 .nb_align = BD_ALIGN,
 187         };
 188         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 189                 .nb_max = MAX_BD_COUNT,
 190                 .nb_min = MIN_BD_COUNT,
 191                 .nb_align = BD_ALIGN,
 192         };
 193         dev_info->max_rx_queues = MAX_RX_RINGS;
 194         dev_info->max_tx_queues = MAX_TX_RINGS;
 195         dev_info->max_rx_pktlen = ENETC_MAC_MAXFRM_SIZE;
 196         dev_info->rx_offload_capa =
 197                 (DEV_RX_OFFLOAD_IPV4_CKSUM |
 198                  DEV_RX_OFFLOAD_UDP_CKSUM |
 199                  DEV_RX_OFFLOAD_TCP_CKSUM |
 200                  DEV_RX_OFFLOAD_KEEP_CRC |
 201                  DEV_RX_OFFLOAD_JUMBO_FRAME);
 202
 203         return 0;
 204 }
 205
 206 static int
 207 enetc_alloc_txbdr(struct enetc_bdr *txr, uint16_t nb_desc)
 208 {
 209         int size;
 210
 211         size = nb_desc * sizeof(struct enetc_swbd);
 212         txr->q_swbd = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
 213         if (txr->q_swbd == NULL)
 214                 return -ENOMEM;
 215
 216         size = nb_desc * sizeof(struct enetc_tx_bd);
 217         txr->bd_base = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
 218         if (txr->bd_base == NULL) {
 219                 rte_free(txr->q_swbd);
 220                 txr->q_swbd = NULL;
 221                 return -ENOMEM;
 222         }
 223
 224         txr->bd_count = nb_desc;
 225         txr->next_to_clean = 0;
 226         txr->next_to_use = 0;
 227
 228         return 0;
 229 }
 230
 231 static void
 232 enetc_free_bdr(struct enetc_bdr *rxr)
 233 {
 234         rte_free(rxr->q_swbd);
 235         rte_free(rxr->bd_base);
 236         rxr->q_swbd = NULL;
 237         rxr->bd_base = NULL;
 238 }
 239
 240 static void
 241 enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
 242 {
 243         int idx = tx_ring->index;
 244         phys_addr_t bd_address;
 245
 246         bd_address = (phys_addr_t)
 247                      rte_mem_virt2iova((const void *)tx_ring->bd_base);
 248         enetc_txbdr_wr(hw, idx, ENETC_TBBAR0,
 249                        lower_32_bits((uint64_t)bd_address));
 250         enetc_txbdr_wr(hw, idx, ENETC_TBBAR1,
 251                        upper_32_bits((uint64_t)bd_address));
 252         enetc_txbdr_wr(hw, idx, ENETC_TBLENR,
 253                        ENETC_RTBLENR_LEN(tx_ring->bd_count));
 254
 255         enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);
 256         enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);
 257         tx_ring->tcir = (void *)((size_t)hw->reg +
 258                         ENETC_BDR(TX, idx, ENETC_TBCIR));
 259         tx_ring->tcisr = (void *)((size_t)hw->reg +
 260                          ENETC_BDR(TX, idx, ENETC_TBCISR));
 261 }
 262
 263 static int
 264 enetc_tx_queue_setup(struct rte_eth_dev *dev,
 265                      uint16_t queue_idx,
 266                      uint16_t nb_desc,
 267                      unsigned int socket_id __rte_unused,
 268                      const struct rte_eth_txconf *tx_conf)
 269 {
 270         int err = 0;
 271         struct enetc_bdr *tx_ring;
 272         struct rte_eth_dev_data *data = dev->data;
 273         struct enetc_eth_adapter *priv =
 274                         ENETC_DEV_PRIVATE(data->dev_private);
 275
 276         PMD_INIT_FUNC_TRACE();
 277         if (nb_desc > MAX_BD_COUNT)
 278                 return -1;
 279
 280         tx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 281         if (tx_ring == NULL) {
 282                 ENETC_PMD_ERR("Failed to allocate TX ring memory");
 283                 err = -ENOMEM;
 284                 return -1;
 285         }
 286
 287         err = enetc_alloc_txbdr(tx_ring, nb_desc);
 288         if (err)
 289                 goto fail;
 290
 291         tx_ring->index = queue_idx;
 292         tx_ring->ndev = dev;
 293         enetc_setup_txbdr(&priv->hw.hw, tx_ring);
 294         data->tx_queues[queue_idx] = tx_ring;
 295
 296         if (!tx_conf->tx_deferred_start) {
 297                 /* enable ring */
 298                 enetc_txbdr_wr(&priv->hw.hw, tx_ring->index,
 299                                ENETC_TBMR, ENETC_TBMR_EN);
 300                 dev->data->tx_queue_state[tx_ring->index] =
 301                                RTE_ETH_QUEUE_STATE_STARTED;
 302         } else {
 303                 dev->data->tx_queue_state[tx_ring->index] =
 304                                RTE_ETH_QUEUE_STATE_STOPPED;
 305         }
 306
 307         return 0;
 308 fail:
 309         rte_free(tx_ring);
 310
 311         return err;
 312 }
 313
 314 static void
 315 enetc_tx_queue_release(void *txq)
 316 {
 317         if (txq == NULL)
 318                 return;
 319
 320         struct enetc_bdr *tx_ring = (struct enetc_bdr *)txq;
 321         struct enetc_eth_hw *eth_hw =
 322                 ENETC_DEV_PRIVATE_TO_HW(tx_ring->ndev->data->dev_private);
 323         struct enetc_hw *hw;
 324         struct enetc_swbd *tx_swbd;
 325         int i;
 326         uint32_t val;
 327
 328         /* Disable the ring */
 329         hw = &eth_hw->hw;
 330         val = enetc_txbdr_rd(hw, tx_ring->index, ENETC_TBMR);
 331         val &= (~ENETC_TBMR_EN);
 332         enetc_txbdr_wr(hw, tx_ring->index, ENETC_TBMR, val);
 333
 334         /* clean the ring*/
 335         i = tx_ring->next_to_clean;
 336         tx_swbd = &tx_ring->q_swbd[i];
 337         while (tx_swbd->buffer_addr != NULL) {
 338                 rte_pktmbuf_free(tx_swbd->buffer_addr);
 339                 tx_swbd->buffer_addr = NULL;
 340                 tx_swbd++;
 341                 i++;
 342                 if (unlikely(i == tx_ring->bd_count)) {
 343                         i = 0;
 344                         tx_swbd = &tx_ring->q_swbd[i];
 345                 }
 346         }
 347
 348         enetc_free_bdr(tx_ring);
 349         rte_free(tx_ring);
 350 }
 351
 352 static int
 353 enetc_alloc_rxbdr(struct enetc_bdr *rxr,
 354                   uint16_t nb_rx_desc)
 355 {
 356         int size;
 357
 358         size = nb_rx_desc * sizeof(struct enetc_swbd);
 359         rxr->q_swbd = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
 360         if (rxr->q_swbd == NULL)
 361                 return -ENOMEM;
 362
 363         size = nb_rx_desc * sizeof(union enetc_rx_bd);
 364         rxr->bd_base = rte_malloc(NULL, size, ENETC_BD_RING_ALIGN);
 365         if (rxr->bd_base == NULL) {
 366                 rte_free(rxr->q_swbd);
 367                 rxr->q_swbd = NULL;
 368                 return -ENOMEM;
 369         }
 370
 371         rxr->bd_count = nb_rx_desc;
 372         rxr->next_to_clean = 0;
 373         rxr->next_to_use = 0;
 374         rxr->next_to_alloc = 0;
 375
 376         return 0;
 377 }
 378
 379 static void
 380 enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,
 381                   struct rte_mempool *mb_pool)
 382 {
 383         int idx = rx_ring->index;
 384         uint16_t buf_size;
 385         phys_addr_t bd_address;
 386
 387         bd_address = (phys_addr_t)
 388                      rte_mem_virt2iova((const void *)rx_ring->bd_base);
 389         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,
 390                        lower_32_bits((uint64_t)bd_address));
 391         enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,
 392                        upper_32_bits((uint64_t)bd_address));
 393         enetc_rxbdr_wr(hw, idx, ENETC_RBLENR,
 394                        ENETC_RTBLENR_LEN(rx_ring->bd_count));
 395
 396         rx_ring->mb_pool = mb_pool;
 397         rx_ring->rcir = (void *)((size_t)hw->reg +
 398                         ENETC_BDR(RX, idx, ENETC_RBCIR));
 399         enetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring)));
 400         buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -
 401                    RTE_PKTMBUF_HEADROOM);
 402         enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);
 403         enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);
 404 }
 405
 406 static int
 407 enetc_rx_queue_setup(struct rte_eth_dev *dev,
 408                      uint16_t rx_queue_id,
 409                      uint16_t nb_rx_desc,
 410                      unsigned int socket_id __rte_unused,
 411                      const struct rte_eth_rxconf *rx_conf,
 412                      struct rte_mempool *mb_pool)
 413 {
 414         int err = 0;
 415         struct enetc_bdr *rx_ring;
 416         struct rte_eth_dev_data *data =  dev->data;
 417         struct enetc_eth_adapter *adapter =
 418                         ENETC_DEV_PRIVATE(data->dev_private);
 419         uint64_t rx_offloads = data->dev_conf.rxmode.offloads;
 420
 421         PMD_INIT_FUNC_TRACE();
 422         if (nb_rx_desc > MAX_BD_COUNT)
 423                 return -1;
 424
 425         rx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
 426         if (rx_ring == NULL) {
 427                 ENETC_PMD_ERR("Failed to allocate RX ring memory");
 428                 err = -ENOMEM;
 429                 return err;
 430         }
 431
 432         err = enetc_alloc_rxbdr(rx_ring, nb_rx_desc);
 433         if (err)
 434                 goto fail;
 435
 436         rx_ring->index = rx_queue_id;
 437         rx_ring->ndev = dev;
 438         enetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool);
 439         data->rx_queues[rx_queue_id] = rx_ring;
 440
 441         if (!rx_conf->rx_deferred_start) {
 442                 /* enable ring */
 443                 enetc_rxbdr_wr(&adapter->hw.hw, rx_ring->index, ENETC_RBMR,
 444                                ENETC_RBMR_EN);
 445                 dev->data->rx_queue_state[rx_ring->index] =
 446                                RTE_ETH_QUEUE_STATE_STARTED;
 447         } else {
 448                 dev->data->rx_queue_state[rx_ring->index] =
 449                                RTE_ETH_QUEUE_STATE_STOPPED;
 450         }
 451
 452         rx_ring->crc_len = (uint8_t)((rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC) ?
 453                                      RTE_ETHER_CRC_LEN : 0);
 454
 455         return 0;
 456 fail:
 457         rte_free(rx_ring);
 458
 459         return err;
 460 }
 461
 462 static void
 463 enetc_rx_queue_release(void *rxq)
 464 {
 465         if (rxq == NULL)
 466                 return;
 467
 468         struct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq;
 469         struct enetc_eth_hw *eth_hw =
 470                 ENETC_DEV_PRIVATE_TO_HW(rx_ring->ndev->data->dev_private);
 471         struct enetc_swbd *q_swbd;
 472         struct enetc_hw *hw;
 473         uint32_t val;
 474         int i;
 475
 476         /* Disable the ring */
 477         hw = &eth_hw->hw;
 478         val = enetc_rxbdr_rd(hw, rx_ring->index, ENETC_RBMR);
 479         val &= (~ENETC_RBMR_EN);
 480         enetc_rxbdr_wr(hw, rx_ring->index, ENETC_RBMR, val);
 481
 482         /* Clean the ring */
 483         i = rx_ring->next_to_clean;
 484         q_swbd = &rx_ring->q_swbd[i];
 485         while (i != rx_ring->next_to_use) {
 486                 rte_pktmbuf_free(q_swbd->buffer_addr);
 487                 q_swbd->buffer_addr = NULL;
 488                 q_swbd++;
 489                 i++;
 490                 if (unlikely(i == rx_ring->bd_count)) {
 491                         i = 0;
 492                         q_swbd = &rx_ring->q_swbd[i];
 493                 }
 494         }
 495
 496         enetc_free_bdr(rx_ring);
 497         rte_free(rx_ring);
 498 }
 499
 500 static
 501 int enetc_stats_get(struct rte_eth_dev *dev,
 502                     struct rte_eth_stats *stats)
 503 {
 504         struct enetc_eth_hw *hw =
 505                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 506         struct enetc_hw *enetc_hw = &hw->hw;
 507
 508         /* Total received packets, bad + good, if we want to get counters of
 509          * only good received packets then use ENETC_PM0_RFRM,
 510          * ENETC_PM0_TFRM registers.
 511          */
 512         stats->ipackets = enetc_port_rd(enetc_hw, ENETC_PM0_RPKT);
 513         stats->opackets = enetc_port_rd(enetc_hw, ENETC_PM0_TPKT);
 514         stats->ibytes =  enetc_port_rd(enetc_hw, ENETC_PM0_REOCT);
 515         stats->obytes = enetc_port_rd(enetc_hw, ENETC_PM0_TEOCT);
 516         /* Dropped + Truncated packets, use ENETC_PM0_RDRNTP for without
 517          * truncated packets
 518          */
 519         stats->imissed = enetc_port_rd(enetc_hw, ENETC_PM0_RDRP);
 520         stats->ierrors = enetc_port_rd(enetc_hw, ENETC_PM0_RERR);
 521         stats->oerrors = enetc_port_rd(enetc_hw, ENETC_PM0_TERR);
 522
 523         return 0;
 524 }
 525
 526 static int
 527 enetc_stats_reset(struct rte_eth_dev *dev)
 528 {
 529         struct enetc_eth_hw *hw =
 530                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 531         struct enetc_hw *enetc_hw = &hw->hw;
 532
 533         enetc_port_wr(enetc_hw, ENETC_PM0_STAT_CONFIG, ENETC_CLEAR_STATS);
 534
 535         return 0;
 536 }
 537
 538 static void
 539 enetc_dev_close(struct rte_eth_dev *dev)
 540 {
 541         uint16_t i;
 542
 543         PMD_INIT_FUNC_TRACE();
 544         enetc_dev_stop(dev);
 545
 546         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 547                 enetc_rx_queue_release(dev->data->rx_queues[i]);
 548                 dev->data->rx_queues[i] = NULL;
 549         }
 550         dev->data->nb_rx_queues = 0;
 551
 552         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 553                 enetc_tx_queue_release(dev->data->tx_queues[i]);
 554                 dev->data->tx_queues[i] = NULL;
 555         }
 556         dev->data->nb_tx_queues = 0;
 557 }
 558
 559 static int
 560 enetc_promiscuous_enable(struct rte_eth_dev *dev)
 561 {
 562         struct enetc_eth_hw *hw =
 563                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 564         struct enetc_hw *enetc_hw = &hw->hw;
 565         uint32_t psipmr = 0;
 566
 567         psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
 568
 569         /* Setting to enable promiscuous mode*/
 570         psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0);
 571
 572         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 573
 574         return 0;
 575 }
 576
 577 static int
 578 enetc_promiscuous_disable(struct rte_eth_dev *dev)
 579 {
 580         struct enetc_eth_hw *hw =
 581                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 582         struct enetc_hw *enetc_hw = &hw->hw;
 583         uint32_t psipmr = 0;
 584
 585         /* Setting to disable promiscuous mode for SI0*/
 586         psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
 587         psipmr &= (~ENETC_PSIPMR_SET_UP(0));
 588
 589         if (dev->data->all_multicast == 0)
 590                 psipmr &= (~ENETC_PSIPMR_SET_MP(0));
 591
 592         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 593
 594         return 0;
 595 }
 596
 597 static int
 598 enetc_allmulticast_enable(struct rte_eth_dev *dev)
 599 {
 600         struct enetc_eth_hw *hw =
 601                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 602         struct enetc_hw *enetc_hw = &hw->hw;
 603         uint32_t psipmr = 0;
 604
 605         psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR);
 606
 607         /* Setting to enable allmulticast mode for SI0*/
 608         psipmr |= ENETC_PSIPMR_SET_MP(0);
 609
 610         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 611
 612         return 0;
 613 }
 614
 615 static int
 616 enetc_allmulticast_disable(struct rte_eth_dev *dev)
 617 {
 618         struct enetc_eth_hw *hw =
 619                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 620         struct enetc_hw *enetc_hw = &hw->hw;
 621         uint32_t psipmr = 0;
 622
 623         if (dev->data->promiscuous == 1)
 624                 return 0; /* must remain in all_multicast mode */
 625
 626         /* Setting to disable all multicast mode for SI0*/
 627         psipmr = enetc_port_rd(enetc_hw, ENETC_PSIPMR) &
 628                                ~(ENETC_PSIPMR_SET_MP(0));
 629
 630         enetc_port_wr(enetc_hw, ENETC_PSIPMR, psipmr);
 631
 632         return 0;
 633 }
 634
 635 static int
 636 enetc_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 637 {
 638         struct enetc_eth_hw *hw =
 639                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 640         struct enetc_hw *enetc_hw = &hw->hw;
 641         uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
 642
 643         /* check that mtu is within the allowed range */
 644         if (mtu < ENETC_MAC_MINFRM_SIZE || frame_size > ENETC_MAC_MAXFRM_SIZE)
 645                 return -EINVAL;
 646
 647         /*
 648          * Refuse mtu that requires the support of scattered packets
 649          * when this feature has not been enabled before.
 650          */
 651         if (dev->data->min_rx_buf_size &&
 652                 !dev->data->scattered_rx && frame_size >
 653                 dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM) {
 654                 ENETC_PMD_ERR("SG not enabled, will not fit in one buffer");
 655                 return -EINVAL;
 656         }
 657
 658         if (frame_size > RTE_ETHER_MAX_LEN)
 659                 dev->data->dev_conf.rxmode.offloads &=
 660                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
 661         else
 662                 dev->data->dev_conf.rxmode.offloads &=
 663                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 664
 665         enetc_port_wr(enetc_hw, ENETC_PTCMSDUR(0), ENETC_MAC_MAXFRM_SIZE);
 666         enetc_port_wr(enetc_hw, ENETC_PTXMBAR, 2 * ENETC_MAC_MAXFRM_SIZE);
 667
 668         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 669
 670         /*setting the MTU*/
 671         enetc_port_wr(enetc_hw, ENETC_PM0_MAXFRM, ENETC_SET_MAXFRM(frame_size) |
 672                       ENETC_SET_TX_MTU(ENETC_MAC_MAXFRM_SIZE));
 673
 674         return 0;
 675 }
 676
 677 static int
 678 enetc_dev_configure(struct rte_eth_dev *dev)
 679 {
 680         struct enetc_eth_hw *hw =
 681                 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 682         struct enetc_hw *enetc_hw = &hw->hw;
 683         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 684         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 685         uint32_t checksum = L3_CKSUM | L4_CKSUM;
 686
 687         PMD_INIT_FUNC_TRACE();
 688
 689         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 690                 uint32_t max_len;
 691
 692                 max_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
 693
 694                 enetc_port_wr(enetc_hw, ENETC_PM0_MAXFRM,
 695                               ENETC_SET_MAXFRM(max_len));
 696                 enetc_port_wr(enetc_hw, ENETC_PTCMSDUR(0),
 697                               ENETC_MAC_MAXFRM_SIZE);
 698                 enetc_port_wr(enetc_hw, ENETC_PTXMBAR,
 699                               2 * ENETC_MAC_MAXFRM_SIZE);
 700                 dev->data->mtu = RTE_ETHER_MAX_LEN - RTE_ETHER_HDR_LEN -
 701                         RTE_ETHER_CRC_LEN;
 702         }
 703
 704         if (rx_offloads & DEV_RX_OFFLOAD_KEEP_CRC) {
 705                 int config;
 706
 707                 config = enetc_port_rd(enetc_hw, ENETC_PM0_CMD_CFG);
 708                 config |= ENETC_PM0_CRC;
 709                 enetc_port_wr(enetc_hw, ENETC_PM0_CMD_CFG, config);
 710         }
 711
 712         if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
 713                 checksum &= ~L3_CKSUM;
 714
 715         if (rx_offloads & (DEV_RX_OFFLOAD_UDP_CKSUM | DEV_RX_OFFLOAD_TCP_CKSUM))
 716                 checksum &= ~L4_CKSUM;
 717
 718         enetc_port_wr(enetc_hw, ENETC_PAR_PORT_CFG, checksum);
 719
 720
 721         return 0;
 722 }
 723
 724 static int
 725 enetc_rx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
 726 {
 727         struct enetc_eth_adapter *priv =
 728                         ENETC_DEV_PRIVATE(dev->data->dev_private);
 729         struct enetc_bdr *rx_ring;
 730         uint32_t rx_data;
 731
 732         rx_ring = dev->data->rx_queues[qidx];
 733         if (dev->data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) {
 734                 rx_data = enetc_rxbdr_rd(&priv->hw.hw, rx_ring->index,
 735                                          ENETC_RBMR);
 736                 rx_data = rx_data | ENETC_RBMR_EN;
 737                 enetc_rxbdr_wr(&priv->hw.hw, rx_ring->index, ENETC_RBMR,
 738                                rx_data);
 739                 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
 740         }
 741
 742         return 0;
 743 }
 744
 745 static int
 746 enetc_rx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
 747 {
 748         struct enetc_eth_adapter *priv =
 749                         ENETC_DEV_PRIVATE(dev->data->dev_private);
 750         struct enetc_bdr *rx_ring;
 751         uint32_t rx_data;
 752
 753         rx_ring = dev->data->rx_queues[qidx];
 754         if (dev->data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) {
 755                 rx_data = enetc_rxbdr_rd(&priv->hw.hw, rx_ring->index,
 756                                          ENETC_RBMR);
 757                 rx_data = rx_data & (~ENETC_RBMR_EN);
 758                 enetc_rxbdr_wr(&priv->hw.hw, rx_ring->index, ENETC_RBMR,
 759                                rx_data);
 760                 dev->data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
 761         }
 762
 763         return 0;
 764 }
 765
 766 static int
 767 enetc_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx)
 768 {
 769         struct enetc_eth_adapter *priv =
 770                         ENETC_DEV_PRIVATE(dev->data->dev_private);
 771         struct enetc_bdr *tx_ring;
 772         uint32_t tx_data;
 773
 774         tx_ring = dev->data->tx_queues[qidx];
 775         if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) {
 776                 tx_data = enetc_txbdr_rd(&priv->hw.hw, tx_ring->index,
 777                                          ENETC_TBMR);
 778                 tx_data = tx_data | ENETC_TBMR_EN;
 779                 enetc_txbdr_wr(&priv->hw.hw, tx_ring->index, ENETC_TBMR,
 780                                tx_data);
 781                 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
 782         }
 783
 784         return 0;
 785 }
 786
 787 static int
 788 enetc_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx)
 789 {
 790         struct enetc_eth_adapter *priv =
 791                         ENETC_DEV_PRIVATE(dev->data->dev_private);
 792         struct enetc_bdr *tx_ring;
 793         uint32_t tx_data;
 794
 795         tx_ring = dev->data->tx_queues[qidx];
 796         if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) {
 797                 tx_data = enetc_txbdr_rd(&priv->hw.hw, tx_ring->index,
 798                                          ENETC_TBMR);
 799                 tx_data = tx_data & (~ENETC_TBMR_EN);
 800                 enetc_txbdr_wr(&priv->hw.hw, tx_ring->index, ENETC_TBMR,
 801                                tx_data);
 802                 dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
 803         }
 804
 805         return 0;
 806 }
 807
 808 /*
 809  * The set of PCI devices this driver supports
 810  */
 811 static const struct rte_pci_id pci_id_enetc_map[] = {
 812         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) },
 813         { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) },
 814         { .vendor_id = 0, /* sentinel */ },
 815 };
 816
 817 /* Features supported by this driver */
 818 static const struct eth_dev_ops enetc_ops = {
 819         .dev_configure        = enetc_dev_configure,
 820         .dev_start            = enetc_dev_start,
 821         .dev_stop             = enetc_dev_stop,
 822         .dev_close            = enetc_dev_close,
 823         .link_update          = enetc_link_update,
 824         .stats_get            = enetc_stats_get,
 825         .stats_reset          = enetc_stats_reset,
 826         .promiscuous_enable   = enetc_promiscuous_enable,
 827         .promiscuous_disable  = enetc_promiscuous_disable,
 828         .allmulticast_enable  = enetc_allmulticast_enable,
 829         .allmulticast_disable = enetc_allmulticast_disable,
 830         .dev_infos_get        = enetc_dev_infos_get,
 831         .mtu_set              = enetc_mtu_set,
 832         .rx_queue_setup       = enetc_rx_queue_setup,
 833         .rx_queue_start       = enetc_rx_queue_start,
 834         .rx_queue_stop        = enetc_rx_queue_stop,
 835         .rx_queue_release     = enetc_rx_queue_release,
 836         .tx_queue_setup       = enetc_tx_queue_setup,
 837         .tx_queue_start       = enetc_tx_queue_start,
 838         .tx_queue_stop        = enetc_tx_queue_stop,
 839         .tx_queue_release     = enetc_tx_queue_release,
 840         .dev_supported_ptypes_get = enetc_supported_ptypes_get,
 841 };
 842
 843 /**
 844  * Initialisation of the enetc device
 845  *
 846  * @param eth_dev
 847  *   - Pointer to the structure rte_eth_dev
 848  *
 849  * @return
 850  *   - On success, zero.
 851  *   - On failure, negative value.
 852  */
 853 static int
 854 enetc_dev_init(struct rte_eth_dev *eth_dev)
 855 {
 856         int error = 0;
 857         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 858         struct enetc_eth_hw *hw =
 859                 ENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
 860
 861         PMD_INIT_FUNC_TRACE();
 862         eth_dev->dev_ops = &enetc_ops;
 863         eth_dev->rx_pkt_burst = &enetc_recv_pkts;
 864         eth_dev->tx_pkt_burst = &enetc_xmit_pkts;
 865
 866         /* Retrieving and storing the HW base address of device */
 867         hw->hw.reg = (void *)pci_dev->mem_resource[0].addr;
 868         hw->device_id = pci_dev->id.device_id;
 869
 870         error = enetc_hardware_init(hw);
 871         if (error != 0) {
 872                 ENETC_PMD_ERR("Hardware initialization failed");
 873                 return -1;
 874         }
 875
 876         /* Allocate memory for storing MAC addresses */
 877         eth_dev->data->mac_addrs = rte_zmalloc("enetc_eth",
 878                                         RTE_ETHER_ADDR_LEN, 0);
 879         if (!eth_dev->data->mac_addrs) {
 880                 ENETC_PMD_ERR("Failed to allocate %d bytes needed to "
 881                               "store MAC addresses",
 882                               RTE_ETHER_ADDR_LEN * 1);
 883                 error = -ENOMEM;
 884                 return -1;
 885         }
 886
 887         /* Copy the permanent MAC address */
 888         rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.addr,
 889                         &eth_dev->data->mac_addrs[0]);
 890
 891         /* Set MTU */
 892         enetc_port_wr(&hw->hw, ENETC_PM0_MAXFRM,
 893                       ENETC_SET_MAXFRM(RTE_ETHER_MAX_LEN));
 894         eth_dev->data->mtu = RTE_ETHER_MAX_LEN - RTE_ETHER_HDR_LEN -
 895                 RTE_ETHER_CRC_LEN;
 896
 897         ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x",
 898                         eth_dev->data->port_id, pci_dev->id.vendor_id,
 899                         pci_dev->id.device_id);
 900         return 0;
 901 }
 902
 903 static int
 904 enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
 905 {
 906         PMD_INIT_FUNC_TRACE();
 907         return 0;
 908 }
 909
 910 static int
 911 enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 912                            struct rte_pci_device *pci_dev)
 913 {
 914         return rte_eth_dev_pci_generic_probe(pci_dev,
 915                                              sizeof(struct enetc_eth_adapter),
 916                                              enetc_dev_init);
 917 }
 918
 919 static int
 920 enetc_pci_remove(struct rte_pci_device *pci_dev)
 921 {
 922         return rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit);
 923 }
 924
 925 static struct rte_pci_driver rte_enetc_pmd = {
 926         .id_table = pci_id_enetc_map,
 927         .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
 928         .probe = enetc_pci_probe,
 929         .remove = enetc_pci_remove,
 930 };
 931
 932 RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);
 933 RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);
 934 RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci");
 935
 936 RTE_INIT(enetc_pmd_init_log)
 937 {
 938         enetc_logtype_pmd = rte_log_register("pmd.net.enetc");
 939         if (enetc_logtype_pmd >= 0)
 940                 rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);
 941 }