1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018-2019 NXP
6 #include <rte_ethdev_pci.h>
8 #include "enetc_logs.h"
11 int enetc_logtype_pmd;
13 /* Functions Prototypes */
14 static int enetc_dev_configure(struct rte_eth_dev *dev);
15 static int enetc_dev_start(struct rte_eth_dev *dev);
16 static void enetc_dev_stop(struct rte_eth_dev *dev);
17 static void enetc_dev_close(struct rte_eth_dev *dev);
18 static void enetc_dev_infos_get(struct rte_eth_dev *dev,
19 struct rte_eth_dev_info *dev_info);
20 static int enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete);
21 static int enetc_hardware_init(struct enetc_eth_hw *hw);
22 static int enetc_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
23 uint16_t nb_rx_desc, unsigned int socket_id,
24 const struct rte_eth_rxconf *rx_conf,
25 struct rte_mempool *mb_pool);
26 static void enetc_rx_queue_release(void *rxq);
27 static int enetc_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
28 uint16_t nb_tx_desc, unsigned int socket_id,
29 const struct rte_eth_txconf *tx_conf);
30 static void enetc_tx_queue_release(void *txq);
31 static const uint32_t *enetc_supported_ptypes_get(struct rte_eth_dev *dev);
34 * The set of PCI devices this driver supports
36 static const struct rte_pci_id pci_id_enetc_map[] = {
37 { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID) },
38 { RTE_PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_VF) },
39 { .vendor_id = 0, /* sentinel */ },
42 /* Features supported by this driver */
43 static const struct eth_dev_ops enetc_ops = {
44 .dev_configure = enetc_dev_configure,
45 .dev_start = enetc_dev_start,
46 .dev_stop = enetc_dev_stop,
47 .dev_close = enetc_dev_close,
48 .link_update = enetc_link_update,
49 .dev_infos_get = enetc_dev_infos_get,
50 .rx_queue_setup = enetc_rx_queue_setup,
51 .rx_queue_release = enetc_rx_queue_release,
52 .tx_queue_setup = enetc_tx_queue_setup,
53 .tx_queue_release = enetc_tx_queue_release,
54 .dev_supported_ptypes_get = enetc_supported_ptypes_get,
58 * Initialisation of the enetc device
61 * - Pointer to the structure rte_eth_dev
65 * - On failure, negative value.
68 enetc_dev_init(struct rte_eth_dev *eth_dev)
71 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
72 struct enetc_eth_hw *hw =
73 ENETC_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
75 PMD_INIT_FUNC_TRACE();
76 eth_dev->dev_ops = &enetc_ops;
77 eth_dev->rx_pkt_burst = &enetc_recv_pkts;
78 eth_dev->tx_pkt_burst = &enetc_xmit_pkts;
80 /* Retrieving and storing the HW base address of device */
81 hw->hw.reg = (void *)pci_dev->mem_resource[0].addr;
82 hw->device_id = pci_dev->id.device_id;
84 error = enetc_hardware_init(hw);
86 ENETC_PMD_ERR("Hardware initialization failed");
90 /* Allocate memory for storing MAC addresses */
91 eth_dev->data->mac_addrs = rte_zmalloc("enetc_eth", ETHER_ADDR_LEN, 0);
92 if (!eth_dev->data->mac_addrs) {
93 ENETC_PMD_ERR("Failed to allocate %d bytes needed to "
94 "store MAC addresses",
100 /* Copy the permanent MAC address */
101 ether_addr_copy((struct ether_addr *)hw->mac.addr,
102 ð_dev->data->mac_addrs[0]);
104 ENETC_PMD_DEBUG("port_id %d vendorID=0x%x deviceID=0x%x",
105 eth_dev->data->port_id, pci_dev->id.vendor_id,
106 pci_dev->id.device_id);
111 enetc_dev_uninit(struct rte_eth_dev *eth_dev __rte_unused)
113 PMD_INIT_FUNC_TRACE();
118 enetc_dev_configure(struct rte_eth_dev *dev __rte_unused)
120 PMD_INIT_FUNC_TRACE();
125 enetc_dev_start(struct rte_eth_dev *dev)
127 struct enetc_eth_hw *hw =
128 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
131 PMD_INIT_FUNC_TRACE();
132 val = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port,
134 ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PM0_CMD_CFG),
135 val | ENETC_PM0_TX_EN | ENETC_PM0_RX_EN);
138 val = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR));
139 ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR),
142 /* set auto-speed for RGMII */
143 if (enetc_port_rd(&hw->hw, ENETC_PM0_IF_MODE) & ENETC_PMO_IFM_RG) {
144 enetc_port_wr(&hw->hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_RGAUTO);
145 enetc_port_wr(&hw->hw, ENETC_PM1_IF_MODE, ENETC_PM0_IFM_RGAUTO);
147 if (enetc_global_rd(&hw->hw,
148 ENETC_G_EPFBLPR(1)) == ENETC_G_EPFBLPR1_XGMII) {
149 enetc_port_wr(&hw->hw, ENETC_PM0_IF_MODE, ENETC_PM0_IFM_XGMII);
150 enetc_port_wr(&hw->hw, ENETC_PM1_IF_MODE, ENETC_PM0_IFM_XGMII);
157 enetc_dev_stop(struct rte_eth_dev *dev)
159 struct enetc_eth_hw *hw =
160 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
163 PMD_INIT_FUNC_TRACE();
165 val = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR));
166 ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PMR),
167 val & (~ENETC_PMR_EN));
169 val = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port,
171 ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PM0_CMD_CFG),
172 val & (~(ENETC_PM0_TX_EN | ENETC_PM0_RX_EN)));
176 enetc_dev_close(struct rte_eth_dev *dev)
180 PMD_INIT_FUNC_TRACE();
183 for (i = 0; i < dev->data->nb_rx_queues; i++) {
184 enetc_rx_queue_release(dev->data->rx_queues[i]);
185 dev->data->rx_queues[i] = NULL;
187 dev->data->nb_rx_queues = 0;
189 for (i = 0; i < dev->data->nb_tx_queues; i++) {
190 enetc_tx_queue_release(dev->data->tx_queues[i]);
191 dev->data->tx_queues[i] = NULL;
193 dev->data->nb_tx_queues = 0;
196 static const uint32_t *
197 enetc_supported_ptypes_get(struct rte_eth_dev *dev __rte_unused)
199 static const uint32_t ptypes[] = {
213 /* return 0 means link status changed, -1 means not changed */
215 enetc_link_update(struct rte_eth_dev *dev, int wait_to_complete __rte_unused)
217 struct enetc_eth_hw *hw =
218 ENETC_DEV_PRIVATE_TO_HW(dev->data->dev_private);
219 struct rte_eth_link link;
222 PMD_INIT_FUNC_TRACE();
224 memset(&link, 0, sizeof(link));
226 status = ENETC_REG_READ(ENETC_GET_HW_ADDR(hw->hw.port,
229 if (status & ENETC_LINK_MODE)
230 link.link_duplex = ETH_LINK_FULL_DUPLEX;
232 link.link_duplex = ETH_LINK_HALF_DUPLEX;
234 if (status & ENETC_LINK_STATUS)
235 link.link_status = ETH_LINK_UP;
237 link.link_status = ETH_LINK_DOWN;
239 switch (status & ENETC_LINK_SPEED_MASK) {
240 case ENETC_LINK_SPEED_1G:
241 link.link_speed = ETH_SPEED_NUM_1G;
244 case ENETC_LINK_SPEED_100M:
245 link.link_speed = ETH_SPEED_NUM_100M;
249 case ENETC_LINK_SPEED_10M:
250 link.link_speed = ETH_SPEED_NUM_10M;
253 return rte_eth_linkstatus_set(dev, &link);
257 enetc_hardware_init(struct enetc_eth_hw *hw)
261 PMD_INIT_FUNC_TRACE();
262 /* Calculating and storing the base HW addresses */
263 hw->hw.port = (void *)((size_t)hw->hw.reg + ENETC_PORT_BASE);
264 hw->hw.global = (void *)((size_t)hw->hw.reg + ENETC_GLOBAL_BASE);
266 /* Enabling Station Interface */
267 ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.reg, ENETC_SIMR),
270 /* Setting to accept broadcast packets for each inetrface */
271 psipmr |= ENETC_PSIPMR_SET_UP(0) | ENETC_PSIPMR_SET_MP(0) |
272 ENETC_PSIPMR_SET_VLAN_MP(0);
273 psipmr |= ENETC_PSIPMR_SET_UP(1) | ENETC_PSIPMR_SET_MP(1) |
274 ENETC_PSIPMR_SET_VLAN_MP(1);
275 psipmr |= ENETC_PSIPMR_SET_UP(2) | ENETC_PSIPMR_SET_MP(2) |
276 ENETC_PSIPMR_SET_VLAN_MP(2);
278 ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMR),
281 /* Enabling broadcast address */
282 ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMAR0(0)),
284 ENETC_REG_WRITE(ENETC_GET_HW_ADDR(hw->hw.port, ENETC_PSIPMAR1(0)),
291 enetc_dev_infos_get(struct rte_eth_dev *dev __rte_unused,
292 struct rte_eth_dev_info *dev_info)
294 PMD_INIT_FUNC_TRACE();
295 dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
296 .nb_max = MAX_BD_COUNT,
297 .nb_min = MIN_BD_COUNT,
298 .nb_align = BD_ALIGN,
300 dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
301 .nb_max = MAX_BD_COUNT,
302 .nb_min = MIN_BD_COUNT,
303 .nb_align = BD_ALIGN,
305 dev_info->max_rx_queues = MAX_RX_RINGS;
306 dev_info->max_tx_queues = MAX_TX_RINGS;
307 dev_info->max_rx_pktlen = 1500;
311 enetc_alloc_txbdr(struct enetc_bdr *txr, uint16_t nb_desc)
315 size = nb_desc * sizeof(struct enetc_swbd);
316 txr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
317 if (txr->q_swbd == NULL)
320 size = nb_desc * sizeof(struct enetc_tx_bd);
321 txr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
322 if (txr->bd_base == NULL) {
323 rte_free(txr->q_swbd);
328 txr->bd_count = nb_desc;
329 txr->next_to_clean = 0;
330 txr->next_to_use = 0;
336 enetc_free_bdr(struct enetc_bdr *rxr)
338 rte_free(rxr->q_swbd);
339 rte_free(rxr->bd_base);
345 enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
347 int idx = tx_ring->index;
349 phys_addr_t bd_address;
351 bd_address = (phys_addr_t)
352 rte_mem_virt2iova((const void *)tx_ring->bd_base);
353 enetc_txbdr_wr(hw, idx, ENETC_TBBAR0,
354 lower_32_bits((uint64_t)bd_address));
355 enetc_txbdr_wr(hw, idx, ENETC_TBBAR1,
356 upper_32_bits((uint64_t)bd_address));
357 enetc_txbdr_wr(hw, idx, ENETC_TBLENR,
358 ENETC_RTBLENR_LEN(tx_ring->bd_count));
360 tbmr = ENETC_TBMR_EN;
362 enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);
363 enetc_txbdr_wr(hw, idx, ENETC_TBCIR, 0);
364 enetc_txbdr_wr(hw, idx, ENETC_TBCISR, 0);
365 tx_ring->tcir = (void *)((size_t)hw->reg +
366 ENETC_BDR(TX, idx, ENETC_TBCIR));
367 tx_ring->tcisr = (void *)((size_t)hw->reg +
368 ENETC_BDR(TX, idx, ENETC_TBCISR));
372 enetc_alloc_tx_resources(struct rte_eth_dev *dev,
377 struct enetc_bdr *tx_ring;
378 struct rte_eth_dev_data *data = dev->data;
379 struct enetc_eth_adapter *priv =
380 ENETC_DEV_PRIVATE(data->dev_private);
382 tx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
383 if (tx_ring == NULL) {
384 ENETC_PMD_ERR("Failed to allocate TX ring memory");
389 err = enetc_alloc_txbdr(tx_ring, nb_desc);
393 tx_ring->index = queue_idx;
395 enetc_setup_txbdr(&priv->hw.hw, tx_ring);
396 data->tx_queues[queue_idx] = tx_ring;
406 enetc_tx_queue_setup(struct rte_eth_dev *dev,
409 unsigned int socket_id __rte_unused,
410 const struct rte_eth_txconf *tx_conf __rte_unused)
414 PMD_INIT_FUNC_TRACE();
415 if (nb_desc > MAX_BD_COUNT)
418 err = enetc_alloc_tx_resources(dev, queue_idx, nb_desc);
424 enetc_tx_queue_release(void *txq)
429 struct enetc_bdr *tx_ring = (struct enetc_bdr *)txq;
430 struct enetc_eth_hw *eth_hw =
431 ENETC_DEV_PRIVATE_TO_HW(tx_ring->ndev->data->dev_private);
433 struct enetc_swbd *tx_swbd;
437 /* Disable the ring */
439 val = enetc_txbdr_rd(hw, tx_ring->index, ENETC_TBMR);
440 val &= (~ENETC_TBMR_EN);
441 enetc_txbdr_wr(hw, tx_ring->index, ENETC_TBMR, val);
444 i = tx_ring->next_to_clean;
445 tx_swbd = &tx_ring->q_swbd[i];
446 while (tx_swbd->buffer_addr != NULL) {
447 rte_pktmbuf_free(tx_swbd->buffer_addr);
448 tx_swbd->buffer_addr = NULL;
451 if (unlikely(i == tx_ring->bd_count)) {
453 tx_swbd = &tx_ring->q_swbd[i];
457 enetc_free_bdr(tx_ring);
462 enetc_alloc_rxbdr(struct enetc_bdr *rxr,
467 size = nb_rx_desc * sizeof(struct enetc_swbd);
468 rxr->q_swbd = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
469 if (rxr->q_swbd == NULL)
472 size = nb_rx_desc * sizeof(union enetc_rx_bd);
473 rxr->bd_base = rte_malloc(NULL, size, RTE_CACHE_LINE_SIZE);
474 if (rxr->bd_base == NULL) {
475 rte_free(rxr->q_swbd);
480 rxr->bd_count = nb_rx_desc;
481 rxr->next_to_clean = 0;
482 rxr->next_to_use = 0;
483 rxr->next_to_alloc = 0;
489 enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,
490 struct rte_mempool *mb_pool)
492 int idx = rx_ring->index;
494 phys_addr_t bd_address;
496 bd_address = (phys_addr_t)
497 rte_mem_virt2iova((const void *)rx_ring->bd_base);
498 enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,
499 lower_32_bits((uint64_t)bd_address));
500 enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,
501 upper_32_bits((uint64_t)bd_address));
502 enetc_rxbdr_wr(hw, idx, ENETC_RBLENR,
503 ENETC_RTBLENR_LEN(rx_ring->bd_count));
505 rx_ring->mb_pool = mb_pool;
506 rx_ring->rcir = (void *)((size_t)hw->reg +
507 ENETC_BDR(RX, idx, ENETC_RBCIR));
508 enetc_refill_rx_ring(rx_ring, (enetc_bd_unused(rx_ring)));
509 buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rx_ring->mb_pool) -
510 RTE_PKTMBUF_HEADROOM);
511 enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, buf_size);
513 enetc_rxbdr_wr(hw, idx, ENETC_RBMR, ENETC_RBMR_EN);
514 enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);
518 enetc_alloc_rx_resources(struct rte_eth_dev *dev,
519 uint16_t rx_queue_id,
521 struct rte_mempool *mb_pool)
524 struct enetc_bdr *rx_ring;
525 struct rte_eth_dev_data *data = dev->data;
526 struct enetc_eth_adapter *adapter =
527 ENETC_DEV_PRIVATE(data->dev_private);
529 rx_ring = rte_zmalloc(NULL, sizeof(struct enetc_bdr), 0);
530 if (rx_ring == NULL) {
531 ENETC_PMD_ERR("Failed to allocate RX ring memory");
536 err = enetc_alloc_rxbdr(rx_ring, nb_rx_desc);
540 rx_ring->index = rx_queue_id;
542 enetc_setup_rxbdr(&adapter->hw.hw, rx_ring, mb_pool);
543 data->rx_queues[rx_queue_id] = rx_ring;
553 enetc_rx_queue_setup(struct rte_eth_dev *dev,
554 uint16_t rx_queue_id,
556 unsigned int socket_id __rte_unused,
557 const struct rte_eth_rxconf *rx_conf __rte_unused,
558 struct rte_mempool *mb_pool)
562 PMD_INIT_FUNC_TRACE();
563 if (nb_rx_desc > MAX_BD_COUNT)
566 err = enetc_alloc_rx_resources(dev, rx_queue_id,
574 enetc_rx_queue_release(void *rxq)
579 struct enetc_bdr *rx_ring = (struct enetc_bdr *)rxq;
580 struct enetc_eth_hw *eth_hw =
581 ENETC_DEV_PRIVATE_TO_HW(rx_ring->ndev->data->dev_private);
582 struct enetc_swbd *q_swbd;
587 /* Disable the ring */
589 val = enetc_rxbdr_rd(hw, rx_ring->index, ENETC_RBMR);
590 val &= (~ENETC_RBMR_EN);
591 enetc_rxbdr_wr(hw, rx_ring->index, ENETC_RBMR, val);
594 i = rx_ring->next_to_clean;
595 q_swbd = &rx_ring->q_swbd[i];
596 while (i != rx_ring->next_to_use) {
597 rte_pktmbuf_free(q_swbd->buffer_addr);
598 q_swbd->buffer_addr = NULL;
601 if (unlikely(i == rx_ring->bd_count)) {
603 q_swbd = &rx_ring->q_swbd[i];
607 enetc_free_bdr(rx_ring);
612 enetc_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
613 struct rte_pci_device *pci_dev)
615 return rte_eth_dev_pci_generic_probe(pci_dev,
616 sizeof(struct enetc_eth_adapter),
621 enetc_pci_remove(struct rte_pci_device *pci_dev)
623 return rte_eth_dev_pci_generic_remove(pci_dev, enetc_dev_uninit);
626 static struct rte_pci_driver rte_enetc_pmd = {
627 .id_table = pci_id_enetc_map,
628 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
629 .probe = enetc_pci_probe,
630 .remove = enetc_pci_remove,
633 RTE_PMD_REGISTER_PCI(net_enetc, rte_enetc_pmd);
634 RTE_PMD_REGISTER_PCI_TABLE(net_enetc, pci_id_enetc_map);
635 RTE_PMD_REGISTER_KMOD_DEP(net_enetc, "* vfio-pci");
637 RTE_INIT(enetc_pmd_init_log)
639 enetc_logtype_pmd = rte_log_register("pmd.net.enetc");
640 if (enetc_logtype_pmd >= 0)
641 rte_log_set_level(enetc_logtype_pmd, RTE_LOG_NOTICE);