drivers/net/enic/base/cq_enet_desc.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  */
   5
   6 #ifndef _CQ_ENET_DESC_H_
   7 #define _CQ_ENET_DESC_H_
   8
   9 #include <rte_byteorder.h>
  10 #include "cq_desc.h"
  11
  12 /* Ethernet completion queue descriptor: 16B */
  13 struct cq_enet_wq_desc {
  14         uint16_t completed_index;
  15         uint16_t q_number;
  16         uint8_t reserved[11];
  17         uint8_t type_color;
  18 };
  19
  20 static inline void cq_enet_wq_desc_enc(struct cq_enet_wq_desc *desc,
  21         uint8_t type, uint8_t color, uint16_t q_number,
  22         uint16_t completed_index)
  23 {
  24         cq_desc_enc((struct cq_desc *)desc, type,
  25                 color, q_number, completed_index);
  26 }
  27
  28 static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,
  29         uint8_t *type, uint8_t *color, uint16_t *q_number,
  30         uint16_t *completed_index)
  31 {
  32         cq_desc_dec((struct cq_desc *)desc, type,
  33                 color, q_number, completed_index);
  34 }
  35
  36 /* Completion queue descriptor: Ethernet receive queue, 16B */
  37 struct cq_enet_rq_desc {
  38         uint16_t completed_index_flags;
  39         uint16_t q_number_rss_type_flags;
  40         uint32_t rss_hash;
  41         uint16_t bytes_written_flags;
  42         uint16_t vlan;
  43         uint16_t checksum_fcoe;
  44         uint8_t flags;
  45         uint8_t type_color;
  46 };
  47
  48 /* Completion queue descriptor: Ethernet receive queue, 16B */
  49 struct cq_enet_rq_clsf_desc {
  50         uint16_t completed_index_flags;
  51         uint16_t q_number_rss_type_flags;
  52         uint16_t filter_id;
  53         uint16_t lif;
  54         uint16_t bytes_written_flags;
  55         uint16_t vlan;
  56         uint16_t checksum_fcoe;
  57         uint8_t flags;
  58         uint8_t type_color;
  59 };
  60
  61 /* Completion queue descriptor: Ethernet receive queue, 64B */
  62 struct cq_enet_rq_desc_64 {
  63         uint16_t completed_index_flags;
  64         uint16_t q_number_rss_type_flags;
  65         uint32_t rss_hash;
  66         uint16_t bytes_written_flags;
  67         uint16_t vlan;
  68         uint16_t checksum_fcoe;
  69         uint8_t flags;
  70         uint8_t unused[48];
  71         uint8_t type_color;
  72 };
  73
  74 #define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT          (0x1 << 12)
  75 #define CQ_ENET_RQ_DESC_FLAGS_FCOE                  (0x1 << 13)
  76 #define CQ_ENET_RQ_DESC_FLAGS_EOP                   (0x1 << 14)
  77 #define CQ_ENET_RQ_DESC_FLAGS_SOP                   (0x1 << 15)
  78
  79 #define CQ_ENET_RQ_DESC_RSS_TYPE_BITS               4
  80 #define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \
  81         ((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)
  82 #define CQ_ENET_RQ_DESC_RSS_TYPE_NONE               0
  83 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4               1
  84 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4           2
  85 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6               3
  86 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6           4
  87 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX            5
  88 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX        6
  89
  90 #define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC         (0x1 << 14)
  91
  92 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS          14
  93 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \
  94         ((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)
  95 #define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED             (0x1 << 14)
  96 #define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED         (0x1 << 15)
  97
  98 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS          12
  99 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK \
 100         ((1 << CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS) - 1)
 101 #define CQ_ENET_RQ_DESC_VLAN_TCI_CFI_MASK           (0x1 << 12)
 102 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS     3
 103 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_MASK \
 104         ((1 << CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS) - 1)
 105 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_SHIFT    13
 106
 107 #define CQ_ENET_RQ_DESC_FCOE_SOF_BITS               8
 108 #define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \
 109         ((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)
 110 #define CQ_ENET_RQ_DESC_FCOE_EOF_BITS               8
 111 #define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \
 112         ((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)
 113 #define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT              8
 114
 115 #define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK       (0x1 << 0)
 116 #define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK              (0x1 << 0)
 117 #define CQ_ENET_RQ_DESC_FLAGS_UDP                   (0x1 << 1)
 118 #define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR              (0x1 << 1)
 119 #define CQ_ENET_RQ_DESC_FLAGS_TCP                   (0x1 << 2)
 120 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK          (0x1 << 3)
 121 #define CQ_ENET_RQ_DESC_FLAGS_IPV6                  (0x1 << 4)
 122 #define CQ_ENET_RQ_DESC_FLAGS_IPV4                  (0x1 << 5)
 123 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT         (0x1 << 6)
 124 #define CQ_ENET_RQ_DESC_FLAGS_FCS_OK                (0x1 << 7)
 125
 126 static inline void cq_enet_rq_desc_enc(struct cq_enet_rq_desc *desc,
 127         uint8_t type, uint8_t color, uint16_t q_number,
 128         uint16_t completed_index, uint8_t ingress_port, uint8_t fcoe,
 129         uint8_t eop, uint8_t sop, uint8_t rss_type, uint8_t csum_not_calc,
 130         uint32_t rss_hash, uint16_t bytes_written, uint8_t packet_error,
 131         uint8_t vlan_stripped, uint16_t vlan, uint16_t checksum,
 132         uint8_t fcoe_sof, uint8_t fcoe_fc_crc_ok, uint8_t fcoe_enc_error,
 133         uint8_t fcoe_eof, uint8_t tcp_udp_csum_ok, uint8_t udp, uint8_t tcp,
 134         uint8_t ipv4_csum_ok, uint8_t ipv6, uint8_t ipv4, uint8_t ipv4_fragment,
 135         uint8_t fcs_ok)
 136 {
 137         cq_desc_enc((struct cq_desc *)desc, type,
 138                 color, q_number, completed_index);
 139
 140         desc->completed_index_flags |= rte_cpu_to_le_16
 141                 ((ingress_port ? CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT : 0) |
 142                 (fcoe ? CQ_ENET_RQ_DESC_FLAGS_FCOE : 0) |
 143                 (eop ? CQ_ENET_RQ_DESC_FLAGS_EOP : 0) |
 144                 (sop ? CQ_ENET_RQ_DESC_FLAGS_SOP : 0));
 145
 146         desc->q_number_rss_type_flags |= rte_cpu_to_le_16
 147                 (((rss_type & CQ_ENET_RQ_DESC_RSS_TYPE_MASK) <<
 148                 CQ_DESC_Q_NUM_BITS) |
 149                 (csum_not_calc ? CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC : 0));
 150
 151         desc->rss_hash = rte_cpu_to_le_32(rss_hash);
 152
 153         desc->bytes_written_flags = rte_cpu_to_le_16
 154                 ((bytes_written & CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK) |
 155                 (packet_error ? CQ_ENET_RQ_DESC_FLAGS_TRUNCATED : 0) |
 156                 (vlan_stripped ? CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED : 0));
 157
 158         desc->vlan = rte_cpu_to_le_16(vlan);
 159
 160         if (fcoe) {
 161                 desc->checksum_fcoe = rte_cpu_to_le_16
 162                         ((fcoe_sof & CQ_ENET_RQ_DESC_FCOE_SOF_MASK) |
 163                         ((fcoe_eof & CQ_ENET_RQ_DESC_FCOE_EOF_MASK) <<
 164                                 CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT));
 165         } else {
 166                 desc->checksum_fcoe = rte_cpu_to_le_16(checksum);
 167         }
 168
 169         desc->flags =
 170                 (tcp_udp_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK : 0) |
 171                 (udp ? CQ_ENET_RQ_DESC_FLAGS_UDP : 0) |
 172                 (tcp ? CQ_ENET_RQ_DESC_FLAGS_TCP : 0) |
 173                 (ipv4_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK : 0) |
 174                 (ipv6 ? CQ_ENET_RQ_DESC_FLAGS_IPV6 : 0) |
 175                 (ipv4 ? CQ_ENET_RQ_DESC_FLAGS_IPV4 : 0) |
 176                 (ipv4_fragment ? CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT : 0) |
 177                 (fcs_ok ? CQ_ENET_RQ_DESC_FLAGS_FCS_OK : 0) |
 178                 (fcoe_fc_crc_ok ? CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK : 0) |
 179                 (fcoe_enc_error ? CQ_ENET_RQ_DESC_FCOE_ENC_ERROR : 0);
 180 }
 181
 182 static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
 183         uint8_t *type, uint8_t *color, uint16_t *q_number,
 184         uint16_t *completed_index, uint8_t *ingress_port, uint8_t *fcoe,
 185         uint8_t *eop, uint8_t *sop, uint8_t *rss_type, uint8_t *csum_not_calc,
 186         uint32_t *rss_hash, uint16_t *bytes_written, uint8_t *packet_error,
 187         uint8_t *vlan_stripped, uint16_t *vlan_tci, uint16_t *checksum,
 188         uint8_t *fcoe_sof, uint8_t *fcoe_fc_crc_ok, uint8_t *fcoe_enc_error,
 189         uint8_t *fcoe_eof, uint8_t *tcp_udp_csum_ok, uint8_t *udp, uint8_t *tcp,
 190         uint8_t *ipv4_csum_ok, uint8_t *ipv6, uint8_t *ipv4,
 191         uint8_t *ipv4_fragment, uint8_t *fcs_ok)
 192 {
 193         uint16_t completed_index_flags;
 194         uint16_t q_number_rss_type_flags;
 195         uint16_t bytes_written_flags;
 196
 197         cq_desc_dec((struct cq_desc *)desc, type,
 198                 color, q_number, completed_index);
 199
 200         completed_index_flags = rte_le_to_cpu_16(desc->completed_index_flags);
 201         q_number_rss_type_flags =
 202                 rte_le_to_cpu_16(desc->q_number_rss_type_flags);
 203         bytes_written_flags = rte_le_to_cpu_16(desc->bytes_written_flags);
 204
 205         *ingress_port = (completed_index_flags &
 206                 CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;
 207         *fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?
 208                 1 : 0;
 209         *eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?
 210                 1 : 0;
 211         *sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?
 212                 1 : 0;
 213
 214         *rss_type = (uint8_t)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &
 215                 CQ_ENET_RQ_DESC_RSS_TYPE_MASK);
 216         *csum_not_calc = (q_number_rss_type_flags &
 217                 CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;
 218
 219         *rss_hash = rte_le_to_cpu_32(desc->rss_hash);
 220
 221         *bytes_written = bytes_written_flags &
 222                 CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
 223         *packet_error = (bytes_written_flags &
 224                 CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;
 225         *vlan_stripped = (bytes_written_flags &
 226                 CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;
 227
 228         /*
 229          * Tag Control Information(16) = user_priority(3) + cfi(1) + vlan(12)
 230          */
 231         *vlan_tci = rte_le_to_cpu_16(desc->vlan);
 232
 233         if (*fcoe) {
 234                 *fcoe_sof = (uint8_t)(rte_le_to_cpu_16(desc->checksum_fcoe) &
 235                         CQ_ENET_RQ_DESC_FCOE_SOF_MASK);
 236                 *fcoe_fc_crc_ok = (desc->flags &
 237                         CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
 238                 *fcoe_enc_error = (desc->flags &
 239                         CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
 240                 *fcoe_eof = (uint8_t)((rte_le_to_cpu_16(desc->checksum_fcoe) >>
 241                         CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
 242                         CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
 243                 *checksum = 0;
 244         } else {
 245                 *fcoe_sof = 0;
 246                 *fcoe_fc_crc_ok = 0;
 247                 *fcoe_enc_error = 0;
 248                 *fcoe_eof = 0;
 249                 *checksum = rte_le_to_cpu_16(desc->checksum_fcoe);
 250         }
 251
 252         *tcp_udp_csum_ok =
 253                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;
 254         *udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;
 255         *tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;
 256         *ipv4_csum_ok =
 257                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;
 258         *ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;
 259         *ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;
 260         *ipv4_fragment =
 261                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;
 262         *fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;
 263 }
 264
 265 #endif /* _CQ_ENET_DESC_H_ */