drivers/net/enic/base/cq_enet_desc.h

   1 /*
   2  * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  *
   5  * Copyright (c) 2014, Cisco Systems, Inc.
   6  * All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  *
  12  * 1. Redistributions of source code must retain the above copyright
  13  * notice, this list of conditions and the following disclaimer.
  14  *
  15  * 2. Redistributions in binary form must reproduce the above copyright
  16  * notice, this list of conditions and the following disclaimer in
  17  * the documentation and/or other materials provided with the
  18  * distribution.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  23  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  24  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  26  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  28  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  30  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  */
  34 #ident "$Id: cq_enet_desc.h 160468 2014-02-18 09:50:15Z gvaradar $"
  35
  36 #ifndef _CQ_ENET_DESC_H_
  37 #define _CQ_ENET_DESC_H_
  38
  39 #include "cq_desc.h"
  40
  41 /* Ethernet completion queue descriptor: 16B */
  42 struct cq_enet_wq_desc {
  43         __le16 completed_index;
  44         __le16 q_number;
  45         u8 reserved[11];
  46         u8 type_color;
  47 };
  48
  49 static inline void cq_enet_wq_desc_enc(struct cq_enet_wq_desc *desc,
  50         u8 type, u8 color, u16 q_number, u16 completed_index)
  51 {
  52         cq_desc_enc((struct cq_desc *)desc, type,
  53                 color, q_number, completed_index);
  54 }
  55
  56 static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,
  57         u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
  58 {
  59         cq_desc_dec((struct cq_desc *)desc, type,
  60                 color, q_number, completed_index);
  61 }
  62
  63 /* Completion queue descriptor: Ethernet receive queue, 16B */
  64 struct cq_enet_rq_desc {
  65         __le16 completed_index_flags;
  66         __le16 q_number_rss_type_flags;
  67         __le32 rss_hash;
  68         __le16 bytes_written_flags;
  69         __le16 vlan;
  70         __le16 checksum_fcoe;
  71         u8 flags;
  72         u8 type_color;
  73 };
  74
  75 #define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT          (0x1 << 12)
  76 #define CQ_ENET_RQ_DESC_FLAGS_FCOE                  (0x1 << 13)
  77 #define CQ_ENET_RQ_DESC_FLAGS_EOP                   (0x1 << 14)
  78 #define CQ_ENET_RQ_DESC_FLAGS_SOP                   (0x1 << 15)
  79
  80 #define CQ_ENET_RQ_DESC_RSS_TYPE_BITS               4
  81 #define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \
  82         ((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)
  83 #define CQ_ENET_RQ_DESC_RSS_TYPE_NONE               0
  84 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4               1
  85 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4           2
  86 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6               3
  87 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6           4
  88 #define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX            5
  89 #define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX        6
  90
  91 #define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC         (0x1 << 14)
  92
  93 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS          14
  94 #define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \
  95         ((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)
  96 #define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED             (0x1 << 14)
  97 #define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED         (0x1 << 15)
  98
  99 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS          12
 100 #define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK \
 101         ((1 << CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS) - 1)
 102 #define CQ_ENET_RQ_DESC_VLAN_TCI_CFI_MASK           (0x1 << 12)
 103 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS     3
 104 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_MASK \
 105         ((1 << CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS) - 1)
 106 #define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_SHIFT    13
 107
 108 #define CQ_ENET_RQ_DESC_FCOE_SOF_BITS               8
 109 #define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \
 110         ((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)
 111 #define CQ_ENET_RQ_DESC_FCOE_EOF_BITS               8
 112 #define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \
 113         ((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)
 114 #define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT              8
 115
 116 #define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK       (0x1 << 0)
 117 #define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK              (0x1 << 0)
 118 #define CQ_ENET_RQ_DESC_FLAGS_UDP                   (0x1 << 1)
 119 #define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR              (0x1 << 1)
 120 #define CQ_ENET_RQ_DESC_FLAGS_TCP                   (0x1 << 2)
 121 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK          (0x1 << 3)
 122 #define CQ_ENET_RQ_DESC_FLAGS_IPV6                  (0x1 << 4)
 123 #define CQ_ENET_RQ_DESC_FLAGS_IPV4                  (0x1 << 5)
 124 #define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT         (0x1 << 6)
 125 #define CQ_ENET_RQ_DESC_FLAGS_FCS_OK                (0x1 << 7)
 126
 127 static inline void cq_enet_rq_desc_enc(struct cq_enet_rq_desc *desc,
 128         u8 type, u8 color, u16 q_number, u16 completed_index,
 129         u8 ingress_port, u8 fcoe, u8 eop, u8 sop, u8 rss_type, u8 csum_not_calc,
 130         u32 rss_hash, u16 bytes_written, u8 packet_error, u8 vlan_stripped,
 131         u16 vlan, u16 checksum, u8 fcoe_sof, u8 fcoe_fc_crc_ok,
 132         u8 fcoe_enc_error, u8 fcoe_eof, u8 tcp_udp_csum_ok, u8 udp, u8 tcp,
 133         u8 ipv4_csum_ok, u8 ipv6, u8 ipv4, u8 ipv4_fragment, u8 fcs_ok)
 134 {
 135         cq_desc_enc((struct cq_desc *)desc, type,
 136                 color, q_number, completed_index);
 137
 138         desc->completed_index_flags |= cpu_to_le16(
 139                 (ingress_port ? CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT : 0) |
 140                 (fcoe ? CQ_ENET_RQ_DESC_FLAGS_FCOE : 0) |
 141                 (eop ? CQ_ENET_RQ_DESC_FLAGS_EOP : 0) |
 142                 (sop ? CQ_ENET_RQ_DESC_FLAGS_SOP : 0));
 143
 144         desc->q_number_rss_type_flags |= cpu_to_le16(
 145                 ((rss_type & CQ_ENET_RQ_DESC_RSS_TYPE_MASK) <<
 146                 CQ_DESC_Q_NUM_BITS) |
 147                 (csum_not_calc ? CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC : 0));
 148
 149         desc->rss_hash = cpu_to_le32(rss_hash);
 150
 151         desc->bytes_written_flags = cpu_to_le16(
 152                 (bytes_written & CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK) |
 153                 (packet_error ? CQ_ENET_RQ_DESC_FLAGS_TRUNCATED : 0) |
 154                 (vlan_stripped ? CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED : 0));
 155
 156         desc->vlan = cpu_to_le16(vlan);
 157
 158         if (fcoe) {
 159                 desc->checksum_fcoe = cpu_to_le16(
 160                         (fcoe_sof & CQ_ENET_RQ_DESC_FCOE_SOF_MASK) |
 161                         ((fcoe_eof & CQ_ENET_RQ_DESC_FCOE_EOF_MASK) <<
 162                                 CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT));
 163         } else {
 164                 desc->checksum_fcoe = cpu_to_le16(checksum);
 165         }
 166
 167         desc->flags =
 168                 (tcp_udp_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK : 0) |
 169                 (udp ? CQ_ENET_RQ_DESC_FLAGS_UDP : 0) |
 170                 (tcp ? CQ_ENET_RQ_DESC_FLAGS_TCP : 0) |
 171                 (ipv4_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK : 0) |
 172                 (ipv6 ? CQ_ENET_RQ_DESC_FLAGS_IPV6 : 0) |
 173                 (ipv4 ? CQ_ENET_RQ_DESC_FLAGS_IPV4 : 0) |
 174                 (ipv4_fragment ? CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT : 0) |
 175                 (fcs_ok ? CQ_ENET_RQ_DESC_FLAGS_FCS_OK : 0) |
 176                 (fcoe_fc_crc_ok ? CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK : 0) |
 177                 (fcoe_enc_error ? CQ_ENET_RQ_DESC_FCOE_ENC_ERROR : 0);
 178 }
 179
 180 static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,
 181         u8 *type, u8 *color, u16 *q_number, u16 *completed_index,
 182         u8 *ingress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type,
 183         u8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error,
 184         u8 *vlan_stripped, u16 *vlan_tci, u16 *checksum, u8 *fcoe_sof,
 185         u8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, u8 *fcoe_eof,
 186         u8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, u8 *ipv4_csum_ok,
 187         u8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, u8 *fcs_ok)
 188 {
 189         u16 completed_index_flags;
 190         u16 q_number_rss_type_flags;
 191         u16 bytes_written_flags;
 192
 193         cq_desc_dec((struct cq_desc *)desc, type,
 194                 color, q_number, completed_index);
 195
 196         completed_index_flags = le16_to_cpu(desc->completed_index_flags);
 197         q_number_rss_type_flags =
 198                 le16_to_cpu(desc->q_number_rss_type_flags);
 199         bytes_written_flags = le16_to_cpu(desc->bytes_written_flags);
 200
 201         *ingress_port = (completed_index_flags &
 202                 CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;
 203         *fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?
 204                 1 : 0;
 205         *eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?
 206                 1 : 0;
 207         *sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?
 208                 1 : 0;
 209
 210         *rss_type = (u8)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &
 211                 CQ_ENET_RQ_DESC_RSS_TYPE_MASK);
 212         *csum_not_calc = (q_number_rss_type_flags &
 213                 CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;
 214
 215         *rss_hash = le32_to_cpu(desc->rss_hash);
 216
 217         *bytes_written = bytes_written_flags &
 218                 CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
 219         *packet_error = (bytes_written_flags &
 220                 CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;
 221         *vlan_stripped = (bytes_written_flags &
 222                 CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;
 223
 224         /*
 225          * Tag Control Information(16) = user_priority(3) + cfi(1) + vlan(12)
 226          */
 227         *vlan_tci = le16_to_cpu(desc->vlan);
 228
 229         if (*fcoe) {
 230                 *fcoe_sof = (u8)(le16_to_cpu(desc->checksum_fcoe) &
 231                         CQ_ENET_RQ_DESC_FCOE_SOF_MASK);
 232                 *fcoe_fc_crc_ok = (desc->flags &
 233                         CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;
 234                 *fcoe_enc_error = (desc->flags &
 235                         CQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;
 236                 *fcoe_eof = (u8)((le16_to_cpu(desc->checksum_fcoe) >>
 237                         CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &
 238                         CQ_ENET_RQ_DESC_FCOE_EOF_MASK);
 239                 *checksum = 0;
 240         } else {
 241                 *fcoe_sof = 0;
 242                 *fcoe_fc_crc_ok = 0;
 243                 *fcoe_enc_error = 0;
 244                 *fcoe_eof = 0;
 245                 *checksum = le16_to_cpu(desc->checksum_fcoe);
 246         }
 247
 248         *tcp_udp_csum_ok =
 249                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;
 250         *udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;
 251         *tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;
 252         *ipv4_csum_ok =
 253                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;
 254         *ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;
 255         *ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;
 256         *ipv4_fragment =
 257                 (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;
 258         *fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;
 259 }
 260
 261 #endif /* _CQ_ENET_DESC_H_ */