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3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * Copyright (c) 2015, Cisco Systems, Inc.
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35 #ifndef _ENIC_VNIC_WQ_H_
36 #define _ENIC_VNIC_WQ_H_
41 static inline void enic_vnic_post_wq_index(struct vnic_wq *wq)
43 /* Adding write memory barrier prevents compiler and/or CPU
44 * reordering, thus avoiding descriptor posting before
45 * descriptor is initialized. Otherwise, hardware can read
46 * stale descriptor fields.
49 iowrite32(wq->head_idx, &wq->ctrl->posted_index);
52 static inline void enic_vnic_post_wq(struct vnic_wq *wq,
53 void *os_buf, uint8_t cq_entry)
55 struct vnic_wq_buf *buf = &wq->bufs[wq->head_idx];
57 wq->head_idx = enic_ring_incr(wq->ring.desc_count, wq->head_idx);
60 enic_vnic_post_wq_index(wq);
63 #endif /* _ENIC_VNIC_WQ_H_ */