2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * Copyright (c) 2014, Cisco Systems, Inc.
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38 void vnic_rq_free(struct vnic_rq *rq)
40 struct vnic_dev *vdev;
44 vnic_dev_free_desc_ring(vdev, &rq->ring);
49 int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index,
50 unsigned int desc_count, unsigned int desc_size)
53 char res_name[NAME_MAX];
59 rq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_RQ, index);
61 pr_err("Failed to hook RQ[%d] resource\n", index);
67 snprintf(res_name, sizeof(res_name), "%d-rq-%d", instance++, index);
68 rc = vnic_dev_alloc_desc_ring(vdev, &rq->ring, desc_count, desc_size,
69 rq->socket_id, res_name);
73 void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index,
74 unsigned int fetch_index, unsigned int posted_index,
75 unsigned int error_interrupt_enable,
76 unsigned int error_interrupt_offset)
79 unsigned int count = rq->ring.desc_count;
81 paddr = (u64)rq->ring.base_addr | VNIC_PADDR_TARGET;
82 writeq(paddr, &rq->ctrl->ring_base);
83 iowrite32(count, &rq->ctrl->ring_size);
84 iowrite32(cq_index, &rq->ctrl->cq_index);
85 iowrite32(error_interrupt_enable, &rq->ctrl->error_interrupt_enable);
86 iowrite32(error_interrupt_offset, &rq->ctrl->error_interrupt_offset);
87 iowrite32(0, &rq->ctrl->error_status);
88 iowrite32(fetch_index, &rq->ctrl->fetch_index);
89 iowrite32(posted_index, &rq->ctrl->posted_index);
90 if (rq->data_queue_enable)
91 iowrite32(((1 << 10) | rq->data_queue_idx),
92 &rq->ctrl->data_ring);
94 iowrite32(0, &rq->ctrl->data_ring);
97 void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,
98 unsigned int error_interrupt_enable,
99 unsigned int error_interrupt_offset)
103 /* Use current fetch_index as the ring starting point */
104 fetch_index = ioread32(&rq->ctrl->fetch_index);
106 if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
107 /* Hardware surprise removal: reset fetch_index */
111 vnic_rq_init_start(rq, cq_index,
112 fetch_index, fetch_index,
113 error_interrupt_enable,
114 error_interrupt_offset);
117 rq->pkt_first_seg = NULL;
118 rq->pkt_last_seg = NULL;
121 void vnic_rq_error_out(struct vnic_rq *rq, unsigned int error)
123 iowrite32(error, &rq->ctrl->error_status);
126 unsigned int vnic_rq_error_status(struct vnic_rq *rq)
128 return ioread32(&rq->ctrl->error_status);
131 void vnic_rq_enable(struct vnic_rq *rq)
133 iowrite32(1, &rq->ctrl->enable);
136 int vnic_rq_disable(struct vnic_rq *rq)
140 iowrite32(0, &rq->ctrl->enable);
142 /* Wait for HW to ACK disable request */
143 for (wait = 0; wait < 1000; wait++) {
144 if (!(ioread32(&rq->ctrl->running)))
149 pr_err("Failed to disable RQ[%d]\n", rq->index);
154 void vnic_rq_clean(struct vnic_rq *rq,
155 void (*buf_clean)(struct rte_mbuf **buf))
157 struct rte_mbuf **buf;
159 unsigned int count = rq->ring.desc_count;
161 buf = &rq->mbuf_ring[0];
163 for (i = 0; i < count; i++) {
167 rq->ring.desc_avail = count - 1;
170 /* Use current fetch_index as the ring starting point */
171 fetch_index = ioread32(&rq->ctrl->fetch_index);
173 if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
174 /* Hardware surprise removal: reset fetch_index */
178 iowrite32(fetch_index, &rq->ctrl->posted_index);
180 vnic_dev_clear_desc_ring(&rq->ring);