1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
11 #include <rte_bus_pci.h>
12 #include <rte_ethdev_driver.h>
13 #include <rte_ethdev_pci.h>
14 #include <rte_kvargs.h>
15 #include <rte_string_fns.h>
17 #include "vnic_intr.h"
21 #include "vnic_enet.h"
24 int enicpmd_logtype_init;
25 int enicpmd_logtype_flow;
27 #define PMD_INIT_LOG(level, fmt, args...) \
28 rte_log(RTE_LOG_ ## level, enicpmd_logtype_init, \
29 "%s" fmt "\n", __func__, ##args)
31 #define ENICPMD_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>")
34 * The set of PCI devices this driver supports
36 #define CISCO_PCI_VENDOR_ID 0x1137
37 static const struct rte_pci_id pci_id_enic_map[] = {
38 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) },
39 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
40 {.vendor_id = 0, /* sentinel */},
43 #define ENIC_DEVARG_DISABLE_OVERLAY "disable-overlay"
45 RTE_INIT(enicpmd_init_log);
47 enicpmd_init_log(void)
49 enicpmd_logtype_init = rte_log_register("pmd.net.enic.init");
50 if (enicpmd_logtype_init >= 0)
51 rte_log_set_level(enicpmd_logtype_init, RTE_LOG_NOTICE);
52 enicpmd_logtype_flow = rte_log_register("pmd.net.enic.flow");
53 if (enicpmd_logtype_flow >= 0)
54 rte_log_set_level(enicpmd_logtype_flow, RTE_LOG_NOTICE);
58 enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev,
59 enum rte_filter_op filter_op, void *arg)
61 struct enic *enic = pmd_priv(eth_dev);
65 if (filter_op == RTE_ETH_FILTER_NOP)
68 if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
72 case RTE_ETH_FILTER_ADD:
73 case RTE_ETH_FILTER_UPDATE:
74 ret = enic_fdir_add_fltr(enic,
75 (struct rte_eth_fdir_filter *)arg);
78 case RTE_ETH_FILTER_DELETE:
79 ret = enic_fdir_del_fltr(enic,
80 (struct rte_eth_fdir_filter *)arg);
83 case RTE_ETH_FILTER_STATS:
84 enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg);
87 case RTE_ETH_FILTER_FLUSH:
88 dev_warning(enic, "unsupported operation %u", filter_op);
91 case RTE_ETH_FILTER_INFO:
92 enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg);
95 dev_err(enic, "unknown operation %u", filter_op);
103 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,
104 enum rte_filter_type filter_type,
105 enum rte_filter_op filter_op,
110 ENICPMD_FUNC_TRACE();
112 switch (filter_type) {
113 case RTE_ETH_FILTER_GENERIC:
114 if (filter_op != RTE_ETH_FILTER_GET)
116 *(const void **)arg = &enic_flow_ops;
118 case RTE_ETH_FILTER_FDIR:
119 ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg);
122 dev_warning(enic, "Filter type (%d) not supported",
131 static void enicpmd_dev_tx_queue_release(void *txq)
133 ENICPMD_FUNC_TRACE();
135 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
141 static int enicpmd_dev_setup_intr(struct enic *enic)
146 ENICPMD_FUNC_TRACE();
148 /* Are we done with the init of all the queues? */
149 for (index = 0; index < enic->cq_count; index++) {
150 if (!enic->cq[index].ctrl)
153 if (enic->cq_count != index)
155 for (index = 0; index < enic->wq_count; index++) {
156 if (!enic->wq[index].ctrl)
159 if (enic->wq_count != index)
161 /* check start of packet (SOP) RQs only in case scatter is disabled. */
162 for (index = 0; index < enic->rq_count; index++) {
163 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl)
166 if (enic->rq_count != index)
169 ret = enic_alloc_intr_resources(enic);
171 dev_err(enic, "alloc intr failed\n");
174 enic_init_vnic_resources(enic);
176 ret = enic_setup_finish(enic);
178 dev_err(enic, "setup could not be finished\n");
183 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
186 unsigned int socket_id,
187 __rte_unused const struct rte_eth_txconf *tx_conf)
190 struct enic *enic = pmd_priv(eth_dev);
192 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
193 return -E_RTE_SECONDARY;
195 ENICPMD_FUNC_TRACE();
196 RTE_ASSERT(queue_idx < enic->conf_wq_count);
197 eth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx];
199 ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);
201 dev_err(enic, "error in allocating wq\n");
205 return enicpmd_dev_setup_intr(enic);
208 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
211 struct enic *enic = pmd_priv(eth_dev);
213 ENICPMD_FUNC_TRACE();
215 enic_start_wq(enic, queue_idx);
220 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
224 struct enic *enic = pmd_priv(eth_dev);
226 ENICPMD_FUNC_TRACE();
228 ret = enic_stop_wq(enic, queue_idx);
230 dev_err(enic, "error in stopping wq %d\n", queue_idx);
235 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
238 struct enic *enic = pmd_priv(eth_dev);
240 ENICPMD_FUNC_TRACE();
242 enic_start_rq(enic, queue_idx);
247 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
251 struct enic *enic = pmd_priv(eth_dev);
253 ENICPMD_FUNC_TRACE();
255 ret = enic_stop_rq(enic, queue_idx);
257 dev_err(enic, "error in stopping rq %d\n", queue_idx);
262 static void enicpmd_dev_rx_queue_release(void *rxq)
264 ENICPMD_FUNC_TRACE();
266 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
272 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev,
273 uint16_t rx_queue_id)
275 struct enic *enic = pmd_priv(dev);
276 uint32_t queue_count = 0;
282 rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
283 cq = &enic->cq[enic_cq_rq(enic, rq_num)];
284 cq_idx = cq->to_clean;
286 cq_tail = ioread32(&cq->ctrl->cq_tail);
288 if (cq_tail < cq_idx)
289 cq_tail += cq->ring.desc_count;
291 queue_count = cq_tail - cq_idx;
296 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
299 unsigned int socket_id,
300 const struct rte_eth_rxconf *rx_conf,
301 struct rte_mempool *mp)
304 struct enic *enic = pmd_priv(eth_dev);
306 ENICPMD_FUNC_TRACE();
308 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
309 return -E_RTE_SECONDARY;
310 RTE_ASSERT(enic_rte_rq_idx_to_sop_idx(queue_idx) < enic->conf_rq_count);
311 eth_dev->data->rx_queues[queue_idx] =
312 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
314 ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc,
315 rx_conf->rx_free_thresh);
317 dev_err(enic, "error in allocating rq\n");
321 return enicpmd_dev_setup_intr(enic);
324 static int enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
326 struct enic *enic = pmd_priv(eth_dev);
329 ENICPMD_FUNC_TRACE();
331 offloads = eth_dev->data->dev_conf.rxmode.offloads;
332 if (mask & ETH_VLAN_STRIP_MASK) {
333 if (offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
334 enic->ig_vlan_strip_en = 1;
336 enic->ig_vlan_strip_en = 0;
339 if ((mask & ETH_VLAN_FILTER_MASK) &&
340 (offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
342 "Configuration of VLAN filter is not supported\n");
345 if ((mask & ETH_VLAN_EXTEND_MASK) &&
346 (offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)) {
348 "Configuration of extended VLAN is not supported\n");
351 return enic_set_vlan_strip(enic);
354 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)
358 struct enic *enic = pmd_priv(eth_dev);
360 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
361 return -E_RTE_SECONDARY;
363 ENICPMD_FUNC_TRACE();
364 ret = enic_set_vnic_res(enic);
366 dev_err(enic, "Set vNIC resource num failed, aborting\n");
370 enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads &
371 DEV_RX_OFFLOAD_CHECKSUM);
372 /* All vlan offload masks to apply the current settings */
373 mask = ETH_VLAN_STRIP_MASK |
374 ETH_VLAN_FILTER_MASK |
375 ETH_VLAN_EXTEND_MASK;
376 ret = enicpmd_vlan_offload_set(eth_dev, mask);
378 dev_err(enic, "Failed to configure VLAN offloads\n");
382 * Initialize RSS with the default reta and key. If the user key is
383 * given (rx_adv_conf.rss_conf.rss_key), will use that instead of the
386 return enic_init_rss_nic_cfg(enic);
390 * It returns 0 on success.
392 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)
394 struct enic *enic = pmd_priv(eth_dev);
396 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
397 return -E_RTE_SECONDARY;
399 ENICPMD_FUNC_TRACE();
400 return enic_enable(enic);
404 * Stop device: disable rx and tx functions to allow for reconfiguring.
406 static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev)
408 struct rte_eth_link link;
409 struct enic *enic = pmd_priv(eth_dev);
411 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
414 ENICPMD_FUNC_TRACE();
417 memset(&link, 0, sizeof(link));
418 rte_eth_linkstatus_set(eth_dev, &link);
424 static void enicpmd_dev_close(struct rte_eth_dev *eth_dev)
426 struct enic *enic = pmd_priv(eth_dev);
428 ENICPMD_FUNC_TRACE();
432 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,
433 __rte_unused int wait_to_complete)
435 struct enic *enic = pmd_priv(eth_dev);
437 ENICPMD_FUNC_TRACE();
438 return enic_link_update(enic);
441 static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,
442 struct rte_eth_stats *stats)
444 struct enic *enic = pmd_priv(eth_dev);
446 ENICPMD_FUNC_TRACE();
447 return enic_dev_stats_get(enic, stats);
450 static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)
452 struct enic *enic = pmd_priv(eth_dev);
454 ENICPMD_FUNC_TRACE();
455 enic_dev_stats_clear(enic);
458 static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,
459 struct rte_eth_dev_info *device_info)
461 struct enic *enic = pmd_priv(eth_dev);
463 ENICPMD_FUNC_TRACE();
464 /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */
465 device_info->max_rx_queues = enic->conf_rq_count / 2;
466 device_info->max_tx_queues = enic->conf_wq_count;
467 device_info->min_rx_bufsize = ENIC_MIN_MTU;
468 /* "Max" mtu is not a typo. HW receives packet sizes up to the
469 * max mtu regardless of the current mtu (vNIC's mtu). vNIC mtu is
470 * a hint to the driver to size receive buffers accordingly so that
471 * larger-than-vnic-mtu packets get truncated.. For DPDK, we let
472 * the user decide the buffer size via rxmode.max_rx_pkt_len, basically
475 device_info->max_rx_pktlen = enic_mtu_to_max_rx_pktlen(enic->max_mtu);
476 device_info->max_mac_addrs = ENIC_MAX_MAC_ADDR;
477 device_info->rx_offload_capa = enic->rx_offload_capa;
478 device_info->tx_offload_capa = enic->tx_offload_capa;
479 device_info->default_rxconf = (struct rte_eth_rxconf) {
480 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH
482 device_info->reta_size = enic->reta_size;
483 device_info->hash_key_size = enic->hash_key_size;
484 device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads;
487 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev)
489 static const uint32_t ptypes[] = {
491 RTE_PTYPE_L2_ETHER_VLAN,
492 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
493 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
497 RTE_PTYPE_L4_NONFRAG,
501 if (dev->rx_pkt_burst == enic_recv_pkts)
506 static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
508 struct enic *enic = pmd_priv(eth_dev);
510 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
513 ENICPMD_FUNC_TRACE();
516 enic_add_packet_filter(enic);
519 static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
521 struct enic *enic = pmd_priv(eth_dev);
523 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
526 ENICPMD_FUNC_TRACE();
528 enic_add_packet_filter(enic);
531 static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
533 struct enic *enic = pmd_priv(eth_dev);
535 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
538 ENICPMD_FUNC_TRACE();
540 enic_add_packet_filter(enic);
543 static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
545 struct enic *enic = pmd_priv(eth_dev);
547 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
550 ENICPMD_FUNC_TRACE();
552 enic_add_packet_filter(enic);
555 static int enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,
556 struct ether_addr *mac_addr,
557 __rte_unused uint32_t index, __rte_unused uint32_t pool)
559 struct enic *enic = pmd_priv(eth_dev);
561 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
562 return -E_RTE_SECONDARY;
564 ENICPMD_FUNC_TRACE();
565 return enic_set_mac_address(enic, mac_addr->addr_bytes);
568 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index)
570 struct enic *enic = pmd_priv(eth_dev);
572 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
575 ENICPMD_FUNC_TRACE();
576 if (enic_del_mac_address(enic, index))
577 dev_err(enic, "del mac addr failed\n");
580 static int enicpmd_set_mac_addr(struct rte_eth_dev *eth_dev,
581 struct ether_addr *addr)
583 struct enic *enic = pmd_priv(eth_dev);
586 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
587 return -E_RTE_SECONDARY;
589 ENICPMD_FUNC_TRACE();
590 ret = enic_del_mac_address(enic, 0);
593 return enic_set_mac_address(enic, addr->addr_bytes);
596 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
598 struct enic *enic = pmd_priv(eth_dev);
600 ENICPMD_FUNC_TRACE();
601 return enic_set_mtu(enic, mtu);
604 static int enicpmd_dev_rss_reta_query(struct rte_eth_dev *dev,
605 struct rte_eth_rss_reta_entry64
609 struct enic *enic = pmd_priv(dev);
610 uint16_t i, idx, shift;
612 ENICPMD_FUNC_TRACE();
613 if (reta_size != ENIC_RSS_RETA_SIZE) {
614 dev_err(enic, "reta_query: wrong reta_size. given=%u expected=%u\n",
615 reta_size, ENIC_RSS_RETA_SIZE);
619 for (i = 0; i < reta_size; i++) {
620 idx = i / RTE_RETA_GROUP_SIZE;
621 shift = i % RTE_RETA_GROUP_SIZE;
622 if (reta_conf[idx].mask & (1ULL << shift))
623 reta_conf[idx].reta[shift] = enic_sop_rq_idx_to_rte_idx(
624 enic->rss_cpu.cpu[i / 4].b[i % 4]);
630 static int enicpmd_dev_rss_reta_update(struct rte_eth_dev *dev,
631 struct rte_eth_rss_reta_entry64
635 struct enic *enic = pmd_priv(dev);
636 union vnic_rss_cpu rss_cpu;
637 uint16_t i, idx, shift;
639 ENICPMD_FUNC_TRACE();
640 if (reta_size != ENIC_RSS_RETA_SIZE) {
641 dev_err(enic, "reta_update: wrong reta_size. given=%u"
643 reta_size, ENIC_RSS_RETA_SIZE);
647 * Start with the current reta and modify it per reta_conf, as we
648 * need to push the entire reta even if we only modify one entry.
650 rss_cpu = enic->rss_cpu;
651 for (i = 0; i < reta_size; i++) {
652 idx = i / RTE_RETA_GROUP_SIZE;
653 shift = i % RTE_RETA_GROUP_SIZE;
654 if (reta_conf[idx].mask & (1ULL << shift))
655 rss_cpu.cpu[i / 4].b[i % 4] =
656 enic_rte_rq_idx_to_sop_idx(
657 reta_conf[idx].reta[shift]);
659 return enic_set_rss_reta(enic, &rss_cpu);
662 static int enicpmd_dev_rss_hash_update(struct rte_eth_dev *dev,
663 struct rte_eth_rss_conf *rss_conf)
665 struct enic *enic = pmd_priv(dev);
667 ENICPMD_FUNC_TRACE();
668 return enic_set_rss_conf(enic, rss_conf);
671 static int enicpmd_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
672 struct rte_eth_rss_conf *rss_conf)
674 struct enic *enic = pmd_priv(dev);
676 ENICPMD_FUNC_TRACE();
677 if (rss_conf == NULL)
679 if (rss_conf->rss_key != NULL &&
680 rss_conf->rss_key_len < ENIC_RSS_HASH_KEY_SIZE) {
681 dev_err(enic, "rss_hash_conf_get: wrong rss_key_len. given=%u"
683 rss_conf->rss_key_len, ENIC_RSS_HASH_KEY_SIZE);
686 rss_conf->rss_hf = enic->rss_hf;
687 if (rss_conf->rss_key != NULL) {
689 for (i = 0; i < ENIC_RSS_HASH_KEY_SIZE; i++) {
690 rss_conf->rss_key[i] =
691 enic->rss_key.key[i / 10].b[i % 10];
693 rss_conf->rss_key_len = ENIC_RSS_HASH_KEY_SIZE;
698 static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev,
699 uint16_t rx_queue_id,
700 struct rte_eth_rxq_info *qinfo)
702 struct enic *enic = pmd_priv(dev);
703 struct vnic_rq *rq_sop;
704 struct vnic_rq *rq_data;
705 struct rte_eth_rxconf *conf;
706 uint16_t sop_queue_idx;
707 uint16_t data_queue_idx;
709 ENICPMD_FUNC_TRACE();
710 sop_queue_idx = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
711 data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id);
712 rq_sop = &enic->rq[sop_queue_idx];
713 rq_data = &enic->rq[data_queue_idx]; /* valid if data_queue_enable */
714 qinfo->mp = rq_sop->mp;
715 qinfo->scattered_rx = rq_sop->data_queue_enable;
716 qinfo->nb_desc = rq_sop->ring.desc_count;
717 if (qinfo->scattered_rx)
718 qinfo->nb_desc += rq_data->ring.desc_count;
720 memset(conf, 0, sizeof(*conf));
721 conf->rx_free_thresh = rq_sop->rx_free_thresh;
722 conf->rx_drop_en = 1;
724 * Except VLAN stripping (port setting), all the checksum offloads
725 * are always enabled.
727 conf->offloads = enic->rx_offload_capa;
728 if (!enic->ig_vlan_strip_en)
729 conf->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
730 /* rx_thresh and other fields are not applicable for enic */
733 static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev,
734 __rte_unused uint16_t tx_queue_id,
735 struct rte_eth_txq_info *qinfo)
737 struct enic *enic = pmd_priv(dev);
739 ENICPMD_FUNC_TRACE();
740 qinfo->nb_desc = enic->config.wq_desc_count;
741 memset(&qinfo->conf, 0, sizeof(qinfo->conf));
742 qinfo->conf.offloads = enic->tx_offload_capa;
743 /* tx_thresh, and all the other fields are not applicable for enic */
746 static int enicpmd_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev,
747 uint16_t rx_queue_id)
749 struct enic *enic = pmd_priv(eth_dev);
751 ENICPMD_FUNC_TRACE();
752 vnic_intr_unmask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
756 static int enicpmd_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev,
757 uint16_t rx_queue_id)
759 struct enic *enic = pmd_priv(eth_dev);
761 ENICPMD_FUNC_TRACE();
762 vnic_intr_mask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
766 static const struct eth_dev_ops enicpmd_eth_dev_ops = {
767 .dev_configure = enicpmd_dev_configure,
768 .dev_start = enicpmd_dev_start,
769 .dev_stop = enicpmd_dev_stop,
770 .dev_set_link_up = NULL,
771 .dev_set_link_down = NULL,
772 .dev_close = enicpmd_dev_close,
773 .promiscuous_enable = enicpmd_dev_promiscuous_enable,
774 .promiscuous_disable = enicpmd_dev_promiscuous_disable,
775 .allmulticast_enable = enicpmd_dev_allmulticast_enable,
776 .allmulticast_disable = enicpmd_dev_allmulticast_disable,
777 .link_update = enicpmd_dev_link_update,
778 .stats_get = enicpmd_dev_stats_get,
779 .stats_reset = enicpmd_dev_stats_reset,
780 .queue_stats_mapping_set = NULL,
781 .dev_infos_get = enicpmd_dev_info_get,
782 .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get,
783 .mtu_set = enicpmd_mtu_set,
784 .vlan_filter_set = NULL,
785 .vlan_tpid_set = NULL,
786 .vlan_offload_set = enicpmd_vlan_offload_set,
787 .vlan_strip_queue_set = NULL,
788 .rx_queue_start = enicpmd_dev_rx_queue_start,
789 .rx_queue_stop = enicpmd_dev_rx_queue_stop,
790 .tx_queue_start = enicpmd_dev_tx_queue_start,
791 .tx_queue_stop = enicpmd_dev_tx_queue_stop,
792 .rx_queue_setup = enicpmd_dev_rx_queue_setup,
793 .rx_queue_release = enicpmd_dev_rx_queue_release,
794 .rx_queue_count = enicpmd_dev_rx_queue_count,
795 .rx_descriptor_done = NULL,
796 .tx_queue_setup = enicpmd_dev_tx_queue_setup,
797 .tx_queue_release = enicpmd_dev_tx_queue_release,
798 .rx_queue_intr_enable = enicpmd_dev_rx_queue_intr_enable,
799 .rx_queue_intr_disable = enicpmd_dev_rx_queue_intr_disable,
800 .rxq_info_get = enicpmd_dev_rxq_info_get,
801 .txq_info_get = enicpmd_dev_txq_info_get,
804 .flow_ctrl_get = NULL,
805 .flow_ctrl_set = NULL,
806 .priority_flow_ctrl_set = NULL,
807 .mac_addr_add = enicpmd_add_mac_addr,
808 .mac_addr_remove = enicpmd_remove_mac_addr,
809 .mac_addr_set = enicpmd_set_mac_addr,
810 .filter_ctrl = enicpmd_dev_filter_ctrl,
811 .reta_query = enicpmd_dev_rss_reta_query,
812 .reta_update = enicpmd_dev_rss_reta_update,
813 .rss_hash_conf_get = enicpmd_dev_rss_hash_conf_get,
814 .rss_hash_update = enicpmd_dev_rss_hash_update,
817 static int enic_parse_disable_overlay(__rte_unused const char *key,
823 enic = (struct enic *)opaque;
824 if (strcmp(value, "0") == 0) {
825 enic->disable_overlay = false;
826 } else if (strcmp(value, "1") == 0) {
827 enic->disable_overlay = true;
829 dev_err(enic, "Invalid value for " ENIC_DEVARG_DISABLE_OVERLAY
830 ": expected=0|1 given=%s\n", value);
836 static int enic_check_devargs(struct rte_eth_dev *dev)
838 static const char *const valid_keys[] = {
839 ENIC_DEVARG_DISABLE_OVERLAY, NULL};
840 struct enic *enic = pmd_priv(dev);
841 struct rte_kvargs *kvlist;
843 ENICPMD_FUNC_TRACE();
845 enic->disable_overlay = false;
846 if (!dev->device->devargs)
848 kvlist = rte_kvargs_parse(dev->device->devargs->args, valid_keys);
851 if (rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_OVERLAY,
852 enic_parse_disable_overlay, enic) < 0) {
853 rte_kvargs_free(kvlist);
856 rte_kvargs_free(kvlist);
860 struct enic *enicpmd_list_head = NULL;
861 /* Initialize the driver
862 * It returns 0 on success.
864 static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)
866 struct rte_pci_device *pdev;
867 struct rte_pci_addr *addr;
868 struct enic *enic = pmd_priv(eth_dev);
871 ENICPMD_FUNC_TRACE();
873 enic->port_id = eth_dev->data->port_id;
874 enic->rte_dev = eth_dev;
875 eth_dev->dev_ops = &enicpmd_eth_dev_ops;
876 eth_dev->rx_pkt_burst = &enic_recv_pkts;
877 eth_dev->tx_pkt_burst = &enic_xmit_pkts;
878 eth_dev->tx_pkt_prepare = &enic_prep_pkts;
880 pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
881 rte_eth_copy_pci_info(eth_dev, pdev);
885 snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x",
886 addr->domain, addr->bus, addr->devid, addr->function);
888 err = enic_check_devargs(eth_dev);
891 return enic_probe(enic);
894 static int eth_enic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
895 struct rte_pci_device *pci_dev)
897 return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct enic),
898 eth_enicpmd_dev_init);
901 static int eth_enic_pci_remove(struct rte_pci_device *pci_dev)
903 return rte_eth_dev_pci_generic_remove(pci_dev, NULL);
906 static struct rte_pci_driver rte_enic_pmd = {
907 .id_table = pci_id_enic_map,
908 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
909 .probe = eth_enic_pci_probe,
910 .remove = eth_enic_pci_remove,
913 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd);
914 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map);
915 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci");
916 RTE_PMD_REGISTER_PARAM_STRING(net_enic,
917 ENIC_DEVARG_DISABLE_OVERLAY "=<0|1> ");