drivers/net/enic/enic_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  */
   5
   6 #include <stdio.h>
   7 #include <stdint.h>
   8
   9 #include <rte_dev.h>
  10 #include <rte_pci.h>
  11 #include <rte_bus_pci.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_ethdev_pci.h>
  14 #include <rte_kvargs.h>
  15 #include <rte_string_fns.h>
  16
  17 #include "vnic_intr.h"
  18 #include "vnic_cq.h"
  19 #include "vnic_wq.h"
  20 #include "vnic_rq.h"
  21 #include "vnic_enet.h"
  22 #include "enic.h"
  23
  24 /*
  25  * The set of PCI devices this driver supports
  26  */
  27 #define CISCO_PCI_VENDOR_ID 0x1137
  28 static const struct rte_pci_id pci_id_enic_map[] = {
  29         {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET)},
  30         {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF)},
  31         {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_SN)},
  32         {.vendor_id = 0, /* sentinel */},
  33 };
  34
  35 /* Supported link speeds of production VIC models */
  36 static const struct vic_speed_capa {
  37         uint16_t sub_devid;
  38         uint32_t capa;
  39 } vic_speed_capa_map[] = {
  40         { 0x0043, ETH_LINK_SPEED_10G }, /* VIC */
  41         { 0x0047, ETH_LINK_SPEED_10G }, /* P81E PCIe */
  42         { 0x0048, ETH_LINK_SPEED_10G }, /* M81KR Mezz */
  43         { 0x004f, ETH_LINK_SPEED_10G }, /* 1280 Mezz */
  44         { 0x0084, ETH_LINK_SPEED_10G }, /* 1240 MLOM */
  45         { 0x0085, ETH_LINK_SPEED_10G }, /* 1225 PCIe */
  46         { 0x00cd, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1285 PCIe */
  47         { 0x00ce, ETH_LINK_SPEED_10G }, /* 1225T PCIe */
  48         { 0x012a, ETH_LINK_SPEED_40G }, /* M4308 */
  49         { 0x012c, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1340 MLOM */
  50         { 0x012e, ETH_LINK_SPEED_10G }, /* 1227 PCIe */
  51         { 0x0137, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1380 Mezz */
  52         { 0x014d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1385 PCIe */
  53         { 0x015d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1387 MLOM */
  54         { 0x0215, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G |
  55                   ETH_LINK_SPEED_40G }, /* 1440 Mezz */
  56         { 0x0216, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G |
  57                   ETH_LINK_SPEED_40G }, /* 1480 MLOM */
  58         { 0x0217, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1455 PCIe */
  59         { 0x0218, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1457 MLOM */
  60         { 0x0219, ETH_LINK_SPEED_40G }, /* 1485 PCIe */
  61         { 0x021a, ETH_LINK_SPEED_40G }, /* 1487 MLOM */
  62         { 0x024a, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1495 PCIe */
  63         { 0x024b, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1497 MLOM */
  64         { 0, 0 }, /* End marker */
  65 };
  66
  67 #define ENIC_DEVARG_DISABLE_OVERLAY "disable-overlay"
  68 #define ENIC_DEVARG_ENABLE_AVX2_RX "enable-avx2-rx"
  69 #define ENIC_DEVARG_GENEVE_OPT "geneve-opt"
  70 #define ENIC_DEVARG_IG_VLAN_REWRITE "ig-vlan-rewrite"
  71 #define ENIC_DEVARG_REPRESENTOR "representor"
  72
  73 RTE_LOG_REGISTER(enic_pmd_logtype, pmd.net.enic, INFO);
  74
  75 static int
  76 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,
  77                      enum rte_filter_type filter_type,
  78                      enum rte_filter_op filter_op,
  79                      void *arg)
  80 {
  81         struct enic *enic = pmd_priv(dev);
  82         int ret = 0;
  83
  84         ENICPMD_FUNC_TRACE();
  85
  86         /*
  87          * Currently, when Geneve with options offload is enabled, host
  88          * cannot insert match-action rules.
  89          */
  90         if (enic->geneve_opt_enabled)
  91                 return -ENOTSUP;
  92         switch (filter_type) {
  93         case RTE_ETH_FILTER_GENERIC:
  94                 if (filter_op != RTE_ETH_FILTER_GET)
  95                         return -EINVAL;
  96                 if (enic->flow_filter_mode == FILTER_FLOWMAN)
  97                         *(const void **)arg = &enic_fm_flow_ops;
  98                 else
  99                         *(const void **)arg = &enic_flow_ops;
 100                 break;
 101         default:
 102                 dev_warning(enic, "Filter type (%d) not supported",
 103                         filter_type);
 104                 ret = -EINVAL;
 105                 break;
 106         }
 107
 108         return ret;
 109 }
 110
 111 static void enicpmd_dev_tx_queue_release(void *txq)
 112 {
 113         ENICPMD_FUNC_TRACE();
 114
 115         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 116                 return;
 117
 118         enic_free_wq(txq);
 119 }
 120
 121 static int enicpmd_dev_setup_intr(struct enic *enic)
 122 {
 123         int ret;
 124         unsigned int index;
 125
 126         ENICPMD_FUNC_TRACE();
 127
 128         /* Are we done with the init of all the queues? */
 129         for (index = 0; index < enic->cq_count; index++) {
 130                 if (!enic->cq[index].ctrl)
 131                         break;
 132         }
 133         if (enic->cq_count != index)
 134                 return 0;
 135         for (index = 0; index < enic->wq_count; index++) {
 136                 if (!enic->wq[index].ctrl)
 137                         break;
 138         }
 139         if (enic->wq_count != index)
 140                 return 0;
 141         /* check start of packet (SOP) RQs only in case scatter is disabled. */
 142         for (index = 0; index < enic->rq_count; index++) {
 143                 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl)
 144                         break;
 145         }
 146         if (enic->rq_count != index)
 147                 return 0;
 148
 149         ret = enic_alloc_intr_resources(enic);
 150         if (ret) {
 151                 dev_err(enic, "alloc intr failed\n");
 152                 return ret;
 153         }
 154         enic_init_vnic_resources(enic);
 155
 156         ret = enic_setup_finish(enic);
 157         if (ret)
 158                 dev_err(enic, "setup could not be finished\n");
 159
 160         return ret;
 161 }
 162
 163 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
 164         uint16_t queue_idx,
 165         uint16_t nb_desc,
 166         unsigned int socket_id,
 167         const struct rte_eth_txconf *tx_conf)
 168 {
 169         int ret;
 170         struct enic *enic = pmd_priv(eth_dev);
 171         struct vnic_wq *wq;
 172
 173         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 174                 return -E_RTE_SECONDARY;
 175
 176         ENICPMD_FUNC_TRACE();
 177         RTE_ASSERT(queue_idx < enic->conf_wq_count);
 178         wq = &enic->wq[queue_idx];
 179         wq->offloads = tx_conf->offloads |
 180                 eth_dev->data->dev_conf.txmode.offloads;
 181         eth_dev->data->tx_queues[queue_idx] = (void *)wq;
 182
 183         ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);
 184         if (ret) {
 185                 dev_err(enic, "error in allocating wq\n");
 186                 return ret;
 187         }
 188
 189         return enicpmd_dev_setup_intr(enic);
 190 }
 191
 192 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
 193         uint16_t queue_idx)
 194 {
 195         struct enic *enic = pmd_priv(eth_dev);
 196
 197         ENICPMD_FUNC_TRACE();
 198
 199         enic_start_wq(enic, queue_idx);
 200
 201         return 0;
 202 }
 203
 204 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
 205         uint16_t queue_idx)
 206 {
 207         int ret;
 208         struct enic *enic = pmd_priv(eth_dev);
 209
 210         ENICPMD_FUNC_TRACE();
 211
 212         ret = enic_stop_wq(enic, queue_idx);
 213         if (ret)
 214                 dev_err(enic, "error in stopping wq %d\n", queue_idx);
 215
 216         return ret;
 217 }
 218
 219 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
 220         uint16_t queue_idx)
 221 {
 222         struct enic *enic = pmd_priv(eth_dev);
 223
 224         ENICPMD_FUNC_TRACE();
 225
 226         enic_start_rq(enic, queue_idx);
 227
 228         return 0;
 229 }
 230
 231 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
 232         uint16_t queue_idx)
 233 {
 234         int ret;
 235         struct enic *enic = pmd_priv(eth_dev);
 236
 237         ENICPMD_FUNC_TRACE();
 238
 239         ret = enic_stop_rq(enic, queue_idx);
 240         if (ret)
 241                 dev_err(enic, "error in stopping rq %d\n", queue_idx);
 242
 243         return ret;
 244 }
 245
 246 static void enicpmd_dev_rx_queue_release(void *rxq)
 247 {
 248         ENICPMD_FUNC_TRACE();
 249
 250         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 251                 return;
 252
 253         enic_free_rq(rxq);
 254 }
 255
 256 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev,
 257                                            uint16_t rx_queue_id)
 258 {
 259         struct enic *enic = pmd_priv(dev);
 260         uint32_t queue_count = 0;
 261         struct vnic_cq *cq;
 262         uint32_t cq_tail;
 263         uint16_t cq_idx;
 264         int rq_num;
 265
 266         rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
 267         cq = &enic->cq[enic_cq_rq(enic, rq_num)];
 268         cq_idx = cq->to_clean;
 269
 270         cq_tail = ioread32(&cq->ctrl->cq_tail);
 271
 272         if (cq_tail < cq_idx)
 273                 cq_tail += cq->ring.desc_count;
 274
 275         queue_count = cq_tail - cq_idx;
 276
 277         return queue_count;
 278 }
 279
 280 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 281         uint16_t queue_idx,
 282         uint16_t nb_desc,
 283         unsigned int socket_id,
 284         const struct rte_eth_rxconf *rx_conf,
 285         struct rte_mempool *mp)
 286 {
 287         int ret;
 288         struct enic *enic = pmd_priv(eth_dev);
 289
 290         ENICPMD_FUNC_TRACE();
 291
 292         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 293                 return -E_RTE_SECONDARY;
 294         RTE_ASSERT(enic_rte_rq_idx_to_sop_idx(queue_idx) < enic->conf_rq_count);
 295         eth_dev->data->rx_queues[queue_idx] =
 296                 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
 297
 298         ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc,
 299                             rx_conf->rx_free_thresh);
 300         if (ret) {
 301                 dev_err(enic, "error in allocating rq\n");
 302                 return ret;
 303         }
 304
 305         return enicpmd_dev_setup_intr(enic);
 306 }
 307
 308 static int enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 309 {
 310         struct enic *enic = pmd_priv(eth_dev);
 311         uint64_t offloads;
 312
 313         ENICPMD_FUNC_TRACE();
 314
 315         offloads = eth_dev->data->dev_conf.rxmode.offloads;
 316         if (mask & ETH_VLAN_STRIP_MASK) {
 317                 if (offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
 318                         enic->ig_vlan_strip_en = 1;
 319                 else
 320                         enic->ig_vlan_strip_en = 0;
 321         }
 322
 323         return enic_set_vlan_strip(enic);
 324 }
 325
 326 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)
 327 {
 328         int ret;
 329         int mask;
 330         struct enic *enic = pmd_priv(eth_dev);
 331
 332         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 333                 return -E_RTE_SECONDARY;
 334
 335         ENICPMD_FUNC_TRACE();
 336         ret = enic_set_vnic_res(enic);
 337         if (ret) {
 338                 dev_err(enic, "Set vNIC resource num  failed, aborting\n");
 339                 return ret;
 340         }
 341
 342         if (eth_dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
 343                 eth_dev->data->dev_conf.rxmode.offloads |=
 344                         DEV_RX_OFFLOAD_RSS_HASH;
 345
 346         enic->mc_count = 0;
 347         enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads &
 348                                   DEV_RX_OFFLOAD_CHECKSUM);
 349         /* All vlan offload masks to apply the current settings */
 350         mask = ETH_VLAN_STRIP_MASK |
 351                 ETH_VLAN_FILTER_MASK |
 352                 ETH_VLAN_EXTEND_MASK;
 353         ret = enicpmd_vlan_offload_set(eth_dev, mask);
 354         if (ret) {
 355                 dev_err(enic, "Failed to configure VLAN offloads\n");
 356                 return ret;
 357         }
 358         /*
 359          * Initialize RSS with the default reta and key. If the user key is
 360          * given (rx_adv_conf.rss_conf.rss_key), will use that instead of the
 361          * default key.
 362          */
 363         return enic_init_rss_nic_cfg(enic);
 364 }
 365
 366 /* Start the device.
 367  * It returns 0 on success.
 368  */
 369 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)
 370 {
 371         struct enic *enic = pmd_priv(eth_dev);
 372
 373         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 374                 return -E_RTE_SECONDARY;
 375
 376         ENICPMD_FUNC_TRACE();
 377         return enic_enable(enic);
 378 }
 379
 380 /*
 381  * Stop device: disable rx and tx functions to allow for reconfiguring.
 382  */
 383 static int enicpmd_dev_stop(struct rte_eth_dev *eth_dev)
 384 {
 385         struct rte_eth_link link;
 386         struct enic *enic = pmd_priv(eth_dev);
 387
 388         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 389                 return 0;
 390
 391         ENICPMD_FUNC_TRACE();
 392         enic_disable(enic);
 393
 394         memset(&link, 0, sizeof(link));
 395         rte_eth_linkstatus_set(eth_dev, &link);
 396
 397         return 0;
 398 }
 399
 400 /*
 401  * Stop device.
 402  */
 403 static int enicpmd_dev_close(struct rte_eth_dev *eth_dev)
 404 {
 405         struct enic *enic = pmd_priv(eth_dev);
 406
 407         ENICPMD_FUNC_TRACE();
 408         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 409                 return 0;
 410
 411         enic_remove(enic);
 412
 413         return 0;
 414 }
 415
 416 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,
 417         __rte_unused int wait_to_complete)
 418 {
 419         ENICPMD_FUNC_TRACE();
 420         return enic_link_update(eth_dev);
 421 }
 422
 423 static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,
 424         struct rte_eth_stats *stats)
 425 {
 426         struct enic *enic = pmd_priv(eth_dev);
 427
 428         ENICPMD_FUNC_TRACE();
 429         return enic_dev_stats_get(enic, stats);
 430 }
 431
 432 static int enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)
 433 {
 434         struct enic *enic = pmd_priv(eth_dev);
 435
 436         ENICPMD_FUNC_TRACE();
 437         return enic_dev_stats_clear(enic);
 438 }
 439
 440 static uint32_t speed_capa_from_pci_id(struct rte_eth_dev *eth_dev)
 441 {
 442         const struct vic_speed_capa *m;
 443         struct rte_pci_device *pdev;
 444         uint16_t id;
 445
 446         pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
 447         id = pdev->id.subsystem_device_id;
 448         for (m = vic_speed_capa_map; m->sub_devid != 0; m++) {
 449                 if (m->sub_devid == id)
 450                         return m->capa;
 451         }
 452         /* 1300 and later models are at least 40G */
 453         if (id >= 0x0100)
 454                 return ETH_LINK_SPEED_40G;
 455         /* VFs have subsystem id 0, check device id */
 456         if (id == 0) {
 457                 /* Newer VF implies at least 40G model */
 458                 if (pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_SN)
 459                         return ETH_LINK_SPEED_40G;
 460         }
 461         return ETH_LINK_SPEED_10G;
 462 }
 463
 464 static int enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,
 465         struct rte_eth_dev_info *device_info)
 466 {
 467         struct enic *enic = pmd_priv(eth_dev);
 468
 469         ENICPMD_FUNC_TRACE();
 470         /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */
 471         device_info->max_rx_queues = enic->conf_rq_count / 2;
 472         device_info->max_tx_queues = enic->conf_wq_count;
 473         device_info->min_rx_bufsize = ENIC_MIN_MTU;
 474         /* "Max" mtu is not a typo. HW receives packet sizes up to the
 475          * max mtu regardless of the current mtu (vNIC's mtu). vNIC mtu is
 476          * a hint to the driver to size receive buffers accordingly so that
 477          * larger-than-vnic-mtu packets get truncated.. For DPDK, we let
 478          * the user decide the buffer size via rxmode.max_rx_pkt_len, basically
 479          * ignoring vNIC mtu.
 480          */
 481         device_info->max_rx_pktlen = enic_mtu_to_max_rx_pktlen(enic->max_mtu);
 482         device_info->max_mac_addrs = ENIC_UNICAST_PERFECT_FILTERS;
 483         device_info->min_mtu = ENIC_MIN_MTU;
 484         device_info->max_mtu = enic->max_mtu;
 485         device_info->rx_offload_capa = enic->rx_offload_capa;
 486         device_info->tx_offload_capa = enic->tx_offload_capa;
 487         device_info->tx_queue_offload_capa = enic->tx_queue_offload_capa;
 488         device_info->default_rxconf = (struct rte_eth_rxconf) {
 489                 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH
 490         };
 491         device_info->reta_size = enic->reta_size;
 492         device_info->hash_key_size = enic->hash_key_size;
 493         device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads;
 494         device_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 495                 .nb_max = enic->config.rq_desc_count,
 496                 .nb_min = ENIC_MIN_RQ_DESCS,
 497                 .nb_align = ENIC_ALIGN_DESCS,
 498         };
 499         device_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 500                 .nb_max = enic->config.wq_desc_count,
 501                 .nb_min = ENIC_MIN_WQ_DESCS,
 502                 .nb_align = ENIC_ALIGN_DESCS,
 503                 .nb_seg_max = ENIC_TX_XMIT_MAX,
 504                 .nb_mtu_seg_max = ENIC_NON_TSO_MAX_DESC,
 505         };
 506         device_info->default_rxportconf = (struct rte_eth_dev_portconf) {
 507                 .burst_size = ENIC_DEFAULT_RX_BURST,
 508                 .ring_size = RTE_MIN(device_info->rx_desc_lim.nb_max,
 509                         ENIC_DEFAULT_RX_RING_SIZE),
 510                 .nb_queues = ENIC_DEFAULT_RX_RINGS,
 511         };
 512         device_info->default_txportconf = (struct rte_eth_dev_portconf) {
 513                 .burst_size = ENIC_DEFAULT_TX_BURST,
 514                 .ring_size = RTE_MIN(device_info->tx_desc_lim.nb_max,
 515                         ENIC_DEFAULT_TX_RING_SIZE),
 516                 .nb_queues = ENIC_DEFAULT_TX_RINGS,
 517         };
 518         device_info->speed_capa = speed_capa_from_pci_id(eth_dev);
 519
 520         return 0;
 521 }
 522
 523 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 524 {
 525         static const uint32_t ptypes[] = {
 526                 RTE_PTYPE_L2_ETHER,
 527                 RTE_PTYPE_L2_ETHER_VLAN,
 528                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 529                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 530                 RTE_PTYPE_L4_TCP,
 531                 RTE_PTYPE_L4_UDP,
 532                 RTE_PTYPE_L4_FRAG,
 533                 RTE_PTYPE_L4_NONFRAG,
 534                 RTE_PTYPE_UNKNOWN
 535         };
 536         static const uint32_t ptypes_overlay[] = {
 537                 RTE_PTYPE_L2_ETHER,
 538                 RTE_PTYPE_L2_ETHER_VLAN,
 539                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 540                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 541                 RTE_PTYPE_L4_TCP,
 542                 RTE_PTYPE_L4_UDP,
 543                 RTE_PTYPE_L4_FRAG,
 544                 RTE_PTYPE_L4_NONFRAG,
 545                 RTE_PTYPE_TUNNEL_GRENAT,
 546                 RTE_PTYPE_INNER_L2_ETHER,
 547                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
 548                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
 549                 RTE_PTYPE_INNER_L4_TCP,
 550                 RTE_PTYPE_INNER_L4_UDP,
 551                 RTE_PTYPE_INNER_L4_FRAG,
 552                 RTE_PTYPE_INNER_L4_NONFRAG,
 553                 RTE_PTYPE_UNKNOWN
 554         };
 555
 556         if (dev->rx_pkt_burst != enic_dummy_recv_pkts &&
 557             dev->rx_pkt_burst != NULL) {
 558                 struct enic *enic = pmd_priv(dev);
 559                 if (enic->overlay_offload)
 560                         return ptypes_overlay;
 561                 else
 562                         return ptypes;
 563         }
 564         return NULL;
 565 }
 566
 567 static int enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
 568 {
 569         struct enic *enic = pmd_priv(eth_dev);
 570         int ret;
 571
 572         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 573                 return -E_RTE_SECONDARY;
 574
 575         ENICPMD_FUNC_TRACE();
 576
 577         enic->promisc = 1;
 578         ret = enic_add_packet_filter(enic);
 579         if (ret != 0)
 580                 enic->promisc = 0;
 581
 582         return ret;
 583 }
 584
 585 static int enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
 586 {
 587         struct enic *enic = pmd_priv(eth_dev);
 588         int ret;
 589
 590         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 591                 return -E_RTE_SECONDARY;
 592
 593         ENICPMD_FUNC_TRACE();
 594         enic->promisc = 0;
 595         ret = enic_add_packet_filter(enic);
 596         if (ret != 0)
 597                 enic->promisc = 1;
 598
 599         return ret;
 600 }
 601
 602 static int enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
 603 {
 604         struct enic *enic = pmd_priv(eth_dev);
 605         int ret;
 606
 607         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 608                 return -E_RTE_SECONDARY;
 609
 610         ENICPMD_FUNC_TRACE();
 611         enic->allmulti = 1;
 612         ret = enic_add_packet_filter(enic);
 613         if (ret != 0)
 614                 enic->allmulti = 0;
 615
 616         return ret;
 617 }
 618
 619 static int enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
 620 {
 621         struct enic *enic = pmd_priv(eth_dev);
 622         int ret;
 623
 624         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 625                 return -E_RTE_SECONDARY;
 626
 627         ENICPMD_FUNC_TRACE();
 628         enic->allmulti = 0;
 629         ret = enic_add_packet_filter(enic);
 630         if (ret != 0)
 631                 enic->allmulti = 1;
 632
 633         return ret;
 634 }
 635
 636 static int enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,
 637         struct rte_ether_addr *mac_addr,
 638         __rte_unused uint32_t index, __rte_unused uint32_t pool)
 639 {
 640         struct enic *enic = pmd_priv(eth_dev);
 641
 642         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 643                 return -E_RTE_SECONDARY;
 644
 645         ENICPMD_FUNC_TRACE();
 646         return enic_set_mac_address(enic, mac_addr->addr_bytes);
 647 }
 648
 649 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index)
 650 {
 651         struct enic *enic = pmd_priv(eth_dev);
 652
 653         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 654                 return;
 655
 656         ENICPMD_FUNC_TRACE();
 657         if (enic_del_mac_address(enic, index))
 658                 dev_err(enic, "del mac addr failed\n");
 659 }
 660
 661 static int enicpmd_set_mac_addr(struct rte_eth_dev *eth_dev,
 662                                 struct rte_ether_addr *addr)
 663 {
 664         struct enic *enic = pmd_priv(eth_dev);
 665         int ret;
 666
 667         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 668                 return -E_RTE_SECONDARY;
 669
 670         ENICPMD_FUNC_TRACE();
 671         ret = enic_del_mac_address(enic, 0);
 672         if (ret)
 673                 return ret;
 674         return enic_set_mac_address(enic, addr->addr_bytes);
 675 }
 676
 677 static void debug_log_add_del_addr(struct rte_ether_addr *addr, bool add)
 678 {
 679         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 680
 681         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE, addr);
 682         ENICPMD_LOG(DEBUG, " %s address %s\n",
 683                      add ? "add" : "remove", mac_str);
 684 }
 685
 686 static int enicpmd_set_mc_addr_list(struct rte_eth_dev *eth_dev,
 687                                     struct rte_ether_addr *mc_addr_set,
 688                                     uint32_t nb_mc_addr)
 689 {
 690         struct enic *enic = pmd_priv(eth_dev);
 691         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 692         struct rte_ether_addr *addr;
 693         uint32_t i, j;
 694         int ret;
 695
 696         ENICPMD_FUNC_TRACE();
 697
 698         /* Validate the given addresses first */
 699         for (i = 0; i < nb_mc_addr && mc_addr_set != NULL; i++) {
 700                 addr = &mc_addr_set[i];
 701                 if (!rte_is_multicast_ether_addr(addr) ||
 702                     rte_is_broadcast_ether_addr(addr)) {
 703                         rte_ether_format_addr(mac_str,
 704                                         RTE_ETHER_ADDR_FMT_SIZE, addr);
 705                         ENICPMD_LOG(ERR, " invalid multicast address %s\n",
 706                                      mac_str);
 707                         return -EINVAL;
 708                 }
 709         }
 710
 711         /* Flush all if requested */
 712         if (nb_mc_addr == 0 || mc_addr_set == NULL) {
 713                 ENICPMD_LOG(DEBUG, " flush multicast addresses\n");
 714                 for (i = 0; i < enic->mc_count; i++) {
 715                         addr = &enic->mc_addrs[i];
 716                         debug_log_add_del_addr(addr, false);
 717                         ret = vnic_dev_del_addr(enic->vdev, addr->addr_bytes);
 718                         if (ret)
 719                                 return ret;
 720                 }
 721                 enic->mc_count = 0;
 722                 return 0;
 723         }
 724
 725         if (nb_mc_addr > ENIC_MULTICAST_PERFECT_FILTERS) {
 726                 ENICPMD_LOG(ERR, " too many multicast addresses: max=%d\n",
 727                              ENIC_MULTICAST_PERFECT_FILTERS);
 728                 return -ENOSPC;
 729         }
 730         /*
 731          * devcmd is slow, so apply the difference instead of flushing and
 732          * adding everything.
 733          * 1. Delete addresses on the NIC but not on the host
 734          */
 735         for (i = 0; i < enic->mc_count; i++) {
 736                 addr = &enic->mc_addrs[i];
 737                 for (j = 0; j < nb_mc_addr; j++) {
 738                         if (rte_is_same_ether_addr(addr, &mc_addr_set[j]))
 739                                 break;
 740                 }
 741                 if (j < nb_mc_addr)
 742                         continue;
 743                 debug_log_add_del_addr(addr, false);
 744                 ret = vnic_dev_del_addr(enic->vdev, addr->addr_bytes);
 745                 if (ret)
 746                         return ret;
 747         }
 748         /* 2. Add addresses on the host but not on the NIC */
 749         for (i = 0; i < nb_mc_addr; i++) {
 750                 addr = &mc_addr_set[i];
 751                 for (j = 0; j < enic->mc_count; j++) {
 752                         if (rte_is_same_ether_addr(addr, &enic->mc_addrs[j]))
 753                                 break;
 754                 }
 755                 if (j < enic->mc_count)
 756                         continue;
 757                 debug_log_add_del_addr(addr, true);
 758                 ret = vnic_dev_add_addr(enic->vdev, addr->addr_bytes);
 759                 if (ret)
 760                         return ret;
 761         }
 762         /* Keep a copy so we can flush/apply later on.. */
 763         memcpy(enic->mc_addrs, mc_addr_set,
 764                nb_mc_addr * sizeof(struct rte_ether_addr));
 765         enic->mc_count = nb_mc_addr;
 766         return 0;
 767 }
 768
 769 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 770 {
 771         struct enic *enic = pmd_priv(eth_dev);
 772
 773         ENICPMD_FUNC_TRACE();
 774         return enic_set_mtu(enic, mtu);
 775 }
 776
 777 static int enicpmd_dev_rss_reta_query(struct rte_eth_dev *dev,
 778                                       struct rte_eth_rss_reta_entry64
 779                                       *reta_conf,
 780                                       uint16_t reta_size)
 781 {
 782         struct enic *enic = pmd_priv(dev);
 783         uint16_t i, idx, shift;
 784
 785         ENICPMD_FUNC_TRACE();
 786         if (reta_size != ENIC_RSS_RETA_SIZE) {
 787                 dev_err(enic, "reta_query: wrong reta_size. given=%u expected=%u\n",
 788                         reta_size, ENIC_RSS_RETA_SIZE);
 789                 return -EINVAL;
 790         }
 791
 792         for (i = 0; i < reta_size; i++) {
 793                 idx = i / RTE_RETA_GROUP_SIZE;
 794                 shift = i % RTE_RETA_GROUP_SIZE;
 795                 if (reta_conf[idx].mask & (1ULL << shift))
 796                         reta_conf[idx].reta[shift] = enic_sop_rq_idx_to_rte_idx(
 797                                 enic->rss_cpu.cpu[i / 4].b[i % 4]);
 798         }
 799
 800         return 0;
 801 }
 802
 803 static int enicpmd_dev_rss_reta_update(struct rte_eth_dev *dev,
 804                                        struct rte_eth_rss_reta_entry64
 805                                        *reta_conf,
 806                                        uint16_t reta_size)
 807 {
 808         struct enic *enic = pmd_priv(dev);
 809         union vnic_rss_cpu rss_cpu;
 810         uint16_t i, idx, shift;
 811
 812         ENICPMD_FUNC_TRACE();
 813         if (reta_size != ENIC_RSS_RETA_SIZE) {
 814                 dev_err(enic, "reta_update: wrong reta_size. given=%u"
 815                         " expected=%u\n",
 816                         reta_size, ENIC_RSS_RETA_SIZE);
 817                 return -EINVAL;
 818         }
 819         /*
 820          * Start with the current reta and modify it per reta_conf, as we
 821          * need to push the entire reta even if we only modify one entry.
 822          */
 823         rss_cpu = enic->rss_cpu;
 824         for (i = 0; i < reta_size; i++) {
 825                 idx = i / RTE_RETA_GROUP_SIZE;
 826                 shift = i % RTE_RETA_GROUP_SIZE;
 827                 if (reta_conf[idx].mask & (1ULL << shift))
 828                         rss_cpu.cpu[i / 4].b[i % 4] =
 829                                 enic_rte_rq_idx_to_sop_idx(
 830                                         reta_conf[idx].reta[shift]);
 831         }
 832         return enic_set_rss_reta(enic, &rss_cpu);
 833 }
 834
 835 static int enicpmd_dev_rss_hash_update(struct rte_eth_dev *dev,
 836                                        struct rte_eth_rss_conf *rss_conf)
 837 {
 838         struct enic *enic = pmd_priv(dev);
 839
 840         ENICPMD_FUNC_TRACE();
 841         return enic_set_rss_conf(enic, rss_conf);
 842 }
 843
 844 static int enicpmd_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 845                                          struct rte_eth_rss_conf *rss_conf)
 846 {
 847         struct enic *enic = pmd_priv(dev);
 848
 849         ENICPMD_FUNC_TRACE();
 850         if (rss_conf == NULL)
 851                 return -EINVAL;
 852         if (rss_conf->rss_key != NULL &&
 853             rss_conf->rss_key_len < ENIC_RSS_HASH_KEY_SIZE) {
 854                 dev_err(enic, "rss_hash_conf_get: wrong rss_key_len. given=%u"
 855                         " expected=%u+\n",
 856                         rss_conf->rss_key_len, ENIC_RSS_HASH_KEY_SIZE);
 857                 return -EINVAL;
 858         }
 859         rss_conf->rss_hf = enic->rss_hf;
 860         if (rss_conf->rss_key != NULL) {
 861                 int i;
 862                 for (i = 0; i < ENIC_RSS_HASH_KEY_SIZE; i++) {
 863                         rss_conf->rss_key[i] =
 864                                 enic->rss_key.key[i / 10].b[i % 10];
 865                 }
 866                 rss_conf->rss_key_len = ENIC_RSS_HASH_KEY_SIZE;
 867         }
 868         return 0;
 869 }
 870
 871 static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev,
 872                                      uint16_t rx_queue_id,
 873                                      struct rte_eth_rxq_info *qinfo)
 874 {
 875         struct enic *enic = pmd_priv(dev);
 876         struct vnic_rq *rq_sop;
 877         struct vnic_rq *rq_data;
 878         struct rte_eth_rxconf *conf;
 879         uint16_t sop_queue_idx;
 880         uint16_t data_queue_idx;
 881
 882         ENICPMD_FUNC_TRACE();
 883         sop_queue_idx = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
 884         data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id, enic);
 885         rq_sop = &enic->rq[sop_queue_idx];
 886         rq_data = &enic->rq[data_queue_idx]; /* valid if data_queue_enable */
 887         qinfo->mp = rq_sop->mp;
 888         qinfo->scattered_rx = rq_sop->data_queue_enable;
 889         qinfo->nb_desc = rq_sop->ring.desc_count;
 890         if (qinfo->scattered_rx)
 891                 qinfo->nb_desc += rq_data->ring.desc_count;
 892         conf = &qinfo->conf;
 893         memset(conf, 0, sizeof(*conf));
 894         conf->rx_free_thresh = rq_sop->rx_free_thresh;
 895         conf->rx_drop_en = 1;
 896         /*
 897          * Except VLAN stripping (port setting), all the checksum offloads
 898          * are always enabled.
 899          */
 900         conf->offloads = enic->rx_offload_capa;
 901         if (!enic->ig_vlan_strip_en)
 902                 conf->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
 903         /* rx_thresh and other fields are not applicable for enic */
 904 }
 905
 906 static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev,
 907                                      uint16_t tx_queue_id,
 908                                      struct rte_eth_txq_info *qinfo)
 909 {
 910         struct enic *enic = pmd_priv(dev);
 911         struct vnic_wq *wq = &enic->wq[tx_queue_id];
 912
 913         ENICPMD_FUNC_TRACE();
 914         qinfo->nb_desc = wq->ring.desc_count;
 915         memset(&qinfo->conf, 0, sizeof(qinfo->conf));
 916         qinfo->conf.offloads = wq->offloads;
 917         /* tx_thresh, and all the other fields are not applicable for enic */
 918 }
 919
 920 static int enicpmd_dev_rx_burst_mode_get(struct rte_eth_dev *dev,
 921                                          __rte_unused uint16_t queue_id,
 922                                          struct rte_eth_burst_mode *mode)
 923 {
 924         eth_rx_burst_t pkt_burst = dev->rx_pkt_burst;
 925         struct enic *enic = pmd_priv(dev);
 926         const char *info_str = NULL;
 927         int ret = -EINVAL;
 928
 929         ENICPMD_FUNC_TRACE();
 930         if (enic->use_noscatter_vec_rx_handler)
 931                 info_str = "Vector AVX2 No Scatter";
 932         else if (pkt_burst == enic_noscatter_recv_pkts)
 933                 info_str = "Scalar No Scatter";
 934         else if (pkt_burst == enic_recv_pkts)
 935                 info_str = "Scalar";
 936         if (info_str) {
 937                 strlcpy(mode->info, info_str, sizeof(mode->info));
 938                 ret = 0;
 939         }
 940         return ret;
 941 }
 942
 943 static int enicpmd_dev_tx_burst_mode_get(struct rte_eth_dev *dev,
 944                                          __rte_unused uint16_t queue_id,
 945                                          struct rte_eth_burst_mode *mode)
 946 {
 947         eth_tx_burst_t pkt_burst = dev->tx_pkt_burst;
 948         const char *info_str = NULL;
 949         int ret = -EINVAL;
 950
 951         ENICPMD_FUNC_TRACE();
 952         if (pkt_burst == enic_simple_xmit_pkts)
 953                 info_str = "Scalar Simplified";
 954         else if (pkt_burst == enic_xmit_pkts)
 955                 info_str = "Scalar";
 956         if (info_str) {
 957                 strlcpy(mode->info, info_str, sizeof(mode->info));
 958                 ret = 0;
 959         }
 960         return ret;
 961 }
 962
 963 static int enicpmd_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev,
 964                                             uint16_t rx_queue_id)
 965 {
 966         struct enic *enic = pmd_priv(eth_dev);
 967
 968         ENICPMD_FUNC_TRACE();
 969         vnic_intr_unmask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
 970         return 0;
 971 }
 972
 973 static int enicpmd_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev,
 974                                              uint16_t rx_queue_id)
 975 {
 976         struct enic *enic = pmd_priv(eth_dev);
 977
 978         ENICPMD_FUNC_TRACE();
 979         vnic_intr_mask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
 980         return 0;
 981 }
 982
 983 static int udp_tunnel_common_check(struct enic *enic,
 984                                    struct rte_eth_udp_tunnel *tnl)
 985 {
 986         if (tnl->prot_type != RTE_TUNNEL_TYPE_VXLAN)
 987                 return -ENOTSUP;
 988         if (!enic->overlay_offload) {
 989                 ENICPMD_LOG(DEBUG, " vxlan (overlay offload) is not "
 990                              "supported\n");
 991                 return -ENOTSUP;
 992         }
 993         return 0;
 994 }
 995
 996 static int update_vxlan_port(struct enic *enic, uint16_t port)
 997 {
 998         if (vnic_dev_overlay_offload_cfg(enic->vdev,
 999                                          OVERLAY_CFG_VXLAN_PORT_UPDATE,
1000                                          port)) {
1001                 ENICPMD_LOG(DEBUG, " failed to update vxlan port\n");
1002                 return -EINVAL;
1003         }
1004         ENICPMD_LOG(DEBUG, " updated vxlan port to %u\n", port);
1005         enic->vxlan_port = port;
1006         return 0;
1007 }
1008
1009 static int enicpmd_dev_udp_tunnel_port_add(struct rte_eth_dev *eth_dev,
1010                                            struct rte_eth_udp_tunnel *tnl)
1011 {
1012         struct enic *enic = pmd_priv(eth_dev);
1013         int ret;
1014
1015         ENICPMD_FUNC_TRACE();
1016         ret = udp_tunnel_common_check(enic, tnl);
1017         if (ret)
1018                 return ret;
1019         /*
1020          * The NIC has 1 configurable VXLAN port number. "Adding" a new port
1021          * number replaces it.
1022          */
1023         if (tnl->udp_port == enic->vxlan_port || tnl->udp_port == 0) {
1024                 ENICPMD_LOG(DEBUG, " %u is already configured or invalid\n",
1025                              tnl->udp_port);
1026                 return -EINVAL;
1027         }
1028         return update_vxlan_port(enic, tnl->udp_port);
1029 }
1030
1031 static int enicpmd_dev_udp_tunnel_port_del(struct rte_eth_dev *eth_dev,
1032                                            struct rte_eth_udp_tunnel *tnl)
1033 {
1034         struct enic *enic = pmd_priv(eth_dev);
1035         int ret;
1036
1037         ENICPMD_FUNC_TRACE();
1038         ret = udp_tunnel_common_check(enic, tnl);
1039         if (ret)
1040                 return ret;
1041         /*
1042          * Clear the previously set port number and restore the
1043          * hardware default port number. Some drivers disable VXLAN
1044          * offloads when there are no configured port numbers. But
1045          * enic does not do that as VXLAN is part of overlay offload,
1046          * which is tied to inner RSS and TSO.
1047          */
1048         if (tnl->udp_port != enic->vxlan_port) {
1049                 ENICPMD_LOG(DEBUG, " %u is not a configured vxlan port\n",
1050                              tnl->udp_port);
1051                 return -EINVAL;
1052         }
1053         return update_vxlan_port(enic, RTE_VXLAN_DEFAULT_PORT);
1054 }
1055
1056 static int enicpmd_dev_fw_version_get(struct rte_eth_dev *eth_dev,
1057                                       char *fw_version, size_t fw_size)
1058 {
1059         struct vnic_devcmd_fw_info *info;
1060         struct enic *enic;
1061         int ret;
1062
1063         ENICPMD_FUNC_TRACE();
1064         if (fw_version == NULL || fw_size <= 0)
1065                 return -EINVAL;
1066         enic = pmd_priv(eth_dev);
1067         ret = vnic_dev_fw_info(enic->vdev, &info);
1068         if (ret)
1069                 return ret;
1070         snprintf(fw_version, fw_size, "%s %s",
1071                  info->fw_version, info->fw_build);
1072         fw_version[fw_size - 1] = '\0';
1073         return 0;
1074 }
1075
1076 static const struct eth_dev_ops enicpmd_eth_dev_ops = {
1077         .dev_configure        = enicpmd_dev_configure,
1078         .dev_start            = enicpmd_dev_start,
1079         .dev_stop             = enicpmd_dev_stop,
1080         .dev_set_link_up      = NULL,
1081         .dev_set_link_down    = NULL,
1082         .dev_close            = enicpmd_dev_close,
1083         .promiscuous_enable   = enicpmd_dev_promiscuous_enable,
1084         .promiscuous_disable  = enicpmd_dev_promiscuous_disable,
1085         .allmulticast_enable  = enicpmd_dev_allmulticast_enable,
1086         .allmulticast_disable = enicpmd_dev_allmulticast_disable,
1087         .link_update          = enicpmd_dev_link_update,
1088         .stats_get            = enicpmd_dev_stats_get,
1089         .stats_reset          = enicpmd_dev_stats_reset,
1090         .queue_stats_mapping_set = NULL,
1091         .dev_infos_get        = enicpmd_dev_info_get,
1092         .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get,
1093         .mtu_set              = enicpmd_mtu_set,
1094         .vlan_filter_set      = NULL,
1095         .vlan_tpid_set        = NULL,
1096         .vlan_offload_set     = enicpmd_vlan_offload_set,
1097         .vlan_strip_queue_set = NULL,
1098         .rx_queue_start       = enicpmd_dev_rx_queue_start,
1099         .rx_queue_stop        = enicpmd_dev_rx_queue_stop,
1100         .tx_queue_start       = enicpmd_dev_tx_queue_start,
1101         .tx_queue_stop        = enicpmd_dev_tx_queue_stop,
1102         .rx_queue_setup       = enicpmd_dev_rx_queue_setup,
1103         .rx_queue_release     = enicpmd_dev_rx_queue_release,
1104         .tx_queue_setup       = enicpmd_dev_tx_queue_setup,
1105         .tx_queue_release     = enicpmd_dev_tx_queue_release,
1106         .rx_queue_intr_enable = enicpmd_dev_rx_queue_intr_enable,
1107         .rx_queue_intr_disable = enicpmd_dev_rx_queue_intr_disable,
1108         .rxq_info_get         = enicpmd_dev_rxq_info_get,
1109         .txq_info_get         = enicpmd_dev_txq_info_get,
1110         .rx_burst_mode_get    = enicpmd_dev_rx_burst_mode_get,
1111         .tx_burst_mode_get    = enicpmd_dev_tx_burst_mode_get,
1112         .dev_led_on           = NULL,
1113         .dev_led_off          = NULL,
1114         .flow_ctrl_get        = NULL,
1115         .flow_ctrl_set        = NULL,
1116         .priority_flow_ctrl_set = NULL,
1117         .mac_addr_add         = enicpmd_add_mac_addr,
1118         .mac_addr_remove      = enicpmd_remove_mac_addr,
1119         .mac_addr_set         = enicpmd_set_mac_addr,
1120         .set_mc_addr_list     = enicpmd_set_mc_addr_list,
1121         .filter_ctrl          = enicpmd_dev_filter_ctrl,
1122         .reta_query           = enicpmd_dev_rss_reta_query,
1123         .reta_update          = enicpmd_dev_rss_reta_update,
1124         .rss_hash_conf_get    = enicpmd_dev_rss_hash_conf_get,
1125         .rss_hash_update      = enicpmd_dev_rss_hash_update,
1126         .udp_tunnel_port_add  = enicpmd_dev_udp_tunnel_port_add,
1127         .udp_tunnel_port_del  = enicpmd_dev_udp_tunnel_port_del,
1128         .fw_version_get       = enicpmd_dev_fw_version_get,
1129 };
1130
1131 static int enic_parse_zero_one(const char *key,
1132                                const char *value,
1133                                void *opaque)
1134 {
1135         struct enic *enic;
1136         bool b;
1137
1138         enic = (struct enic *)opaque;
1139         if (strcmp(value, "0") == 0) {
1140                 b = false;
1141         } else if (strcmp(value, "1") == 0) {
1142                 b = true;
1143         } else {
1144                 dev_err(enic, "Invalid value for %s"
1145                         ": expected=0|1 given=%s\n", key, value);
1146                 return -EINVAL;
1147         }
1148         if (strcmp(key, ENIC_DEVARG_DISABLE_OVERLAY) == 0)
1149                 enic->disable_overlay = b;
1150         if (strcmp(key, ENIC_DEVARG_ENABLE_AVX2_RX) == 0)
1151                 enic->enable_avx2_rx = b;
1152         if (strcmp(key, ENIC_DEVARG_GENEVE_OPT) == 0)
1153                 enic->geneve_opt_request = b;
1154         return 0;
1155 }
1156
1157 static int enic_parse_ig_vlan_rewrite(__rte_unused const char *key,
1158                                       const char *value,
1159                                       void *opaque)
1160 {
1161         struct enic *enic;
1162
1163         enic = (struct enic *)opaque;
1164         if (strcmp(value, "trunk") == 0) {
1165                 /* Trunk mode: always tag */
1166                 enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_DEFAULT_TRUNK;
1167         } else if (strcmp(value, "untag") == 0) {
1168                 /* Untag default VLAN mode: untag if VLAN = default VLAN */
1169                 enic->ig_vlan_rewrite_mode =
1170                         IG_VLAN_REWRITE_MODE_UNTAG_DEFAULT_VLAN;
1171         } else if (strcmp(value, "priority") == 0) {
1172                 /*
1173                  * Priority-tag default VLAN mode: priority tag (VLAN header
1174                  * with ID=0) if VLAN = default
1175                  */
1176                 enic->ig_vlan_rewrite_mode =
1177                         IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN;
1178         } else if (strcmp(value, "pass") == 0) {
1179                 /* Pass through mode: do not touch tags */
1180                 enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU;
1181         } else {
1182                 dev_err(enic, "Invalid value for " ENIC_DEVARG_IG_VLAN_REWRITE
1183                         ": expected=trunk|untag|priority|pass given=%s\n",
1184                         value);
1185                 return -EINVAL;
1186         }
1187         return 0;
1188 }
1189
1190 static int enic_check_devargs(struct rte_eth_dev *dev)
1191 {
1192         static const char *const valid_keys[] = {
1193                 ENIC_DEVARG_DISABLE_OVERLAY,
1194                 ENIC_DEVARG_ENABLE_AVX2_RX,
1195                 ENIC_DEVARG_GENEVE_OPT,
1196                 ENIC_DEVARG_IG_VLAN_REWRITE,
1197                 ENIC_DEVARG_REPRESENTOR,
1198                 NULL};
1199         struct enic *enic = pmd_priv(dev);
1200         struct rte_kvargs *kvlist;
1201
1202         ENICPMD_FUNC_TRACE();
1203
1204         enic->disable_overlay = false;
1205         enic->enable_avx2_rx = false;
1206         enic->geneve_opt_request = false;
1207         enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU;
1208         if (!dev->device->devargs)
1209                 return 0;
1210         kvlist = rte_kvargs_parse(dev->device->devargs->args, valid_keys);
1211         if (!kvlist)
1212                 return -EINVAL;
1213         if (rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_OVERLAY,
1214                                enic_parse_zero_one, enic) < 0 ||
1215             rte_kvargs_process(kvlist, ENIC_DEVARG_ENABLE_AVX2_RX,
1216                                enic_parse_zero_one, enic) < 0 ||
1217             rte_kvargs_process(kvlist, ENIC_DEVARG_GENEVE_OPT,
1218                                enic_parse_zero_one, enic) < 0 ||
1219             rte_kvargs_process(kvlist, ENIC_DEVARG_IG_VLAN_REWRITE,
1220                                enic_parse_ig_vlan_rewrite, enic) < 0) {
1221                 rte_kvargs_free(kvlist);
1222                 return -EINVAL;
1223         }
1224         rte_kvargs_free(kvlist);
1225         return 0;
1226 }
1227
1228 /* Initialize the driver for PF */
1229 static int eth_enic_dev_init(struct rte_eth_dev *eth_dev,
1230                              void *init_params __rte_unused)
1231 {
1232         struct rte_pci_device *pdev;
1233         struct rte_pci_addr *addr;
1234         struct enic *enic = pmd_priv(eth_dev);
1235         int err;
1236
1237         ENICPMD_FUNC_TRACE();
1238         eth_dev->dev_ops = &enicpmd_eth_dev_ops;
1239         eth_dev->rx_queue_count = enicpmd_dev_rx_queue_count;
1240         eth_dev->rx_pkt_burst = &enic_recv_pkts;
1241         eth_dev->tx_pkt_burst = &enic_xmit_pkts;
1242         eth_dev->tx_pkt_prepare = &enic_prep_pkts;
1243         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1244                 enic_pick_tx_handler(eth_dev);
1245                 enic_pick_rx_handler(eth_dev);
1246                 return 0;
1247         }
1248         /* Only the primary sets up adapter and other data in shared memory */
1249         enic->port_id = eth_dev->data->port_id;
1250         enic->rte_dev = eth_dev;
1251         enic->dev_data = eth_dev->data;
1252
1253         pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
1254         rte_eth_copy_pci_info(eth_dev, pdev);
1255         eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
1256         enic->pdev = pdev;
1257         addr = &pdev->addr;
1258
1259         snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x",
1260                 addr->domain, addr->bus, addr->devid, addr->function);
1261
1262         err = enic_check_devargs(eth_dev);
1263         if (err)
1264                 return err;
1265         err = enic_probe(enic);
1266         if (!err && enic->fm) {
1267                 err = enic_fm_allocate_switch_domain(enic);
1268                 if (err)
1269                         ENICPMD_LOG(ERR, "failed to allocate switch domain id");
1270         }
1271         return err;
1272 }
1273
1274 static int eth_enic_dev_uninit(struct rte_eth_dev *eth_dev)
1275 {
1276         struct enic *enic = pmd_priv(eth_dev);
1277         int err;
1278
1279         ENICPMD_FUNC_TRACE();
1280         eth_dev->device = NULL;
1281         eth_dev->intr_handle = NULL;
1282         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1283                 return 0;
1284         err = rte_eth_switch_domain_free(enic->switch_domain_id);
1285         if (err)
1286                 ENICPMD_LOG(WARNING, "failed to free switch domain: %d", err);
1287         return 0;
1288 }
1289
1290 static int eth_enic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1291         struct rte_pci_device *pci_dev)
1292 {
1293         char name[RTE_ETH_NAME_MAX_LEN];
1294         struct rte_eth_devargs eth_da = { .nb_representor_ports = 0 };
1295         struct rte_eth_dev *pf_ethdev;
1296         struct enic *pf_enic;
1297         int i, retval;
1298
1299         ENICPMD_FUNC_TRACE();
1300         if (pci_dev->device.devargs) {
1301                 retval = rte_eth_devargs_parse(pci_dev->device.devargs->args,
1302                                 &eth_da);
1303                 if (retval)
1304                         return retval;
1305         }
1306         retval = rte_eth_dev_create(&pci_dev->device, pci_dev->device.name,
1307                 sizeof(struct enic),
1308                 eth_dev_pci_specific_init, pci_dev,
1309                 eth_enic_dev_init, NULL);
1310         if (retval || eth_da.nb_representor_ports < 1)
1311                 return retval;
1312
1313         /* Probe VF representor */
1314         pf_ethdev = rte_eth_dev_allocated(pci_dev->device.name);
1315         if (pf_ethdev == NULL)
1316                 return -ENODEV;
1317         /* Representors require flowman */
1318         pf_enic = pmd_priv(pf_ethdev);
1319         if (pf_enic->fm == NULL) {
1320                 ENICPMD_LOG(ERR, "VF representors require flowman");
1321                 return -ENOTSUP;
1322         }
1323         /*
1324          * For now representors imply switchdev, as firmware does not support
1325          * legacy mode SR-IOV
1326          */
1327         pf_enic->switchdev_mode = 1;
1328         /* Calculate max VF ID before initializing representor*/
1329         pf_enic->max_vf_id = 0;
1330         for (i = 0; i < eth_da.nb_representor_ports; i++) {
1331                 pf_enic->max_vf_id = RTE_MAX(pf_enic->max_vf_id,
1332                                              eth_da.representor_ports[i]);
1333         }
1334         for (i = 0; i < eth_da.nb_representor_ports; i++) {
1335                 struct enic_vf_representor representor;
1336
1337                 representor.vf_id = eth_da.representor_ports[i];
1338                                 representor.switch_domain_id =
1339                         pmd_priv(pf_ethdev)->switch_domain_id;
1340                 representor.pf = pmd_priv(pf_ethdev);
1341                 snprintf(name, sizeof(name), "net_%s_representor_%d",
1342                         pci_dev->device.name, eth_da.representor_ports[i]);
1343                 retval = rte_eth_dev_create(&pci_dev->device, name,
1344                         sizeof(struct enic_vf_representor), NULL, NULL,
1345                         enic_vf_representor_init, &representor);
1346                 if (retval) {
1347                         ENICPMD_LOG(ERR, "failed to create enic vf representor %s",
1348                                     name);
1349                         return retval;
1350                 }
1351         }
1352         return 0;
1353 }
1354
1355 static int eth_enic_pci_remove(struct rte_pci_device *pci_dev)
1356 {
1357         struct rte_eth_dev *ethdev;
1358
1359         ENICPMD_FUNC_TRACE();
1360         ethdev = rte_eth_dev_allocated(pci_dev->device.name);
1361         if (!ethdev)
1362                 return -ENODEV;
1363         if (ethdev->data->dev_flags & RTE_ETH_DEV_REPRESENTOR)
1364                 return rte_eth_dev_destroy(ethdev, enic_vf_representor_uninit);
1365         else
1366                 return rte_eth_dev_destroy(ethdev, eth_enic_dev_uninit);
1367 }
1368
1369 static struct rte_pci_driver rte_enic_pmd = {
1370         .id_table = pci_id_enic_map,
1371         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1372         .probe = eth_enic_pci_probe,
1373         .remove = eth_enic_pci_remove,
1374 };
1375
1376 int dev_is_enic(struct rte_eth_dev *dev)
1377 {
1378         return dev->device->driver == &rte_enic_pmd.driver;
1379 }
1380
1381 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd);
1382 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map);
1383 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci");
1384 RTE_PMD_REGISTER_PARAM_STRING(net_enic,
1385         ENIC_DEVARG_DISABLE_OVERLAY "=0|1 "
1386         ENIC_DEVARG_ENABLE_AVX2_RX "=0|1 "
1387         ENIC_DEVARG_GENEVE_OPT "=0|1 "
1388         ENIC_DEVARG_IG_VLAN_REWRITE "=trunk|untag|priority|pass");