drivers/net/enic/enic_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  */
   5
   6 #include <stdio.h>
   7 #include <stdint.h>
   8
   9 #include <rte_dev.h>
  10 #include <rte_pci.h>
  11 #include <rte_bus_pci.h>
  12 #include <rte_ethdev_driver.h>
  13 #include <rte_ethdev_pci.h>
  14 #include <rte_kvargs.h>
  15 #include <rte_string_fns.h>
  16
  17 #include "vnic_intr.h"
  18 #include "vnic_cq.h"
  19 #include "vnic_wq.h"
  20 #include "vnic_rq.h"
  21 #include "vnic_enet.h"
  22 #include "enic.h"
  23
  24 int enic_pmd_logtype;
  25
  26 /*
  27  * The set of PCI devices this driver supports
  28  */
  29 #define CISCO_PCI_VENDOR_ID 0x1137
  30 static const struct rte_pci_id pci_id_enic_map[] = {
  31         {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET)},
  32         {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF)},
  33         {RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_SN)},
  34         {.vendor_id = 0, /* sentinel */},
  35 };
  36
  37 /* Supported link speeds of production VIC models */
  38 static const struct vic_speed_capa {
  39         uint16_t sub_devid;
  40         uint32_t capa;
  41 } vic_speed_capa_map[] = {
  42         { 0x0043, ETH_LINK_SPEED_10G }, /* VIC */
  43         { 0x0047, ETH_LINK_SPEED_10G }, /* P81E PCIe */
  44         { 0x0048, ETH_LINK_SPEED_10G }, /* M81KR Mezz */
  45         { 0x004f, ETH_LINK_SPEED_10G }, /* 1280 Mezz */
  46         { 0x0084, ETH_LINK_SPEED_10G }, /* 1240 MLOM */
  47         { 0x0085, ETH_LINK_SPEED_10G }, /* 1225 PCIe */
  48         { 0x00cd, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1285 PCIe */
  49         { 0x00ce, ETH_LINK_SPEED_10G }, /* 1225T PCIe */
  50         { 0x012a, ETH_LINK_SPEED_40G }, /* M4308 */
  51         { 0x012c, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1340 MLOM */
  52         { 0x012e, ETH_LINK_SPEED_10G }, /* 1227 PCIe */
  53         { 0x0137, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1380 Mezz */
  54         { 0x014d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1385 PCIe */
  55         { 0x015d, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G }, /* 1387 MLOM */
  56         { 0x0215, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G |
  57                   ETH_LINK_SPEED_40G }, /* 1440 Mezz */
  58         { 0x0216, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G |
  59                   ETH_LINK_SPEED_40G }, /* 1480 MLOM */
  60         { 0x0217, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1455 PCIe */
  61         { 0x0218, ETH_LINK_SPEED_10G | ETH_LINK_SPEED_25G }, /* 1457 MLOM */
  62         { 0x0219, ETH_LINK_SPEED_40G }, /* 1485 PCIe */
  63         { 0x021a, ETH_LINK_SPEED_40G }, /* 1487 MLOM */
  64         { 0x024a, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1495 PCIe */
  65         { 0x024b, ETH_LINK_SPEED_40G | ETH_LINK_SPEED_100G }, /* 1497 MLOM */
  66         { 0, 0 }, /* End marker */
  67 };
  68
  69 #define ENIC_DEVARG_DISABLE_OVERLAY "disable-overlay"
  70 #define ENIC_DEVARG_ENABLE_AVX2_RX "enable-avx2-rx"
  71 #define ENIC_DEVARG_IG_VLAN_REWRITE "ig-vlan-rewrite"
  72
  73 RTE_INIT(enicpmd_init_log)
  74 {
  75         enic_pmd_logtype = rte_log_register("pmd.net.enic");
  76         if (enic_pmd_logtype >= 0)
  77                 rte_log_set_level(enic_pmd_logtype, RTE_LOG_INFO);
  78 }
  79
  80 static int
  81 enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev,
  82                         enum rte_filter_op filter_op, void *arg)
  83 {
  84         struct enic *enic = pmd_priv(eth_dev);
  85         int ret = 0;
  86
  87         ENICPMD_FUNC_TRACE();
  88         if (filter_op == RTE_ETH_FILTER_NOP)
  89                 return 0;
  90
  91         if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
  92                 return -EINVAL;
  93
  94         switch (filter_op) {
  95         case RTE_ETH_FILTER_ADD:
  96         case RTE_ETH_FILTER_UPDATE:
  97                 ret = enic_fdir_add_fltr(enic,
  98                         (struct rte_eth_fdir_filter *)arg);
  99                 break;
 100
 101         case RTE_ETH_FILTER_DELETE:
 102                 ret = enic_fdir_del_fltr(enic,
 103                         (struct rte_eth_fdir_filter *)arg);
 104                 break;
 105
 106         case RTE_ETH_FILTER_STATS:
 107                 enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg);
 108                 break;
 109
 110         case RTE_ETH_FILTER_FLUSH:
 111                 dev_warning(enic, "unsupported operation %u", filter_op);
 112                 ret = -ENOTSUP;
 113                 break;
 114         case RTE_ETH_FILTER_INFO:
 115                 enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg);
 116                 break;
 117         default:
 118                 dev_err(enic, "unknown operation %u", filter_op);
 119                 ret = -EINVAL;
 120                 break;
 121         }
 122         return ret;
 123 }
 124
 125 static int
 126 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,
 127                      enum rte_filter_type filter_type,
 128                      enum rte_filter_op filter_op,
 129                      void *arg)
 130 {
 131         int ret = 0;
 132
 133         ENICPMD_FUNC_TRACE();
 134
 135         switch (filter_type) {
 136         case RTE_ETH_FILTER_GENERIC:
 137                 if (filter_op != RTE_ETH_FILTER_GET)
 138                         return -EINVAL;
 139                 *(const void **)arg = &enic_flow_ops;
 140                 break;
 141         case RTE_ETH_FILTER_FDIR:
 142                 ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg);
 143                 break;
 144         default:
 145                 dev_warning(enic, "Filter type (%d) not supported",
 146                         filter_type);
 147                 ret = -EINVAL;
 148                 break;
 149         }
 150
 151         return ret;
 152 }
 153
 154 static void enicpmd_dev_tx_queue_release(void *txq)
 155 {
 156         ENICPMD_FUNC_TRACE();
 157
 158         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 159                 return;
 160
 161         enic_free_wq(txq);
 162 }
 163
 164 static int enicpmd_dev_setup_intr(struct enic *enic)
 165 {
 166         int ret;
 167         unsigned int index;
 168
 169         ENICPMD_FUNC_TRACE();
 170
 171         /* Are we done with the init of all the queues? */
 172         for (index = 0; index < enic->cq_count; index++) {
 173                 if (!enic->cq[index].ctrl)
 174                         break;
 175         }
 176         if (enic->cq_count != index)
 177                 return 0;
 178         for (index = 0; index < enic->wq_count; index++) {
 179                 if (!enic->wq[index].ctrl)
 180                         break;
 181         }
 182         if (enic->wq_count != index)
 183                 return 0;
 184         /* check start of packet (SOP) RQs only in case scatter is disabled. */
 185         for (index = 0; index < enic->rq_count; index++) {
 186                 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl)
 187                         break;
 188         }
 189         if (enic->rq_count != index)
 190                 return 0;
 191
 192         ret = enic_alloc_intr_resources(enic);
 193         if (ret) {
 194                 dev_err(enic, "alloc intr failed\n");
 195                 return ret;
 196         }
 197         enic_init_vnic_resources(enic);
 198
 199         ret = enic_setup_finish(enic);
 200         if (ret)
 201                 dev_err(enic, "setup could not be finished\n");
 202
 203         return ret;
 204 }
 205
 206 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
 207         uint16_t queue_idx,
 208         uint16_t nb_desc,
 209         unsigned int socket_id,
 210         const struct rte_eth_txconf *tx_conf)
 211 {
 212         int ret;
 213         struct enic *enic = pmd_priv(eth_dev);
 214         struct vnic_wq *wq;
 215
 216         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 217                 return -E_RTE_SECONDARY;
 218
 219         ENICPMD_FUNC_TRACE();
 220         RTE_ASSERT(queue_idx < enic->conf_wq_count);
 221         wq = &enic->wq[queue_idx];
 222         wq->offloads = tx_conf->offloads |
 223                 eth_dev->data->dev_conf.txmode.offloads;
 224         eth_dev->data->tx_queues[queue_idx] = (void *)wq;
 225
 226         ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);
 227         if (ret) {
 228                 dev_err(enic, "error in allocating wq\n");
 229                 return ret;
 230         }
 231
 232         return enicpmd_dev_setup_intr(enic);
 233 }
 234
 235 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
 236         uint16_t queue_idx)
 237 {
 238         struct enic *enic = pmd_priv(eth_dev);
 239
 240         ENICPMD_FUNC_TRACE();
 241
 242         enic_start_wq(enic, queue_idx);
 243
 244         return 0;
 245 }
 246
 247 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
 248         uint16_t queue_idx)
 249 {
 250         int ret;
 251         struct enic *enic = pmd_priv(eth_dev);
 252
 253         ENICPMD_FUNC_TRACE();
 254
 255         ret = enic_stop_wq(enic, queue_idx);
 256         if (ret)
 257                 dev_err(enic, "error in stopping wq %d\n", queue_idx);
 258
 259         return ret;
 260 }
 261
 262 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
 263         uint16_t queue_idx)
 264 {
 265         struct enic *enic = pmd_priv(eth_dev);
 266
 267         ENICPMD_FUNC_TRACE();
 268
 269         enic_start_rq(enic, queue_idx);
 270
 271         return 0;
 272 }
 273
 274 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
 275         uint16_t queue_idx)
 276 {
 277         int ret;
 278         struct enic *enic = pmd_priv(eth_dev);
 279
 280         ENICPMD_FUNC_TRACE();
 281
 282         ret = enic_stop_rq(enic, queue_idx);
 283         if (ret)
 284                 dev_err(enic, "error in stopping rq %d\n", queue_idx);
 285
 286         return ret;
 287 }
 288
 289 static void enicpmd_dev_rx_queue_release(void *rxq)
 290 {
 291         ENICPMD_FUNC_TRACE();
 292
 293         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 294                 return;
 295
 296         enic_free_rq(rxq);
 297 }
 298
 299 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev,
 300                                            uint16_t rx_queue_id)
 301 {
 302         struct enic *enic = pmd_priv(dev);
 303         uint32_t queue_count = 0;
 304         struct vnic_cq *cq;
 305         uint32_t cq_tail;
 306         uint16_t cq_idx;
 307         int rq_num;
 308
 309         rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
 310         cq = &enic->cq[enic_cq_rq(enic, rq_num)];
 311         cq_idx = cq->to_clean;
 312
 313         cq_tail = ioread32(&cq->ctrl->cq_tail);
 314
 315         if (cq_tail < cq_idx)
 316                 cq_tail += cq->ring.desc_count;
 317
 318         queue_count = cq_tail - cq_idx;
 319
 320         return queue_count;
 321 }
 322
 323 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
 324         uint16_t queue_idx,
 325         uint16_t nb_desc,
 326         unsigned int socket_id,
 327         const struct rte_eth_rxconf *rx_conf,
 328         struct rte_mempool *mp)
 329 {
 330         int ret;
 331         struct enic *enic = pmd_priv(eth_dev);
 332
 333         ENICPMD_FUNC_TRACE();
 334
 335         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 336                 return -E_RTE_SECONDARY;
 337         RTE_ASSERT(enic_rte_rq_idx_to_sop_idx(queue_idx) < enic->conf_rq_count);
 338         eth_dev->data->rx_queues[queue_idx] =
 339                 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
 340
 341         ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc,
 342                             rx_conf->rx_free_thresh);
 343         if (ret) {
 344                 dev_err(enic, "error in allocating rq\n");
 345                 return ret;
 346         }
 347
 348         return enicpmd_dev_setup_intr(enic);
 349 }
 350
 351 static int enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 352 {
 353         struct enic *enic = pmd_priv(eth_dev);
 354         uint64_t offloads;
 355
 356         ENICPMD_FUNC_TRACE();
 357
 358         offloads = eth_dev->data->dev_conf.rxmode.offloads;
 359         if (mask & ETH_VLAN_STRIP_MASK) {
 360                 if (offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
 361                         enic->ig_vlan_strip_en = 1;
 362                 else
 363                         enic->ig_vlan_strip_en = 0;
 364         }
 365
 366         if ((mask & ETH_VLAN_FILTER_MASK) &&
 367             (offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
 368                 dev_warning(enic,
 369                         "Configuration of VLAN filter is not supported\n");
 370         }
 371
 372         if ((mask & ETH_VLAN_EXTEND_MASK) &&
 373             (offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)) {
 374                 dev_warning(enic,
 375                         "Configuration of extended VLAN is not supported\n");
 376         }
 377
 378         return enic_set_vlan_strip(enic);
 379 }
 380
 381 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)
 382 {
 383         int ret;
 384         int mask;
 385         struct enic *enic = pmd_priv(eth_dev);
 386
 387         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 388                 return -E_RTE_SECONDARY;
 389
 390         ENICPMD_FUNC_TRACE();
 391         ret = enic_set_vnic_res(enic);
 392         if (ret) {
 393                 dev_err(enic, "Set vNIC resource num  failed, aborting\n");
 394                 return ret;
 395         }
 396
 397         enic->mc_count = 0;
 398         enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads &
 399                                   DEV_RX_OFFLOAD_CHECKSUM);
 400         /* All vlan offload masks to apply the current settings */
 401         mask = ETH_VLAN_STRIP_MASK |
 402                 ETH_VLAN_FILTER_MASK |
 403                 ETH_VLAN_EXTEND_MASK;
 404         ret = enicpmd_vlan_offload_set(eth_dev, mask);
 405         if (ret) {
 406                 dev_err(enic, "Failed to configure VLAN offloads\n");
 407                 return ret;
 408         }
 409         /*
 410          * Initialize RSS with the default reta and key. If the user key is
 411          * given (rx_adv_conf.rss_conf.rss_key), will use that instead of the
 412          * default key.
 413          */
 414         return enic_init_rss_nic_cfg(enic);
 415 }
 416
 417 /* Start the device.
 418  * It returns 0 on success.
 419  */
 420 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)
 421 {
 422         struct enic *enic = pmd_priv(eth_dev);
 423
 424         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 425                 return -E_RTE_SECONDARY;
 426
 427         ENICPMD_FUNC_TRACE();
 428         return enic_enable(enic);
 429 }
 430
 431 /*
 432  * Stop device: disable rx and tx functions to allow for reconfiguring.
 433  */
 434 static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev)
 435 {
 436         struct rte_eth_link link;
 437         struct enic *enic = pmd_priv(eth_dev);
 438
 439         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 440                 return;
 441
 442         ENICPMD_FUNC_TRACE();
 443         enic_disable(enic);
 444
 445         memset(&link, 0, sizeof(link));
 446         rte_eth_linkstatus_set(eth_dev, &link);
 447 }
 448
 449 /*
 450  * Stop device.
 451  */
 452 static void enicpmd_dev_close(struct rte_eth_dev *eth_dev)
 453 {
 454         struct enic *enic = pmd_priv(eth_dev);
 455
 456         ENICPMD_FUNC_TRACE();
 457         enic_remove(enic);
 458 }
 459
 460 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,
 461         __rte_unused int wait_to_complete)
 462 {
 463         struct enic *enic = pmd_priv(eth_dev);
 464
 465         ENICPMD_FUNC_TRACE();
 466         return enic_link_update(enic);
 467 }
 468
 469 static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,
 470         struct rte_eth_stats *stats)
 471 {
 472         struct enic *enic = pmd_priv(eth_dev);
 473
 474         ENICPMD_FUNC_TRACE();
 475         return enic_dev_stats_get(enic, stats);
 476 }
 477
 478 static int enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)
 479 {
 480         struct enic *enic = pmd_priv(eth_dev);
 481
 482         ENICPMD_FUNC_TRACE();
 483         return enic_dev_stats_clear(enic);
 484 }
 485
 486 static uint32_t speed_capa_from_pci_id(struct rte_eth_dev *eth_dev)
 487 {
 488         const struct vic_speed_capa *m;
 489         struct rte_pci_device *pdev;
 490         uint16_t id;
 491
 492         pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
 493         id = pdev->id.subsystem_device_id;
 494         for (m = vic_speed_capa_map; m->sub_devid != 0; m++) {
 495                 if (m->sub_devid == id)
 496                         return m->capa;
 497         }
 498         /* 1300 and later models are at least 40G */
 499         if (id >= 0x0100)
 500                 return ETH_LINK_SPEED_40G;
 501         return ETH_LINK_SPEED_10G;
 502 }
 503
 504 static int enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,
 505         struct rte_eth_dev_info *device_info)
 506 {
 507         struct enic *enic = pmd_priv(eth_dev);
 508
 509         ENICPMD_FUNC_TRACE();
 510         /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */
 511         device_info->max_rx_queues = enic->conf_rq_count / 2;
 512         device_info->max_tx_queues = enic->conf_wq_count;
 513         device_info->min_rx_bufsize = ENIC_MIN_MTU;
 514         /* "Max" mtu is not a typo. HW receives packet sizes up to the
 515          * max mtu regardless of the current mtu (vNIC's mtu). vNIC mtu is
 516          * a hint to the driver to size receive buffers accordingly so that
 517          * larger-than-vnic-mtu packets get truncated.. For DPDK, we let
 518          * the user decide the buffer size via rxmode.max_rx_pkt_len, basically
 519          * ignoring vNIC mtu.
 520          */
 521         device_info->max_rx_pktlen = enic_mtu_to_max_rx_pktlen(enic->max_mtu);
 522         device_info->max_mac_addrs = ENIC_UNICAST_PERFECT_FILTERS;
 523         device_info->min_mtu = ENIC_MIN_MTU;
 524         device_info->max_mtu = enic->max_mtu;
 525         device_info->rx_offload_capa = enic->rx_offload_capa;
 526         device_info->tx_offload_capa = enic->tx_offload_capa;
 527         device_info->tx_queue_offload_capa = enic->tx_queue_offload_capa;
 528         device_info->default_rxconf = (struct rte_eth_rxconf) {
 529                 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH
 530         };
 531         device_info->reta_size = enic->reta_size;
 532         device_info->hash_key_size = enic->hash_key_size;
 533         device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads;
 534         device_info->rx_desc_lim = (struct rte_eth_desc_lim) {
 535                 .nb_max = enic->config.rq_desc_count,
 536                 .nb_min = ENIC_MIN_RQ_DESCS,
 537                 .nb_align = ENIC_ALIGN_DESCS,
 538         };
 539         device_info->tx_desc_lim = (struct rte_eth_desc_lim) {
 540                 .nb_max = enic->config.wq_desc_count,
 541                 .nb_min = ENIC_MIN_WQ_DESCS,
 542                 .nb_align = ENIC_ALIGN_DESCS,
 543                 .nb_seg_max = ENIC_TX_XMIT_MAX,
 544                 .nb_mtu_seg_max = ENIC_NON_TSO_MAX_DESC,
 545         };
 546         device_info->default_rxportconf = (struct rte_eth_dev_portconf) {
 547                 .burst_size = ENIC_DEFAULT_RX_BURST,
 548                 .ring_size = RTE_MIN(device_info->rx_desc_lim.nb_max,
 549                         ENIC_DEFAULT_RX_RING_SIZE),
 550                 .nb_queues = ENIC_DEFAULT_RX_RINGS,
 551         };
 552         device_info->default_txportconf = (struct rte_eth_dev_portconf) {
 553                 .burst_size = ENIC_DEFAULT_TX_BURST,
 554                 .ring_size = RTE_MIN(device_info->tx_desc_lim.nb_max,
 555                         ENIC_DEFAULT_TX_RING_SIZE),
 556                 .nb_queues = ENIC_DEFAULT_TX_RINGS,
 557         };
 558         device_info->speed_capa = speed_capa_from_pci_id(eth_dev);
 559
 560         return 0;
 561 }
 562
 563 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 564 {
 565         static const uint32_t ptypes[] = {
 566                 RTE_PTYPE_L2_ETHER,
 567                 RTE_PTYPE_L2_ETHER_VLAN,
 568                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 569                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 570                 RTE_PTYPE_L4_TCP,
 571                 RTE_PTYPE_L4_UDP,
 572                 RTE_PTYPE_L4_FRAG,
 573                 RTE_PTYPE_L4_NONFRAG,
 574                 RTE_PTYPE_UNKNOWN
 575         };
 576         static const uint32_t ptypes_overlay[] = {
 577                 RTE_PTYPE_L2_ETHER,
 578                 RTE_PTYPE_L2_ETHER_VLAN,
 579                 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
 580                 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
 581                 RTE_PTYPE_L4_TCP,
 582                 RTE_PTYPE_L4_UDP,
 583                 RTE_PTYPE_L4_FRAG,
 584                 RTE_PTYPE_L4_NONFRAG,
 585                 RTE_PTYPE_TUNNEL_GRENAT,
 586                 RTE_PTYPE_INNER_L2_ETHER,
 587                 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
 588                 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
 589                 RTE_PTYPE_INNER_L4_TCP,
 590                 RTE_PTYPE_INNER_L4_UDP,
 591                 RTE_PTYPE_INNER_L4_FRAG,
 592                 RTE_PTYPE_INNER_L4_NONFRAG,
 593                 RTE_PTYPE_UNKNOWN
 594         };
 595
 596         if (dev->rx_pkt_burst != enic_dummy_recv_pkts &&
 597             dev->rx_pkt_burst != NULL) {
 598                 struct enic *enic = pmd_priv(dev);
 599                 if (enic->overlay_offload)
 600                         return ptypes_overlay;
 601                 else
 602                         return ptypes;
 603         }
 604         return NULL;
 605 }
 606
 607 static int enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
 608 {
 609         struct enic *enic = pmd_priv(eth_dev);
 610         int ret;
 611
 612         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 613                 return -E_RTE_SECONDARY;
 614
 615         ENICPMD_FUNC_TRACE();
 616
 617         enic->promisc = 1;
 618         ret = enic_add_packet_filter(enic);
 619         if (ret != 0)
 620                 enic->promisc = 0;
 621
 622         return ret;
 623 }
 624
 625 static int enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
 626 {
 627         struct enic *enic = pmd_priv(eth_dev);
 628         int ret;
 629
 630         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 631                 return -E_RTE_SECONDARY;
 632
 633         ENICPMD_FUNC_TRACE();
 634         enic->promisc = 0;
 635         ret = enic_add_packet_filter(enic);
 636         if (ret != 0)
 637                 enic->promisc = 1;
 638
 639         return ret;
 640 }
 641
 642 static int enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
 643 {
 644         struct enic *enic = pmd_priv(eth_dev);
 645         int ret;
 646
 647         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 648                 return -E_RTE_SECONDARY;
 649
 650         ENICPMD_FUNC_TRACE();
 651         enic->allmulti = 1;
 652         ret = enic_add_packet_filter(enic);
 653         if (ret != 0)
 654                 enic->allmulti = 0;
 655
 656         return ret;
 657 }
 658
 659 static int enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
 660 {
 661         struct enic *enic = pmd_priv(eth_dev);
 662         int ret;
 663
 664         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 665                 return -E_RTE_SECONDARY;
 666
 667         ENICPMD_FUNC_TRACE();
 668         enic->allmulti = 0;
 669         ret = enic_add_packet_filter(enic);
 670         if (ret != 0)
 671                 enic->allmulti = 1;
 672
 673         return ret;
 674 }
 675
 676 static int enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,
 677         struct rte_ether_addr *mac_addr,
 678         __rte_unused uint32_t index, __rte_unused uint32_t pool)
 679 {
 680         struct enic *enic = pmd_priv(eth_dev);
 681
 682         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 683                 return -E_RTE_SECONDARY;
 684
 685         ENICPMD_FUNC_TRACE();
 686         return enic_set_mac_address(enic, mac_addr->addr_bytes);
 687 }
 688
 689 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index)
 690 {
 691         struct enic *enic = pmd_priv(eth_dev);
 692
 693         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 694                 return;
 695
 696         ENICPMD_FUNC_TRACE();
 697         if (enic_del_mac_address(enic, index))
 698                 dev_err(enic, "del mac addr failed\n");
 699 }
 700
 701 static int enicpmd_set_mac_addr(struct rte_eth_dev *eth_dev,
 702                                 struct rte_ether_addr *addr)
 703 {
 704         struct enic *enic = pmd_priv(eth_dev);
 705         int ret;
 706
 707         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 708                 return -E_RTE_SECONDARY;
 709
 710         ENICPMD_FUNC_TRACE();
 711         ret = enic_del_mac_address(enic, 0);
 712         if (ret)
 713                 return ret;
 714         return enic_set_mac_address(enic, addr->addr_bytes);
 715 }
 716
 717 static void debug_log_add_del_addr(struct rte_ether_addr *addr, bool add)
 718 {
 719         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 720
 721         rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE, addr);
 722         ENICPMD_LOG(DEBUG, " %s address %s\n",
 723                      add ? "add" : "remove", mac_str);
 724 }
 725
 726 static int enicpmd_set_mc_addr_list(struct rte_eth_dev *eth_dev,
 727                                     struct rte_ether_addr *mc_addr_set,
 728                                     uint32_t nb_mc_addr)
 729 {
 730         struct enic *enic = pmd_priv(eth_dev);
 731         char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
 732         struct rte_ether_addr *addr;
 733         uint32_t i, j;
 734         int ret;
 735
 736         ENICPMD_FUNC_TRACE();
 737
 738         /* Validate the given addresses first */
 739         for (i = 0; i < nb_mc_addr && mc_addr_set != NULL; i++) {
 740                 addr = &mc_addr_set[i];
 741                 if (!rte_is_multicast_ether_addr(addr) ||
 742                     rte_is_broadcast_ether_addr(addr)) {
 743                         rte_ether_format_addr(mac_str,
 744                                         RTE_ETHER_ADDR_FMT_SIZE, addr);
 745                         ENICPMD_LOG(ERR, " invalid multicast address %s\n",
 746                                      mac_str);
 747                         return -EINVAL;
 748                 }
 749         }
 750
 751         /* Flush all if requested */
 752         if (nb_mc_addr == 0 || mc_addr_set == NULL) {
 753                 ENICPMD_LOG(DEBUG, " flush multicast addresses\n");
 754                 for (i = 0; i < enic->mc_count; i++) {
 755                         addr = &enic->mc_addrs[i];
 756                         debug_log_add_del_addr(addr, false);
 757                         ret = vnic_dev_del_addr(enic->vdev, addr->addr_bytes);
 758                         if (ret)
 759                                 return ret;
 760                 }
 761                 enic->mc_count = 0;
 762                 return 0;
 763         }
 764
 765         if (nb_mc_addr > ENIC_MULTICAST_PERFECT_FILTERS) {
 766                 ENICPMD_LOG(ERR, " too many multicast addresses: max=%d\n",
 767                              ENIC_MULTICAST_PERFECT_FILTERS);
 768                 return -ENOSPC;
 769         }
 770         /*
 771          * devcmd is slow, so apply the difference instead of flushing and
 772          * adding everything.
 773          * 1. Delete addresses on the NIC but not on the host
 774          */
 775         for (i = 0; i < enic->mc_count; i++) {
 776                 addr = &enic->mc_addrs[i];
 777                 for (j = 0; j < nb_mc_addr; j++) {
 778                         if (rte_is_same_ether_addr(addr, &mc_addr_set[j]))
 779                                 break;
 780                 }
 781                 if (j < nb_mc_addr)
 782                         continue;
 783                 debug_log_add_del_addr(addr, false);
 784                 ret = vnic_dev_del_addr(enic->vdev, addr->addr_bytes);
 785                 if (ret)
 786                         return ret;
 787         }
 788         /* 2. Add addresses on the host but not on the NIC */
 789         for (i = 0; i < nb_mc_addr; i++) {
 790                 addr = &mc_addr_set[i];
 791                 for (j = 0; j < enic->mc_count; j++) {
 792                         if (rte_is_same_ether_addr(addr, &enic->mc_addrs[j]))
 793                                 break;
 794                 }
 795                 if (j < enic->mc_count)
 796                         continue;
 797                 debug_log_add_del_addr(addr, true);
 798                 ret = vnic_dev_add_addr(enic->vdev, addr->addr_bytes);
 799                 if (ret)
 800                         return ret;
 801         }
 802         /* Keep a copy so we can flush/apply later on.. */
 803         memcpy(enic->mc_addrs, mc_addr_set,
 804                nb_mc_addr * sizeof(struct rte_ether_addr));
 805         enic->mc_count = nb_mc_addr;
 806         return 0;
 807 }
 808
 809 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
 810 {
 811         struct enic *enic = pmd_priv(eth_dev);
 812
 813         ENICPMD_FUNC_TRACE();
 814         return enic_set_mtu(enic, mtu);
 815 }
 816
 817 static int enicpmd_dev_rss_reta_query(struct rte_eth_dev *dev,
 818                                       struct rte_eth_rss_reta_entry64
 819                                       *reta_conf,
 820                                       uint16_t reta_size)
 821 {
 822         struct enic *enic = pmd_priv(dev);
 823         uint16_t i, idx, shift;
 824
 825         ENICPMD_FUNC_TRACE();
 826         if (reta_size != ENIC_RSS_RETA_SIZE) {
 827                 dev_err(enic, "reta_query: wrong reta_size. given=%u expected=%u\n",
 828                         reta_size, ENIC_RSS_RETA_SIZE);
 829                 return -EINVAL;
 830         }
 831
 832         for (i = 0; i < reta_size; i++) {
 833                 idx = i / RTE_RETA_GROUP_SIZE;
 834                 shift = i % RTE_RETA_GROUP_SIZE;
 835                 if (reta_conf[idx].mask & (1ULL << shift))
 836                         reta_conf[idx].reta[shift] = enic_sop_rq_idx_to_rte_idx(
 837                                 enic->rss_cpu.cpu[i / 4].b[i % 4]);
 838         }
 839
 840         return 0;
 841 }
 842
 843 static int enicpmd_dev_rss_reta_update(struct rte_eth_dev *dev,
 844                                        struct rte_eth_rss_reta_entry64
 845                                        *reta_conf,
 846                                        uint16_t reta_size)
 847 {
 848         struct enic *enic = pmd_priv(dev);
 849         union vnic_rss_cpu rss_cpu;
 850         uint16_t i, idx, shift;
 851
 852         ENICPMD_FUNC_TRACE();
 853         if (reta_size != ENIC_RSS_RETA_SIZE) {
 854                 dev_err(enic, "reta_update: wrong reta_size. given=%u"
 855                         " expected=%u\n",
 856                         reta_size, ENIC_RSS_RETA_SIZE);
 857                 return -EINVAL;
 858         }
 859         /*
 860          * Start with the current reta and modify it per reta_conf, as we
 861          * need to push the entire reta even if we only modify one entry.
 862          */
 863         rss_cpu = enic->rss_cpu;
 864         for (i = 0; i < reta_size; i++) {
 865                 idx = i / RTE_RETA_GROUP_SIZE;
 866                 shift = i % RTE_RETA_GROUP_SIZE;
 867                 if (reta_conf[idx].mask & (1ULL << shift))
 868                         rss_cpu.cpu[i / 4].b[i % 4] =
 869                                 enic_rte_rq_idx_to_sop_idx(
 870                                         reta_conf[idx].reta[shift]);
 871         }
 872         return enic_set_rss_reta(enic, &rss_cpu);
 873 }
 874
 875 static int enicpmd_dev_rss_hash_update(struct rte_eth_dev *dev,
 876                                        struct rte_eth_rss_conf *rss_conf)
 877 {
 878         struct enic *enic = pmd_priv(dev);
 879
 880         ENICPMD_FUNC_TRACE();
 881         return enic_set_rss_conf(enic, rss_conf);
 882 }
 883
 884 static int enicpmd_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 885                                          struct rte_eth_rss_conf *rss_conf)
 886 {
 887         struct enic *enic = pmd_priv(dev);
 888
 889         ENICPMD_FUNC_TRACE();
 890         if (rss_conf == NULL)
 891                 return -EINVAL;
 892         if (rss_conf->rss_key != NULL &&
 893             rss_conf->rss_key_len < ENIC_RSS_HASH_KEY_SIZE) {
 894                 dev_err(enic, "rss_hash_conf_get: wrong rss_key_len. given=%u"
 895                         " expected=%u+\n",
 896                         rss_conf->rss_key_len, ENIC_RSS_HASH_KEY_SIZE);
 897                 return -EINVAL;
 898         }
 899         rss_conf->rss_hf = enic->rss_hf;
 900         if (rss_conf->rss_key != NULL) {
 901                 int i;
 902                 for (i = 0; i < ENIC_RSS_HASH_KEY_SIZE; i++) {
 903                         rss_conf->rss_key[i] =
 904                                 enic->rss_key.key[i / 10].b[i % 10];
 905                 }
 906                 rss_conf->rss_key_len = ENIC_RSS_HASH_KEY_SIZE;
 907         }
 908         return 0;
 909 }
 910
 911 static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev,
 912                                      uint16_t rx_queue_id,
 913                                      struct rte_eth_rxq_info *qinfo)
 914 {
 915         struct enic *enic = pmd_priv(dev);
 916         struct vnic_rq *rq_sop;
 917         struct vnic_rq *rq_data;
 918         struct rte_eth_rxconf *conf;
 919         uint16_t sop_queue_idx;
 920         uint16_t data_queue_idx;
 921
 922         ENICPMD_FUNC_TRACE();
 923         sop_queue_idx = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
 924         data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id);
 925         rq_sop = &enic->rq[sop_queue_idx];
 926         rq_data = &enic->rq[data_queue_idx]; /* valid if data_queue_enable */
 927         qinfo->mp = rq_sop->mp;
 928         qinfo->scattered_rx = rq_sop->data_queue_enable;
 929         qinfo->nb_desc = rq_sop->ring.desc_count;
 930         if (qinfo->scattered_rx)
 931                 qinfo->nb_desc += rq_data->ring.desc_count;
 932         conf = &qinfo->conf;
 933         memset(conf, 0, sizeof(*conf));
 934         conf->rx_free_thresh = rq_sop->rx_free_thresh;
 935         conf->rx_drop_en = 1;
 936         /*
 937          * Except VLAN stripping (port setting), all the checksum offloads
 938          * are always enabled.
 939          */
 940         conf->offloads = enic->rx_offload_capa;
 941         if (!enic->ig_vlan_strip_en)
 942                 conf->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
 943         /* rx_thresh and other fields are not applicable for enic */
 944 }
 945
 946 static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev,
 947                                      uint16_t tx_queue_id,
 948                                      struct rte_eth_txq_info *qinfo)
 949 {
 950         struct enic *enic = pmd_priv(dev);
 951         struct vnic_wq *wq = &enic->wq[tx_queue_id];
 952
 953         ENICPMD_FUNC_TRACE();
 954         qinfo->nb_desc = wq->ring.desc_count;
 955         memset(&qinfo->conf, 0, sizeof(qinfo->conf));
 956         qinfo->conf.offloads = wq->offloads;
 957         /* tx_thresh, and all the other fields are not applicable for enic */
 958 }
 959
 960 static int enicpmd_dev_rx_queue_intr_enable(struct rte_eth_dev *eth_dev,
 961                                             uint16_t rx_queue_id)
 962 {
 963         struct enic *enic = pmd_priv(eth_dev);
 964
 965         ENICPMD_FUNC_TRACE();
 966         vnic_intr_unmask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
 967         return 0;
 968 }
 969
 970 static int enicpmd_dev_rx_queue_intr_disable(struct rte_eth_dev *eth_dev,
 971                                              uint16_t rx_queue_id)
 972 {
 973         struct enic *enic = pmd_priv(eth_dev);
 974
 975         ENICPMD_FUNC_TRACE();
 976         vnic_intr_mask(&enic->intr[rx_queue_id + ENICPMD_RXQ_INTR_OFFSET]);
 977         return 0;
 978 }
 979
 980 static int udp_tunnel_common_check(struct enic *enic,
 981                                    struct rte_eth_udp_tunnel *tnl)
 982 {
 983         if (tnl->prot_type != RTE_TUNNEL_TYPE_VXLAN)
 984                 return -ENOTSUP;
 985         if (!enic->overlay_offload) {
 986                 ENICPMD_LOG(DEBUG, " vxlan (overlay offload) is not "
 987                              "supported\n");
 988                 return -ENOTSUP;
 989         }
 990         return 0;
 991 }
 992
 993 static int update_vxlan_port(struct enic *enic, uint16_t port)
 994 {
 995         if (vnic_dev_overlay_offload_cfg(enic->vdev,
 996                                          OVERLAY_CFG_VXLAN_PORT_UPDATE,
 997                                          port)) {
 998                 ENICPMD_LOG(DEBUG, " failed to update vxlan port\n");
 999                 return -EINVAL;
1000         }
1001         ENICPMD_LOG(DEBUG, " updated vxlan port to %u\n", port);
1002         enic->vxlan_port = port;
1003         return 0;
1004 }
1005
1006 static int enicpmd_dev_udp_tunnel_port_add(struct rte_eth_dev *eth_dev,
1007                                            struct rte_eth_udp_tunnel *tnl)
1008 {
1009         struct enic *enic = pmd_priv(eth_dev);
1010         int ret;
1011
1012         ENICPMD_FUNC_TRACE();
1013         ret = udp_tunnel_common_check(enic, tnl);
1014         if (ret)
1015                 return ret;
1016         /*
1017          * The NIC has 1 configurable VXLAN port number. "Adding" a new port
1018          * number replaces it.
1019          */
1020         if (tnl->udp_port == enic->vxlan_port || tnl->udp_port == 0) {
1021                 ENICPMD_LOG(DEBUG, " %u is already configured or invalid\n",
1022                              tnl->udp_port);
1023                 return -EINVAL;
1024         }
1025         return update_vxlan_port(enic, tnl->udp_port);
1026 }
1027
1028 static int enicpmd_dev_udp_tunnel_port_del(struct rte_eth_dev *eth_dev,
1029                                            struct rte_eth_udp_tunnel *tnl)
1030 {
1031         struct enic *enic = pmd_priv(eth_dev);
1032         int ret;
1033
1034         ENICPMD_FUNC_TRACE();
1035         ret = udp_tunnel_common_check(enic, tnl);
1036         if (ret)
1037                 return ret;
1038         /*
1039          * Clear the previously set port number and restore the
1040          * hardware default port number. Some drivers disable VXLAN
1041          * offloads when there are no configured port numbers. But
1042          * enic does not do that as VXLAN is part of overlay offload,
1043          * which is tied to inner RSS and TSO.
1044          */
1045         if (tnl->udp_port != enic->vxlan_port) {
1046                 ENICPMD_LOG(DEBUG, " %u is not a configured vxlan port\n",
1047                              tnl->udp_port);
1048                 return -EINVAL;
1049         }
1050         return update_vxlan_port(enic, ENIC_DEFAULT_VXLAN_PORT);
1051 }
1052
1053 static int enicpmd_dev_fw_version_get(struct rte_eth_dev *eth_dev,
1054                                       char *fw_version, size_t fw_size)
1055 {
1056         struct vnic_devcmd_fw_info *info;
1057         struct enic *enic;
1058         int ret;
1059
1060         ENICPMD_FUNC_TRACE();
1061         if (fw_version == NULL || fw_size <= 0)
1062                 return -EINVAL;
1063         enic = pmd_priv(eth_dev);
1064         ret = vnic_dev_fw_info(enic->vdev, &info);
1065         if (ret)
1066                 return ret;
1067         snprintf(fw_version, fw_size, "%s %s",
1068                  info->fw_version, info->fw_build);
1069         fw_version[fw_size - 1] = '\0';
1070         return 0;
1071 }
1072
1073 static const struct eth_dev_ops enicpmd_eth_dev_ops = {
1074         .dev_configure        = enicpmd_dev_configure,
1075         .dev_start            = enicpmd_dev_start,
1076         .dev_stop             = enicpmd_dev_stop,
1077         .dev_set_link_up      = NULL,
1078         .dev_set_link_down    = NULL,
1079         .dev_close            = enicpmd_dev_close,
1080         .promiscuous_enable   = enicpmd_dev_promiscuous_enable,
1081         .promiscuous_disable  = enicpmd_dev_promiscuous_disable,
1082         .allmulticast_enable  = enicpmd_dev_allmulticast_enable,
1083         .allmulticast_disable = enicpmd_dev_allmulticast_disable,
1084         .link_update          = enicpmd_dev_link_update,
1085         .stats_get            = enicpmd_dev_stats_get,
1086         .stats_reset          = enicpmd_dev_stats_reset,
1087         .queue_stats_mapping_set = NULL,
1088         .dev_infos_get        = enicpmd_dev_info_get,
1089         .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get,
1090         .mtu_set              = enicpmd_mtu_set,
1091         .vlan_filter_set      = NULL,
1092         .vlan_tpid_set        = NULL,
1093         .vlan_offload_set     = enicpmd_vlan_offload_set,
1094         .vlan_strip_queue_set = NULL,
1095         .rx_queue_start       = enicpmd_dev_rx_queue_start,
1096         .rx_queue_stop        = enicpmd_dev_rx_queue_stop,
1097         .tx_queue_start       = enicpmd_dev_tx_queue_start,
1098         .tx_queue_stop        = enicpmd_dev_tx_queue_stop,
1099         .rx_queue_setup       = enicpmd_dev_rx_queue_setup,
1100         .rx_queue_release     = enicpmd_dev_rx_queue_release,
1101         .rx_queue_count       = enicpmd_dev_rx_queue_count,
1102         .rx_descriptor_done   = NULL,
1103         .tx_queue_setup       = enicpmd_dev_tx_queue_setup,
1104         .tx_queue_release     = enicpmd_dev_tx_queue_release,
1105         .rx_queue_intr_enable = enicpmd_dev_rx_queue_intr_enable,
1106         .rx_queue_intr_disable = enicpmd_dev_rx_queue_intr_disable,
1107         .rxq_info_get         = enicpmd_dev_rxq_info_get,
1108         .txq_info_get         = enicpmd_dev_txq_info_get,
1109         .dev_led_on           = NULL,
1110         .dev_led_off          = NULL,
1111         .flow_ctrl_get        = NULL,
1112         .flow_ctrl_set        = NULL,
1113         .priority_flow_ctrl_set = NULL,
1114         .mac_addr_add         = enicpmd_add_mac_addr,
1115         .mac_addr_remove      = enicpmd_remove_mac_addr,
1116         .mac_addr_set         = enicpmd_set_mac_addr,
1117         .set_mc_addr_list     = enicpmd_set_mc_addr_list,
1118         .filter_ctrl          = enicpmd_dev_filter_ctrl,
1119         .reta_query           = enicpmd_dev_rss_reta_query,
1120         .reta_update          = enicpmd_dev_rss_reta_update,
1121         .rss_hash_conf_get    = enicpmd_dev_rss_hash_conf_get,
1122         .rss_hash_update      = enicpmd_dev_rss_hash_update,
1123         .udp_tunnel_port_add  = enicpmd_dev_udp_tunnel_port_add,
1124         .udp_tunnel_port_del  = enicpmd_dev_udp_tunnel_port_del,
1125         .fw_version_get       = enicpmd_dev_fw_version_get,
1126 };
1127
1128 static int enic_parse_zero_one(const char *key,
1129                                const char *value,
1130                                void *opaque)
1131 {
1132         struct enic *enic;
1133         bool b;
1134
1135         enic = (struct enic *)opaque;
1136         if (strcmp(value, "0") == 0) {
1137                 b = false;
1138         } else if (strcmp(value, "1") == 0) {
1139                 b = true;
1140         } else {
1141                 dev_err(enic, "Invalid value for %s"
1142                         ": expected=0|1 given=%s\n", key, value);
1143                 return -EINVAL;
1144         }
1145         if (strcmp(key, ENIC_DEVARG_DISABLE_OVERLAY) == 0)
1146                 enic->disable_overlay = b;
1147         if (strcmp(key, ENIC_DEVARG_ENABLE_AVX2_RX) == 0)
1148                 enic->enable_avx2_rx = b;
1149         return 0;
1150 }
1151
1152 static int enic_parse_ig_vlan_rewrite(__rte_unused const char *key,
1153                                       const char *value,
1154                                       void *opaque)
1155 {
1156         struct enic *enic;
1157
1158         enic = (struct enic *)opaque;
1159         if (strcmp(value, "trunk") == 0) {
1160                 /* Trunk mode: always tag */
1161                 enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_DEFAULT_TRUNK;
1162         } else if (strcmp(value, "untag") == 0) {
1163                 /* Untag default VLAN mode: untag if VLAN = default VLAN */
1164                 enic->ig_vlan_rewrite_mode =
1165                         IG_VLAN_REWRITE_MODE_UNTAG_DEFAULT_VLAN;
1166         } else if (strcmp(value, "priority") == 0) {
1167                 /*
1168                  * Priority-tag default VLAN mode: priority tag (VLAN header
1169                  * with ID=0) if VLAN = default
1170                  */
1171                 enic->ig_vlan_rewrite_mode =
1172                         IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN;
1173         } else if (strcmp(value, "pass") == 0) {
1174                 /* Pass through mode: do not touch tags */
1175                 enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU;
1176         } else {
1177                 dev_err(enic, "Invalid value for " ENIC_DEVARG_IG_VLAN_REWRITE
1178                         ": expected=trunk|untag|priority|pass given=%s\n",
1179                         value);
1180                 return -EINVAL;
1181         }
1182         return 0;
1183 }
1184
1185 static int enic_check_devargs(struct rte_eth_dev *dev)
1186 {
1187         static const char *const valid_keys[] = {
1188                 ENIC_DEVARG_DISABLE_OVERLAY,
1189                 ENIC_DEVARG_ENABLE_AVX2_RX,
1190                 ENIC_DEVARG_IG_VLAN_REWRITE,
1191                 NULL};
1192         struct enic *enic = pmd_priv(dev);
1193         struct rte_kvargs *kvlist;
1194
1195         ENICPMD_FUNC_TRACE();
1196
1197         enic->disable_overlay = false;
1198         enic->enable_avx2_rx = false;
1199         enic->ig_vlan_rewrite_mode = IG_VLAN_REWRITE_MODE_PASS_THRU;
1200         if (!dev->device->devargs)
1201                 return 0;
1202         kvlist = rte_kvargs_parse(dev->device->devargs->args, valid_keys);
1203         if (!kvlist)
1204                 return -EINVAL;
1205         if (rte_kvargs_process(kvlist, ENIC_DEVARG_DISABLE_OVERLAY,
1206                                enic_parse_zero_one, enic) < 0 ||
1207             rte_kvargs_process(kvlist, ENIC_DEVARG_ENABLE_AVX2_RX,
1208                                enic_parse_zero_one, enic) < 0 ||
1209             rte_kvargs_process(kvlist, ENIC_DEVARG_IG_VLAN_REWRITE,
1210                                enic_parse_ig_vlan_rewrite, enic) < 0) {
1211                 rte_kvargs_free(kvlist);
1212                 return -EINVAL;
1213         }
1214         rte_kvargs_free(kvlist);
1215         return 0;
1216 }
1217
1218 /* Initialize the driver
1219  * It returns 0 on success.
1220  */
1221 static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)
1222 {
1223         struct rte_pci_device *pdev;
1224         struct rte_pci_addr *addr;
1225         struct enic *enic = pmd_priv(eth_dev);
1226         int err;
1227
1228         ENICPMD_FUNC_TRACE();
1229
1230         eth_dev->dev_ops = &enicpmd_eth_dev_ops;
1231         eth_dev->rx_pkt_burst = &enic_recv_pkts;
1232         eth_dev->tx_pkt_burst = &enic_xmit_pkts;
1233         eth_dev->tx_pkt_prepare = &enic_prep_pkts;
1234         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1235                 enic_pick_tx_handler(eth_dev);
1236                 enic_pick_rx_handler(eth_dev);
1237                 return 0;
1238         }
1239         /* Only the primary sets up adapter and other data in shared memory */
1240         enic->port_id = eth_dev->data->port_id;
1241         enic->rte_dev = eth_dev;
1242         /* Let rte_eth_dev_close() release the port resources */
1243         eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1244
1245         pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
1246         rte_eth_copy_pci_info(eth_dev, pdev);
1247         enic->pdev = pdev;
1248         addr = &pdev->addr;
1249
1250         snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x",
1251                 addr->domain, addr->bus, addr->devid, addr->function);
1252
1253         err = enic_check_devargs(eth_dev);
1254         if (err)
1255                 return err;
1256         return enic_probe(enic);
1257 }
1258
1259 static int eth_enic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1260         struct rte_pci_device *pci_dev)
1261 {
1262         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct enic),
1263                 eth_enicpmd_dev_init);
1264 }
1265
1266 static int eth_enic_pci_remove(struct rte_pci_device *pci_dev)
1267 {
1268         return rte_eth_dev_pci_generic_remove(pci_dev, NULL);
1269 }
1270
1271 static struct rte_pci_driver rte_enic_pmd = {
1272         .id_table = pci_id_enic_map,
1273         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1274         .probe = eth_enic_pci_probe,
1275         .remove = eth_enic_pci_remove,
1276 };
1277
1278 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd);
1279 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map);
1280 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci");
1281 RTE_PMD_REGISTER_PARAM_STRING(net_enic,
1282         ENIC_DEVARG_DISABLE_OVERLAY "=0|1 "
1283         ENIC_DEVARG_ENABLE_AVX2_RX "=0|1 "
1284         ENIC_DEVARG_IG_VLAN_REWRITE "=trunk|untag|priority|pass");