1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
11 #include <rte_bus_pci.h>
12 #include <rte_ethdev_driver.h>
13 #include <rte_ethdev_pci.h>
14 #include <rte_string_fns.h>
16 #include "vnic_intr.h"
20 #include "vnic_enet.h"
23 int enicpmd_logtype_init;
24 int enicpmd_logtype_flow;
26 #define PMD_INIT_LOG(level, fmt, args...) \
27 rte_log(RTE_LOG_ ## level, enicpmd_logtype_init, \
28 "%s" fmt "\n", __func__, ##args)
30 #define ENICPMD_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>")
33 * The set of PCI devices this driver supports
35 #define CISCO_PCI_VENDOR_ID 0x1137
36 static const struct rte_pci_id pci_id_enic_map[] = {
37 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET) },
38 { RTE_PCI_DEVICE(CISCO_PCI_VENDOR_ID, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
39 {.vendor_id = 0, /* sentinel */},
42 #define ENIC_TX_OFFLOAD_CAPA ( \
43 DEV_TX_OFFLOAD_VLAN_INSERT | \
44 DEV_TX_OFFLOAD_IPV4_CKSUM | \
45 DEV_TX_OFFLOAD_UDP_CKSUM | \
46 DEV_TX_OFFLOAD_TCP_CKSUM | \
47 DEV_TX_OFFLOAD_TCP_TSO)
49 #define ENIC_RX_OFFLOAD_CAPA ( \
50 DEV_RX_OFFLOAD_VLAN_STRIP | \
51 DEV_RX_OFFLOAD_IPV4_CKSUM | \
52 DEV_RX_OFFLOAD_UDP_CKSUM | \
53 DEV_RX_OFFLOAD_TCP_CKSUM)
55 RTE_INIT(enicpmd_init_log);
57 enicpmd_init_log(void)
59 enicpmd_logtype_init = rte_log_register("pmd.net.enic.init");
60 if (enicpmd_logtype_init >= 0)
61 rte_log_set_level(enicpmd_logtype_init, RTE_LOG_NOTICE);
62 enicpmd_logtype_flow = rte_log_register("pmd.net.enic.flow");
63 if (enicpmd_logtype_flow >= 0)
64 rte_log_set_level(enicpmd_logtype_flow, RTE_LOG_NOTICE);
68 enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev,
69 enum rte_filter_op filter_op, void *arg)
71 struct enic *enic = pmd_priv(eth_dev);
75 if (filter_op == RTE_ETH_FILTER_NOP)
78 if (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)
82 case RTE_ETH_FILTER_ADD:
83 case RTE_ETH_FILTER_UPDATE:
84 ret = enic_fdir_add_fltr(enic,
85 (struct rte_eth_fdir_filter *)arg);
88 case RTE_ETH_FILTER_DELETE:
89 ret = enic_fdir_del_fltr(enic,
90 (struct rte_eth_fdir_filter *)arg);
93 case RTE_ETH_FILTER_STATS:
94 enic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg);
97 case RTE_ETH_FILTER_FLUSH:
98 dev_warning(enic, "unsupported operation %u", filter_op);
101 case RTE_ETH_FILTER_INFO:
102 enic_fdir_info_get(enic, (struct rte_eth_fdir_info *)arg);
105 dev_err(enic, "unknown operation %u", filter_op);
113 enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,
114 enum rte_filter_type filter_type,
115 enum rte_filter_op filter_op,
120 ENICPMD_FUNC_TRACE();
122 switch (filter_type) {
123 case RTE_ETH_FILTER_GENERIC:
124 if (filter_op != RTE_ETH_FILTER_GET)
126 *(const void **)arg = &enic_flow_ops;
128 case RTE_ETH_FILTER_FDIR:
129 ret = enicpmd_fdir_ctrl_func(dev, filter_op, arg);
132 dev_warning(enic, "Filter type (%d) not supported",
141 static void enicpmd_dev_tx_queue_release(void *txq)
143 ENICPMD_FUNC_TRACE();
145 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
151 static int enicpmd_dev_setup_intr(struct enic *enic)
156 ENICPMD_FUNC_TRACE();
158 /* Are we done with the init of all the queues? */
159 for (index = 0; index < enic->cq_count; index++) {
160 if (!enic->cq[index].ctrl)
163 if (enic->cq_count != index)
165 for (index = 0; index < enic->wq_count; index++) {
166 if (!enic->wq[index].ctrl)
169 if (enic->wq_count != index)
171 /* check start of packet (SOP) RQs only in case scatter is disabled. */
172 for (index = 0; index < enic->rq_count; index++) {
173 if (!enic->rq[enic_rte_rq_idx_to_sop_idx(index)].ctrl)
176 if (enic->rq_count != index)
179 ret = enic_alloc_intr_resources(enic);
181 dev_err(enic, "alloc intr failed\n");
184 enic_init_vnic_resources(enic);
186 ret = enic_setup_finish(enic);
188 dev_err(enic, "setup could not be finished\n");
193 static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,
196 unsigned int socket_id,
197 __rte_unused const struct rte_eth_txconf *tx_conf)
200 struct enic *enic = pmd_priv(eth_dev);
202 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
203 return -E_RTE_SECONDARY;
205 ENICPMD_FUNC_TRACE();
206 RTE_ASSERT(queue_idx < enic->conf_wq_count);
207 eth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx];
209 ret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);
211 dev_err(enic, "error in allocating wq\n");
215 return enicpmd_dev_setup_intr(enic);
218 static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
221 struct enic *enic = pmd_priv(eth_dev);
223 ENICPMD_FUNC_TRACE();
225 enic_start_wq(enic, queue_idx);
230 static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,
234 struct enic *enic = pmd_priv(eth_dev);
236 ENICPMD_FUNC_TRACE();
238 ret = enic_stop_wq(enic, queue_idx);
240 dev_err(enic, "error in stopping wq %d\n", queue_idx);
245 static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
248 struct enic *enic = pmd_priv(eth_dev);
250 ENICPMD_FUNC_TRACE();
252 enic_start_rq(enic, queue_idx);
257 static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,
261 struct enic *enic = pmd_priv(eth_dev);
263 ENICPMD_FUNC_TRACE();
265 ret = enic_stop_rq(enic, queue_idx);
267 dev_err(enic, "error in stopping rq %d\n", queue_idx);
272 static void enicpmd_dev_rx_queue_release(void *rxq)
274 ENICPMD_FUNC_TRACE();
276 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
282 static uint32_t enicpmd_dev_rx_queue_count(struct rte_eth_dev *dev,
283 uint16_t rx_queue_id)
285 struct enic *enic = pmd_priv(dev);
286 uint32_t queue_count = 0;
292 rq_num = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
293 cq = &enic->cq[enic_cq_rq(enic, rq_num)];
294 cq_idx = cq->to_clean;
296 cq_tail = ioread32(&cq->ctrl->cq_tail);
298 if (cq_tail < cq_idx)
299 cq_tail += cq->ring.desc_count;
301 queue_count = cq_tail - cq_idx;
306 static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
309 unsigned int socket_id,
310 const struct rte_eth_rxconf *rx_conf,
311 struct rte_mempool *mp)
314 struct enic *enic = pmd_priv(eth_dev);
316 ENICPMD_FUNC_TRACE();
318 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
319 return -E_RTE_SECONDARY;
320 RTE_ASSERT(enic_rte_rq_idx_to_sop_idx(queue_idx) < enic->conf_rq_count);
321 eth_dev->data->rx_queues[queue_idx] =
322 (void *)&enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
324 ret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc,
325 rx_conf->rx_free_thresh);
327 dev_err(enic, "error in allocating rq\n");
331 return enicpmd_dev_setup_intr(enic);
334 static int enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
336 struct enic *enic = pmd_priv(eth_dev);
339 ENICPMD_FUNC_TRACE();
341 offloads = eth_dev->data->dev_conf.rxmode.offloads;
342 if (mask & ETH_VLAN_STRIP_MASK) {
343 if (offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
344 enic->ig_vlan_strip_en = 1;
346 enic->ig_vlan_strip_en = 0;
349 if ((mask & ETH_VLAN_FILTER_MASK) &&
350 (offloads & DEV_RX_OFFLOAD_VLAN_FILTER)) {
352 "Configuration of VLAN filter is not supported\n");
355 if ((mask & ETH_VLAN_EXTEND_MASK) &&
356 (offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)) {
358 "Configuration of extended VLAN is not supported\n");
361 return enic_set_vlan_strip(enic);
364 static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)
368 struct enic *enic = pmd_priv(eth_dev);
370 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
371 return -E_RTE_SECONDARY;
373 ENICPMD_FUNC_TRACE();
374 ret = enic_set_vnic_res(enic);
376 dev_err(enic, "Set vNIC resource num failed, aborting\n");
380 enic->hw_ip_checksum = !!(eth_dev->data->dev_conf.rxmode.offloads &
381 DEV_RX_OFFLOAD_CHECKSUM);
382 /* All vlan offload masks to apply the current settings */
383 mask = ETH_VLAN_STRIP_MASK |
384 ETH_VLAN_FILTER_MASK |
385 ETH_VLAN_EXTEND_MASK;
386 ret = enicpmd_vlan_offload_set(eth_dev, mask);
388 dev_err(enic, "Failed to configure VLAN offloads\n");
392 * Initialize RSS with the default reta and key. If the user key is
393 * given (rx_adv_conf.rss_conf.rss_key), will use that instead of the
396 return enic_init_rss_nic_cfg(enic);
400 * It returns 0 on success.
402 static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)
404 struct enic *enic = pmd_priv(eth_dev);
406 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
407 return -E_RTE_SECONDARY;
409 ENICPMD_FUNC_TRACE();
410 return enic_enable(enic);
414 * Stop device: disable rx and tx functions to allow for reconfiguring.
416 static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev)
418 struct rte_eth_link link;
419 struct enic *enic = pmd_priv(eth_dev);
421 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
424 ENICPMD_FUNC_TRACE();
426 memset(&link, 0, sizeof(link));
427 rte_atomic64_cmpset((uint64_t *)ð_dev->data->dev_link,
428 *(uint64_t *)ð_dev->data->dev_link,
435 static void enicpmd_dev_close(struct rte_eth_dev *eth_dev)
437 struct enic *enic = pmd_priv(eth_dev);
439 ENICPMD_FUNC_TRACE();
443 static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,
444 __rte_unused int wait_to_complete)
446 struct enic *enic = pmd_priv(eth_dev);
448 ENICPMD_FUNC_TRACE();
449 return enic_link_update(enic);
452 static int enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,
453 struct rte_eth_stats *stats)
455 struct enic *enic = pmd_priv(eth_dev);
457 ENICPMD_FUNC_TRACE();
458 return enic_dev_stats_get(enic, stats);
461 static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)
463 struct enic *enic = pmd_priv(eth_dev);
465 ENICPMD_FUNC_TRACE();
466 enic_dev_stats_clear(enic);
469 static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,
470 struct rte_eth_dev_info *device_info)
472 struct enic *enic = pmd_priv(eth_dev);
474 ENICPMD_FUNC_TRACE();
475 device_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
476 /* Scattered Rx uses two receive queues per rx queue exposed to dpdk */
477 device_info->max_rx_queues = enic->conf_rq_count / 2;
478 device_info->max_tx_queues = enic->conf_wq_count;
479 device_info->min_rx_bufsize = ENIC_MIN_MTU;
480 /* "Max" mtu is not a typo. HW receives packet sizes up to the
481 * max mtu regardless of the current mtu (vNIC's mtu). vNIC mtu is
482 * a hint to the driver to size receive buffers accordingly so that
483 * larger-than-vnic-mtu packets get truncated.. For DPDK, we let
484 * the user decide the buffer size via rxmode.max_rx_pkt_len, basically
487 device_info->max_rx_pktlen = enic_mtu_to_max_rx_pktlen(enic->max_mtu);
488 device_info->max_mac_addrs = ENIC_MAX_MAC_ADDR;
489 device_info->rx_offload_capa = ENIC_RX_OFFLOAD_CAPA;
490 device_info->tx_offload_capa = ENIC_TX_OFFLOAD_CAPA;
491 device_info->default_rxconf = (struct rte_eth_rxconf) {
492 .rx_free_thresh = ENIC_DEFAULT_RX_FREE_THRESH
494 device_info->reta_size = enic->reta_size;
495 device_info->hash_key_size = enic->hash_key_size;
496 device_info->flow_type_rss_offloads = enic->flow_type_rss_offloads;
499 static const uint32_t *enicpmd_dev_supported_ptypes_get(struct rte_eth_dev *dev)
501 static const uint32_t ptypes[] = {
503 RTE_PTYPE_L2_ETHER_VLAN,
504 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
505 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
509 RTE_PTYPE_L4_NONFRAG,
513 if (dev->rx_pkt_burst == enic_recv_pkts)
518 static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
520 struct enic *enic = pmd_priv(eth_dev);
522 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
525 ENICPMD_FUNC_TRACE();
528 enic_add_packet_filter(enic);
531 static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
533 struct enic *enic = pmd_priv(eth_dev);
535 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
538 ENICPMD_FUNC_TRACE();
540 enic_add_packet_filter(enic);
543 static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
545 struct enic *enic = pmd_priv(eth_dev);
547 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
550 ENICPMD_FUNC_TRACE();
552 enic_add_packet_filter(enic);
555 static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
557 struct enic *enic = pmd_priv(eth_dev);
559 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
562 ENICPMD_FUNC_TRACE();
564 enic_add_packet_filter(enic);
567 static int enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,
568 struct ether_addr *mac_addr,
569 __rte_unused uint32_t index, __rte_unused uint32_t pool)
571 struct enic *enic = pmd_priv(eth_dev);
573 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
574 return -E_RTE_SECONDARY;
576 ENICPMD_FUNC_TRACE();
577 return enic_set_mac_address(enic, mac_addr->addr_bytes);
580 static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, uint32_t index)
582 struct enic *enic = pmd_priv(eth_dev);
584 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
587 ENICPMD_FUNC_TRACE();
588 enic_del_mac_address(enic, index);
591 static int enicpmd_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
593 struct enic *enic = pmd_priv(eth_dev);
595 ENICPMD_FUNC_TRACE();
596 return enic_set_mtu(enic, mtu);
599 static int enicpmd_dev_rss_reta_query(struct rte_eth_dev *dev,
600 struct rte_eth_rss_reta_entry64
604 struct enic *enic = pmd_priv(dev);
605 uint16_t i, idx, shift;
607 ENICPMD_FUNC_TRACE();
608 if (reta_size != ENIC_RSS_RETA_SIZE) {
609 dev_err(enic, "reta_query: wrong reta_size. given=%u expected=%u\n",
610 reta_size, ENIC_RSS_RETA_SIZE);
614 for (i = 0; i < reta_size; i++) {
615 idx = i / RTE_RETA_GROUP_SIZE;
616 shift = i % RTE_RETA_GROUP_SIZE;
617 if (reta_conf[idx].mask & (1ULL << shift))
618 reta_conf[idx].reta[shift] = enic_sop_rq_idx_to_rte_idx(
619 enic->rss_cpu.cpu[i / 4].b[i % 4]);
625 static int enicpmd_dev_rss_reta_update(struct rte_eth_dev *dev,
626 struct rte_eth_rss_reta_entry64
630 struct enic *enic = pmd_priv(dev);
631 union vnic_rss_cpu rss_cpu;
632 uint16_t i, idx, shift;
634 ENICPMD_FUNC_TRACE();
635 if (reta_size != ENIC_RSS_RETA_SIZE) {
636 dev_err(enic, "reta_update: wrong reta_size. given=%u"
638 reta_size, ENIC_RSS_RETA_SIZE);
642 * Start with the current reta and modify it per reta_conf, as we
643 * need to push the entire reta even if we only modify one entry.
645 rss_cpu = enic->rss_cpu;
646 for (i = 0; i < reta_size; i++) {
647 idx = i / RTE_RETA_GROUP_SIZE;
648 shift = i % RTE_RETA_GROUP_SIZE;
649 if (reta_conf[idx].mask & (1ULL << shift))
650 rss_cpu.cpu[i / 4].b[i % 4] =
651 enic_rte_rq_idx_to_sop_idx(
652 reta_conf[idx].reta[shift]);
654 return enic_set_rss_reta(enic, &rss_cpu);
657 static int enicpmd_dev_rss_hash_update(struct rte_eth_dev *dev,
658 struct rte_eth_rss_conf *rss_conf)
660 struct enic *enic = pmd_priv(dev);
662 ENICPMD_FUNC_TRACE();
663 return enic_set_rss_conf(enic, rss_conf);
666 static int enicpmd_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
667 struct rte_eth_rss_conf *rss_conf)
669 struct enic *enic = pmd_priv(dev);
671 ENICPMD_FUNC_TRACE();
672 if (rss_conf == NULL)
674 if (rss_conf->rss_key != NULL &&
675 rss_conf->rss_key_len < ENIC_RSS_HASH_KEY_SIZE) {
676 dev_err(enic, "rss_hash_conf_get: wrong rss_key_len. given=%u"
678 rss_conf->rss_key_len, ENIC_RSS_HASH_KEY_SIZE);
681 rss_conf->rss_hf = enic->rss_hf;
682 if (rss_conf->rss_key != NULL) {
684 for (i = 0; i < ENIC_RSS_HASH_KEY_SIZE; i++) {
685 rss_conf->rss_key[i] =
686 enic->rss_key.key[i / 10].b[i % 10];
688 rss_conf->rss_key_len = ENIC_RSS_HASH_KEY_SIZE;
693 static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev,
694 uint16_t rx_queue_id,
695 struct rte_eth_rxq_info *qinfo)
697 struct enic *enic = pmd_priv(dev);
698 struct vnic_rq *rq_sop;
699 struct vnic_rq *rq_data;
700 struct rte_eth_rxconf *conf;
701 uint16_t sop_queue_idx;
702 uint16_t data_queue_idx;
704 ENICPMD_FUNC_TRACE();
705 sop_queue_idx = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
706 data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id);
707 rq_sop = &enic->rq[sop_queue_idx];
708 rq_data = &enic->rq[data_queue_idx]; /* valid if data_queue_enable */
709 qinfo->mp = rq_sop->mp;
710 qinfo->scattered_rx = rq_sop->data_queue_enable;
711 qinfo->nb_desc = rq_sop->ring.desc_count;
712 if (qinfo->scattered_rx)
713 qinfo->nb_desc += rq_data->ring.desc_count;
715 memset(conf, 0, sizeof(*conf));
716 conf->rx_free_thresh = rq_sop->rx_free_thresh;
717 conf->rx_drop_en = 1;
719 * Except VLAN stripping (port setting), all the checksum offloads
720 * are always enabled.
722 conf->offloads = ENIC_RX_OFFLOAD_CAPA;
723 if (!enic->ig_vlan_strip_en)
724 conf->offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
725 /* rx_thresh and other fields are not applicable for enic */
728 static void enicpmd_dev_txq_info_get(struct rte_eth_dev *dev,
729 __rte_unused uint16_t tx_queue_id,
730 struct rte_eth_txq_info *qinfo)
732 struct enic *enic = pmd_priv(dev);
734 ENICPMD_FUNC_TRACE();
735 qinfo->nb_desc = enic->config.wq_desc_count;
736 memset(&qinfo->conf, 0, sizeof(qinfo->conf));
737 qinfo->conf.offloads = ENIC_TX_OFFLOAD_CAPA; /* not configurable */
738 /* tx_thresh, and all the other fields are not applicable for enic */
741 static const struct eth_dev_ops enicpmd_eth_dev_ops = {
742 .dev_configure = enicpmd_dev_configure,
743 .dev_start = enicpmd_dev_start,
744 .dev_stop = enicpmd_dev_stop,
745 .dev_set_link_up = NULL,
746 .dev_set_link_down = NULL,
747 .dev_close = enicpmd_dev_close,
748 .promiscuous_enable = enicpmd_dev_promiscuous_enable,
749 .promiscuous_disable = enicpmd_dev_promiscuous_disable,
750 .allmulticast_enable = enicpmd_dev_allmulticast_enable,
751 .allmulticast_disable = enicpmd_dev_allmulticast_disable,
752 .link_update = enicpmd_dev_link_update,
753 .stats_get = enicpmd_dev_stats_get,
754 .stats_reset = enicpmd_dev_stats_reset,
755 .queue_stats_mapping_set = NULL,
756 .dev_infos_get = enicpmd_dev_info_get,
757 .dev_supported_ptypes_get = enicpmd_dev_supported_ptypes_get,
758 .mtu_set = enicpmd_mtu_set,
759 .vlan_filter_set = NULL,
760 .vlan_tpid_set = NULL,
761 .vlan_offload_set = enicpmd_vlan_offload_set,
762 .vlan_strip_queue_set = NULL,
763 .rx_queue_start = enicpmd_dev_rx_queue_start,
764 .rx_queue_stop = enicpmd_dev_rx_queue_stop,
765 .tx_queue_start = enicpmd_dev_tx_queue_start,
766 .tx_queue_stop = enicpmd_dev_tx_queue_stop,
767 .rx_queue_setup = enicpmd_dev_rx_queue_setup,
768 .rx_queue_release = enicpmd_dev_rx_queue_release,
769 .rx_queue_count = enicpmd_dev_rx_queue_count,
770 .rx_descriptor_done = NULL,
771 .tx_queue_setup = enicpmd_dev_tx_queue_setup,
772 .tx_queue_release = enicpmd_dev_tx_queue_release,
773 .rxq_info_get = enicpmd_dev_rxq_info_get,
774 .txq_info_get = enicpmd_dev_txq_info_get,
777 .flow_ctrl_get = NULL,
778 .flow_ctrl_set = NULL,
779 .priority_flow_ctrl_set = NULL,
780 .mac_addr_add = enicpmd_add_mac_addr,
781 .mac_addr_remove = enicpmd_remove_mac_addr,
782 .filter_ctrl = enicpmd_dev_filter_ctrl,
783 .reta_query = enicpmd_dev_rss_reta_query,
784 .reta_update = enicpmd_dev_rss_reta_update,
785 .rss_hash_conf_get = enicpmd_dev_rss_hash_conf_get,
786 .rss_hash_update = enicpmd_dev_rss_hash_update,
789 struct enic *enicpmd_list_head = NULL;
790 /* Initialize the driver
791 * It returns 0 on success.
793 static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)
795 struct rte_pci_device *pdev;
796 struct rte_pci_addr *addr;
797 struct enic *enic = pmd_priv(eth_dev);
799 ENICPMD_FUNC_TRACE();
801 enic->port_id = eth_dev->data->port_id;
802 enic->rte_dev = eth_dev;
803 eth_dev->dev_ops = &enicpmd_eth_dev_ops;
804 eth_dev->rx_pkt_burst = &enic_recv_pkts;
805 eth_dev->tx_pkt_burst = &enic_xmit_pkts;
806 eth_dev->tx_pkt_prepare = &enic_prep_pkts;
808 pdev = RTE_ETH_DEV_TO_PCI(eth_dev);
809 rte_eth_copy_pci_info(eth_dev, pdev);
813 snprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, "%04x:%02x:%02x.%x",
814 addr->domain, addr->bus, addr->devid, addr->function);
816 return enic_probe(enic);
819 static int eth_enic_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
820 struct rte_pci_device *pci_dev)
822 return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct enic),
823 eth_enicpmd_dev_init);
826 static int eth_enic_pci_remove(struct rte_pci_device *pci_dev)
828 return rte_eth_dev_pci_generic_remove(pci_dev, NULL);
831 static struct rte_pci_driver rte_enic_pmd = {
832 .id_table = pci_id_enic_map,
833 .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
834 .probe = eth_enic_pci_probe,
835 .remove = eth_enic_pci_remove,
838 RTE_PMD_REGISTER_PCI(net_enic, rte_enic_pmd);
839 RTE_PMD_REGISTER_PCI_TABLE(net_enic, pci_id_enic_map);
840 RTE_PMD_REGISTER_KMOD_DEP(net_enic, "* igb_uio | uio_pci_generic | vfio-pci");