2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * Copyright (c) 2014, Cisco Systems, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
43 #include <rte_memzone.h>
44 #include <rte_malloc.h>
46 #include <rte_string_fns.h>
47 #include <rte_ethdev.h>
49 #include "enic_compat.h"
51 #include "wq_enet_desc.h"
52 #include "rq_enet_desc.h"
53 #include "cq_enet_desc.h"
54 #include "vnic_enet.h"
59 #include "vnic_intr.h"
62 static inline int enic_is_sriov_vf(struct enic *enic)
64 return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
67 static int is_zero_addr(uint8_t *addr)
69 return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
72 static int is_mcast_addr(uint8_t *addr)
77 static int is_eth_addr_valid(uint8_t *addr)
79 return !is_mcast_addr(addr) && !is_zero_addr(addr);
83 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
87 if (!rq || !rq->mbuf_ring) {
88 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
92 for (i = 0; i < rq->ring.desc_count; i++) {
93 if (rq->mbuf_ring[i]) {
94 rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
95 rq->mbuf_ring[i] = NULL;
100 void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
102 vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
105 static void enic_free_wq_buf(struct vnic_wq_buf *buf)
107 struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
109 rte_pktmbuf_free_seg(mbuf);
113 static void enic_log_q_error(struct enic *enic)
118 for (i = 0; i < enic->wq_count; i++) {
119 error_status = vnic_wq_error_status(&enic->wq[i]);
121 dev_err(enic, "WQ[%d] error_status %d\n", i,
125 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
126 if (!enic->rq[i].in_use)
128 error_status = vnic_rq_error_status(&enic->rq[i]);
130 dev_err(enic, "RQ[%d] error_status %d\n", i,
135 static void enic_clear_soft_stats(struct enic *enic)
137 struct enic_soft_stats *soft_stats = &enic->soft_stats;
138 rte_atomic64_clear(&soft_stats->rx_nombuf);
139 rte_atomic64_clear(&soft_stats->rx_packet_errors);
140 rte_atomic64_clear(&soft_stats->tx_oversized);
143 static void enic_init_soft_stats(struct enic *enic)
145 struct enic_soft_stats *soft_stats = &enic->soft_stats;
146 rte_atomic64_init(&soft_stats->rx_nombuf);
147 rte_atomic64_init(&soft_stats->rx_packet_errors);
148 rte_atomic64_init(&soft_stats->tx_oversized);
149 enic_clear_soft_stats(enic);
152 void enic_dev_stats_clear(struct enic *enic)
154 if (vnic_dev_stats_clear(enic->vdev))
155 dev_err(enic, "Error in clearing stats\n");
156 enic_clear_soft_stats(enic);
159 void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
161 struct vnic_stats *stats;
162 struct enic_soft_stats *soft_stats = &enic->soft_stats;
163 int64_t rx_truncated;
164 uint64_t rx_packet_errors;
166 if (vnic_dev_stats_dump(enic->vdev, &stats)) {
167 dev_err(enic, "Error in getting stats\n");
171 /* The number of truncated packets can only be calculated by
172 * subtracting a hardware counter from error packets received by
173 * the driver. Note: this causes transient inaccuracies in the
174 * ipackets count. Also, the length of truncated packets are
175 * counted in ibytes even though truncated packets are dropped
176 * which can make ibytes be slightly higher than it should be.
178 rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
179 rx_truncated = rx_packet_errors - stats->rx.rx_errors;
181 r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
182 r_stats->opackets = stats->tx.tx_frames_ok;
184 r_stats->ibytes = stats->rx.rx_bytes_ok;
185 r_stats->obytes = stats->tx.tx_bytes_ok;
187 r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
188 r_stats->oerrors = stats->tx.tx_errors
189 + rte_atomic64_read(&soft_stats->tx_oversized);
191 r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
193 r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
196 void enic_del_mac_address(struct enic *enic, int mac_index)
198 struct rte_eth_dev *eth_dev = enic->rte_dev;
199 uint8_t *mac_addr = eth_dev->data->mac_addrs[mac_index].addr_bytes;
201 if (vnic_dev_del_addr(enic->vdev, mac_addr))
202 dev_err(enic, "del mac addr failed\n");
205 void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
209 if (!is_eth_addr_valid(mac_addr)) {
210 dev_err(enic, "invalid mac address\n");
214 err = vnic_dev_add_addr(enic->vdev, mac_addr);
216 dev_err(enic, "add mac addr failed\n");
222 enic_free_rq_buf(struct rte_mbuf **mbuf)
227 rte_pktmbuf_free(*mbuf);
231 void enic_init_vnic_resources(struct enic *enic)
233 unsigned int error_interrupt_enable = 1;
234 unsigned int error_interrupt_offset = 0;
235 unsigned int index = 0;
237 struct vnic_rq *data_rq;
239 for (index = 0; index < enic->rq_count; index++) {
240 cq_idx = enic_cq_rq(enic, enic_rte_rq_idx_to_sop_idx(index));
242 vnic_rq_init(&enic->rq[enic_rte_rq_idx_to_sop_idx(index)],
244 error_interrupt_enable,
245 error_interrupt_offset);
247 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index)];
249 vnic_rq_init(data_rq,
251 error_interrupt_enable,
252 error_interrupt_offset);
254 vnic_cq_init(&enic->cq[cq_idx],
255 0 /* flow_control_enable */,
256 1 /* color_enable */,
259 1 /* cq_tail_color */,
260 0 /* interrupt_enable */,
261 1 /* cq_entry_enable */,
262 0 /* cq_message_enable */,
263 0 /* interrupt offset */,
264 0 /* cq_message_addr */);
267 for (index = 0; index < enic->wq_count; index++) {
268 vnic_wq_init(&enic->wq[index],
269 enic_cq_wq(enic, index),
270 error_interrupt_enable,
271 error_interrupt_offset);
273 cq_idx = enic_cq_wq(enic, index);
274 vnic_cq_init(&enic->cq[cq_idx],
275 0 /* flow_control_enable */,
276 1 /* color_enable */,
279 1 /* cq_tail_color */,
280 0 /* interrupt_enable */,
281 0 /* cq_entry_enable */,
282 1 /* cq_message_enable */,
283 0 /* interrupt offset */,
284 (u64)enic->wq[index].cqmsg_rz->phys_addr);
287 vnic_intr_init(&enic->intr,
288 enic->config.intr_timer_usec,
289 enic->config.intr_timer_type,
290 /*mask_on_assertion*/1);
295 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
298 struct rq_enet_desc *rqd = rq->ring.descs;
305 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
306 rq->ring.desc_count);
308 for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
309 mb = rte_mbuf_raw_alloc(rq->mp);
311 dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
312 (unsigned)rq->index);
316 mb->data_off = RTE_PKTMBUF_HEADROOM;
317 dma_addr = (dma_addr_t)(mb->buf_physaddr
318 + RTE_PKTMBUF_HEADROOM);
319 rq_enet_desc_enc(rqd, dma_addr,
320 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
321 : RQ_ENET_TYPE_NOT_SOP),
322 mb->buf_len - RTE_PKTMBUF_HEADROOM);
323 rq->mbuf_ring[i] = mb;
326 /* make sure all prior writes are complete before doing the PIO write */
329 /* Post all but the last buffer to VIC. */
330 rq->posted_index = rq->ring.desc_count - 1;
334 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
335 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
336 iowrite32(rq->posted_index, &rq->ctrl->posted_index);
337 iowrite32(0, &rq->ctrl->fetch_index);
345 enic_alloc_consistent(void *priv, size_t size,
346 dma_addr_t *dma_handle, u8 *name)
349 const struct rte_memzone *rz;
351 struct enic *enic = (struct enic *)priv;
352 struct enic_memzone_entry *mze;
354 rz = rte_memzone_reserve_aligned((const char *)name,
355 size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
357 pr_err("%s : Failed to allocate memory requested for %s\n",
363 *dma_handle = (dma_addr_t)rz->phys_addr;
365 mze = rte_malloc("enic memzone entry",
366 sizeof(struct enic_memzone_entry), 0);
369 pr_err("%s : Failed to allocate memory for memzone list\n",
371 rte_memzone_free(rz);
376 rte_spinlock_lock(&enic->memzone_list_lock);
377 LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
378 rte_spinlock_unlock(&enic->memzone_list_lock);
384 enic_free_consistent(void *priv,
385 __rte_unused size_t size,
387 dma_addr_t dma_handle)
389 struct enic_memzone_entry *mze;
390 struct enic *enic = (struct enic *)priv;
392 rte_spinlock_lock(&enic->memzone_list_lock);
393 LIST_FOREACH(mze, &enic->memzone_list, entries) {
394 if (mze->rz->addr == vaddr &&
395 mze->rz->phys_addr == dma_handle)
399 rte_spinlock_unlock(&enic->memzone_list_lock);
401 "Tried to free memory, but couldn't find it in the memzone list\n");
404 LIST_REMOVE(mze, entries);
405 rte_spinlock_unlock(&enic->memzone_list_lock);
406 rte_memzone_free(mze->rz);
410 int enic_link_update(struct enic *enic)
412 struct rte_eth_dev *eth_dev = enic->rte_dev;
416 link_status = enic_get_link_status(enic);
417 ret = (link_status == enic->link_status);
418 enic->link_status = link_status;
419 eth_dev->data->dev_link.link_status = link_status;
420 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
421 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
426 enic_intr_handler(__rte_unused struct rte_intr_handle *handle,
429 struct rte_eth_dev *dev = (struct rte_eth_dev *)arg;
430 struct enic *enic = pmd_priv(dev);
432 vnic_intr_return_all_credits(&enic->intr);
434 enic_link_update(enic);
435 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
436 enic_log_q_error(enic);
439 int enic_enable(struct enic *enic)
443 struct rte_eth_dev *eth_dev = enic->rte_dev;
445 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
446 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
448 /* vnic notification of link status has already been turned on in
449 * enic_dev_init() which is called during probe time. Here we are
450 * just turning on interrupt vector 0 if needed.
452 if (eth_dev->data->dev_conf.intr_conf.lsc)
453 vnic_dev_notify_set(enic->vdev, 0);
455 if (enic_clsf_init(enic))
456 dev_warning(enic, "Init of hash table for clsf failed."\
457 "Flow director feature will not work\n");
459 for (index = 0; index < enic->rq_count; index++) {
460 err = enic_alloc_rx_queue_mbufs(enic,
461 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
463 dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
466 err = enic_alloc_rx_queue_mbufs(enic,
467 &enic->rq[enic_rte_rq_idx_to_data_idx(index)]);
469 /* release the allocated mbufs for the sop rq*/
470 enic_rxmbuf_queue_release(enic,
471 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
473 dev_err(enic, "Failed to alloc data RX queue mbufs\n");
478 for (index = 0; index < enic->wq_count; index++)
479 enic_start_wq(enic, index);
480 for (index = 0; index < enic->rq_count; index++)
481 enic_start_rq(enic, index);
483 vnic_dev_add_addr(enic->vdev, enic->mac_addr);
485 vnic_dev_enable_wait(enic->vdev);
487 /* Register and enable error interrupt */
488 rte_intr_callback_register(&(enic->pdev->intr_handle),
489 enic_intr_handler, (void *)enic->rte_dev);
491 rte_intr_enable(&(enic->pdev->intr_handle));
492 vnic_intr_unmask(&enic->intr);
497 int enic_alloc_intr_resources(struct enic *enic)
501 dev_info(enic, "vNIC resources used: "\
502 "wq %d rq %d cq %d intr %d\n",
503 enic->wq_count, enic_vnic_rq_count(enic),
504 enic->cq_count, enic->intr_count);
506 err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
508 enic_free_vnic_resources(enic);
513 void enic_free_rq(void *rxq)
515 struct vnic_rq *rq_sop, *rq_data;
521 rq_sop = (struct vnic_rq *)rxq;
522 enic = vnic_dev_priv(rq_sop->vdev);
523 rq_data = &enic->rq[rq_sop->data_queue_idx];
525 enic_rxmbuf_queue_release(enic, rq_sop);
527 enic_rxmbuf_queue_release(enic, rq_data);
529 rte_free(rq_sop->mbuf_ring);
531 rte_free(rq_data->mbuf_ring);
533 rq_sop->mbuf_ring = NULL;
534 rq_data->mbuf_ring = NULL;
536 vnic_rq_free(rq_sop);
538 vnic_rq_free(rq_data);
540 vnic_cq_free(&enic->cq[enic_sop_rq_idx_to_cq_idx(rq_sop->index)]);
546 void enic_start_wq(struct enic *enic, uint16_t queue_idx)
548 struct rte_eth_dev *eth_dev = enic->rte_dev;
549 vnic_wq_enable(&enic->wq[queue_idx]);
550 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
553 int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
555 struct rte_eth_dev *eth_dev = enic->rte_dev;
558 ret = vnic_wq_disable(&enic->wq[queue_idx]);
562 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
566 void enic_start_rq(struct enic *enic, uint16_t queue_idx)
568 struct vnic_rq *rq_sop;
569 struct vnic_rq *rq_data;
570 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
571 rq_data = &enic->rq[rq_sop->data_queue_idx];
572 struct rte_eth_dev *eth_dev = enic->rte_dev;
575 vnic_rq_enable(rq_data);
577 vnic_rq_enable(rq_sop);
578 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
581 int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
583 int ret1 = 0, ret2 = 0;
584 struct rte_eth_dev *eth_dev = enic->rte_dev;
585 struct vnic_rq *rq_sop;
586 struct vnic_rq *rq_data;
587 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
588 rq_data = &enic->rq[rq_sop->data_queue_idx];
590 ret2 = vnic_rq_disable(rq_sop);
593 ret1 = vnic_rq_disable(rq_data);
600 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
604 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
605 unsigned int socket_id, struct rte_mempool *mp,
606 uint16_t nb_desc, uint16_t free_thresh)
609 uint16_t sop_queue_idx = enic_rte_rq_idx_to_sop_idx(queue_idx);
610 uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx);
611 struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
612 struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
613 unsigned int mbuf_size, mbufs_per_pkt;
614 unsigned int nb_sop_desc, nb_data_desc;
615 uint16_t min_sop, max_sop, min_data, max_data;
616 uint16_t mtu = enic->rte_dev->data->mtu;
619 rq_sop->data_queue_idx = data_queue_idx;
621 rq_data->data_queue_idx = 0;
622 rq_sop->socket_id = socket_id;
624 rq_data->socket_id = socket_id;
627 rq_sop->rx_free_thresh = free_thresh;
628 rq_data->rx_free_thresh = free_thresh;
629 dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx,
632 mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
633 RTE_PKTMBUF_HEADROOM);
635 if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
636 dev_info(enic, "Rq %u Scatter rx mode enabled\n", queue_idx);
637 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
638 mbufs_per_pkt = ((mtu + ETHER_HDR_LEN + 4) +
639 (mbuf_size - 1)) / mbuf_size;
641 dev_info(enic, "Scatter rx mode disabled\n");
645 if (mbufs_per_pkt > 1) {
646 dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx);
647 rq_sop->data_queue_enable = 1;
650 dev_info(enic, "Rq %u Scatter rx mode not being used\n",
652 rq_sop->data_queue_enable = 0;
656 /* number of descriptors have to be a multiple of 32 */
657 nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
658 nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
660 rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
661 rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
663 if (mbufs_per_pkt > 1) {
665 max_sop = ((enic->config.rq_desc_count /
666 (mbufs_per_pkt - 1)) & ~0x1F);
667 min_data = min_sop * (mbufs_per_pkt - 1);
668 max_data = enic->config.rq_desc_count;
671 max_sop = enic->config.rq_desc_count;
676 if (nb_desc < (min_sop + min_data)) {
678 "Number of rx descs too low, adjusting to minimum\n");
679 nb_sop_desc = min_sop;
680 nb_data_desc = min_data;
681 } else if (nb_desc > (max_sop + max_data)) {
683 "Number of rx_descs too high, adjusting to maximum\n");
684 nb_sop_desc = max_sop;
685 nb_data_desc = max_data;
687 if (mbufs_per_pkt > 1) {
688 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
689 mtu, mbuf_size, min_sop + min_data,
692 dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
693 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
695 /* Allocate sop queue resources */
696 rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
697 nb_sop_desc, sizeof(struct rq_enet_desc));
699 dev_err(enic, "error in allocation of sop rq\n");
702 nb_sop_desc = rq_sop->ring.desc_count;
704 if (rq_data->in_use) {
705 /* Allocate data queue resources */
706 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
708 sizeof(struct rq_enet_desc));
710 dev_err(enic, "error in allocation of data rq\n");
711 goto err_free_rq_sop;
713 nb_data_desc = rq_data->ring.desc_count;
715 rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
716 socket_id, nb_sop_desc + nb_data_desc,
717 sizeof(struct cq_enet_rq_desc));
719 dev_err(enic, "error in allocation of cq for rq\n");
720 goto err_free_rq_data;
723 /* Allocate the mbuf rings */
724 rq_sop->mbuf_ring = (struct rte_mbuf **)
725 rte_zmalloc_socket("rq->mbuf_ring",
726 sizeof(struct rte_mbuf *) * nb_sop_desc,
727 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
728 if (rq_sop->mbuf_ring == NULL)
731 if (rq_data->in_use) {
732 rq_data->mbuf_ring = (struct rte_mbuf **)
733 rte_zmalloc_socket("rq->mbuf_ring",
734 sizeof(struct rte_mbuf *) * nb_data_desc,
735 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
736 if (rq_data->mbuf_ring == NULL)
737 goto err_free_sop_mbuf;
740 rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */
745 rte_free(rq_sop->mbuf_ring);
747 /* cleanup on error */
748 vnic_cq_free(&enic->cq[queue_idx]);
751 vnic_rq_free(rq_data);
753 vnic_rq_free(rq_sop);
758 void enic_free_wq(void *txq)
766 wq = (struct vnic_wq *)txq;
767 enic = vnic_dev_priv(wq->vdev);
768 rte_memzone_free(wq->cqmsg_rz);
770 vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
773 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
774 unsigned int socket_id, uint16_t nb_desc)
777 struct vnic_wq *wq = &enic->wq[queue_idx];
778 unsigned int cq_index = enic_cq_wq(enic, queue_idx);
782 wq->socket_id = socket_id;
784 if (nb_desc > enic->config.wq_desc_count) {
786 "WQ %d - number of tx desc in cmd line (%d)"\
787 "is greater than that in the UCSM/CIMC adapter"\
788 "policy. Applying the value in the adapter "\
790 queue_idx, nb_desc, enic->config.wq_desc_count);
791 } else if (nb_desc != enic->config.wq_desc_count) {
792 enic->config.wq_desc_count = nb_desc;
794 "TX Queues - effective number of descs:%d\n",
799 /* Allocate queue resources */
800 err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
801 enic->config.wq_desc_count,
802 sizeof(struct wq_enet_desc));
804 dev_err(enic, "error in allocation of wq\n");
808 err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
809 socket_id, enic->config.wq_desc_count,
810 sizeof(struct cq_enet_wq_desc));
813 dev_err(enic, "error in allocation of cq for wq\n");
816 /* setup up CQ message */
817 snprintf((char *)name, sizeof(name),
818 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
821 wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
831 int enic_disable(struct enic *enic)
836 vnic_intr_mask(&enic->intr);
837 (void)vnic_intr_masked(&enic->intr); /* flush write */
838 rte_intr_disable(&enic->pdev->intr_handle);
839 rte_intr_callback_unregister(&enic->pdev->intr_handle,
841 (void *)enic->rte_dev);
843 vnic_dev_disable(enic->vdev);
845 enic_clsf_destroy(enic);
847 if (!enic_is_sriov_vf(enic))
848 vnic_dev_del_addr(enic->vdev, enic->mac_addr);
850 for (i = 0; i < enic->wq_count; i++) {
851 err = vnic_wq_disable(&enic->wq[i]);
855 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
856 if (enic->rq[i].in_use) {
857 err = vnic_rq_disable(&enic->rq[i]);
863 /* If we were using interrupts, set the interrupt vector to -1
864 * to disable interrupts. We are not disabling link notifcations,
865 * though, as we want the polling of link status to continue working.
867 if (enic->rte_dev->data->dev_conf.intr_conf.lsc)
868 vnic_dev_notify_set(enic->vdev, -1);
870 vnic_dev_set_reset_flag(enic->vdev, 1);
872 for (i = 0; i < enic->wq_count; i++)
873 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
875 for (i = 0; i < enic_vnic_rq_count(enic); i++)
876 if (enic->rq[i].in_use)
877 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
878 for (i = 0; i < enic->cq_count; i++)
879 vnic_cq_clean(&enic->cq[i]);
880 vnic_intr_clean(&enic->intr);
885 static int enic_dev_wait(struct vnic_dev *vdev,
886 int (*start)(struct vnic_dev *, int),
887 int (*finished)(struct vnic_dev *, int *),
894 err = start(vdev, arg);
898 /* Wait for func to complete...2 seconds max */
899 for (i = 0; i < 2000; i++) {
900 err = finished(vdev, &done);
910 static int enic_dev_open(struct enic *enic)
914 err = enic_dev_wait(enic->vdev, vnic_dev_open,
915 vnic_dev_open_done, 0);
917 dev_err(enic_get_dev(enic),
918 "vNIC device open failed, err %d\n", err);
923 static int enic_set_rsskey(struct enic *enic)
925 dma_addr_t rss_key_buf_pa;
926 union vnic_rss_key *rss_key_buf_va = NULL;
927 static union vnic_rss_key rss_key = {
929 [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
930 [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
931 [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
932 [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
938 snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
939 rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
940 &rss_key_buf_pa, name);
944 rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
946 err = enic_set_rss_key(enic,
948 sizeof(union vnic_rss_key));
950 enic_free_consistent(enic, sizeof(union vnic_rss_key),
951 rss_key_buf_va, rss_key_buf_pa);
956 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
958 dma_addr_t rss_cpu_buf_pa;
959 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
964 snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
965 rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
966 &rss_cpu_buf_pa, name);
970 for (i = 0; i < (1 << rss_hash_bits); i++)
971 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
972 enic_rte_rq_idx_to_sop_idx(i % enic->rq_count);
974 err = enic_set_rss_cpu(enic,
976 sizeof(union vnic_rss_cpu));
978 enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
979 rss_cpu_buf_va, rss_cpu_buf_pa);
984 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
985 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
987 const u8 tso_ipid_split_en = 0;
990 /* Enable VLAN tag stripping */
992 err = enic_set_nic_cfg(enic,
993 rss_default_cpu, rss_hash_type,
994 rss_hash_bits, rss_base_cpu,
995 rss_enable, tso_ipid_split_en,
996 enic->ig_vlan_strip_en);
1001 int enic_set_rss_nic_cfg(struct enic *enic)
1003 const u8 rss_default_cpu = 0;
1004 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1005 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1006 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1007 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1008 const u8 rss_hash_bits = 7;
1009 const u8 rss_base_cpu = 0;
1010 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1013 if (!enic_set_rsskey(enic)) {
1014 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1016 dev_warning(enic, "RSS disabled, "\
1017 "Failed to set RSS cpu indirection table.");
1022 "RSS disabled, Failed to set RSS key.\n");
1026 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1027 rss_hash_bits, rss_base_cpu, rss_enable);
1030 int enic_setup_finish(struct enic *enic)
1034 enic_init_soft_stats(enic);
1036 ret = enic_set_rss_nic_cfg(enic);
1038 dev_err(enic, "Failed to config nic, aborting.\n");
1043 vnic_dev_packet_filter(enic->vdev,
1056 void enic_add_packet_filter(struct enic *enic)
1058 /* Args -> directed, multicast, broadcast, promisc, allmulti */
1059 vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1060 enic->promisc, enic->allmulti);
1063 int enic_get_link_status(struct enic *enic)
1065 return vnic_dev_link_status(enic->vdev);
1068 static void enic_dev_deinit(struct enic *enic)
1070 struct rte_eth_dev *eth_dev = enic->rte_dev;
1072 /* stop link status checking */
1073 vnic_dev_notify_unset(enic->vdev);
1075 rte_free(eth_dev->data->mac_addrs);
1079 int enic_set_vnic_res(struct enic *enic)
1081 struct rte_eth_dev *eth_dev = enic->rte_dev;
1084 /* With Rx scatter support, two RQs are now used per RQ used by
1087 if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1088 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1089 eth_dev->data->nb_rx_queues,
1090 eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1093 if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1094 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1095 eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1099 if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1100 eth_dev->data->nb_tx_queues)) {
1101 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1102 (eth_dev->data->nb_rx_queues +
1103 eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1108 enic->rq_count = eth_dev->data->nb_rx_queues;
1109 enic->wq_count = eth_dev->data->nb_tx_queues;
1110 enic->cq_count = enic->rq_count + enic->wq_count;
1116 /* Initialize the completion queue for an RQ */
1118 enic_reinit_rq(struct enic *enic, unsigned int rq_idx)
1120 struct vnic_rq *sop_rq, *data_rq;
1121 unsigned int cq_idx = enic_cq_rq(enic, rq_idx);
1124 sop_rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1125 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx)];
1127 vnic_cq_clean(&enic->cq[cq_idx]);
1128 vnic_cq_init(&enic->cq[cq_idx],
1129 0 /* flow_control_enable */,
1130 1 /* color_enable */,
1133 1 /* cq_tail_color */,
1134 0 /* interrupt_enable */,
1135 1 /* cq_entry_enable */,
1136 0 /* cq_message_enable */,
1137 0 /* interrupt offset */,
1138 0 /* cq_message_addr */);
1141 vnic_rq_init_start(sop_rq, enic_cq_rq(enic,
1142 enic_rte_rq_idx_to_sop_idx(rq_idx)), 0,
1143 sop_rq->ring.desc_count - 1, 1, 0);
1144 if (data_rq->in_use) {
1145 vnic_rq_init_start(data_rq,
1147 enic_rte_rq_idx_to_data_idx(rq_idx)), 0,
1148 data_rq->ring.desc_count - 1, 1, 0);
1151 rc = enic_alloc_rx_queue_mbufs(enic, sop_rq);
1155 if (data_rq->in_use) {
1156 rc = enic_alloc_rx_queue_mbufs(enic, data_rq);
1158 enic_rxmbuf_queue_release(enic, sop_rq);
1166 /* The Cisco NIC can send and receive packets up to a max packet size
1167 * determined by the NIC type and firmware. There is also an MTU
1168 * configured into the NIC via the CIMC/UCSM management interface
1169 * which can be overridden by this function (up to the max packet size).
1170 * Depending on the network setup, doing so may cause packet drops
1171 * and unexpected behavior.
1173 int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1175 unsigned int rq_idx;
1178 uint16_t old_mtu; /* previous setting */
1179 uint16_t config_mtu; /* Value configured into NIC via CIMC/UCSM */
1180 struct rte_eth_dev *eth_dev = enic->rte_dev;
1182 old_mtu = eth_dev->data->mtu;
1183 config_mtu = enic->config.mtu;
1185 if (new_mtu > enic->max_mtu) {
1187 "MTU not updated: requested (%u) greater than max (%u)\n",
1188 new_mtu, enic->max_mtu);
1191 if (new_mtu < ENIC_MIN_MTU) {
1193 "MTU not updated: requested (%u) less than min (%u)\n",
1194 new_mtu, ENIC_MIN_MTU);
1197 if (new_mtu > config_mtu)
1199 "MTU (%u) is greater than value configured in NIC (%u)\n",
1200 new_mtu, config_mtu);
1202 /* The easy case is when scatter is disabled. However if the MTU
1203 * becomes greater than the mbuf data size, packet drops will ensue.
1205 if (!enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
1206 eth_dev->data->mtu = new_mtu;
1210 /* Rx scatter is enabled so reconfigure RQ's on the fly. The point is to
1211 * change Rx scatter mode if necessary for better performance. I.e. if
1212 * MTU was greater than the mbuf size and now it's less, scatter Rx
1213 * doesn't have to be used and vice versa.
1215 rte_spinlock_lock(&enic->mtu_lock);
1217 /* Stop traffic on all RQs */
1218 for (rq_idx = 0; rq_idx < enic->rq_count * 2; rq_idx++) {
1219 rq = &enic->rq[rq_idx];
1220 if (rq->is_sop && rq->in_use) {
1221 rc = enic_stop_rq(enic,
1222 enic_sop_rq_idx_to_rte_idx(rq_idx));
1224 dev_err(enic, "Failed to stop Rq %u\n", rq_idx);
1230 /* replace Rx funciton with a no-op to avoid getting stale pkts */
1231 eth_dev->rx_pkt_burst = enic_dummy_recv_pkts;
1234 /* Allow time for threads to exit the real Rx function. */
1237 /* now it is safe to reconfigure the RQs */
1239 /* update the mtu */
1240 eth_dev->data->mtu = new_mtu;
1242 /* free and reallocate RQs with the new MTU */
1243 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1244 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1247 rc = enic_alloc_rq(enic, rq_idx, rq->socket_id, rq->mp,
1248 rq->tot_nb_desc, rq->rx_free_thresh);
1251 "Fatal MTU alloc error- No traffic will pass\n");
1255 rc = enic_reinit_rq(enic, rq_idx);
1258 "Fatal MTU RQ reinit- No traffic will pass\n");
1263 /* put back the real receive function */
1265 eth_dev->rx_pkt_burst = enic_recv_pkts;
1268 /* restart Rx traffic */
1269 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1270 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1271 if (rq->is_sop && rq->in_use)
1272 enic_start_rq(enic, rq_idx);
1276 dev_info(enic, "MTU changed from %u to %u\n", old_mtu, new_mtu);
1277 rte_spinlock_unlock(&enic->mtu_lock);
1281 static int enic_dev_init(struct enic *enic)
1284 struct rte_eth_dev *eth_dev = enic->rte_dev;
1286 vnic_dev_intr_coal_timer_info_default(enic->vdev);
1288 /* Get vNIC configuration
1290 err = enic_get_vnic_config(enic);
1292 dev_err(dev, "Get vNIC configuration failed, aborting\n");
1296 /* Get available resource counts */
1297 enic_get_res_counts(enic);
1298 if (enic->conf_rq_count == 1) {
1299 dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n");
1300 dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n");
1301 dev_err(enic, "See the ENIC PMD guide for more information.\n");
1305 /* Get the supported filters */
1306 enic_fdir_info(enic);
1308 eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN
1309 * ENIC_MAX_MAC_ADDR, 0);
1310 if (!eth_dev->data->mac_addrs) {
1311 dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1314 ether_addr_copy((struct ether_addr *) enic->mac_addr,
1315 eth_dev->data->mac_addrs);
1317 vnic_dev_set_reset_flag(enic->vdev, 0);
1319 /* set up link status checking */
1320 vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
1326 int enic_probe(struct enic *enic)
1328 struct rte_pci_device *pdev = enic->pdev;
1331 dev_debug(enic, " Initializing ENIC PMD\n");
1333 enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1334 enic->bar0.len = pdev->mem_resource[0].len;
1336 /* Register vNIC device */
1337 enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1339 dev_err(enic, "vNIC registration failed, aborting\n");
1343 LIST_INIT(&enic->memzone_list);
1344 rte_spinlock_init(&enic->memzone_list_lock);
1346 vnic_register_cbacks(enic->vdev,
1347 enic_alloc_consistent,
1348 enic_free_consistent);
1350 /* Issue device open to get device in known state */
1351 err = enic_dev_open(enic);
1353 dev_err(enic, "vNIC dev open failed, aborting\n");
1354 goto err_out_unregister;
1357 /* Set ingress vlan rewrite mode before vnic initialization */
1358 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1359 IG_VLAN_REWRITE_MODE_PASS_THRU);
1362 "Failed to set ingress vlan rewrite mode, aborting.\n");
1363 goto err_out_dev_close;
1366 /* Issue device init to initialize the vnic-to-switch link.
1367 * We'll start with carrier off and wait for link UP
1368 * notification later to turn on carrier. We don't need
1369 * to wait here for the vnic-to-switch link initialization
1370 * to complete; link UP notification is the indication that
1371 * the process is complete.
1374 err = vnic_dev_init(enic->vdev, 0);
1376 dev_err(enic, "vNIC dev init failed, aborting\n");
1377 goto err_out_dev_close;
1380 err = enic_dev_init(enic);
1382 dev_err(enic, "Device initialization failed, aborting\n");
1383 goto err_out_dev_close;
1389 vnic_dev_close(enic->vdev);
1391 vnic_dev_unregister(enic->vdev);
1396 void enic_remove(struct enic *enic)
1398 enic_dev_deinit(enic);
1399 vnic_dev_close(enic->vdev);
1400 vnic_dev_unregister(enic->vdev);