2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * Copyright (c) 2014, Cisco Systems, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
43 #include <rte_memzone.h>
44 #include <rte_malloc.h>
46 #include <rte_string_fns.h>
47 #include <rte_ethdev.h>
49 #include "enic_compat.h"
51 #include "wq_enet_desc.h"
52 #include "rq_enet_desc.h"
53 #include "cq_enet_desc.h"
54 #include "vnic_enet.h"
59 #include "vnic_intr.h"
62 static inline int enic_is_sriov_vf(struct enic *enic)
64 return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
67 static int is_zero_addr(uint8_t *addr)
69 return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
72 static int is_mcast_addr(uint8_t *addr)
77 static int is_eth_addr_valid(uint8_t *addr)
79 return !is_mcast_addr(addr) && !is_zero_addr(addr);
83 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
87 if (!rq || !rq->mbuf_ring) {
88 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
92 for (i = 0; i < rq->ring.desc_count; i++) {
93 if (rq->mbuf_ring[i]) {
94 rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
95 rq->mbuf_ring[i] = NULL;
100 void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
102 vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
105 static void enic_free_wq_buf(struct vnic_wq_buf *buf)
107 struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
109 rte_pktmbuf_free_seg(mbuf);
113 static void enic_log_q_error(struct enic *enic)
118 for (i = 0; i < enic->wq_count; i++) {
119 error_status = vnic_wq_error_status(&enic->wq[i]);
121 dev_err(enic, "WQ[%d] error_status %d\n", i,
125 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
126 if (!enic->rq[i].in_use)
128 error_status = vnic_rq_error_status(&enic->rq[i]);
130 dev_err(enic, "RQ[%d] error_status %d\n", i,
135 static void enic_clear_soft_stats(struct enic *enic)
137 struct enic_soft_stats *soft_stats = &enic->soft_stats;
138 rte_atomic64_clear(&soft_stats->rx_nombuf);
139 rte_atomic64_clear(&soft_stats->rx_packet_errors);
140 rte_atomic64_clear(&soft_stats->tx_oversized);
143 static void enic_init_soft_stats(struct enic *enic)
145 struct enic_soft_stats *soft_stats = &enic->soft_stats;
146 rte_atomic64_init(&soft_stats->rx_nombuf);
147 rte_atomic64_init(&soft_stats->rx_packet_errors);
148 rte_atomic64_init(&soft_stats->tx_oversized);
149 enic_clear_soft_stats(enic);
152 void enic_dev_stats_clear(struct enic *enic)
154 if (vnic_dev_stats_clear(enic->vdev))
155 dev_err(enic, "Error in clearing stats\n");
156 enic_clear_soft_stats(enic);
159 int enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
161 struct vnic_stats *stats;
162 struct enic_soft_stats *soft_stats = &enic->soft_stats;
163 int64_t rx_truncated;
164 uint64_t rx_packet_errors;
165 int ret = vnic_dev_stats_dump(enic->vdev, &stats);
168 dev_err(enic, "Error in getting stats\n");
172 /* The number of truncated packets can only be calculated by
173 * subtracting a hardware counter from error packets received by
174 * the driver. Note: this causes transient inaccuracies in the
175 * ipackets count. Also, the length of truncated packets are
176 * counted in ibytes even though truncated packets are dropped
177 * which can make ibytes be slightly higher than it should be.
179 rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
180 rx_truncated = rx_packet_errors - stats->rx.rx_errors;
182 r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
183 r_stats->opackets = stats->tx.tx_frames_ok;
185 r_stats->ibytes = stats->rx.rx_bytes_ok;
186 r_stats->obytes = stats->tx.tx_bytes_ok;
188 r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
189 r_stats->oerrors = stats->tx.tx_errors
190 + rte_atomic64_read(&soft_stats->tx_oversized);
192 r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
194 r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
198 void enic_del_mac_address(struct enic *enic, int mac_index)
200 struct rte_eth_dev *eth_dev = enic->rte_dev;
201 uint8_t *mac_addr = eth_dev->data->mac_addrs[mac_index].addr_bytes;
203 if (vnic_dev_del_addr(enic->vdev, mac_addr))
204 dev_err(enic, "del mac addr failed\n");
207 int enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
211 if (!is_eth_addr_valid(mac_addr)) {
212 dev_err(enic, "invalid mac address\n");
216 err = vnic_dev_add_addr(enic->vdev, mac_addr);
218 dev_err(enic, "add mac addr failed\n");
223 enic_free_rq_buf(struct rte_mbuf **mbuf)
228 rte_pktmbuf_free(*mbuf);
232 void enic_init_vnic_resources(struct enic *enic)
234 unsigned int error_interrupt_enable = 1;
235 unsigned int error_interrupt_offset = 0;
236 unsigned int index = 0;
238 struct vnic_rq *data_rq;
240 for (index = 0; index < enic->rq_count; index++) {
241 cq_idx = enic_cq_rq(enic, enic_rte_rq_idx_to_sop_idx(index));
243 vnic_rq_init(&enic->rq[enic_rte_rq_idx_to_sop_idx(index)],
245 error_interrupt_enable,
246 error_interrupt_offset);
248 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index)];
250 vnic_rq_init(data_rq,
252 error_interrupt_enable,
253 error_interrupt_offset);
255 vnic_cq_init(&enic->cq[cq_idx],
256 0 /* flow_control_enable */,
257 1 /* color_enable */,
260 1 /* cq_tail_color */,
261 0 /* interrupt_enable */,
262 1 /* cq_entry_enable */,
263 0 /* cq_message_enable */,
264 0 /* interrupt offset */,
265 0 /* cq_message_addr */);
268 for (index = 0; index < enic->wq_count; index++) {
269 vnic_wq_init(&enic->wq[index],
270 enic_cq_wq(enic, index),
271 error_interrupt_enable,
272 error_interrupt_offset);
274 cq_idx = enic_cq_wq(enic, index);
275 vnic_cq_init(&enic->cq[cq_idx],
276 0 /* flow_control_enable */,
277 1 /* color_enable */,
280 1 /* cq_tail_color */,
281 0 /* interrupt_enable */,
282 0 /* cq_entry_enable */,
283 1 /* cq_message_enable */,
284 0 /* interrupt offset */,
285 (u64)enic->wq[index].cqmsg_rz->phys_addr);
288 vnic_intr_init(&enic->intr,
289 enic->config.intr_timer_usec,
290 enic->config.intr_timer_type,
291 /*mask_on_assertion*/1);
296 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
299 struct rq_enet_desc *rqd = rq->ring.descs;
306 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
307 rq->ring.desc_count);
309 for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
310 mb = rte_mbuf_raw_alloc(rq->mp);
312 dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
313 (unsigned)rq->index);
317 mb->data_off = RTE_PKTMBUF_HEADROOM;
318 dma_addr = (dma_addr_t)(mb->buf_physaddr
319 + RTE_PKTMBUF_HEADROOM);
320 rq_enet_desc_enc(rqd, dma_addr,
321 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
322 : RQ_ENET_TYPE_NOT_SOP),
323 mb->buf_len - RTE_PKTMBUF_HEADROOM);
324 rq->mbuf_ring[i] = mb;
327 /* make sure all prior writes are complete before doing the PIO write */
330 /* Post all but the last buffer to VIC. */
331 rq->posted_index = rq->ring.desc_count - 1;
335 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
336 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
337 iowrite32(rq->posted_index, &rq->ctrl->posted_index);
338 iowrite32(0, &rq->ctrl->fetch_index);
346 enic_alloc_consistent(void *priv, size_t size,
347 dma_addr_t *dma_handle, u8 *name)
350 const struct rte_memzone *rz;
352 struct enic *enic = (struct enic *)priv;
353 struct enic_memzone_entry *mze;
355 rz = rte_memzone_reserve_aligned((const char *)name,
356 size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
358 pr_err("%s : Failed to allocate memory requested for %s\n",
364 *dma_handle = (dma_addr_t)rz->phys_addr;
366 mze = rte_malloc("enic memzone entry",
367 sizeof(struct enic_memzone_entry), 0);
370 pr_err("%s : Failed to allocate memory for memzone list\n",
372 rte_memzone_free(rz);
378 rte_spinlock_lock(&enic->memzone_list_lock);
379 LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
380 rte_spinlock_unlock(&enic->memzone_list_lock);
386 enic_free_consistent(void *priv,
387 __rte_unused size_t size,
389 dma_addr_t dma_handle)
391 struct enic_memzone_entry *mze;
392 struct enic *enic = (struct enic *)priv;
394 rte_spinlock_lock(&enic->memzone_list_lock);
395 LIST_FOREACH(mze, &enic->memzone_list, entries) {
396 if (mze->rz->addr == vaddr &&
397 mze->rz->phys_addr == dma_handle)
401 rte_spinlock_unlock(&enic->memzone_list_lock);
403 "Tried to free memory, but couldn't find it in the memzone list\n");
406 LIST_REMOVE(mze, entries);
407 rte_spinlock_unlock(&enic->memzone_list_lock);
408 rte_memzone_free(mze->rz);
412 int enic_link_update(struct enic *enic)
414 struct rte_eth_dev *eth_dev = enic->rte_dev;
418 link_status = enic_get_link_status(enic);
419 ret = (link_status == enic->link_status);
420 enic->link_status = link_status;
421 eth_dev->data->dev_link.link_status = link_status;
422 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
423 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
428 enic_intr_handler(void *arg)
430 struct rte_eth_dev *dev = (struct rte_eth_dev *)arg;
431 struct enic *enic = pmd_priv(dev);
433 vnic_intr_return_all_credits(&enic->intr);
435 enic_link_update(enic);
436 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL, NULL);
437 enic_log_q_error(enic);
440 int enic_enable(struct enic *enic)
444 struct rte_eth_dev *eth_dev = enic->rte_dev;
446 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
447 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
449 /* vnic notification of link status has already been turned on in
450 * enic_dev_init() which is called during probe time. Here we are
451 * just turning on interrupt vector 0 if needed.
453 if (eth_dev->data->dev_conf.intr_conf.lsc)
454 vnic_dev_notify_set(enic->vdev, 0);
456 if (enic_clsf_init(enic))
457 dev_warning(enic, "Init of hash table for clsf failed."\
458 "Flow director feature will not work\n");
460 for (index = 0; index < enic->rq_count; index++) {
461 err = enic_alloc_rx_queue_mbufs(enic,
462 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
464 dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
467 err = enic_alloc_rx_queue_mbufs(enic,
468 &enic->rq[enic_rte_rq_idx_to_data_idx(index)]);
470 /* release the allocated mbufs for the sop rq*/
471 enic_rxmbuf_queue_release(enic,
472 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
474 dev_err(enic, "Failed to alloc data RX queue mbufs\n");
479 for (index = 0; index < enic->wq_count; index++)
480 enic_start_wq(enic, index);
481 for (index = 0; index < enic->rq_count; index++)
482 enic_start_rq(enic, index);
484 vnic_dev_add_addr(enic->vdev, enic->mac_addr);
486 vnic_dev_enable_wait(enic->vdev);
488 /* Register and enable error interrupt */
489 rte_intr_callback_register(&(enic->pdev->intr_handle),
490 enic_intr_handler, (void *)enic->rte_dev);
492 rte_intr_enable(&(enic->pdev->intr_handle));
493 vnic_intr_unmask(&enic->intr);
498 int enic_alloc_intr_resources(struct enic *enic)
502 dev_info(enic, "vNIC resources used: "\
503 "wq %d rq %d cq %d intr %d\n",
504 enic->wq_count, enic_vnic_rq_count(enic),
505 enic->cq_count, enic->intr_count);
507 err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
509 enic_free_vnic_resources(enic);
514 void enic_free_rq(void *rxq)
516 struct vnic_rq *rq_sop, *rq_data;
522 rq_sop = (struct vnic_rq *)rxq;
523 enic = vnic_dev_priv(rq_sop->vdev);
524 rq_data = &enic->rq[rq_sop->data_queue_idx];
526 enic_rxmbuf_queue_release(enic, rq_sop);
528 enic_rxmbuf_queue_release(enic, rq_data);
530 rte_free(rq_sop->mbuf_ring);
532 rte_free(rq_data->mbuf_ring);
534 rq_sop->mbuf_ring = NULL;
535 rq_data->mbuf_ring = NULL;
537 vnic_rq_free(rq_sop);
539 vnic_rq_free(rq_data);
541 vnic_cq_free(&enic->cq[enic_sop_rq_idx_to_cq_idx(rq_sop->index)]);
547 void enic_start_wq(struct enic *enic, uint16_t queue_idx)
549 struct rte_eth_dev *eth_dev = enic->rte_dev;
550 vnic_wq_enable(&enic->wq[queue_idx]);
551 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
554 int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
556 struct rte_eth_dev *eth_dev = enic->rte_dev;
559 ret = vnic_wq_disable(&enic->wq[queue_idx]);
563 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
567 void enic_start_rq(struct enic *enic, uint16_t queue_idx)
569 struct vnic_rq *rq_sop;
570 struct vnic_rq *rq_data;
571 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
572 rq_data = &enic->rq[rq_sop->data_queue_idx];
573 struct rte_eth_dev *eth_dev = enic->rte_dev;
576 vnic_rq_enable(rq_data);
578 vnic_rq_enable(rq_sop);
579 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
582 int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
584 int ret1 = 0, ret2 = 0;
585 struct rte_eth_dev *eth_dev = enic->rte_dev;
586 struct vnic_rq *rq_sop;
587 struct vnic_rq *rq_data;
588 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
589 rq_data = &enic->rq[rq_sop->data_queue_idx];
591 ret2 = vnic_rq_disable(rq_sop);
594 ret1 = vnic_rq_disable(rq_data);
601 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
605 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
606 unsigned int socket_id, struct rte_mempool *mp,
607 uint16_t nb_desc, uint16_t free_thresh)
610 uint16_t sop_queue_idx = enic_rte_rq_idx_to_sop_idx(queue_idx);
611 uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx);
612 struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
613 struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
614 unsigned int mbuf_size, mbufs_per_pkt;
615 unsigned int nb_sop_desc, nb_data_desc;
616 uint16_t min_sop, max_sop, min_data, max_data;
617 uint16_t mtu = enic->rte_dev->data->mtu;
620 rq_sop->data_queue_idx = data_queue_idx;
622 rq_data->data_queue_idx = 0;
623 rq_sop->socket_id = socket_id;
625 rq_data->socket_id = socket_id;
628 rq_sop->rx_free_thresh = free_thresh;
629 rq_data->rx_free_thresh = free_thresh;
630 dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx,
633 mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
634 RTE_PKTMBUF_HEADROOM);
636 if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
637 dev_info(enic, "Rq %u Scatter rx mode enabled\n", queue_idx);
638 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
639 mbufs_per_pkt = ((mtu + ETHER_HDR_LEN + 4) +
640 (mbuf_size - 1)) / mbuf_size;
642 dev_info(enic, "Scatter rx mode disabled\n");
646 if (mbufs_per_pkt > 1) {
647 dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx);
648 rq_sop->data_queue_enable = 1;
651 dev_info(enic, "Rq %u Scatter rx mode not being used\n",
653 rq_sop->data_queue_enable = 0;
657 /* number of descriptors have to be a multiple of 32 */
658 nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
659 nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
661 rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
662 rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
664 if (mbufs_per_pkt > 1) {
666 max_sop = ((enic->config.rq_desc_count /
667 (mbufs_per_pkt - 1)) & ~0x1F);
668 min_data = min_sop * (mbufs_per_pkt - 1);
669 max_data = enic->config.rq_desc_count;
672 max_sop = enic->config.rq_desc_count;
677 if (nb_desc < (min_sop + min_data)) {
679 "Number of rx descs too low, adjusting to minimum\n");
680 nb_sop_desc = min_sop;
681 nb_data_desc = min_data;
682 } else if (nb_desc > (max_sop + max_data)) {
684 "Number of rx_descs too high, adjusting to maximum\n");
685 nb_sop_desc = max_sop;
686 nb_data_desc = max_data;
688 if (mbufs_per_pkt > 1) {
689 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
690 mtu, mbuf_size, min_sop + min_data,
693 dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
694 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
696 /* Allocate sop queue resources */
697 rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
698 nb_sop_desc, sizeof(struct rq_enet_desc));
700 dev_err(enic, "error in allocation of sop rq\n");
703 nb_sop_desc = rq_sop->ring.desc_count;
705 if (rq_data->in_use) {
706 /* Allocate data queue resources */
707 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
709 sizeof(struct rq_enet_desc));
711 dev_err(enic, "error in allocation of data rq\n");
712 goto err_free_rq_sop;
714 nb_data_desc = rq_data->ring.desc_count;
716 rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
717 socket_id, nb_sop_desc + nb_data_desc,
718 sizeof(struct cq_enet_rq_desc));
720 dev_err(enic, "error in allocation of cq for rq\n");
721 goto err_free_rq_data;
724 /* Allocate the mbuf rings */
725 rq_sop->mbuf_ring = (struct rte_mbuf **)
726 rte_zmalloc_socket("rq->mbuf_ring",
727 sizeof(struct rte_mbuf *) * nb_sop_desc,
728 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
729 if (rq_sop->mbuf_ring == NULL)
732 if (rq_data->in_use) {
733 rq_data->mbuf_ring = (struct rte_mbuf **)
734 rte_zmalloc_socket("rq->mbuf_ring",
735 sizeof(struct rte_mbuf *) * nb_data_desc,
736 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
737 if (rq_data->mbuf_ring == NULL)
738 goto err_free_sop_mbuf;
741 rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */
746 rte_free(rq_sop->mbuf_ring);
748 /* cleanup on error */
749 vnic_cq_free(&enic->cq[queue_idx]);
752 vnic_rq_free(rq_data);
754 vnic_rq_free(rq_sop);
759 void enic_free_wq(void *txq)
767 wq = (struct vnic_wq *)txq;
768 enic = vnic_dev_priv(wq->vdev);
769 rte_memzone_free(wq->cqmsg_rz);
771 vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
774 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
775 unsigned int socket_id, uint16_t nb_desc)
778 struct vnic_wq *wq = &enic->wq[queue_idx];
779 unsigned int cq_index = enic_cq_wq(enic, queue_idx);
783 wq->socket_id = socket_id;
785 if (nb_desc > enic->config.wq_desc_count) {
787 "WQ %d - number of tx desc in cmd line (%d)"\
788 "is greater than that in the UCSM/CIMC adapter"\
789 "policy. Applying the value in the adapter "\
791 queue_idx, nb_desc, enic->config.wq_desc_count);
792 } else if (nb_desc != enic->config.wq_desc_count) {
793 enic->config.wq_desc_count = nb_desc;
795 "TX Queues - effective number of descs:%d\n",
800 /* Allocate queue resources */
801 err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
802 enic->config.wq_desc_count,
803 sizeof(struct wq_enet_desc));
805 dev_err(enic, "error in allocation of wq\n");
809 err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
810 socket_id, enic->config.wq_desc_count,
811 sizeof(struct cq_enet_wq_desc));
814 dev_err(enic, "error in allocation of cq for wq\n");
817 /* setup up CQ message */
818 snprintf((char *)name, sizeof(name),
819 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
822 wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
832 int enic_disable(struct enic *enic)
837 vnic_intr_mask(&enic->intr);
838 (void)vnic_intr_masked(&enic->intr); /* flush write */
839 rte_intr_disable(&enic->pdev->intr_handle);
840 rte_intr_callback_unregister(&enic->pdev->intr_handle,
842 (void *)enic->rte_dev);
844 vnic_dev_disable(enic->vdev);
846 enic_clsf_destroy(enic);
848 if (!enic_is_sriov_vf(enic))
849 vnic_dev_del_addr(enic->vdev, enic->mac_addr);
851 for (i = 0; i < enic->wq_count; i++) {
852 err = vnic_wq_disable(&enic->wq[i]);
856 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
857 if (enic->rq[i].in_use) {
858 err = vnic_rq_disable(&enic->rq[i]);
864 /* If we were using interrupts, set the interrupt vector to -1
865 * to disable interrupts. We are not disabling link notifcations,
866 * though, as we want the polling of link status to continue working.
868 if (enic->rte_dev->data->dev_conf.intr_conf.lsc)
869 vnic_dev_notify_set(enic->vdev, -1);
871 vnic_dev_set_reset_flag(enic->vdev, 1);
873 for (i = 0; i < enic->wq_count; i++)
874 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
876 for (i = 0; i < enic_vnic_rq_count(enic); i++)
877 if (enic->rq[i].in_use)
878 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
879 for (i = 0; i < enic->cq_count; i++)
880 vnic_cq_clean(&enic->cq[i]);
881 vnic_intr_clean(&enic->intr);
886 static int enic_dev_wait(struct vnic_dev *vdev,
887 int (*start)(struct vnic_dev *, int),
888 int (*finished)(struct vnic_dev *, int *),
895 err = start(vdev, arg);
899 /* Wait for func to complete...2 seconds max */
900 for (i = 0; i < 2000; i++) {
901 err = finished(vdev, &done);
911 static int enic_dev_open(struct enic *enic)
915 err = enic_dev_wait(enic->vdev, vnic_dev_open,
916 vnic_dev_open_done, 0);
918 dev_err(enic_get_dev(enic),
919 "vNIC device open failed, err %d\n", err);
924 static int enic_set_rsskey(struct enic *enic)
926 dma_addr_t rss_key_buf_pa;
927 union vnic_rss_key *rss_key_buf_va = NULL;
928 static union vnic_rss_key rss_key = {
930 [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
931 [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
932 [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
933 [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
939 snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
940 rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
941 &rss_key_buf_pa, name);
945 rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
947 err = enic_set_rss_key(enic,
949 sizeof(union vnic_rss_key));
951 enic_free_consistent(enic, sizeof(union vnic_rss_key),
952 rss_key_buf_va, rss_key_buf_pa);
957 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
959 dma_addr_t rss_cpu_buf_pa;
960 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
965 snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
966 rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
967 &rss_cpu_buf_pa, name);
971 for (i = 0; i < (1 << rss_hash_bits); i++)
972 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
973 enic_rte_rq_idx_to_sop_idx(i % enic->rq_count);
975 err = enic_set_rss_cpu(enic,
977 sizeof(union vnic_rss_cpu));
979 enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
980 rss_cpu_buf_va, rss_cpu_buf_pa);
985 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
986 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
988 const u8 tso_ipid_split_en = 0;
991 /* Enable VLAN tag stripping */
993 err = enic_set_nic_cfg(enic,
994 rss_default_cpu, rss_hash_type,
995 rss_hash_bits, rss_base_cpu,
996 rss_enable, tso_ipid_split_en,
997 enic->ig_vlan_strip_en);
1002 int enic_set_rss_nic_cfg(struct enic *enic)
1004 const u8 rss_default_cpu = 0;
1005 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1006 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1007 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1008 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1009 const u8 rss_hash_bits = 7;
1010 const u8 rss_base_cpu = 0;
1011 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1014 if (!enic_set_rsskey(enic)) {
1015 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1017 dev_warning(enic, "RSS disabled, "\
1018 "Failed to set RSS cpu indirection table.");
1023 "RSS disabled, Failed to set RSS key.\n");
1027 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1028 rss_hash_bits, rss_base_cpu, rss_enable);
1031 int enic_setup_finish(struct enic *enic)
1035 enic_init_soft_stats(enic);
1037 ret = enic_set_rss_nic_cfg(enic);
1039 dev_err(enic, "Failed to config nic, aborting.\n");
1044 vnic_dev_packet_filter(enic->vdev,
1057 void enic_add_packet_filter(struct enic *enic)
1059 /* Args -> directed, multicast, broadcast, promisc, allmulti */
1060 vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1061 enic->promisc, enic->allmulti);
1064 int enic_get_link_status(struct enic *enic)
1066 return vnic_dev_link_status(enic->vdev);
1069 static void enic_dev_deinit(struct enic *enic)
1071 struct rte_eth_dev *eth_dev = enic->rte_dev;
1073 /* stop link status checking */
1074 vnic_dev_notify_unset(enic->vdev);
1076 rte_free(eth_dev->data->mac_addrs);
1080 int enic_set_vnic_res(struct enic *enic)
1082 struct rte_eth_dev *eth_dev = enic->rte_dev;
1085 /* With Rx scatter support, two RQs are now used per RQ used by
1088 if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1089 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1090 eth_dev->data->nb_rx_queues,
1091 eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1094 if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1095 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1096 eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1100 if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1101 eth_dev->data->nb_tx_queues)) {
1102 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1103 (eth_dev->data->nb_rx_queues +
1104 eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1109 enic->rq_count = eth_dev->data->nb_rx_queues;
1110 enic->wq_count = eth_dev->data->nb_tx_queues;
1111 enic->cq_count = enic->rq_count + enic->wq_count;
1117 /* Initialize the completion queue for an RQ */
1119 enic_reinit_rq(struct enic *enic, unsigned int rq_idx)
1121 struct vnic_rq *sop_rq, *data_rq;
1122 unsigned int cq_idx;
1125 sop_rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1126 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx)];
1129 vnic_cq_clean(&enic->cq[cq_idx]);
1130 vnic_cq_init(&enic->cq[cq_idx],
1131 0 /* flow_control_enable */,
1132 1 /* color_enable */,
1135 1 /* cq_tail_color */,
1136 0 /* interrupt_enable */,
1137 1 /* cq_entry_enable */,
1138 0 /* cq_message_enable */,
1139 0 /* interrupt offset */,
1140 0 /* cq_message_addr */);
1143 vnic_rq_init_start(sop_rq, enic_cq_rq(enic,
1144 enic_rte_rq_idx_to_sop_idx(rq_idx)), 0,
1145 sop_rq->ring.desc_count - 1, 1, 0);
1146 if (data_rq->in_use) {
1147 vnic_rq_init_start(data_rq,
1149 enic_rte_rq_idx_to_data_idx(rq_idx)), 0,
1150 data_rq->ring.desc_count - 1, 1, 0);
1153 rc = enic_alloc_rx_queue_mbufs(enic, sop_rq);
1157 if (data_rq->in_use) {
1158 rc = enic_alloc_rx_queue_mbufs(enic, data_rq);
1160 enic_rxmbuf_queue_release(enic, sop_rq);
1168 /* The Cisco NIC can send and receive packets up to a max packet size
1169 * determined by the NIC type and firmware. There is also an MTU
1170 * configured into the NIC via the CIMC/UCSM management interface
1171 * which can be overridden by this function (up to the max packet size).
1172 * Depending on the network setup, doing so may cause packet drops
1173 * and unexpected behavior.
1175 int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1177 unsigned int rq_idx;
1180 uint16_t old_mtu; /* previous setting */
1181 uint16_t config_mtu; /* Value configured into NIC via CIMC/UCSM */
1182 struct rte_eth_dev *eth_dev = enic->rte_dev;
1184 old_mtu = eth_dev->data->mtu;
1185 config_mtu = enic->config.mtu;
1187 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1188 return -E_RTE_SECONDARY;
1190 if (new_mtu > enic->max_mtu) {
1192 "MTU not updated: requested (%u) greater than max (%u)\n",
1193 new_mtu, enic->max_mtu);
1196 if (new_mtu < ENIC_MIN_MTU) {
1198 "MTU not updated: requested (%u) less than min (%u)\n",
1199 new_mtu, ENIC_MIN_MTU);
1202 if (new_mtu > config_mtu)
1204 "MTU (%u) is greater than value configured in NIC (%u)\n",
1205 new_mtu, config_mtu);
1207 /* The easy case is when scatter is disabled. However if the MTU
1208 * becomes greater than the mbuf data size, packet drops will ensue.
1210 if (!enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
1211 eth_dev->data->mtu = new_mtu;
1215 /* Rx scatter is enabled so reconfigure RQ's on the fly. The point is to
1216 * change Rx scatter mode if necessary for better performance. I.e. if
1217 * MTU was greater than the mbuf size and now it's less, scatter Rx
1218 * doesn't have to be used and vice versa.
1220 rte_spinlock_lock(&enic->mtu_lock);
1222 /* Stop traffic on all RQs */
1223 for (rq_idx = 0; rq_idx < enic->rq_count * 2; rq_idx++) {
1224 rq = &enic->rq[rq_idx];
1225 if (rq->is_sop && rq->in_use) {
1226 rc = enic_stop_rq(enic,
1227 enic_sop_rq_idx_to_rte_idx(rq_idx));
1229 dev_err(enic, "Failed to stop Rq %u\n", rq_idx);
1235 /* replace Rx function with a no-op to avoid getting stale pkts */
1236 eth_dev->rx_pkt_burst = enic_dummy_recv_pkts;
1239 /* Allow time for threads to exit the real Rx function. */
1242 /* now it is safe to reconfigure the RQs */
1244 /* update the mtu */
1245 eth_dev->data->mtu = new_mtu;
1247 /* free and reallocate RQs with the new MTU */
1248 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1249 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1252 rc = enic_alloc_rq(enic, rq_idx, rq->socket_id, rq->mp,
1253 rq->tot_nb_desc, rq->rx_free_thresh);
1256 "Fatal MTU alloc error- No traffic will pass\n");
1260 rc = enic_reinit_rq(enic, rq_idx);
1263 "Fatal MTU RQ reinit- No traffic will pass\n");
1268 /* put back the real receive function */
1270 eth_dev->rx_pkt_burst = enic_recv_pkts;
1273 /* restart Rx traffic */
1274 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1275 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1276 if (rq->is_sop && rq->in_use)
1277 enic_start_rq(enic, rq_idx);
1281 dev_info(enic, "MTU changed from %u to %u\n", old_mtu, new_mtu);
1282 rte_spinlock_unlock(&enic->mtu_lock);
1286 static int enic_dev_init(struct enic *enic)
1289 struct rte_eth_dev *eth_dev = enic->rte_dev;
1291 vnic_dev_intr_coal_timer_info_default(enic->vdev);
1293 /* Get vNIC configuration
1295 err = enic_get_vnic_config(enic);
1297 dev_err(dev, "Get vNIC configuration failed, aborting\n");
1301 /* Get available resource counts */
1302 enic_get_res_counts(enic);
1303 if (enic->conf_rq_count == 1) {
1304 dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n");
1305 dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n");
1306 dev_err(enic, "See the ENIC PMD guide for more information.\n");
1310 /* Get the supported filters */
1311 enic_fdir_info(enic);
1313 eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN
1314 * ENIC_MAX_MAC_ADDR, 0);
1315 if (!eth_dev->data->mac_addrs) {
1316 dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1319 ether_addr_copy((struct ether_addr *) enic->mac_addr,
1320 eth_dev->data->mac_addrs);
1322 vnic_dev_set_reset_flag(enic->vdev, 0);
1324 LIST_INIT(&enic->flows);
1325 rte_spinlock_init(&enic->flows_lock);
1327 /* set up link status checking */
1328 vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
1334 int enic_probe(struct enic *enic)
1336 struct rte_pci_device *pdev = enic->pdev;
1339 dev_debug(enic, " Initializing ENIC PMD\n");
1341 /* if this is a secondary process the hardware is already initialized */
1342 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1345 enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1346 enic->bar0.len = pdev->mem_resource[0].len;
1348 /* Register vNIC device */
1349 enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1351 dev_err(enic, "vNIC registration failed, aborting\n");
1355 LIST_INIT(&enic->memzone_list);
1356 rte_spinlock_init(&enic->memzone_list_lock);
1358 vnic_register_cbacks(enic->vdev,
1359 enic_alloc_consistent,
1360 enic_free_consistent);
1362 /* Issue device open to get device in known state */
1363 err = enic_dev_open(enic);
1365 dev_err(enic, "vNIC dev open failed, aborting\n");
1366 goto err_out_unregister;
1369 /* Set ingress vlan rewrite mode before vnic initialization */
1370 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1371 IG_VLAN_REWRITE_MODE_PASS_THRU);
1374 "Failed to set ingress vlan rewrite mode, aborting.\n");
1375 goto err_out_dev_close;
1378 /* Issue device init to initialize the vnic-to-switch link.
1379 * We'll start with carrier off and wait for link UP
1380 * notification later to turn on carrier. We don't need
1381 * to wait here for the vnic-to-switch link initialization
1382 * to complete; link UP notification is the indication that
1383 * the process is complete.
1386 err = vnic_dev_init(enic->vdev, 0);
1388 dev_err(enic, "vNIC dev init failed, aborting\n");
1389 goto err_out_dev_close;
1392 err = enic_dev_init(enic);
1394 dev_err(enic, "Device initialization failed, aborting\n");
1395 goto err_out_dev_close;
1401 vnic_dev_close(enic->vdev);
1403 vnic_dev_unregister(enic->vdev);
1408 void enic_remove(struct enic *enic)
1410 enic_dev_deinit(enic);
1411 vnic_dev_close(enic->vdev);
1412 vnic_dev_unregister(enic->vdev);