2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * Copyright (c) 2014, Cisco Systems, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
43 #include <rte_memzone.h>
44 #include <rte_malloc.h>
46 #include <rte_string_fns.h>
47 #include <rte_ethdev.h>
49 #include "enic_compat.h"
51 #include "wq_enet_desc.h"
52 #include "rq_enet_desc.h"
53 #include "cq_enet_desc.h"
54 #include "vnic_enet.h"
59 #include "vnic_intr.h"
62 static inline int enic_is_sriov_vf(struct enic *enic)
64 return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
67 static int is_zero_addr(uint8_t *addr)
69 return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
72 static int is_mcast_addr(uint8_t *addr)
77 static int is_eth_addr_valid(uint8_t *addr)
79 return !is_mcast_addr(addr) && !is_zero_addr(addr);
83 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
87 if (!rq || !rq->mbuf_ring) {
88 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
92 for (i = 0; i < rq->ring.desc_count; i++) {
93 if (rq->mbuf_ring[i]) {
94 rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
95 rq->mbuf_ring[i] = NULL;
100 void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
102 vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
105 static void enic_free_wq_buf(struct vnic_wq_buf *buf)
107 struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
109 rte_pktmbuf_free_seg(mbuf);
113 static void enic_log_q_error(struct enic *enic)
118 for (i = 0; i < enic->wq_count; i++) {
119 error_status = vnic_wq_error_status(&enic->wq[i]);
121 dev_err(enic, "WQ[%d] error_status %d\n", i,
125 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
126 if (!enic->rq[i].in_use)
128 error_status = vnic_rq_error_status(&enic->rq[i]);
130 dev_err(enic, "RQ[%d] error_status %d\n", i,
135 static void enic_clear_soft_stats(struct enic *enic)
137 struct enic_soft_stats *soft_stats = &enic->soft_stats;
138 rte_atomic64_clear(&soft_stats->rx_nombuf);
139 rte_atomic64_clear(&soft_stats->rx_packet_errors);
142 static void enic_init_soft_stats(struct enic *enic)
144 struct enic_soft_stats *soft_stats = &enic->soft_stats;
145 rte_atomic64_init(&soft_stats->rx_nombuf);
146 rte_atomic64_init(&soft_stats->rx_packet_errors);
147 enic_clear_soft_stats(enic);
150 void enic_dev_stats_clear(struct enic *enic)
152 if (vnic_dev_stats_clear(enic->vdev))
153 dev_err(enic, "Error in clearing stats\n");
154 enic_clear_soft_stats(enic);
157 void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
159 struct vnic_stats *stats;
160 struct enic_soft_stats *soft_stats = &enic->soft_stats;
161 int64_t rx_truncated;
162 uint64_t rx_packet_errors;
164 if (vnic_dev_stats_dump(enic->vdev, &stats)) {
165 dev_err(enic, "Error in getting stats\n");
169 /* The number of truncated packets can only be calculated by
170 * subtracting a hardware counter from error packets received by
171 * the driver. Note: this causes transient inaccuracies in the
172 * ipackets count. Also, the length of truncated packets are
173 * counted in ibytes even though truncated packets are dropped
174 * which can make ibytes be slightly higher than it should be.
176 rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
177 rx_truncated = rx_packet_errors - stats->rx.rx_errors;
179 r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
180 r_stats->opackets = stats->tx.tx_frames_ok;
182 r_stats->ibytes = stats->rx.rx_bytes_ok;
183 r_stats->obytes = stats->tx.tx_bytes_ok;
185 r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
186 r_stats->oerrors = stats->tx.tx_errors;
188 r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
190 r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
193 void enic_del_mac_address(struct enic *enic)
195 if (vnic_dev_del_addr(enic->vdev, enic->mac_addr))
196 dev_err(enic, "del mac addr failed\n");
199 void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
203 if (!is_eth_addr_valid(mac_addr)) {
204 dev_err(enic, "invalid mac address\n");
208 err = vnic_dev_del_addr(enic->vdev, enic->mac_addr);
210 dev_err(enic, "del mac addr failed\n");
214 ether_addr_copy((struct ether_addr *)mac_addr,
215 (struct ether_addr *)enic->mac_addr);
217 err = vnic_dev_add_addr(enic->vdev, mac_addr);
219 dev_err(enic, "add mac addr failed\n");
225 enic_free_rq_buf(struct rte_mbuf **mbuf)
230 rte_pktmbuf_free(*mbuf);
234 void enic_init_vnic_resources(struct enic *enic)
236 unsigned int error_interrupt_enable = 1;
237 unsigned int error_interrupt_offset = 0;
238 unsigned int index = 0;
240 struct vnic_rq *data_rq;
242 for (index = 0; index < enic->rq_count; index++) {
243 cq_idx = enic_cq_rq(enic, enic_rte_rq_idx_to_sop_idx(index));
245 vnic_rq_init(&enic->rq[enic_rte_rq_idx_to_sop_idx(index)],
247 error_interrupt_enable,
248 error_interrupt_offset);
250 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index)];
252 vnic_rq_init(data_rq,
254 error_interrupt_enable,
255 error_interrupt_offset);
257 vnic_cq_init(&enic->cq[cq_idx],
258 0 /* flow_control_enable */,
259 1 /* color_enable */,
262 1 /* cq_tail_color */,
263 0 /* interrupt_enable */,
264 1 /* cq_entry_enable */,
265 0 /* cq_message_enable */,
266 0 /* interrupt offset */,
267 0 /* cq_message_addr */);
270 for (index = 0; index < enic->wq_count; index++) {
271 vnic_wq_init(&enic->wq[index],
272 enic_cq_wq(enic, index),
273 error_interrupt_enable,
274 error_interrupt_offset);
276 cq_idx = enic_cq_wq(enic, index);
277 vnic_cq_init(&enic->cq[cq_idx],
278 0 /* flow_control_enable */,
279 1 /* color_enable */,
282 1 /* cq_tail_color */,
283 0 /* interrupt_enable */,
284 0 /* cq_entry_enable */,
285 1 /* cq_message_enable */,
286 0 /* interrupt offset */,
287 (u64)enic->wq[index].cqmsg_rz->phys_addr);
290 vnic_intr_init(&enic->intr,
291 enic->config.intr_timer_usec,
292 enic->config.intr_timer_type,
293 /*mask_on_assertion*/1);
298 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
301 struct rq_enet_desc *rqd = rq->ring.descs;
308 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
309 rq->ring.desc_count);
311 for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
312 mb = rte_mbuf_raw_alloc(rq->mp);
314 dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
315 (unsigned)rq->index);
319 mb->data_off = RTE_PKTMBUF_HEADROOM;
320 dma_addr = (dma_addr_t)(mb->buf_physaddr
321 + RTE_PKTMBUF_HEADROOM);
322 rq_enet_desc_enc(rqd, dma_addr,
323 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
324 : RQ_ENET_TYPE_NOT_SOP),
325 mb->buf_len - RTE_PKTMBUF_HEADROOM);
326 rq->mbuf_ring[i] = mb;
329 /* make sure all prior writes are complete before doing the PIO write */
332 /* Post all but the last buffer to VIC. */
333 rq->posted_index = rq->ring.desc_count - 1;
337 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
338 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
339 iowrite32(rq->posted_index, &rq->ctrl->posted_index);
340 iowrite32(0, &rq->ctrl->fetch_index);
348 enic_alloc_consistent(void *priv, size_t size,
349 dma_addr_t *dma_handle, u8 *name)
352 const struct rte_memzone *rz;
354 struct enic *enic = (struct enic *)priv;
355 struct enic_memzone_entry *mze;
357 rz = rte_memzone_reserve_aligned((const char *)name,
358 size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
360 pr_err("%s : Failed to allocate memory requested for %s\n",
366 *dma_handle = (dma_addr_t)rz->phys_addr;
368 mze = rte_malloc("enic memzone entry",
369 sizeof(struct enic_memzone_entry), 0);
372 pr_err("%s : Failed to allocate memory for memzone list\n",
374 rte_memzone_free(rz);
379 rte_spinlock_lock(&enic->memzone_list_lock);
380 LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
381 rte_spinlock_unlock(&enic->memzone_list_lock);
387 enic_free_consistent(void *priv,
388 __rte_unused size_t size,
390 dma_addr_t dma_handle)
392 struct enic_memzone_entry *mze;
393 struct enic *enic = (struct enic *)priv;
395 rte_spinlock_lock(&enic->memzone_list_lock);
396 LIST_FOREACH(mze, &enic->memzone_list, entries) {
397 if (mze->rz->addr == vaddr &&
398 mze->rz->phys_addr == dma_handle)
402 rte_spinlock_unlock(&enic->memzone_list_lock);
404 "Tried to free memory, but couldn't find it in the memzone list\n");
407 LIST_REMOVE(mze, entries);
408 rte_spinlock_unlock(&enic->memzone_list_lock);
409 rte_memzone_free(mze->rz);
413 int enic_link_update(struct enic *enic)
415 struct rte_eth_dev *eth_dev = enic->rte_dev;
419 link_status = enic_get_link_status(enic);
420 ret = (link_status == enic->link_status);
421 enic->link_status = link_status;
422 eth_dev->data->dev_link.link_status = link_status;
423 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
424 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
429 enic_intr_handler(__rte_unused struct rte_intr_handle *handle,
432 struct rte_eth_dev *dev = (struct rte_eth_dev *)arg;
433 struct enic *enic = pmd_priv(dev);
435 vnic_intr_return_all_credits(&enic->intr);
437 enic_link_update(enic);
438 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
439 enic_log_q_error(enic);
442 int enic_enable(struct enic *enic)
446 struct rte_eth_dev *eth_dev = enic->rte_dev;
448 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
449 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
451 /* vnic notification of link status has already been turned on in
452 * enic_dev_init() which is called during probe time. Here we are
453 * just turning on interrupt vector 0 if needed.
455 if (eth_dev->data->dev_conf.intr_conf.lsc)
456 vnic_dev_notify_set(enic->vdev, 0);
458 if (enic_clsf_init(enic))
459 dev_warning(enic, "Init of hash table for clsf failed."\
460 "Flow director feature will not work\n");
462 for (index = 0; index < enic->rq_count; index++) {
463 err = enic_alloc_rx_queue_mbufs(enic,
464 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
466 dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
469 err = enic_alloc_rx_queue_mbufs(enic,
470 &enic->rq[enic_rte_rq_idx_to_data_idx(index)]);
472 /* release the allocated mbufs for the sop rq*/
473 enic_rxmbuf_queue_release(enic,
474 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
476 dev_err(enic, "Failed to alloc data RX queue mbufs\n");
481 for (index = 0; index < enic->wq_count; index++)
482 enic_start_wq(enic, index);
483 for (index = 0; index < enic->rq_count; index++)
484 enic_start_rq(enic, index);
486 vnic_dev_add_addr(enic->vdev, enic->mac_addr);
488 vnic_dev_enable_wait(enic->vdev);
490 /* Register and enable error interrupt */
491 rte_intr_callback_register(&(enic->pdev->intr_handle),
492 enic_intr_handler, (void *)enic->rte_dev);
494 rte_intr_enable(&(enic->pdev->intr_handle));
495 vnic_intr_unmask(&enic->intr);
500 int enic_alloc_intr_resources(struct enic *enic)
504 dev_info(enic, "vNIC resources used: "\
505 "wq %d rq %d cq %d intr %d\n",
506 enic->wq_count, enic_vnic_rq_count(enic),
507 enic->cq_count, enic->intr_count);
509 err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
511 enic_free_vnic_resources(enic);
516 void enic_free_rq(void *rxq)
518 struct vnic_rq *rq_sop, *rq_data;
524 rq_sop = (struct vnic_rq *)rxq;
525 enic = vnic_dev_priv(rq_sop->vdev);
526 rq_data = &enic->rq[rq_sop->data_queue_idx];
528 enic_rxmbuf_queue_release(enic, rq_sop);
530 enic_rxmbuf_queue_release(enic, rq_data);
532 rte_free(rq_sop->mbuf_ring);
534 rte_free(rq_data->mbuf_ring);
536 rq_sop->mbuf_ring = NULL;
537 rq_data->mbuf_ring = NULL;
539 vnic_rq_free(rq_sop);
541 vnic_rq_free(rq_data);
543 vnic_cq_free(&enic->cq[enic_sop_rq_idx_to_cq_idx(rq_sop->index)]);
549 void enic_start_wq(struct enic *enic, uint16_t queue_idx)
551 struct rte_eth_dev *eth_dev = enic->rte_dev;
552 vnic_wq_enable(&enic->wq[queue_idx]);
553 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
556 int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
558 struct rte_eth_dev *eth_dev = enic->rte_dev;
561 ret = vnic_wq_disable(&enic->wq[queue_idx]);
565 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
569 void enic_start_rq(struct enic *enic, uint16_t queue_idx)
571 struct vnic_rq *rq_sop;
572 struct vnic_rq *rq_data;
573 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
574 rq_data = &enic->rq[rq_sop->data_queue_idx];
575 struct rte_eth_dev *eth_dev = enic->rte_dev;
578 vnic_rq_enable(rq_data);
580 vnic_rq_enable(rq_sop);
581 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
584 int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
586 int ret1 = 0, ret2 = 0;
587 struct rte_eth_dev *eth_dev = enic->rte_dev;
588 struct vnic_rq *rq_sop;
589 struct vnic_rq *rq_data;
590 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
591 rq_data = &enic->rq[rq_sop->data_queue_idx];
593 ret2 = vnic_rq_disable(rq_sop);
596 ret1 = vnic_rq_disable(rq_data);
603 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
607 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
608 unsigned int socket_id, struct rte_mempool *mp,
612 uint16_t sop_queue_idx = enic_rte_rq_idx_to_sop_idx(queue_idx);
613 uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx);
614 struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
615 struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
616 unsigned int mbuf_size, mbufs_per_pkt;
617 unsigned int nb_sop_desc, nb_data_desc;
618 uint16_t min_sop, max_sop, min_data, max_data;
619 uint16_t mtu = enic->rte_dev->data->mtu;
622 rq_sop->data_queue_idx = data_queue_idx;
624 rq_data->data_queue_idx = 0;
625 rq_sop->socket_id = socket_id;
627 rq_data->socket_id = socket_id;
631 mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
632 RTE_PKTMBUF_HEADROOM);
634 if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
635 dev_info(enic, "Rq %u Scatter rx mode enabled\n", queue_idx);
636 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
637 mbufs_per_pkt = ((mtu + ETHER_HDR_LEN + 4) +
638 (mbuf_size - 1)) / mbuf_size;
640 dev_info(enic, "Scatter rx mode disabled\n");
644 if (mbufs_per_pkt > 1) {
645 dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx);
646 rq_sop->data_queue_enable = 1;
649 dev_info(enic, "Rq %u Scatter rx mode not being used\n",
651 rq_sop->data_queue_enable = 0;
655 /* number of descriptors have to be a multiple of 32 */
656 nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
657 nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
659 rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
660 rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
662 if (mbufs_per_pkt > 1) {
664 max_sop = ((enic->config.rq_desc_count /
665 (mbufs_per_pkt - 1)) & ~0x1F);
666 min_data = min_sop * (mbufs_per_pkt - 1);
667 max_data = enic->config.rq_desc_count;
670 max_sop = enic->config.rq_desc_count;
675 if (nb_desc < (min_sop + min_data)) {
677 "Number of rx descs too low, adjusting to minimum\n");
678 nb_sop_desc = min_sop;
679 nb_data_desc = min_data;
680 } else if (nb_desc > (max_sop + max_data)) {
682 "Number of rx_descs too high, adjusting to maximum\n");
683 nb_sop_desc = max_sop;
684 nb_data_desc = max_data;
686 if (mbufs_per_pkt > 1) {
687 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
688 mtu, mbuf_size, min_sop + min_data,
691 dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
692 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
694 /* Allocate sop queue resources */
695 rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
696 nb_sop_desc, sizeof(struct rq_enet_desc));
698 dev_err(enic, "error in allocation of sop rq\n");
701 nb_sop_desc = rq_sop->ring.desc_count;
703 if (rq_data->in_use) {
704 /* Allocate data queue resources */
705 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
707 sizeof(struct rq_enet_desc));
709 dev_err(enic, "error in allocation of data rq\n");
710 goto err_free_rq_sop;
712 nb_data_desc = rq_data->ring.desc_count;
714 rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
715 socket_id, nb_sop_desc + nb_data_desc,
716 sizeof(struct cq_enet_rq_desc));
718 dev_err(enic, "error in allocation of cq for rq\n");
719 goto err_free_rq_data;
722 /* Allocate the mbuf rings */
723 rq_sop->mbuf_ring = (struct rte_mbuf **)
724 rte_zmalloc_socket("rq->mbuf_ring",
725 sizeof(struct rte_mbuf *) * nb_sop_desc,
726 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
727 if (rq_sop->mbuf_ring == NULL)
730 if (rq_data->in_use) {
731 rq_data->mbuf_ring = (struct rte_mbuf **)
732 rte_zmalloc_socket("rq->mbuf_ring",
733 sizeof(struct rte_mbuf *) * nb_data_desc,
734 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
735 if (rq_data->mbuf_ring == NULL)
736 goto err_free_sop_mbuf;
739 rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */
744 rte_free(rq_sop->mbuf_ring);
746 /* cleanup on error */
747 vnic_cq_free(&enic->cq[queue_idx]);
750 vnic_rq_free(rq_data);
752 vnic_rq_free(rq_sop);
757 void enic_free_wq(void *txq)
765 wq = (struct vnic_wq *)txq;
766 enic = vnic_dev_priv(wq->vdev);
767 rte_memzone_free(wq->cqmsg_rz);
769 vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
772 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
773 unsigned int socket_id, uint16_t nb_desc)
776 struct vnic_wq *wq = &enic->wq[queue_idx];
777 unsigned int cq_index = enic_cq_wq(enic, queue_idx);
781 wq->socket_id = socket_id;
783 if (nb_desc > enic->config.wq_desc_count) {
785 "WQ %d - number of tx desc in cmd line (%d)"\
786 "is greater than that in the UCSM/CIMC adapter"\
787 "policy. Applying the value in the adapter "\
789 queue_idx, nb_desc, enic->config.wq_desc_count);
790 } else if (nb_desc != enic->config.wq_desc_count) {
791 enic->config.wq_desc_count = nb_desc;
793 "TX Queues - effective number of descs:%d\n",
798 /* Allocate queue resources */
799 err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
800 enic->config.wq_desc_count,
801 sizeof(struct wq_enet_desc));
803 dev_err(enic, "error in allocation of wq\n");
807 err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
808 socket_id, enic->config.wq_desc_count,
809 sizeof(struct cq_enet_wq_desc));
812 dev_err(enic, "error in allocation of cq for wq\n");
815 /* setup up CQ message */
816 snprintf((char *)name, sizeof(name),
817 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
820 wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
830 int enic_disable(struct enic *enic)
835 vnic_intr_mask(&enic->intr);
836 (void)vnic_intr_masked(&enic->intr); /* flush write */
837 rte_intr_disable(&enic->pdev->intr_handle);
838 rte_intr_callback_unregister(&enic->pdev->intr_handle,
840 (void *)enic->rte_dev);
842 vnic_dev_disable(enic->vdev);
844 enic_clsf_destroy(enic);
846 if (!enic_is_sriov_vf(enic))
847 vnic_dev_del_addr(enic->vdev, enic->mac_addr);
849 for (i = 0; i < enic->wq_count; i++) {
850 err = vnic_wq_disable(&enic->wq[i]);
854 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
855 if (enic->rq[i].in_use) {
856 err = vnic_rq_disable(&enic->rq[i]);
862 /* If we were using interrupts, set the interrupt vector to -1
863 * to disable interrupts. We are not disabling link notifcations,
864 * though, as we want the polling of link status to continue working.
866 if (enic->rte_dev->data->dev_conf.intr_conf.lsc)
867 vnic_dev_notify_set(enic->vdev, -1);
869 vnic_dev_set_reset_flag(enic->vdev, 1);
871 for (i = 0; i < enic->wq_count; i++)
872 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
874 for (i = 0; i < enic_vnic_rq_count(enic); i++)
875 if (enic->rq[i].in_use)
876 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
877 for (i = 0; i < enic->cq_count; i++)
878 vnic_cq_clean(&enic->cq[i]);
879 vnic_intr_clean(&enic->intr);
884 static int enic_dev_wait(struct vnic_dev *vdev,
885 int (*start)(struct vnic_dev *, int),
886 int (*finished)(struct vnic_dev *, int *),
893 err = start(vdev, arg);
897 /* Wait for func to complete...2 seconds max */
898 for (i = 0; i < 2000; i++) {
899 err = finished(vdev, &done);
909 static int enic_dev_open(struct enic *enic)
913 err = enic_dev_wait(enic->vdev, vnic_dev_open,
914 vnic_dev_open_done, 0);
916 dev_err(enic_get_dev(enic),
917 "vNIC device open failed, err %d\n", err);
922 static int enic_set_rsskey(struct enic *enic)
924 dma_addr_t rss_key_buf_pa;
925 union vnic_rss_key *rss_key_buf_va = NULL;
926 static union vnic_rss_key rss_key = {
928 [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
929 [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
930 [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
931 [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
937 snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
938 rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
939 &rss_key_buf_pa, name);
943 rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
945 err = enic_set_rss_key(enic,
947 sizeof(union vnic_rss_key));
949 enic_free_consistent(enic, sizeof(union vnic_rss_key),
950 rss_key_buf_va, rss_key_buf_pa);
955 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
957 dma_addr_t rss_cpu_buf_pa;
958 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
963 snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
964 rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
965 &rss_cpu_buf_pa, name);
969 for (i = 0; i < (1 << rss_hash_bits); i++)
970 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
971 enic_rte_rq_idx_to_sop_idx(i % enic->rq_count);
973 err = enic_set_rss_cpu(enic,
975 sizeof(union vnic_rss_cpu));
977 enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
978 rss_cpu_buf_va, rss_cpu_buf_pa);
983 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
984 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
986 const u8 tso_ipid_split_en = 0;
989 /* Enable VLAN tag stripping */
991 err = enic_set_nic_cfg(enic,
992 rss_default_cpu, rss_hash_type,
993 rss_hash_bits, rss_base_cpu,
994 rss_enable, tso_ipid_split_en,
995 enic->ig_vlan_strip_en);
1000 int enic_set_rss_nic_cfg(struct enic *enic)
1002 const u8 rss_default_cpu = 0;
1003 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1004 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1005 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1006 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1007 const u8 rss_hash_bits = 7;
1008 const u8 rss_base_cpu = 0;
1009 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1012 if (!enic_set_rsskey(enic)) {
1013 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1015 dev_warning(enic, "RSS disabled, "\
1016 "Failed to set RSS cpu indirection table.");
1021 "RSS disabled, Failed to set RSS key.\n");
1025 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1026 rss_hash_bits, rss_base_cpu, rss_enable);
1029 int enic_setup_finish(struct enic *enic)
1033 enic_init_soft_stats(enic);
1035 ret = enic_set_rss_nic_cfg(enic);
1037 dev_err(enic, "Failed to config nic, aborting.\n");
1042 vnic_dev_packet_filter(enic->vdev,
1055 void enic_add_packet_filter(struct enic *enic)
1057 /* Args -> directed, multicast, broadcast, promisc, allmulti */
1058 vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1059 enic->promisc, enic->allmulti);
1062 int enic_get_link_status(struct enic *enic)
1064 return vnic_dev_link_status(enic->vdev);
1067 static void enic_dev_deinit(struct enic *enic)
1069 struct rte_eth_dev *eth_dev = enic->rte_dev;
1071 /* stop link status checking */
1072 vnic_dev_notify_unset(enic->vdev);
1074 rte_free(eth_dev->data->mac_addrs);
1078 int enic_set_vnic_res(struct enic *enic)
1080 struct rte_eth_dev *eth_dev = enic->rte_dev;
1083 /* With Rx scatter support, two RQs are now used per RQ used by
1086 if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1087 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1088 eth_dev->data->nb_rx_queues,
1089 eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1092 if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1093 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1094 eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1098 if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1099 eth_dev->data->nb_tx_queues)) {
1100 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1101 (eth_dev->data->nb_rx_queues +
1102 eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1107 enic->rq_count = eth_dev->data->nb_rx_queues;
1108 enic->wq_count = eth_dev->data->nb_tx_queues;
1109 enic->cq_count = enic->rq_count + enic->wq_count;
1115 /* Initialize the completion queue for an RQ */
1117 enic_reinit_rq(struct enic *enic, unsigned int rq_idx)
1119 struct vnic_rq *sop_rq, *data_rq;
1120 unsigned int cq_idx = enic_cq_rq(enic, rq_idx);
1123 sop_rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1124 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx)];
1126 vnic_cq_clean(&enic->cq[cq_idx]);
1127 vnic_cq_init(&enic->cq[cq_idx],
1128 0 /* flow_control_enable */,
1129 1 /* color_enable */,
1132 1 /* cq_tail_color */,
1133 0 /* interrupt_enable */,
1134 1 /* cq_entry_enable */,
1135 0 /* cq_message_enable */,
1136 0 /* interrupt offset */,
1137 0 /* cq_message_addr */);
1140 vnic_rq_init_start(sop_rq, enic_cq_rq(enic,
1141 enic_rte_rq_idx_to_sop_idx(rq_idx)), 0,
1142 sop_rq->ring.desc_count - 1, 1, 0);
1143 if (data_rq->in_use) {
1144 vnic_rq_init_start(data_rq,
1146 enic_rte_rq_idx_to_data_idx(rq_idx)), 0,
1147 data_rq->ring.desc_count - 1, 1, 0);
1150 rc = enic_alloc_rx_queue_mbufs(enic, sop_rq);
1154 if (data_rq->in_use) {
1155 rc = enic_alloc_rx_queue_mbufs(enic, data_rq);
1157 enic_rxmbuf_queue_release(enic, sop_rq);
1165 /* The Cisco NIC can send and receive packets up to a max packet size
1166 * determined by the NIC type and firmware. There is also an MTU
1167 * configured into the NIC via the CIMC/UCSM management interface
1168 * which can be overridden by this function (up to the max packet size).
1169 * Depending on the network setup, doing so may cause packet drops
1170 * and unexpected behavior.
1172 int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1174 unsigned int rq_idx;
1177 uint16_t old_mtu; /* previous setting */
1178 uint16_t config_mtu; /* Value configured into NIC via CIMC/UCSM */
1179 struct rte_eth_dev *eth_dev = enic->rte_dev;
1181 old_mtu = eth_dev->data->mtu;
1182 config_mtu = enic->config.mtu;
1184 if (new_mtu > enic->max_mtu) {
1186 "MTU not updated: requested (%u) greater than max (%u)\n",
1187 new_mtu, enic->max_mtu);
1190 if (new_mtu < ENIC_MIN_MTU) {
1192 "MTU not updated: requested (%u) less than min (%u)\n",
1193 new_mtu, ENIC_MIN_MTU);
1196 if (new_mtu > config_mtu)
1198 "MTU (%u) is greater than value configured in NIC (%u)\n",
1199 new_mtu, config_mtu);
1201 /* The easy case is when scatter is disabled. However if the MTU
1202 * becomes greater than the mbuf data size, packet drops will ensue.
1204 if (!enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
1205 eth_dev->data->mtu = new_mtu;
1209 /* Rx scatter is enabled so reconfigure RQ's on the fly. The point is to
1210 * change Rx scatter mode if necessary for better performance. I.e. if
1211 * MTU was greater than the mbuf size and now it's less, scatter Rx
1212 * doesn't have to be used and vice versa.
1214 rte_spinlock_lock(&enic->mtu_lock);
1216 /* Stop traffic on all RQs */
1217 for (rq_idx = 0; rq_idx < enic->rq_count * 2; rq_idx++) {
1218 rq = &enic->rq[rq_idx];
1219 if (rq->is_sop && rq->in_use) {
1220 rc = enic_stop_rq(enic,
1221 enic_sop_rq_idx_to_rte_idx(rq_idx));
1223 dev_err(enic, "Failed to stop Rq %u\n", rq_idx);
1229 /* replace Rx funciton with a no-op to avoid getting stale pkts */
1230 eth_dev->rx_pkt_burst = enic_dummy_recv_pkts;
1233 /* Allow time for threads to exit the real Rx function. */
1236 /* now it is safe to reconfigure the RQs */
1238 /* update the mtu */
1239 eth_dev->data->mtu = new_mtu;
1241 /* free and reallocate RQs with the new MTU */
1242 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1243 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1246 rc = enic_alloc_rq(enic, rq_idx, rq->socket_id, rq->mp,
1250 "Fatal MTU alloc error- No traffic will pass\n");
1254 rc = enic_reinit_rq(enic, rq_idx);
1257 "Fatal MTU RQ reinit- No traffic will pass\n");
1262 /* put back the real receive function */
1264 eth_dev->rx_pkt_burst = enic_recv_pkts;
1267 /* restart Rx traffic */
1268 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1269 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1270 if (rq->is_sop && rq->in_use)
1271 enic_start_rq(enic, rq_idx);
1275 dev_info(enic, "MTU changed from %u to %u\n", old_mtu, new_mtu);
1276 rte_spinlock_unlock(&enic->mtu_lock);
1280 static int enic_dev_init(struct enic *enic)
1283 struct rte_eth_dev *eth_dev = enic->rte_dev;
1285 vnic_dev_intr_coal_timer_info_default(enic->vdev);
1287 /* Get vNIC configuration
1289 err = enic_get_vnic_config(enic);
1291 dev_err(dev, "Get vNIC configuration failed, aborting\n");
1295 /* Get available resource counts */
1296 enic_get_res_counts(enic);
1297 if (enic->conf_rq_count == 1) {
1298 dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n");
1299 dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n");
1300 dev_err(enic, "See the ENIC PMD guide for more information.\n");
1304 /* Get the supported filters */
1305 enic_fdir_info(enic);
1307 eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN, 0);
1308 if (!eth_dev->data->mac_addrs) {
1309 dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1312 ether_addr_copy((struct ether_addr *) enic->mac_addr,
1313 ð_dev->data->mac_addrs[0]);
1315 vnic_dev_set_reset_flag(enic->vdev, 0);
1317 /* set up link status checking */
1318 vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
1324 int enic_probe(struct enic *enic)
1326 struct rte_pci_device *pdev = enic->pdev;
1329 dev_debug(enic, " Initializing ENIC PMD\n");
1331 enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1332 enic->bar0.len = pdev->mem_resource[0].len;
1334 /* Register vNIC device */
1335 enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1337 dev_err(enic, "vNIC registration failed, aborting\n");
1341 LIST_INIT(&enic->memzone_list);
1342 rte_spinlock_init(&enic->memzone_list_lock);
1344 vnic_register_cbacks(enic->vdev,
1345 enic_alloc_consistent,
1346 enic_free_consistent);
1348 /* Issue device open to get device in known state */
1349 err = enic_dev_open(enic);
1351 dev_err(enic, "vNIC dev open failed, aborting\n");
1352 goto err_out_unregister;
1355 /* Set ingress vlan rewrite mode before vnic initialization */
1356 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1357 IG_VLAN_REWRITE_MODE_PASS_THRU);
1360 "Failed to set ingress vlan rewrite mode, aborting.\n");
1361 goto err_out_dev_close;
1364 /* Issue device init to initialize the vnic-to-switch link.
1365 * We'll start with carrier off and wait for link UP
1366 * notification later to turn on carrier. We don't need
1367 * to wait here for the vnic-to-switch link initialization
1368 * to complete; link UP notification is the indication that
1369 * the process is complete.
1372 err = vnic_dev_init(enic->vdev, 0);
1374 dev_err(enic, "vNIC dev init failed, aborting\n");
1375 goto err_out_dev_close;
1378 err = enic_dev_init(enic);
1380 dev_err(enic, "Device initialization failed, aborting\n");
1381 goto err_out_dev_close;
1387 vnic_dev_close(enic->vdev);
1389 vnic_dev_unregister(enic->vdev);
1394 void enic_remove(struct enic *enic)
1396 enic_dev_deinit(enic);
1397 vnic_dev_close(enic->vdev);
1398 vnic_dev_unregister(enic->vdev);