2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * Copyright (c) 2014, Cisco Systems, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
43 #include <rte_bus_pci.h>
44 #include <rte_memzone.h>
45 #include <rte_malloc.h>
47 #include <rte_string_fns.h>
48 #include <rte_ethdev.h>
50 #include "enic_compat.h"
52 #include "wq_enet_desc.h"
53 #include "rq_enet_desc.h"
54 #include "cq_enet_desc.h"
55 #include "vnic_enet.h"
60 #include "vnic_intr.h"
63 static inline int enic_is_sriov_vf(struct enic *enic)
65 return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
68 static int is_zero_addr(uint8_t *addr)
70 return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
73 static int is_mcast_addr(uint8_t *addr)
78 static int is_eth_addr_valid(uint8_t *addr)
80 return !is_mcast_addr(addr) && !is_zero_addr(addr);
84 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
88 if (!rq || !rq->mbuf_ring) {
89 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
93 for (i = 0; i < rq->ring.desc_count; i++) {
94 if (rq->mbuf_ring[i]) {
95 rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
96 rq->mbuf_ring[i] = NULL;
101 void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
103 vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
106 static void enic_free_wq_buf(struct vnic_wq_buf *buf)
108 struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
110 rte_pktmbuf_free_seg(mbuf);
114 static void enic_log_q_error(struct enic *enic)
119 for (i = 0; i < enic->wq_count; i++) {
120 error_status = vnic_wq_error_status(&enic->wq[i]);
122 dev_err(enic, "WQ[%d] error_status %d\n", i,
126 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
127 if (!enic->rq[i].in_use)
129 error_status = vnic_rq_error_status(&enic->rq[i]);
131 dev_err(enic, "RQ[%d] error_status %d\n", i,
136 static void enic_clear_soft_stats(struct enic *enic)
138 struct enic_soft_stats *soft_stats = &enic->soft_stats;
139 rte_atomic64_clear(&soft_stats->rx_nombuf);
140 rte_atomic64_clear(&soft_stats->rx_packet_errors);
141 rte_atomic64_clear(&soft_stats->tx_oversized);
144 static void enic_init_soft_stats(struct enic *enic)
146 struct enic_soft_stats *soft_stats = &enic->soft_stats;
147 rte_atomic64_init(&soft_stats->rx_nombuf);
148 rte_atomic64_init(&soft_stats->rx_packet_errors);
149 rte_atomic64_init(&soft_stats->tx_oversized);
150 enic_clear_soft_stats(enic);
153 void enic_dev_stats_clear(struct enic *enic)
155 if (vnic_dev_stats_clear(enic->vdev))
156 dev_err(enic, "Error in clearing stats\n");
157 enic_clear_soft_stats(enic);
160 int enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
162 struct vnic_stats *stats;
163 struct enic_soft_stats *soft_stats = &enic->soft_stats;
164 int64_t rx_truncated;
165 uint64_t rx_packet_errors;
166 int ret = vnic_dev_stats_dump(enic->vdev, &stats);
169 dev_err(enic, "Error in getting stats\n");
173 /* The number of truncated packets can only be calculated by
174 * subtracting a hardware counter from error packets received by
175 * the driver. Note: this causes transient inaccuracies in the
176 * ipackets count. Also, the length of truncated packets are
177 * counted in ibytes even though truncated packets are dropped
178 * which can make ibytes be slightly higher than it should be.
180 rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
181 rx_truncated = rx_packet_errors - stats->rx.rx_errors;
183 r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
184 r_stats->opackets = stats->tx.tx_frames_ok;
186 r_stats->ibytes = stats->rx.rx_bytes_ok;
187 r_stats->obytes = stats->tx.tx_bytes_ok;
189 r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
190 r_stats->oerrors = stats->tx.tx_errors
191 + rte_atomic64_read(&soft_stats->tx_oversized);
193 r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
195 r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
199 void enic_del_mac_address(struct enic *enic, int mac_index)
201 struct rte_eth_dev *eth_dev = enic->rte_dev;
202 uint8_t *mac_addr = eth_dev->data->mac_addrs[mac_index].addr_bytes;
204 if (vnic_dev_del_addr(enic->vdev, mac_addr))
205 dev_err(enic, "del mac addr failed\n");
208 int enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
212 if (!is_eth_addr_valid(mac_addr)) {
213 dev_err(enic, "invalid mac address\n");
217 err = vnic_dev_add_addr(enic->vdev, mac_addr);
219 dev_err(enic, "add mac addr failed\n");
224 enic_free_rq_buf(struct rte_mbuf **mbuf)
229 rte_pktmbuf_free(*mbuf);
233 void enic_init_vnic_resources(struct enic *enic)
235 unsigned int error_interrupt_enable = 1;
236 unsigned int error_interrupt_offset = 0;
237 unsigned int index = 0;
239 struct vnic_rq *data_rq;
241 for (index = 0; index < enic->rq_count; index++) {
242 cq_idx = enic_cq_rq(enic, enic_rte_rq_idx_to_sop_idx(index));
244 vnic_rq_init(&enic->rq[enic_rte_rq_idx_to_sop_idx(index)],
246 error_interrupt_enable,
247 error_interrupt_offset);
249 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index)];
251 vnic_rq_init(data_rq,
253 error_interrupt_enable,
254 error_interrupt_offset);
256 vnic_cq_init(&enic->cq[cq_idx],
257 0 /* flow_control_enable */,
258 1 /* color_enable */,
261 1 /* cq_tail_color */,
262 0 /* interrupt_enable */,
263 1 /* cq_entry_enable */,
264 0 /* cq_message_enable */,
265 0 /* interrupt offset */,
266 0 /* cq_message_addr */);
269 for (index = 0; index < enic->wq_count; index++) {
270 vnic_wq_init(&enic->wq[index],
271 enic_cq_wq(enic, index),
272 error_interrupt_enable,
273 error_interrupt_offset);
275 cq_idx = enic_cq_wq(enic, index);
276 vnic_cq_init(&enic->cq[cq_idx],
277 0 /* flow_control_enable */,
278 1 /* color_enable */,
281 1 /* cq_tail_color */,
282 0 /* interrupt_enable */,
283 0 /* cq_entry_enable */,
284 1 /* cq_message_enable */,
285 0 /* interrupt offset */,
286 (u64)enic->wq[index].cqmsg_rz->phys_addr);
289 vnic_intr_init(&enic->intr,
290 enic->config.intr_timer_usec,
291 enic->config.intr_timer_type,
292 /*mask_on_assertion*/1);
297 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
300 struct rq_enet_desc *rqd = rq->ring.descs;
307 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
308 rq->ring.desc_count);
310 for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
311 mb = rte_mbuf_raw_alloc(rq->mp);
313 dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
314 (unsigned)rq->index);
318 mb->data_off = RTE_PKTMBUF_HEADROOM;
319 dma_addr = (dma_addr_t)(mb->buf_physaddr
320 + RTE_PKTMBUF_HEADROOM);
321 rq_enet_desc_enc(rqd, dma_addr,
322 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
323 : RQ_ENET_TYPE_NOT_SOP),
324 mb->buf_len - RTE_PKTMBUF_HEADROOM);
325 rq->mbuf_ring[i] = mb;
328 /* make sure all prior writes are complete before doing the PIO write */
331 /* Post all but the last buffer to VIC. */
332 rq->posted_index = rq->ring.desc_count - 1;
336 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
337 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
338 iowrite32(rq->posted_index, &rq->ctrl->posted_index);
339 iowrite32(0, &rq->ctrl->fetch_index);
347 enic_alloc_consistent(void *priv, size_t size,
348 dma_addr_t *dma_handle, u8 *name)
351 const struct rte_memzone *rz;
353 struct enic *enic = (struct enic *)priv;
354 struct enic_memzone_entry *mze;
356 rz = rte_memzone_reserve_aligned((const char *)name,
357 size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
359 pr_err("%s : Failed to allocate memory requested for %s\n",
365 *dma_handle = (dma_addr_t)rz->phys_addr;
367 mze = rte_malloc("enic memzone entry",
368 sizeof(struct enic_memzone_entry), 0);
371 pr_err("%s : Failed to allocate memory for memzone list\n",
373 rte_memzone_free(rz);
379 rte_spinlock_lock(&enic->memzone_list_lock);
380 LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
381 rte_spinlock_unlock(&enic->memzone_list_lock);
387 enic_free_consistent(void *priv,
388 __rte_unused size_t size,
390 dma_addr_t dma_handle)
392 struct enic_memzone_entry *mze;
393 struct enic *enic = (struct enic *)priv;
395 rte_spinlock_lock(&enic->memzone_list_lock);
396 LIST_FOREACH(mze, &enic->memzone_list, entries) {
397 if (mze->rz->addr == vaddr &&
398 mze->rz->phys_addr == dma_handle)
402 rte_spinlock_unlock(&enic->memzone_list_lock);
404 "Tried to free memory, but couldn't find it in the memzone list\n");
407 LIST_REMOVE(mze, entries);
408 rte_spinlock_unlock(&enic->memzone_list_lock);
409 rte_memzone_free(mze->rz);
413 int enic_link_update(struct enic *enic)
415 struct rte_eth_dev *eth_dev = enic->rte_dev;
419 link_status = enic_get_link_status(enic);
420 ret = (link_status == enic->link_status);
421 enic->link_status = link_status;
422 eth_dev->data->dev_link.link_status = link_status;
423 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
424 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
429 enic_intr_handler(void *arg)
431 struct rte_eth_dev *dev = (struct rte_eth_dev *)arg;
432 struct enic *enic = pmd_priv(dev);
434 vnic_intr_return_all_credits(&enic->intr);
436 enic_link_update(enic);
437 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL, NULL);
438 enic_log_q_error(enic);
441 int enic_enable(struct enic *enic)
445 struct rte_eth_dev *eth_dev = enic->rte_dev;
447 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
448 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
450 /* vnic notification of link status has already been turned on in
451 * enic_dev_init() which is called during probe time. Here we are
452 * just turning on interrupt vector 0 if needed.
454 if (eth_dev->data->dev_conf.intr_conf.lsc)
455 vnic_dev_notify_set(enic->vdev, 0);
457 if (enic_clsf_init(enic))
458 dev_warning(enic, "Init of hash table for clsf failed."\
459 "Flow director feature will not work\n");
461 for (index = 0; index < enic->rq_count; index++) {
462 err = enic_alloc_rx_queue_mbufs(enic,
463 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
465 dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
468 err = enic_alloc_rx_queue_mbufs(enic,
469 &enic->rq[enic_rte_rq_idx_to_data_idx(index)]);
471 /* release the allocated mbufs for the sop rq*/
472 enic_rxmbuf_queue_release(enic,
473 &enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
475 dev_err(enic, "Failed to alloc data RX queue mbufs\n");
480 for (index = 0; index < enic->wq_count; index++)
481 enic_start_wq(enic, index);
482 for (index = 0; index < enic->rq_count; index++)
483 enic_start_rq(enic, index);
485 vnic_dev_add_addr(enic->vdev, enic->mac_addr);
487 vnic_dev_enable_wait(enic->vdev);
489 /* Register and enable error interrupt */
490 rte_intr_callback_register(&(enic->pdev->intr_handle),
491 enic_intr_handler, (void *)enic->rte_dev);
493 rte_intr_enable(&(enic->pdev->intr_handle));
494 vnic_intr_unmask(&enic->intr);
499 int enic_alloc_intr_resources(struct enic *enic)
503 dev_info(enic, "vNIC resources used: "\
504 "wq %d rq %d cq %d intr %d\n",
505 enic->wq_count, enic_vnic_rq_count(enic),
506 enic->cq_count, enic->intr_count);
508 err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
510 enic_free_vnic_resources(enic);
515 void enic_free_rq(void *rxq)
517 struct vnic_rq *rq_sop, *rq_data;
523 rq_sop = (struct vnic_rq *)rxq;
524 enic = vnic_dev_priv(rq_sop->vdev);
525 rq_data = &enic->rq[rq_sop->data_queue_idx];
527 enic_rxmbuf_queue_release(enic, rq_sop);
529 enic_rxmbuf_queue_release(enic, rq_data);
531 rte_free(rq_sop->mbuf_ring);
533 rte_free(rq_data->mbuf_ring);
535 rq_sop->mbuf_ring = NULL;
536 rq_data->mbuf_ring = NULL;
538 vnic_rq_free(rq_sop);
540 vnic_rq_free(rq_data);
542 vnic_cq_free(&enic->cq[enic_sop_rq_idx_to_cq_idx(rq_sop->index)]);
548 void enic_start_wq(struct enic *enic, uint16_t queue_idx)
550 struct rte_eth_dev *eth_dev = enic->rte_dev;
551 vnic_wq_enable(&enic->wq[queue_idx]);
552 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
555 int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
557 struct rte_eth_dev *eth_dev = enic->rte_dev;
560 ret = vnic_wq_disable(&enic->wq[queue_idx]);
564 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
568 void enic_start_rq(struct enic *enic, uint16_t queue_idx)
570 struct vnic_rq *rq_sop;
571 struct vnic_rq *rq_data;
572 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
573 rq_data = &enic->rq[rq_sop->data_queue_idx];
574 struct rte_eth_dev *eth_dev = enic->rte_dev;
577 vnic_rq_enable(rq_data);
579 vnic_rq_enable(rq_sop);
580 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
583 int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
585 int ret1 = 0, ret2 = 0;
586 struct rte_eth_dev *eth_dev = enic->rte_dev;
587 struct vnic_rq *rq_sop;
588 struct vnic_rq *rq_data;
589 rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
590 rq_data = &enic->rq[rq_sop->data_queue_idx];
592 ret2 = vnic_rq_disable(rq_sop);
595 ret1 = vnic_rq_disable(rq_data);
602 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
606 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
607 unsigned int socket_id, struct rte_mempool *mp,
608 uint16_t nb_desc, uint16_t free_thresh)
611 uint16_t sop_queue_idx = enic_rte_rq_idx_to_sop_idx(queue_idx);
612 uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx);
613 struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
614 struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
615 unsigned int mbuf_size, mbufs_per_pkt;
616 unsigned int nb_sop_desc, nb_data_desc;
617 uint16_t min_sop, max_sop, min_data, max_data;
618 uint16_t mtu = enic->rte_dev->data->mtu;
621 rq_sop->data_queue_idx = data_queue_idx;
623 rq_data->data_queue_idx = 0;
624 rq_sop->socket_id = socket_id;
626 rq_data->socket_id = socket_id;
629 rq_sop->rx_free_thresh = free_thresh;
630 rq_data->rx_free_thresh = free_thresh;
631 dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx,
634 mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
635 RTE_PKTMBUF_HEADROOM);
637 if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
638 dev_info(enic, "Rq %u Scatter rx mode enabled\n", queue_idx);
639 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
640 mbufs_per_pkt = ((mtu + ETHER_HDR_LEN + 4) +
641 (mbuf_size - 1)) / mbuf_size;
643 dev_info(enic, "Scatter rx mode disabled\n");
647 if (mbufs_per_pkt > 1) {
648 dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx);
649 rq_sop->data_queue_enable = 1;
652 dev_info(enic, "Rq %u Scatter rx mode not being used\n",
654 rq_sop->data_queue_enable = 0;
658 /* number of descriptors have to be a multiple of 32 */
659 nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
660 nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
662 rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
663 rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
665 if (mbufs_per_pkt > 1) {
667 max_sop = ((enic->config.rq_desc_count /
668 (mbufs_per_pkt - 1)) & ~0x1F);
669 min_data = min_sop * (mbufs_per_pkt - 1);
670 max_data = enic->config.rq_desc_count;
673 max_sop = enic->config.rq_desc_count;
678 if (nb_desc < (min_sop + min_data)) {
680 "Number of rx descs too low, adjusting to minimum\n");
681 nb_sop_desc = min_sop;
682 nb_data_desc = min_data;
683 } else if (nb_desc > (max_sop + max_data)) {
685 "Number of rx_descs too high, adjusting to maximum\n");
686 nb_sop_desc = max_sop;
687 nb_data_desc = max_data;
689 if (mbufs_per_pkt > 1) {
690 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
691 mtu, mbuf_size, min_sop + min_data,
694 dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
695 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
697 /* Allocate sop queue resources */
698 rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
699 nb_sop_desc, sizeof(struct rq_enet_desc));
701 dev_err(enic, "error in allocation of sop rq\n");
704 nb_sop_desc = rq_sop->ring.desc_count;
706 if (rq_data->in_use) {
707 /* Allocate data queue resources */
708 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
710 sizeof(struct rq_enet_desc));
712 dev_err(enic, "error in allocation of data rq\n");
713 goto err_free_rq_sop;
715 nb_data_desc = rq_data->ring.desc_count;
717 rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
718 socket_id, nb_sop_desc + nb_data_desc,
719 sizeof(struct cq_enet_rq_desc));
721 dev_err(enic, "error in allocation of cq for rq\n");
722 goto err_free_rq_data;
725 /* Allocate the mbuf rings */
726 rq_sop->mbuf_ring = (struct rte_mbuf **)
727 rte_zmalloc_socket("rq->mbuf_ring",
728 sizeof(struct rte_mbuf *) * nb_sop_desc,
729 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
730 if (rq_sop->mbuf_ring == NULL)
733 if (rq_data->in_use) {
734 rq_data->mbuf_ring = (struct rte_mbuf **)
735 rte_zmalloc_socket("rq->mbuf_ring",
736 sizeof(struct rte_mbuf *) * nb_data_desc,
737 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
738 if (rq_data->mbuf_ring == NULL)
739 goto err_free_sop_mbuf;
742 rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */
747 rte_free(rq_sop->mbuf_ring);
749 /* cleanup on error */
750 vnic_cq_free(&enic->cq[queue_idx]);
753 vnic_rq_free(rq_data);
755 vnic_rq_free(rq_sop);
760 void enic_free_wq(void *txq)
768 wq = (struct vnic_wq *)txq;
769 enic = vnic_dev_priv(wq->vdev);
770 rte_memzone_free(wq->cqmsg_rz);
772 vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
775 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
776 unsigned int socket_id, uint16_t nb_desc)
779 struct vnic_wq *wq = &enic->wq[queue_idx];
780 unsigned int cq_index = enic_cq_wq(enic, queue_idx);
784 wq->socket_id = socket_id;
786 if (nb_desc > enic->config.wq_desc_count) {
788 "WQ %d - number of tx desc in cmd line (%d)"\
789 "is greater than that in the UCSM/CIMC adapter"\
790 "policy. Applying the value in the adapter "\
792 queue_idx, nb_desc, enic->config.wq_desc_count);
793 } else if (nb_desc != enic->config.wq_desc_count) {
794 enic->config.wq_desc_count = nb_desc;
796 "TX Queues - effective number of descs:%d\n",
801 /* Allocate queue resources */
802 err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
803 enic->config.wq_desc_count,
804 sizeof(struct wq_enet_desc));
806 dev_err(enic, "error in allocation of wq\n");
810 err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
811 socket_id, enic->config.wq_desc_count,
812 sizeof(struct cq_enet_wq_desc));
815 dev_err(enic, "error in allocation of cq for wq\n");
818 /* setup up CQ message */
819 snprintf((char *)name, sizeof(name),
820 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
823 wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
833 int enic_disable(struct enic *enic)
838 vnic_intr_mask(&enic->intr);
839 (void)vnic_intr_masked(&enic->intr); /* flush write */
840 rte_intr_disable(&enic->pdev->intr_handle);
841 rte_intr_callback_unregister(&enic->pdev->intr_handle,
843 (void *)enic->rte_dev);
845 vnic_dev_disable(enic->vdev);
847 enic_clsf_destroy(enic);
849 if (!enic_is_sriov_vf(enic))
850 vnic_dev_del_addr(enic->vdev, enic->mac_addr);
852 for (i = 0; i < enic->wq_count; i++) {
853 err = vnic_wq_disable(&enic->wq[i]);
857 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
858 if (enic->rq[i].in_use) {
859 err = vnic_rq_disable(&enic->rq[i]);
865 /* If we were using interrupts, set the interrupt vector to -1
866 * to disable interrupts. We are not disabling link notifcations,
867 * though, as we want the polling of link status to continue working.
869 if (enic->rte_dev->data->dev_conf.intr_conf.lsc)
870 vnic_dev_notify_set(enic->vdev, -1);
872 vnic_dev_set_reset_flag(enic->vdev, 1);
874 for (i = 0; i < enic->wq_count; i++)
875 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
877 for (i = 0; i < enic_vnic_rq_count(enic); i++)
878 if (enic->rq[i].in_use)
879 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
880 for (i = 0; i < enic->cq_count; i++)
881 vnic_cq_clean(&enic->cq[i]);
882 vnic_intr_clean(&enic->intr);
887 static int enic_dev_wait(struct vnic_dev *vdev,
888 int (*start)(struct vnic_dev *, int),
889 int (*finished)(struct vnic_dev *, int *),
896 err = start(vdev, arg);
900 /* Wait for func to complete...2 seconds max */
901 for (i = 0; i < 2000; i++) {
902 err = finished(vdev, &done);
912 static int enic_dev_open(struct enic *enic)
916 err = enic_dev_wait(enic->vdev, vnic_dev_open,
917 vnic_dev_open_done, 0);
919 dev_err(enic_get_dev(enic),
920 "vNIC device open failed, err %d\n", err);
925 static int enic_set_rsskey(struct enic *enic)
927 dma_addr_t rss_key_buf_pa;
928 union vnic_rss_key *rss_key_buf_va = NULL;
929 static union vnic_rss_key rss_key = {
931 [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
932 [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
933 [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
934 [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
940 snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
941 rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
942 &rss_key_buf_pa, name);
946 rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
948 err = enic_set_rss_key(enic,
950 sizeof(union vnic_rss_key));
952 enic_free_consistent(enic, sizeof(union vnic_rss_key),
953 rss_key_buf_va, rss_key_buf_pa);
958 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
960 dma_addr_t rss_cpu_buf_pa;
961 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
966 snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
967 rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
968 &rss_cpu_buf_pa, name);
972 for (i = 0; i < (1 << rss_hash_bits); i++)
973 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
974 enic_rte_rq_idx_to_sop_idx(i % enic->rq_count);
976 err = enic_set_rss_cpu(enic,
978 sizeof(union vnic_rss_cpu));
980 enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
981 rss_cpu_buf_va, rss_cpu_buf_pa);
986 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
987 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
989 const u8 tso_ipid_split_en = 0;
992 /* Enable VLAN tag stripping */
994 err = enic_set_nic_cfg(enic,
995 rss_default_cpu, rss_hash_type,
996 rss_hash_bits, rss_base_cpu,
997 rss_enable, tso_ipid_split_en,
998 enic->ig_vlan_strip_en);
1003 int enic_set_rss_nic_cfg(struct enic *enic)
1005 const u8 rss_default_cpu = 0;
1006 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1007 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1008 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1009 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1010 const u8 rss_hash_bits = 7;
1011 const u8 rss_base_cpu = 0;
1012 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1015 if (!enic_set_rsskey(enic)) {
1016 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1018 dev_warning(enic, "RSS disabled, "\
1019 "Failed to set RSS cpu indirection table.");
1024 "RSS disabled, Failed to set RSS key.\n");
1028 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1029 rss_hash_bits, rss_base_cpu, rss_enable);
1032 int enic_setup_finish(struct enic *enic)
1036 enic_init_soft_stats(enic);
1038 ret = enic_set_rss_nic_cfg(enic);
1040 dev_err(enic, "Failed to config nic, aborting.\n");
1045 vnic_dev_packet_filter(enic->vdev,
1058 void enic_add_packet_filter(struct enic *enic)
1060 /* Args -> directed, multicast, broadcast, promisc, allmulti */
1061 vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1062 enic->promisc, enic->allmulti);
1065 int enic_get_link_status(struct enic *enic)
1067 return vnic_dev_link_status(enic->vdev);
1070 static void enic_dev_deinit(struct enic *enic)
1072 struct rte_eth_dev *eth_dev = enic->rte_dev;
1074 /* stop link status checking */
1075 vnic_dev_notify_unset(enic->vdev);
1077 rte_free(eth_dev->data->mac_addrs);
1081 int enic_set_vnic_res(struct enic *enic)
1083 struct rte_eth_dev *eth_dev = enic->rte_dev;
1086 /* With Rx scatter support, two RQs are now used per RQ used by
1089 if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1090 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1091 eth_dev->data->nb_rx_queues,
1092 eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1095 if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1096 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1097 eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1101 if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1102 eth_dev->data->nb_tx_queues)) {
1103 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1104 (eth_dev->data->nb_rx_queues +
1105 eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1110 enic->rq_count = eth_dev->data->nb_rx_queues;
1111 enic->wq_count = eth_dev->data->nb_tx_queues;
1112 enic->cq_count = enic->rq_count + enic->wq_count;
1118 /* Initialize the completion queue for an RQ */
1120 enic_reinit_rq(struct enic *enic, unsigned int rq_idx)
1122 struct vnic_rq *sop_rq, *data_rq;
1123 unsigned int cq_idx;
1126 sop_rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1127 data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx)];
1130 vnic_cq_clean(&enic->cq[cq_idx]);
1131 vnic_cq_init(&enic->cq[cq_idx],
1132 0 /* flow_control_enable */,
1133 1 /* color_enable */,
1136 1 /* cq_tail_color */,
1137 0 /* interrupt_enable */,
1138 1 /* cq_entry_enable */,
1139 0 /* cq_message_enable */,
1140 0 /* interrupt offset */,
1141 0 /* cq_message_addr */);
1144 vnic_rq_init_start(sop_rq, enic_cq_rq(enic,
1145 enic_rte_rq_idx_to_sop_idx(rq_idx)), 0,
1146 sop_rq->ring.desc_count - 1, 1, 0);
1147 if (data_rq->in_use) {
1148 vnic_rq_init_start(data_rq,
1150 enic_rte_rq_idx_to_data_idx(rq_idx)), 0,
1151 data_rq->ring.desc_count - 1, 1, 0);
1154 rc = enic_alloc_rx_queue_mbufs(enic, sop_rq);
1158 if (data_rq->in_use) {
1159 rc = enic_alloc_rx_queue_mbufs(enic, data_rq);
1161 enic_rxmbuf_queue_release(enic, sop_rq);
1169 /* The Cisco NIC can send and receive packets up to a max packet size
1170 * determined by the NIC type and firmware. There is also an MTU
1171 * configured into the NIC via the CIMC/UCSM management interface
1172 * which can be overridden by this function (up to the max packet size).
1173 * Depending on the network setup, doing so may cause packet drops
1174 * and unexpected behavior.
1176 int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1178 unsigned int rq_idx;
1181 uint16_t old_mtu; /* previous setting */
1182 uint16_t config_mtu; /* Value configured into NIC via CIMC/UCSM */
1183 struct rte_eth_dev *eth_dev = enic->rte_dev;
1185 old_mtu = eth_dev->data->mtu;
1186 config_mtu = enic->config.mtu;
1188 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1189 return -E_RTE_SECONDARY;
1191 if (new_mtu > enic->max_mtu) {
1193 "MTU not updated: requested (%u) greater than max (%u)\n",
1194 new_mtu, enic->max_mtu);
1197 if (new_mtu < ENIC_MIN_MTU) {
1199 "MTU not updated: requested (%u) less than min (%u)\n",
1200 new_mtu, ENIC_MIN_MTU);
1203 if (new_mtu > config_mtu)
1205 "MTU (%u) is greater than value configured in NIC (%u)\n",
1206 new_mtu, config_mtu);
1208 /* The easy case is when scatter is disabled. However if the MTU
1209 * becomes greater than the mbuf data size, packet drops will ensue.
1211 if (!enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
1212 eth_dev->data->mtu = new_mtu;
1216 /* Rx scatter is enabled so reconfigure RQ's on the fly. The point is to
1217 * change Rx scatter mode if necessary for better performance. I.e. if
1218 * MTU was greater than the mbuf size and now it's less, scatter Rx
1219 * doesn't have to be used and vice versa.
1221 rte_spinlock_lock(&enic->mtu_lock);
1223 /* Stop traffic on all RQs */
1224 for (rq_idx = 0; rq_idx < enic->rq_count * 2; rq_idx++) {
1225 rq = &enic->rq[rq_idx];
1226 if (rq->is_sop && rq->in_use) {
1227 rc = enic_stop_rq(enic,
1228 enic_sop_rq_idx_to_rte_idx(rq_idx));
1230 dev_err(enic, "Failed to stop Rq %u\n", rq_idx);
1236 /* replace Rx function with a no-op to avoid getting stale pkts */
1237 eth_dev->rx_pkt_burst = enic_dummy_recv_pkts;
1240 /* Allow time for threads to exit the real Rx function. */
1243 /* now it is safe to reconfigure the RQs */
1245 /* update the mtu */
1246 eth_dev->data->mtu = new_mtu;
1248 /* free and reallocate RQs with the new MTU */
1249 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1250 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1253 rc = enic_alloc_rq(enic, rq_idx, rq->socket_id, rq->mp,
1254 rq->tot_nb_desc, rq->rx_free_thresh);
1257 "Fatal MTU alloc error- No traffic will pass\n");
1261 rc = enic_reinit_rq(enic, rq_idx);
1264 "Fatal MTU RQ reinit- No traffic will pass\n");
1269 /* put back the real receive function */
1271 eth_dev->rx_pkt_burst = enic_recv_pkts;
1274 /* restart Rx traffic */
1275 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1276 rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1277 if (rq->is_sop && rq->in_use)
1278 enic_start_rq(enic, rq_idx);
1282 dev_info(enic, "MTU changed from %u to %u\n", old_mtu, new_mtu);
1283 rte_spinlock_unlock(&enic->mtu_lock);
1287 static int enic_dev_init(struct enic *enic)
1290 struct rte_eth_dev *eth_dev = enic->rte_dev;
1292 vnic_dev_intr_coal_timer_info_default(enic->vdev);
1294 /* Get vNIC configuration
1296 err = enic_get_vnic_config(enic);
1298 dev_err(dev, "Get vNIC configuration failed, aborting\n");
1302 /* Get available resource counts */
1303 enic_get_res_counts(enic);
1304 if (enic->conf_rq_count == 1) {
1305 dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n");
1306 dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n");
1307 dev_err(enic, "See the ENIC PMD guide for more information.\n");
1311 /* Get the supported filters */
1312 enic_fdir_info(enic);
1314 eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN
1315 * ENIC_MAX_MAC_ADDR, 0);
1316 if (!eth_dev->data->mac_addrs) {
1317 dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1320 ether_addr_copy((struct ether_addr *) enic->mac_addr,
1321 eth_dev->data->mac_addrs);
1323 vnic_dev_set_reset_flag(enic->vdev, 0);
1325 LIST_INIT(&enic->flows);
1326 rte_spinlock_init(&enic->flows_lock);
1328 /* set up link status checking */
1329 vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
1335 int enic_probe(struct enic *enic)
1337 struct rte_pci_device *pdev = enic->pdev;
1340 dev_debug(enic, " Initializing ENIC PMD\n");
1342 /* if this is a secondary process the hardware is already initialized */
1343 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1346 enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1347 enic->bar0.len = pdev->mem_resource[0].len;
1349 /* Register vNIC device */
1350 enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1352 dev_err(enic, "vNIC registration failed, aborting\n");
1356 LIST_INIT(&enic->memzone_list);
1357 rte_spinlock_init(&enic->memzone_list_lock);
1359 vnic_register_cbacks(enic->vdev,
1360 enic_alloc_consistent,
1361 enic_free_consistent);
1363 /* Issue device open to get device in known state */
1364 err = enic_dev_open(enic);
1366 dev_err(enic, "vNIC dev open failed, aborting\n");
1367 goto err_out_unregister;
1370 /* Set ingress vlan rewrite mode before vnic initialization */
1371 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1372 IG_VLAN_REWRITE_MODE_PASS_THRU);
1375 "Failed to set ingress vlan rewrite mode, aborting.\n");
1376 goto err_out_dev_close;
1379 /* Issue device init to initialize the vnic-to-switch link.
1380 * We'll start with carrier off and wait for link UP
1381 * notification later to turn on carrier. We don't need
1382 * to wait here for the vnic-to-switch link initialization
1383 * to complete; link UP notification is the indication that
1384 * the process is complete.
1387 err = vnic_dev_init(enic->vdev, 0);
1389 dev_err(enic, "vNIC dev init failed, aborting\n");
1390 goto err_out_dev_close;
1393 err = enic_dev_init(enic);
1395 dev_err(enic, "Device initialization failed, aborting\n");
1396 goto err_out_dev_close;
1402 vnic_dev_close(enic->vdev);
1404 vnic_dev_unregister(enic->vdev);
1409 void enic_remove(struct enic *enic)
1411 enic_dev_deinit(enic);
1412 vnic_dev_close(enic->vdev);
1413 vnic_dev_unregister(enic->vdev);