2 * Copyright 2008-2014 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
5 * Copyright (c) 2014, Cisco Systems, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
43 #include <rte_memzone.h>
44 #include <rte_malloc.h>
46 #include <rte_string_fns.h>
47 #include <rte_ethdev.h>
49 #include "enic_compat.h"
51 #include "wq_enet_desc.h"
52 #include "rq_enet_desc.h"
53 #include "cq_enet_desc.h"
54 #include "vnic_enet.h"
59 #include "vnic_intr.h"
62 static inline int enic_is_sriov_vf(struct enic *enic)
64 return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
67 static int is_zero_addr(uint8_t *addr)
69 return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
72 static int is_mcast_addr(uint8_t *addr)
77 static int is_eth_addr_valid(uint8_t *addr)
79 return !is_mcast_addr(addr) && !is_zero_addr(addr);
83 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
87 if (!rq || !rq->mbuf_ring) {
88 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
92 for (i = 0; i < rq->ring.desc_count; i++) {
93 if (rq->mbuf_ring[i]) {
94 rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
95 rq->mbuf_ring[i] = NULL;
100 void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
102 vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
105 static void enic_free_wq_buf(struct vnic_wq_buf *buf)
107 struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
109 rte_pktmbuf_free_seg(mbuf);
113 static void enic_log_q_error(struct enic *enic)
118 for (i = 0; i < enic->wq_count; i++) {
119 error_status = vnic_wq_error_status(&enic->wq[i]);
121 dev_err(enic, "WQ[%d] error_status %d\n", i,
125 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
126 if (!enic->rq[i].in_use)
128 error_status = vnic_rq_error_status(&enic->rq[i]);
130 dev_err(enic, "RQ[%d] error_status %d\n", i,
135 static void enic_clear_soft_stats(struct enic *enic)
137 struct enic_soft_stats *soft_stats = &enic->soft_stats;
138 rte_atomic64_clear(&soft_stats->rx_nombuf);
139 rte_atomic64_clear(&soft_stats->rx_packet_errors);
142 static void enic_init_soft_stats(struct enic *enic)
144 struct enic_soft_stats *soft_stats = &enic->soft_stats;
145 rte_atomic64_init(&soft_stats->rx_nombuf);
146 rte_atomic64_init(&soft_stats->rx_packet_errors);
147 enic_clear_soft_stats(enic);
150 void enic_dev_stats_clear(struct enic *enic)
152 if (vnic_dev_stats_clear(enic->vdev))
153 dev_err(enic, "Error in clearing stats\n");
154 enic_clear_soft_stats(enic);
157 void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
159 struct vnic_stats *stats;
160 struct enic_soft_stats *soft_stats = &enic->soft_stats;
161 int64_t rx_truncated;
162 uint64_t rx_packet_errors;
164 if (vnic_dev_stats_dump(enic->vdev, &stats)) {
165 dev_err(enic, "Error in getting stats\n");
169 /* The number of truncated packets can only be calculated by
170 * subtracting a hardware counter from error packets received by
171 * the driver. Note: this causes transient inaccuracies in the
172 * ipackets count. Also, the length of truncated packets are
173 * counted in ibytes even though truncated packets are dropped
174 * which can make ibytes be slightly higher than it should be.
176 rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
177 rx_truncated = rx_packet_errors - stats->rx.rx_errors -
178 stats->rx.rx_no_bufs;
180 r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
181 r_stats->opackets = stats->tx.tx_frames_ok;
183 r_stats->ibytes = stats->rx.rx_bytes_ok;
184 r_stats->obytes = stats->tx.tx_bytes_ok;
186 r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
187 r_stats->oerrors = stats->tx.tx_errors;
189 r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
191 r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
194 void enic_del_mac_address(struct enic *enic)
196 if (vnic_dev_del_addr(enic->vdev, enic->mac_addr))
197 dev_err(enic, "del mac addr failed\n");
200 void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
204 if (!is_eth_addr_valid(mac_addr)) {
205 dev_err(enic, "invalid mac address\n");
209 err = vnic_dev_del_addr(enic->vdev, enic->mac_addr);
211 dev_err(enic, "del mac addr failed\n");
215 ether_addr_copy((struct ether_addr *)mac_addr,
216 (struct ether_addr *)enic->mac_addr);
218 err = vnic_dev_add_addr(enic->vdev, mac_addr);
220 dev_err(enic, "add mac addr failed\n");
226 enic_free_rq_buf(struct rte_mbuf **mbuf)
231 rte_pktmbuf_free(*mbuf);
235 void enic_init_vnic_resources(struct enic *enic)
237 unsigned int error_interrupt_enable = 1;
238 unsigned int error_interrupt_offset = 0;
239 unsigned int index = 0;
241 struct vnic_rq *data_rq;
243 for (index = 0; index < enic->rq_count; index++) {
244 cq_idx = enic_cq_rq(enic, enic_sop_rq(index));
246 vnic_rq_init(&enic->rq[enic_sop_rq(index)],
248 error_interrupt_enable,
249 error_interrupt_offset);
251 data_rq = &enic->rq[enic_data_rq(index)];
253 vnic_rq_init(data_rq,
255 error_interrupt_enable,
256 error_interrupt_offset);
258 vnic_cq_init(&enic->cq[cq_idx],
259 0 /* flow_control_enable */,
260 1 /* color_enable */,
263 1 /* cq_tail_color */,
264 0 /* interrupt_enable */,
265 1 /* cq_entry_enable */,
266 0 /* cq_message_enable */,
267 0 /* interrupt offset */,
268 0 /* cq_message_addr */);
271 for (index = 0; index < enic->wq_count; index++) {
272 vnic_wq_init(&enic->wq[index],
273 enic_cq_wq(enic, index),
274 error_interrupt_enable,
275 error_interrupt_offset);
277 cq_idx = enic_cq_wq(enic, index);
278 vnic_cq_init(&enic->cq[cq_idx],
279 0 /* flow_control_enable */,
280 1 /* color_enable */,
283 1 /* cq_tail_color */,
284 0 /* interrupt_enable */,
285 0 /* cq_entry_enable */,
286 1 /* cq_message_enable */,
287 0 /* interrupt offset */,
288 (u64)enic->wq[index].cqmsg_rz->phys_addr);
291 vnic_intr_init(&enic->intr,
292 enic->config.intr_timer_usec,
293 enic->config.intr_timer_type,
294 /*mask_on_assertion*/1);
299 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
302 struct rq_enet_desc *rqd = rq->ring.descs;
309 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
310 rq->ring.desc_count);
312 for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
313 mb = rte_mbuf_raw_alloc(rq->mp);
315 dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
316 (unsigned)rq->index);
320 mb->data_off = RTE_PKTMBUF_HEADROOM;
321 dma_addr = (dma_addr_t)(mb->buf_physaddr
322 + RTE_PKTMBUF_HEADROOM);
323 rq_enet_desc_enc(rqd, dma_addr,
324 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
325 : RQ_ENET_TYPE_NOT_SOP),
326 mb->buf_len - RTE_PKTMBUF_HEADROOM);
327 rq->mbuf_ring[i] = mb;
330 /* make sure all prior writes are complete before doing the PIO write */
333 /* Post all but the last buffer to VIC. */
334 rq->posted_index = rq->ring.desc_count - 1;
338 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
339 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
340 iowrite32(rq->posted_index, &rq->ctrl->posted_index);
341 iowrite32(0, &rq->ctrl->fetch_index);
349 enic_alloc_consistent(void *priv, size_t size,
350 dma_addr_t *dma_handle, u8 *name)
353 const struct rte_memzone *rz;
355 struct enic *enic = (struct enic *)priv;
356 struct enic_memzone_entry *mze;
358 rz = rte_memzone_reserve_aligned((const char *)name,
359 size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
361 pr_err("%s : Failed to allocate memory requested for %s\n",
367 *dma_handle = (dma_addr_t)rz->phys_addr;
369 mze = rte_malloc("enic memzone entry",
370 sizeof(struct enic_memzone_entry), 0);
373 pr_err("%s : Failed to allocate memory for memzone list\n",
375 rte_memzone_free(rz);
380 rte_spinlock_lock(&enic->memzone_list_lock);
381 LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
382 rte_spinlock_unlock(&enic->memzone_list_lock);
388 enic_free_consistent(void *priv,
389 __rte_unused size_t size,
391 dma_addr_t dma_handle)
393 struct enic_memzone_entry *mze;
394 struct enic *enic = (struct enic *)priv;
396 rte_spinlock_lock(&enic->memzone_list_lock);
397 LIST_FOREACH(mze, &enic->memzone_list, entries) {
398 if (mze->rz->addr == vaddr &&
399 mze->rz->phys_addr == dma_handle)
403 rte_spinlock_unlock(&enic->memzone_list_lock);
405 "Tried to free memory, but couldn't find it in the memzone list\n");
408 LIST_REMOVE(mze, entries);
409 rte_spinlock_unlock(&enic->memzone_list_lock);
410 rte_memzone_free(mze->rz);
414 int enic_link_update(struct enic *enic)
416 struct rte_eth_dev *eth_dev = enic->rte_dev;
420 link_status = enic_get_link_status(enic);
421 ret = (link_status == enic->link_status);
422 enic->link_status = link_status;
423 eth_dev->data->dev_link.link_status = link_status;
424 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
425 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
430 enic_intr_handler(__rte_unused struct rte_intr_handle *handle,
433 struct rte_eth_dev *dev = (struct rte_eth_dev *)arg;
434 struct enic *enic = pmd_priv(dev);
436 vnic_intr_return_all_credits(&enic->intr);
438 enic_link_update(enic);
439 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
440 enic_log_q_error(enic);
443 int enic_enable(struct enic *enic)
447 struct rte_eth_dev *eth_dev = enic->rte_dev;
449 eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
450 eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
452 /* vnic notification of link status has already been turned on in
453 * enic_dev_init() which is called during probe time. Here we are
454 * just turning on interrupt vector 0 if needed.
456 if (eth_dev->data->dev_conf.intr_conf.lsc)
457 vnic_dev_notify_set(enic->vdev, 0);
459 if (enic_clsf_init(enic))
460 dev_warning(enic, "Init of hash table for clsf failed."\
461 "Flow director feature will not work\n");
463 for (index = 0; index < enic->rq_count; index++) {
464 err = enic_alloc_rx_queue_mbufs(enic,
465 &enic->rq[enic_sop_rq(index)]);
467 dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
470 err = enic_alloc_rx_queue_mbufs(enic,
471 &enic->rq[enic_data_rq(index)]);
473 /* release the allocated mbufs for the sop rq*/
474 enic_rxmbuf_queue_release(enic,
475 &enic->rq[enic_sop_rq(index)]);
477 dev_err(enic, "Failed to alloc data RX queue mbufs\n");
482 for (index = 0; index < enic->wq_count; index++)
483 enic_start_wq(enic, index);
484 for (index = 0; index < enic->rq_count; index++)
485 enic_start_rq(enic, index);
487 vnic_dev_add_addr(enic->vdev, enic->mac_addr);
489 vnic_dev_enable_wait(enic->vdev);
491 /* Register and enable error interrupt */
492 rte_intr_callback_register(&(enic->pdev->intr_handle),
493 enic_intr_handler, (void *)enic->rte_dev);
495 rte_intr_enable(&(enic->pdev->intr_handle));
496 vnic_intr_unmask(&enic->intr);
501 int enic_alloc_intr_resources(struct enic *enic)
505 dev_info(enic, "vNIC resources used: "\
506 "wq %d rq %d cq %d intr %d\n",
507 enic->wq_count, enic_vnic_rq_count(enic),
508 enic->cq_count, enic->intr_count);
510 err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
512 enic_free_vnic_resources(enic);
517 void enic_free_rq(void *rxq)
519 struct vnic_rq *rq_sop, *rq_data;
525 rq_sop = (struct vnic_rq *)rxq;
526 enic = vnic_dev_priv(rq_sop->vdev);
527 rq_data = &enic->rq[rq_sop->data_queue_idx];
529 enic_rxmbuf_queue_release(enic, rq_sop);
531 enic_rxmbuf_queue_release(enic, rq_data);
533 rte_free(rq_sop->mbuf_ring);
535 rte_free(rq_data->mbuf_ring);
537 rq_sop->mbuf_ring = NULL;
538 rq_data->mbuf_ring = NULL;
540 vnic_rq_free(rq_sop);
542 vnic_rq_free(rq_data);
544 vnic_cq_free(&enic->cq[rq_sop->index]);
550 void enic_start_wq(struct enic *enic, uint16_t queue_idx)
552 struct rte_eth_dev *eth_dev = enic->rte_dev;
553 vnic_wq_enable(&enic->wq[queue_idx]);
554 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
557 int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
559 struct rte_eth_dev *eth_dev = enic->rte_dev;
562 ret = vnic_wq_disable(&enic->wq[queue_idx]);
566 eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
570 void enic_start_rq(struct enic *enic, uint16_t queue_idx)
572 struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
573 struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
574 struct rte_eth_dev *eth_dev = enic->rte_dev;
577 vnic_rq_enable(rq_data);
579 vnic_rq_enable(rq_sop);
580 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
583 int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
585 int ret1 = 0, ret2 = 0;
586 struct rte_eth_dev *eth_dev = enic->rte_dev;
587 struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
588 struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
590 ret2 = vnic_rq_disable(rq_sop);
593 ret1 = vnic_rq_disable(rq_data);
600 eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
604 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
605 unsigned int socket_id, struct rte_mempool *mp,
609 uint16_t sop_queue_idx = enic_sop_rq(queue_idx);
610 uint16_t data_queue_idx = enic_data_rq(queue_idx);
611 struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
612 struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
613 unsigned int mbuf_size, mbufs_per_pkt;
614 unsigned int nb_sop_desc, nb_data_desc;
615 uint16_t min_sop, max_sop, min_data, max_data;
616 uint16_t mtu = enic->rte_dev->data->mtu;
619 rq_sop->data_queue_idx = data_queue_idx;
621 rq_data->data_queue_idx = 0;
622 rq_sop->socket_id = socket_id;
624 rq_data->socket_id = socket_id;
628 mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
629 RTE_PKTMBUF_HEADROOM);
631 if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
632 dev_info(enic, "Rq %u Scatter rx mode enabled\n", queue_idx);
633 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
634 mbufs_per_pkt = ((mtu + ETHER_HDR_LEN + 4) +
635 (mbuf_size - 1)) / mbuf_size;
637 dev_info(enic, "Scatter rx mode disabled\n");
641 if (mbufs_per_pkt > 1) {
642 dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx);
643 rq_sop->data_queue_enable = 1;
646 dev_info(enic, "Rq %u Scatter rx mode not being used\n",
648 rq_sop->data_queue_enable = 0;
652 /* number of descriptors have to be a multiple of 32 */
653 nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
654 nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
656 rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
657 rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
659 if (mbufs_per_pkt > 1) {
661 max_sop = ((enic->config.rq_desc_count /
662 (mbufs_per_pkt - 1)) & ~0x1F);
663 min_data = min_sop * (mbufs_per_pkt - 1);
664 max_data = enic->config.rq_desc_count;
667 max_sop = enic->config.rq_desc_count;
672 if (nb_desc < (min_sop + min_data)) {
674 "Number of rx descs too low, adjusting to minimum\n");
675 nb_sop_desc = min_sop;
676 nb_data_desc = min_data;
677 } else if (nb_desc > (max_sop + max_data)) {
679 "Number of rx_descs too high, adjusting to maximum\n");
680 nb_sop_desc = max_sop;
681 nb_data_desc = max_data;
683 if (mbufs_per_pkt > 1) {
684 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
685 mtu, mbuf_size, min_sop + min_data,
688 dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
689 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
691 /* Allocate sop queue resources */
692 rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
693 nb_sop_desc, sizeof(struct rq_enet_desc));
695 dev_err(enic, "error in allocation of sop rq\n");
698 nb_sop_desc = rq_sop->ring.desc_count;
700 if (rq_data->in_use) {
701 /* Allocate data queue resources */
702 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
704 sizeof(struct rq_enet_desc));
706 dev_err(enic, "error in allocation of data rq\n");
707 goto err_free_rq_sop;
709 nb_data_desc = rq_data->ring.desc_count;
711 rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
712 socket_id, nb_sop_desc + nb_data_desc,
713 sizeof(struct cq_enet_rq_desc));
715 dev_err(enic, "error in allocation of cq for rq\n");
716 goto err_free_rq_data;
719 /* Allocate the mbuf rings */
720 rq_sop->mbuf_ring = (struct rte_mbuf **)
721 rte_zmalloc_socket("rq->mbuf_ring",
722 sizeof(struct rte_mbuf *) * nb_sop_desc,
723 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
724 if (rq_sop->mbuf_ring == NULL)
727 if (rq_data->in_use) {
728 rq_data->mbuf_ring = (struct rte_mbuf **)
729 rte_zmalloc_socket("rq->mbuf_ring",
730 sizeof(struct rte_mbuf *) * nb_data_desc,
731 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
732 if (rq_data->mbuf_ring == NULL)
733 goto err_free_sop_mbuf;
736 rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */
741 rte_free(rq_sop->mbuf_ring);
743 /* cleanup on error */
744 vnic_cq_free(&enic->cq[queue_idx]);
747 vnic_rq_free(rq_data);
749 vnic_rq_free(rq_sop);
754 void enic_free_wq(void *txq)
762 wq = (struct vnic_wq *)txq;
763 enic = vnic_dev_priv(wq->vdev);
764 rte_memzone_free(wq->cqmsg_rz);
766 vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
769 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
770 unsigned int socket_id, uint16_t nb_desc)
773 struct vnic_wq *wq = &enic->wq[queue_idx];
774 unsigned int cq_index = enic_cq_wq(enic, queue_idx);
778 wq->socket_id = socket_id;
780 if (nb_desc > enic->config.wq_desc_count) {
782 "WQ %d - number of tx desc in cmd line (%d)"\
783 "is greater than that in the UCSM/CIMC adapter"\
784 "policy. Applying the value in the adapter "\
786 queue_idx, nb_desc, enic->config.wq_desc_count);
787 } else if (nb_desc != enic->config.wq_desc_count) {
788 enic->config.wq_desc_count = nb_desc;
790 "TX Queues - effective number of descs:%d\n",
795 /* Allocate queue resources */
796 err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
797 enic->config.wq_desc_count,
798 sizeof(struct wq_enet_desc));
800 dev_err(enic, "error in allocation of wq\n");
804 err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
805 socket_id, enic->config.wq_desc_count,
806 sizeof(struct cq_enet_wq_desc));
809 dev_err(enic, "error in allocation of cq for wq\n");
812 /* setup up CQ message */
813 snprintf((char *)name, sizeof(name),
814 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
817 wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
827 int enic_disable(struct enic *enic)
832 vnic_intr_mask(&enic->intr);
833 (void)vnic_intr_masked(&enic->intr); /* flush write */
834 rte_intr_disable(&enic->pdev->intr_handle);
835 rte_intr_callback_unregister(&enic->pdev->intr_handle,
837 (void *)enic->rte_dev);
839 vnic_dev_disable(enic->vdev);
841 enic_clsf_destroy(enic);
843 if (!enic_is_sriov_vf(enic))
844 vnic_dev_del_addr(enic->vdev, enic->mac_addr);
846 for (i = 0; i < enic->wq_count; i++) {
847 err = vnic_wq_disable(&enic->wq[i]);
851 for (i = 0; i < enic_vnic_rq_count(enic); i++) {
852 if (enic->rq[i].in_use) {
853 err = vnic_rq_disable(&enic->rq[i]);
859 /* If we were using interrupts, set the interrupt vector to -1
860 * to disable interrupts. We are not disabling link notifcations,
861 * though, as we want the polling of link status to continue working.
863 if (enic->rte_dev->data->dev_conf.intr_conf.lsc)
864 vnic_dev_notify_set(enic->vdev, -1);
866 vnic_dev_set_reset_flag(enic->vdev, 1);
868 for (i = 0; i < enic->wq_count; i++)
869 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
871 for (i = 0; i < enic_vnic_rq_count(enic); i++)
872 if (enic->rq[i].in_use)
873 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
874 for (i = 0; i < enic->cq_count; i++)
875 vnic_cq_clean(&enic->cq[i]);
876 vnic_intr_clean(&enic->intr);
881 static int enic_dev_wait(struct vnic_dev *vdev,
882 int (*start)(struct vnic_dev *, int),
883 int (*finished)(struct vnic_dev *, int *),
890 err = start(vdev, arg);
894 /* Wait for func to complete...2 seconds max */
895 for (i = 0; i < 2000; i++) {
896 err = finished(vdev, &done);
906 static int enic_dev_open(struct enic *enic)
910 err = enic_dev_wait(enic->vdev, vnic_dev_open,
911 vnic_dev_open_done, 0);
913 dev_err(enic_get_dev(enic),
914 "vNIC device open failed, err %d\n", err);
919 static int enic_set_rsskey(struct enic *enic)
921 dma_addr_t rss_key_buf_pa;
922 union vnic_rss_key *rss_key_buf_va = NULL;
923 static union vnic_rss_key rss_key = {
925 [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
926 [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
927 [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
928 [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
934 snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
935 rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
936 &rss_key_buf_pa, name);
940 rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
942 err = enic_set_rss_key(enic,
944 sizeof(union vnic_rss_key));
946 enic_free_consistent(enic, sizeof(union vnic_rss_key),
947 rss_key_buf_va, rss_key_buf_pa);
952 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
954 dma_addr_t rss_cpu_buf_pa;
955 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
960 snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
961 rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
962 &rss_cpu_buf_pa, name);
966 for (i = 0; i < (1 << rss_hash_bits); i++)
967 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
968 enic_sop_rq(i % enic->rq_count);
970 err = enic_set_rss_cpu(enic,
972 sizeof(union vnic_rss_cpu));
974 enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
975 rss_cpu_buf_va, rss_cpu_buf_pa);
980 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
981 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
983 const u8 tso_ipid_split_en = 0;
986 /* Enable VLAN tag stripping */
988 err = enic_set_nic_cfg(enic,
989 rss_default_cpu, rss_hash_type,
990 rss_hash_bits, rss_base_cpu,
991 rss_enable, tso_ipid_split_en,
992 enic->ig_vlan_strip_en);
997 int enic_set_rss_nic_cfg(struct enic *enic)
999 const u8 rss_default_cpu = 0;
1000 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1001 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1002 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1003 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1004 const u8 rss_hash_bits = 7;
1005 const u8 rss_base_cpu = 0;
1006 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1009 if (!enic_set_rsskey(enic)) {
1010 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1012 dev_warning(enic, "RSS disabled, "\
1013 "Failed to set RSS cpu indirection table.");
1018 "RSS disabled, Failed to set RSS key.\n");
1022 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1023 rss_hash_bits, rss_base_cpu, rss_enable);
1026 int enic_setup_finish(struct enic *enic)
1030 enic_init_soft_stats(enic);
1032 ret = enic_set_rss_nic_cfg(enic);
1034 dev_err(enic, "Failed to config nic, aborting.\n");
1039 vnic_dev_packet_filter(enic->vdev,
1052 void enic_add_packet_filter(struct enic *enic)
1054 /* Args -> directed, multicast, broadcast, promisc, allmulti */
1055 vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1056 enic->promisc, enic->allmulti);
1059 int enic_get_link_status(struct enic *enic)
1061 return vnic_dev_link_status(enic->vdev);
1064 static void enic_dev_deinit(struct enic *enic)
1066 struct rte_eth_dev *eth_dev = enic->rte_dev;
1068 /* stop link status checking */
1069 vnic_dev_notify_unset(enic->vdev);
1071 rte_free(eth_dev->data->mac_addrs);
1075 int enic_set_vnic_res(struct enic *enic)
1077 struct rte_eth_dev *eth_dev = enic->rte_dev;
1080 /* With Rx scatter support, two RQs are now used per RQ used by
1083 if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1084 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1085 eth_dev->data->nb_rx_queues,
1086 eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1089 if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1090 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1091 eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1095 if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1096 eth_dev->data->nb_tx_queues)) {
1097 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1098 (eth_dev->data->nb_rx_queues +
1099 eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1104 enic->rq_count = eth_dev->data->nb_rx_queues;
1105 enic->wq_count = eth_dev->data->nb_tx_queues;
1106 enic->cq_count = enic->rq_count + enic->wq_count;
1112 /* Initialize the completion queue for an RQ */
1114 enic_reinit_rq(struct enic *enic, unsigned int rq_idx)
1116 struct vnic_rq *sop_rq, *data_rq;
1117 unsigned int cq_idx = enic_cq_rq(enic, rq_idx);
1120 sop_rq = &enic->rq[enic_sop_rq(rq_idx)];
1121 data_rq = &enic->rq[enic_data_rq(rq_idx)];
1123 vnic_cq_clean(&enic->cq[cq_idx]);
1124 vnic_cq_init(&enic->cq[cq_idx],
1125 0 /* flow_control_enable */,
1126 1 /* color_enable */,
1129 1 /* cq_tail_color */,
1130 0 /* interrupt_enable */,
1131 1 /* cq_entry_enable */,
1132 0 /* cq_message_enable */,
1133 0 /* interrupt offset */,
1134 0 /* cq_message_addr */);
1137 vnic_rq_init_start(sop_rq, enic_cq_rq(enic, enic_sop_rq(rq_idx)),
1138 0, sop_rq->ring.desc_count - 1, 1, 0);
1139 if (data_rq->in_use) {
1140 vnic_rq_init_start(data_rq,
1141 enic_cq_rq(enic, enic_data_rq(rq_idx)),
1142 0, data_rq->ring.desc_count - 1, 1, 0);
1145 rc = enic_alloc_rx_queue_mbufs(enic, sop_rq);
1149 if (data_rq->in_use) {
1150 rc = enic_alloc_rx_queue_mbufs(enic, data_rq);
1152 enic_rxmbuf_queue_release(enic, sop_rq);
1160 /* The Cisco NIC can send and receive packets up to a max packet size
1161 * determined by the NIC type and firmware. There is also an MTU
1162 * configured into the NIC via the CIMC/UCSM management interface
1163 * which can be overridden by this function (up to the max packet size).
1164 * Depending on the network setup, doing so may cause packet drops
1165 * and unexpected behavior.
1167 int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1169 unsigned int rq_idx;
1172 uint16_t old_mtu; /* previous setting */
1173 uint16_t config_mtu; /* Value configured into NIC via CIMC/UCSM */
1174 struct rte_eth_dev *eth_dev = enic->rte_dev;
1176 old_mtu = eth_dev->data->mtu;
1177 config_mtu = enic->config.mtu;
1179 if (new_mtu > enic->max_mtu) {
1181 "MTU not updated: requested (%u) greater than max (%u)\n",
1182 new_mtu, enic->max_mtu);
1185 if (new_mtu < ENIC_MIN_MTU) {
1187 "MTU not updated: requested (%u) less than min (%u)\n",
1188 new_mtu, ENIC_MIN_MTU);
1191 if (new_mtu > config_mtu)
1193 "MTU (%u) is greater than value configured in NIC (%u)\n",
1194 new_mtu, config_mtu);
1196 /* The easy case is when scatter is disabled. However if the MTU
1197 * becomes greater than the mbuf data size, packet drops will ensue.
1199 if (!enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
1200 eth_dev->data->mtu = new_mtu;
1204 /* Rx scatter is enabled so reconfigure RQ's on the fly. The point is to
1205 * change Rx scatter mode if necessary for better performance. I.e. if
1206 * MTU was greater than the mbuf size and now it's less, scatter Rx
1207 * doesn't have to be used and vice versa.
1209 rte_spinlock_lock(&enic->mtu_lock);
1211 /* Stop traffic on all RQs */
1212 for (rq_idx = 0; rq_idx < enic->rq_count * 2; rq_idx++) {
1213 rq = &enic->rq[rq_idx];
1214 if (rq->is_sop && rq->in_use) {
1215 rc = enic_stop_rq(enic, enic_rq_sop(rq_idx));
1217 dev_err(enic, "Failed to stop Rq %u\n", rq_idx);
1223 /* replace Rx funciton with a no-op to avoid getting stale pkts */
1224 eth_dev->rx_pkt_burst = enic_dummy_recv_pkts;
1227 /* Allow time for threads to exit the real Rx function. */
1230 /* now it is safe to reconfigure the RQs */
1232 /* update the mtu */
1233 eth_dev->data->mtu = new_mtu;
1235 /* free and reallocate RQs with the new MTU */
1236 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1237 rq = &enic->rq[enic_sop_rq(rq_idx)];
1240 rc = enic_alloc_rq(enic, rq_idx, rq->socket_id, rq->mp,
1244 "Fatal MTU alloc error- No traffic will pass\n");
1248 rc = enic_reinit_rq(enic, rq_idx);
1251 "Fatal MTU RQ reinit- No traffic will pass\n");
1256 /* put back the real receive function */
1258 eth_dev->rx_pkt_burst = enic_recv_pkts;
1261 /* restart Rx traffic */
1262 for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1263 rq = &enic->rq[enic_sop_rq(rq_idx)];
1264 if (rq->is_sop && rq->in_use)
1265 enic_start_rq(enic, rq_idx);
1269 dev_info(enic, "MTU changed from %u to %u\n", old_mtu, new_mtu);
1270 rte_spinlock_unlock(&enic->mtu_lock);
1274 static int enic_dev_init(struct enic *enic)
1277 struct rte_eth_dev *eth_dev = enic->rte_dev;
1279 vnic_dev_intr_coal_timer_info_default(enic->vdev);
1281 /* Get vNIC configuration
1283 err = enic_get_vnic_config(enic);
1285 dev_err(dev, "Get vNIC configuration failed, aborting\n");
1289 /* Get available resource counts */
1290 enic_get_res_counts(enic);
1291 if (enic->conf_rq_count == 1) {
1292 dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n");
1293 dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n");
1294 dev_err(enic, "See the ENIC PMD guide for more information.\n");
1298 /* Get the supported filters */
1299 enic_fdir_info(enic);
1301 eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN, 0);
1302 if (!eth_dev->data->mac_addrs) {
1303 dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1306 ether_addr_copy((struct ether_addr *) enic->mac_addr,
1307 ð_dev->data->mac_addrs[0]);
1309 vnic_dev_set_reset_flag(enic->vdev, 0);
1311 /* set up link status checking */
1312 vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
1318 int enic_probe(struct enic *enic)
1320 struct rte_pci_device *pdev = enic->pdev;
1323 dev_debug(enic, " Initializing ENIC PMD\n");
1325 enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1326 enic->bar0.len = pdev->mem_resource[0].len;
1328 /* Register vNIC device */
1329 enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1331 dev_err(enic, "vNIC registration failed, aborting\n");
1335 LIST_INIT(&enic->memzone_list);
1336 rte_spinlock_init(&enic->memzone_list_lock);
1338 vnic_register_cbacks(enic->vdev,
1339 enic_alloc_consistent,
1340 enic_free_consistent);
1342 /* Issue device open to get device in known state */
1343 err = enic_dev_open(enic);
1345 dev_err(enic, "vNIC dev open failed, aborting\n");
1346 goto err_out_unregister;
1349 /* Set ingress vlan rewrite mode before vnic initialization */
1350 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1351 IG_VLAN_REWRITE_MODE_PASS_THRU);
1354 "Failed to set ingress vlan rewrite mode, aborting.\n");
1355 goto err_out_dev_close;
1358 /* Issue device init to initialize the vnic-to-switch link.
1359 * We'll start with carrier off and wait for link UP
1360 * notification later to turn on carrier. We don't need
1361 * to wait here for the vnic-to-switch link initialization
1362 * to complete; link UP notification is the indication that
1363 * the process is complete.
1366 err = vnic_dev_init(enic->vdev, 0);
1368 dev_err(enic, "vNIC dev init failed, aborting\n");
1369 goto err_out_dev_close;
1372 err = enic_dev_init(enic);
1374 dev_err(enic, "Device initialization failed, aborting\n");
1375 goto err_out_dev_close;
1381 vnic_dev_close(enic->vdev);
1383 vnic_dev_unregister(enic->vdev);
1388 void enic_remove(struct enic *enic)
1390 enic_dev_deinit(enic);
1391 vnic_dev_close(enic->vdev);
1392 vnic_dev_unregister(enic->vdev);