1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
6 #include "enic_compat.h"
7 #include "ethdev_driver.h"
8 #include "wq_enet_desc.h"
9 #include "rq_enet_desc.h"
10 #include "cq_enet_desc.h"
11 #include "vnic_resource.h"
12 #include "vnic_enet.h"
17 #include "vnic_intr.h"
18 #include "vnic_stats.h"
24 int enic_get_vnic_config(struct enic *enic)
26 struct vnic_enet_config *c = &enic->config;
30 err = vnic_dev_get_mac_addr(enic->vdev, enic->mac_addr);
32 dev_err(enic_get_dev(enic),
33 "Error getting MAC addr, %d\n", err);
38 #define GET_CONFIG(m) \
40 err = vnic_dev_spec(enic->vdev, \
41 offsetof(struct vnic_enet_config, m), \
42 sizeof(c->m), &c->m); \
44 dev_err(enic_get_dev(enic), \
45 "Error getting %s, %d\n", #m, err); \
51 GET_CONFIG(wq_desc_count);
52 GET_CONFIG(rq_desc_count);
54 GET_CONFIG(intr_timer_type);
55 GET_CONFIG(intr_mode);
56 GET_CONFIG(intr_timer_usec);
59 GET_CONFIG(max_pkt_size);
61 /* max packet size is only defined in newer VIC firmware
62 * and will be 0 for legacy firmware and VICs
64 if (c->max_pkt_size > ENIC_DEFAULT_RX_MAX_PKT_SIZE)
65 enic->max_mtu = c->max_pkt_size - RTE_ETHER_HDR_LEN;
67 enic->max_mtu = ENIC_DEFAULT_RX_MAX_PKT_SIZE -
72 enic->rte_dev->data->mtu = RTE_MIN(enic->max_mtu,
73 RTE_MAX((uint16_t)ENIC_MIN_MTU, c->mtu));
75 enic->adv_filters = vnic_dev_capable_adv_filters(enic->vdev);
76 dev_info(enic, "Advanced Filters %savailable\n", ((enic->adv_filters)
79 err = vnic_dev_capable_filter_mode(enic->vdev, &enic->flow_filter_mode,
80 &enic->filter_actions);
82 dev_err(enic_get_dev(enic),
83 "Error getting filter modes, %d\n", err);
86 vnic_dev_capable_udp_rss_weak(enic->vdev, &enic->nic_cfg_chk,
89 dev_info(enic, "Flow api filter mode: %s Actions: %s%s%s%s\n",
90 ((enic->flow_filter_mode == FILTER_FLOWMAN) ? "FLOWMAN" :
91 ((enic->flow_filter_mode == FILTER_DPDK_1) ? "DPDK" :
92 ((enic->flow_filter_mode == FILTER_USNIC_IP) ? "USNIC" :
93 ((enic->flow_filter_mode == FILTER_IPV4_5TUPLE) ? "5TUPLE" :
95 ((enic->filter_actions & FILTER_ACTION_RQ_STEERING_FLAG) ?
97 ((enic->filter_actions & FILTER_ACTION_FILTER_ID_FLAG) ?
99 ((enic->filter_actions & FILTER_ACTION_DROP_FLAG) ?
101 ((enic->filter_actions & FILTER_ACTION_COUNTER_FLAG) ?
104 c->wq_desc_count = RTE_MIN((uint32_t)ENIC_MAX_WQ_DESCS,
105 RTE_MAX((uint32_t)ENIC_MIN_WQ_DESCS, c->wq_desc_count));
106 c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
108 c->rq_desc_count = RTE_MIN((uint32_t)ENIC_MAX_RQ_DESCS,
109 RTE_MAX((uint32_t)ENIC_MIN_RQ_DESCS, c->rq_desc_count));
110 c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
112 c->intr_timer_usec = RTE_MIN(c->intr_timer_usec,
113 vnic_dev_get_intr_coal_timer_max(enic->vdev));
115 dev_info(enic_get_dev(enic),
116 "vNIC MAC addr %02x:%02x:%02x:%02x:%02x:%02x "
117 "wq/rq %d/%d mtu %d, max mtu:%d\n",
118 enic->mac_addr[0], enic->mac_addr[1], enic->mac_addr[2],
119 enic->mac_addr[3], enic->mac_addr[4], enic->mac_addr[5],
120 c->wq_desc_count, c->rq_desc_count,
121 enic->rte_dev->data->mtu, enic->max_mtu);
122 dev_info(enic_get_dev(enic), "vNIC csum tx/rx %s/%s "
123 "rss %s intr mode %s type %s timer %d usec "
124 "loopback tag 0x%04x\n",
125 ENIC_SETTING(enic, TXCSUM) ? "yes" : "no",
126 ENIC_SETTING(enic, RXCSUM) ? "yes" : "no",
127 ENIC_SETTING(enic, RSS) ?
128 (ENIC_SETTING(enic, RSSHASH_UDPIPV4) ? "+UDP" :
129 ((enic->udp_rss_weak ? "+udp" :
131 c->intr_mode == VENET_INTR_MODE_INTX ? "INTx" :
132 c->intr_mode == VENET_INTR_MODE_MSI ? "MSI" :
133 c->intr_mode == VENET_INTR_MODE_ANY ? "any" :
135 c->intr_timer_type == VENET_INTR_TYPE_MIN ? "min" :
136 c->intr_timer_type == VENET_INTR_TYPE_IDLE ? "idle" :
141 /* RSS settings from vNIC */
142 enic->reta_size = ENIC_RSS_RETA_SIZE;
143 enic->hash_key_size = ENIC_RSS_HASH_KEY_SIZE;
144 enic->flow_type_rss_offloads = 0;
145 if (ENIC_SETTING(enic, RSSHASH_IPV4))
147 * IPV4 hash type handles both non-frag and frag packet types.
148 * TCP/UDP is controlled via a separate flag below.
150 enic->flow_type_rss_offloads |= ETH_RSS_IPV4 |
151 ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_OTHER;
152 if (ENIC_SETTING(enic, RSSHASH_TCPIPV4))
153 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV4_TCP;
154 if (ENIC_SETTING(enic, RSSHASH_IPV6))
156 * The VIC adapter can perform RSS on IPv6 packets with and
157 * without extension headers. An IPv6 "fragment" is an IPv6
158 * packet with the fragment extension header.
160 enic->flow_type_rss_offloads |= ETH_RSS_IPV6 |
161 ETH_RSS_IPV6_EX | ETH_RSS_FRAG_IPV6 |
162 ETH_RSS_NONFRAG_IPV6_OTHER;
163 if (ENIC_SETTING(enic, RSSHASH_TCPIPV6))
164 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV6_TCP |
166 if (enic->udp_rss_weak)
167 enic->flow_type_rss_offloads |=
168 ETH_RSS_NONFRAG_IPV4_UDP | ETH_RSS_NONFRAG_IPV6_UDP |
170 if (ENIC_SETTING(enic, RSSHASH_UDPIPV4))
171 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV4_UDP;
172 if (ENIC_SETTING(enic, RSSHASH_UDPIPV6))
173 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV6_UDP |
176 /* Zero offloads if RSS is not enabled */
177 if (!ENIC_SETTING(enic, RSS))
178 enic->flow_type_rss_offloads = 0;
180 enic->vxlan = ENIC_SETTING(enic, VXLAN) &&
181 vnic_dev_capable_vxlan(enic->vdev);
182 if (vnic_dev_capable_geneve(enic->vdev)) {
183 dev_info(NULL, "Geneve with options offload available\n");
184 enic->geneve_opt_avail = 1;
186 /* Supported CQ entry sizes */
187 enic->cq_entry_sizes = vnic_dev_capable_cq_entry_size(enic->vdev);
188 sizes = enic->cq_entry_sizes;
189 dev_debug(NULL, "Supported CQ entry sizes:%s%s%s\n",
190 (sizes & VNIC_RQ_CQ_ENTRY_SIZE_16_CAPABLE) ? " 16" : "",
191 (sizes & VNIC_RQ_CQ_ENTRY_SIZE_32_CAPABLE) ? " 32" : "",
192 (sizes & VNIC_RQ_CQ_ENTRY_SIZE_64_CAPABLE) ? " 64" : "");
193 /* Use 64B entry if requested and available */
194 enic->cq64 = enic->cq64_request &&
195 (sizes & VNIC_RQ_CQ_ENTRY_SIZE_64_CAPABLE);
196 dev_debug(NULL, "Using %sB CQ entry size\n", enic->cq64 ? "64" : "16");
199 * Default hardware capabilities. enic_dev_init() may add additional
200 * flags if it enables overlay offloads.
202 enic->tx_queue_offload_capa = 0;
203 enic->tx_offload_capa =
204 enic->tx_queue_offload_capa |
205 DEV_TX_OFFLOAD_MULTI_SEGS |
206 DEV_TX_OFFLOAD_VLAN_INSERT |
207 DEV_TX_OFFLOAD_IPV4_CKSUM |
208 DEV_TX_OFFLOAD_UDP_CKSUM |
209 DEV_TX_OFFLOAD_TCP_CKSUM |
210 DEV_TX_OFFLOAD_TCP_TSO;
211 enic->rx_offload_capa =
212 DEV_RX_OFFLOAD_SCATTER |
213 DEV_RX_OFFLOAD_JUMBO_FRAME |
214 DEV_RX_OFFLOAD_VLAN_STRIP |
215 DEV_RX_OFFLOAD_IPV4_CKSUM |
216 DEV_RX_OFFLOAD_UDP_CKSUM |
217 DEV_RX_OFFLOAD_TCP_CKSUM |
218 DEV_RX_OFFLOAD_RSS_HASH;
219 enic->tx_offload_mask =
230 int enic_set_nic_cfg(struct enic *enic, uint8_t rss_default_cpu,
231 uint8_t rss_hash_type, uint8_t rss_hash_bits,
232 uint8_t rss_base_cpu, uint8_t rss_enable,
233 uint8_t tso_ipid_split_en, uint8_t ig_vlan_strip_en)
235 enum vnic_devcmd_cmd cmd;
240 vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
241 rss_hash_type, rss_hash_bits, rss_base_cpu,
242 rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
246 cmd = enic->nic_cfg_chk ? CMD_NIC_CFG_CHK : CMD_NIC_CFG;
247 return vnic_dev_cmd(enic->vdev, cmd, &a0, &a1, wait);
250 int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, uint64_t len)
252 uint64_t a0 = (uint64_t)key_pa, a1 = len;
255 return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
258 int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, uint64_t len)
260 uint64_t a0 = (uint64_t)cpu_pa, a1 = len;
263 return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
266 void enic_free_vnic_resources(struct enic *enic)
270 for (i = 0; i < enic->wq_count; i++)
271 vnic_wq_free(&enic->wq[i]);
272 for (i = 0; i < enic_vnic_rq_count(enic); i++)
273 if (enic->rq[i].in_use)
274 vnic_rq_free(&enic->rq[i]);
275 for (i = 0; i < enic->cq_count; i++)
276 vnic_cq_free(&enic->cq[i]);
277 for (i = 0; i < enic->intr_count; i++)
278 vnic_intr_free(&enic->intr[i]);
281 void enic_get_res_counts(struct enic *enic)
283 enic->conf_wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
284 enic->conf_rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
285 enic->conf_cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
286 enic->conf_intr_count = vnic_dev_get_res_count(enic->vdev,
289 dev_info(enic_get_dev(enic),
290 "vNIC resources avail: wq %d rq %d cq %d intr %d\n",
291 enic->conf_wq_count, enic->conf_rq_count,
292 enic->conf_cq_count, enic->conf_intr_count);