drivers/net/enic/enic_res.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  */
   5
   6 #include "enic_compat.h"
   7 #include "rte_ethdev_driver.h"
   8 #include "wq_enet_desc.h"
   9 #include "rq_enet_desc.h"
  10 #include "cq_enet_desc.h"
  11 #include "vnic_resource.h"
  12 #include "vnic_enet.h"
  13 #include "vnic_dev.h"
  14 #include "vnic_wq.h"
  15 #include "vnic_rq.h"
  16 #include "vnic_cq.h"
  17 #include "vnic_intr.h"
  18 #include "vnic_stats.h"
  19 #include "vnic_nic.h"
  20 #include "vnic_rss.h"
  21 #include "enic_res.h"
  22 #include "enic.h"
  23
  24 int enic_get_vnic_config(struct enic *enic)
  25 {
  26         struct vnic_enet_config *c = &enic->config;
  27         int err;
  28
  29         err = vnic_dev_get_mac_addr(enic->vdev, enic->mac_addr);
  30         if (err) {
  31                 dev_err(enic_get_dev(enic),
  32                         "Error getting MAC addr, %d\n", err);
  33                 return err;
  34         }
  35
  36
  37 #define GET_CONFIG(m) \
  38         do { \
  39                 err = vnic_dev_spec(enic->vdev, \
  40                         offsetof(struct vnic_enet_config, m), \
  41                         sizeof(c->m), &c->m); \
  42                 if (err) { \
  43                         dev_err(enic_get_dev(enic), \
  44                                 "Error getting %s, %d\n", #m, err); \
  45                         return err; \
  46                 } \
  47         } while (0)
  48
  49         GET_CONFIG(flags);
  50         GET_CONFIG(wq_desc_count);
  51         GET_CONFIG(rq_desc_count);
  52         GET_CONFIG(mtu);
  53         GET_CONFIG(intr_timer_type);
  54         GET_CONFIG(intr_mode);
  55         GET_CONFIG(intr_timer_usec);
  56         GET_CONFIG(loop_tag);
  57         GET_CONFIG(num_arfs);
  58         GET_CONFIG(max_pkt_size);
  59
  60         /* max packet size is only defined in newer VIC firmware
  61          * and will be 0 for legacy firmware and VICs
  62          */
  63         if (c->max_pkt_size > ENIC_DEFAULT_RX_MAX_PKT_SIZE)
  64                 enic->max_mtu = c->max_pkt_size - RTE_ETHER_HDR_LEN;
  65         else
  66                 enic->max_mtu = ENIC_DEFAULT_RX_MAX_PKT_SIZE -
  67                         RTE_ETHER_HDR_LEN;
  68         if (c->mtu == 0)
  69                 c->mtu = 1500;
  70
  71         enic->rte_dev->data->mtu = min_t(u16, enic->max_mtu,
  72                                          max_t(u16, ENIC_MIN_MTU, c->mtu));
  73
  74         enic->adv_filters = vnic_dev_capable_adv_filters(enic->vdev);
  75         dev_info(enic, "Advanced Filters %savailable\n", ((enic->adv_filters)
  76                  ? "" : "not "));
  77
  78         err = vnic_dev_capable_filter_mode(enic->vdev, &enic->flow_filter_mode,
  79                                            &enic->filter_actions);
  80         if (err) {
  81                 dev_err(enic_get_dev(enic),
  82                         "Error getting filter modes, %d\n", err);
  83                 return err;
  84         }
  85         vnic_dev_capable_udp_rss_weak(enic->vdev, &enic->nic_cfg_chk,
  86                                       &enic->udp_rss_weak);
  87
  88         dev_info(enic, "Flow api filter mode: %s Actions: %s%s%s\n",
  89                 ((enic->flow_filter_mode == FILTER_DPDK_1) ? "DPDK" :
  90                 ((enic->flow_filter_mode == FILTER_USNIC_IP) ? "USNIC" :
  91                 ((enic->flow_filter_mode == FILTER_IPV4_5TUPLE) ? "5TUPLE" :
  92                 "NONE"))),
  93                 ((enic->filter_actions & FILTER_ACTION_RQ_STEERING_FLAG) ?
  94                  "steer " : ""),
  95                 ((enic->filter_actions & FILTER_ACTION_FILTER_ID_FLAG) ?
  96                  "tag " : ""),
  97                 ((enic->filter_actions & FILTER_ACTION_DROP_FLAG) ?
  98                  "drop " : ""));
  99
 100         c->wq_desc_count =
 101                 min_t(u32, ENIC_MAX_WQ_DESCS,
 102                 max_t(u32, ENIC_MIN_WQ_DESCS,
 103                 c->wq_desc_count));
 104         c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
 105
 106         c->rq_desc_count =
 107                 min_t(u32, ENIC_MAX_RQ_DESCS,
 108                 max_t(u32, ENIC_MIN_RQ_DESCS,
 109                 c->rq_desc_count));
 110         c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
 111
 112         c->intr_timer_usec = min_t(u32, c->intr_timer_usec,
 113                 vnic_dev_get_intr_coal_timer_max(enic->vdev));
 114
 115         dev_info(enic_get_dev(enic),
 116                 "vNIC MAC addr %02x:%02x:%02x:%02x:%02x:%02x "
 117                 "wq/rq %d/%d mtu %d, max mtu:%d\n",
 118                 enic->mac_addr[0], enic->mac_addr[1], enic->mac_addr[2],
 119                 enic->mac_addr[3], enic->mac_addr[4], enic->mac_addr[5],
 120                 c->wq_desc_count, c->rq_desc_count,
 121                 enic->rte_dev->data->mtu, enic->max_mtu);
 122         dev_info(enic_get_dev(enic), "vNIC csum tx/rx %s/%s "
 123                 "rss %s intr mode %s type %s timer %d usec "
 124                 "loopback tag 0x%04x\n",
 125                 ENIC_SETTING(enic, TXCSUM) ? "yes" : "no",
 126                 ENIC_SETTING(enic, RXCSUM) ? "yes" : "no",
 127                 ENIC_SETTING(enic, RSS) ?
 128                         (ENIC_SETTING(enic, RSSHASH_UDPIPV4) ? "+UDP" :
 129                         ((enic->udp_rss_weak ? "+udp" :
 130                         "yes"))) : "no",
 131                 c->intr_mode == VENET_INTR_MODE_INTX ? "INTx" :
 132                 c->intr_mode == VENET_INTR_MODE_MSI ? "MSI" :
 133                 c->intr_mode == VENET_INTR_MODE_ANY ? "any" :
 134                 "unknown",
 135                 c->intr_timer_type == VENET_INTR_TYPE_MIN ? "min" :
 136                 c->intr_timer_type == VENET_INTR_TYPE_IDLE ? "idle" :
 137                 "unknown",
 138                 c->intr_timer_usec,
 139                 c->loop_tag);
 140
 141         /* RSS settings from vNIC */
 142         enic->reta_size = ENIC_RSS_RETA_SIZE;
 143         enic->hash_key_size = ENIC_RSS_HASH_KEY_SIZE;
 144         enic->flow_type_rss_offloads = 0;
 145         if (ENIC_SETTING(enic, RSSHASH_IPV4))
 146                 /*
 147                  * IPV4 hash type handles both non-frag and frag packet types.
 148                  * TCP/UDP is controlled via a separate flag below.
 149                  */
 150                 enic->flow_type_rss_offloads |= ETH_RSS_IPV4 |
 151                         ETH_RSS_FRAG_IPV4 | ETH_RSS_NONFRAG_IPV4_OTHER;
 152         if (ENIC_SETTING(enic, RSSHASH_TCPIPV4))
 153                 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV4_TCP;
 154         if (ENIC_SETTING(enic, RSSHASH_IPV6))
 155                 /*
 156                  * The VIC adapter can perform RSS on IPv6 packets with and
 157                  * without extension headers. An IPv6 "fragment" is an IPv6
 158                  * packet with the fragment extension header.
 159                  */
 160                 enic->flow_type_rss_offloads |= ETH_RSS_IPV6 |
 161                         ETH_RSS_IPV6_EX | ETH_RSS_FRAG_IPV6 |
 162                         ETH_RSS_NONFRAG_IPV6_OTHER;
 163         if (ENIC_SETTING(enic, RSSHASH_TCPIPV6))
 164                 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV6_TCP |
 165                         ETH_RSS_IPV6_TCP_EX;
 166         if (enic->udp_rss_weak)
 167                 enic->flow_type_rss_offloads |=
 168                         ETH_RSS_NONFRAG_IPV4_UDP | ETH_RSS_NONFRAG_IPV6_UDP |
 169                         ETH_RSS_IPV6_UDP_EX;
 170         if (ENIC_SETTING(enic, RSSHASH_UDPIPV4))
 171                 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV4_UDP;
 172         if (ENIC_SETTING(enic, RSSHASH_UDPIPV6))
 173                 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV6_UDP |
 174                         ETH_RSS_IPV6_UDP_EX;
 175
 176         /* Zero offloads if RSS is not enabled */
 177         if (!ENIC_SETTING(enic, RSS))
 178                 enic->flow_type_rss_offloads = 0;
 179
 180         enic->vxlan = ENIC_SETTING(enic, VXLAN) &&
 181                 vnic_dev_capable_vxlan(enic->vdev);
 182         /*
 183          * Default hardware capabilities. enic_dev_init() may add additional
 184          * flags if it enables overlay offloads.
 185          */
 186         enic->tx_queue_offload_capa = 0;
 187         enic->tx_offload_capa =
 188                 enic->tx_queue_offload_capa |
 189                 DEV_TX_OFFLOAD_MULTI_SEGS |
 190                 DEV_TX_OFFLOAD_VLAN_INSERT |
 191                 DEV_TX_OFFLOAD_IPV4_CKSUM |
 192                 DEV_TX_OFFLOAD_UDP_CKSUM |
 193                 DEV_TX_OFFLOAD_TCP_CKSUM |
 194                 DEV_TX_OFFLOAD_TCP_TSO;
 195         enic->rx_offload_capa =
 196                 DEV_RX_OFFLOAD_SCATTER |
 197                 DEV_RX_OFFLOAD_JUMBO_FRAME |
 198                 DEV_RX_OFFLOAD_VLAN_STRIP |
 199                 DEV_RX_OFFLOAD_IPV4_CKSUM |
 200                 DEV_RX_OFFLOAD_UDP_CKSUM |
 201                 DEV_RX_OFFLOAD_TCP_CKSUM;
 202         enic->tx_offload_mask =
 203                 PKT_TX_IPV6 |
 204                 PKT_TX_IPV4 |
 205                 PKT_TX_VLAN |
 206                 PKT_TX_IP_CKSUM |
 207                 PKT_TX_L4_MASK |
 208                 PKT_TX_TCP_SEG;
 209
 210         return 0;
 211 }
 212
 213 int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
 214         u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
 215         u8 ig_vlan_strip_en)
 216 {
 217         enum vnic_devcmd_cmd cmd;
 218         u64 a0, a1;
 219         u32 nic_cfg;
 220         int wait = 1000;
 221
 222         vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
 223                 rss_hash_type, rss_hash_bits, rss_base_cpu,
 224                 rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
 225
 226         a0 = nic_cfg;
 227         a1 = 0;
 228         cmd = enic->nic_cfg_chk ? CMD_NIC_CFG_CHK : CMD_NIC_CFG;
 229         return vnic_dev_cmd(enic->vdev, cmd, &a0, &a1, wait);
 230 }
 231
 232 int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
 233 {
 234         u64 a0 = (u64)key_pa, a1 = len;
 235         int wait = 1000;
 236
 237         return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
 238 }
 239
 240 int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
 241 {
 242         u64 a0 = (u64)cpu_pa, a1 = len;
 243         int wait = 1000;
 244
 245         return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
 246 }
 247
 248 void enic_free_vnic_resources(struct enic *enic)
 249 {
 250         unsigned int i;
 251
 252         for (i = 0; i < enic->wq_count; i++)
 253                 vnic_wq_free(&enic->wq[i]);
 254         for (i = 0; i < enic_vnic_rq_count(enic); i++)
 255                 if (enic->rq[i].in_use)
 256                         vnic_rq_free(&enic->rq[i]);
 257         for (i = 0; i < enic->cq_count; i++)
 258                 vnic_cq_free(&enic->cq[i]);
 259         for (i = 0; i < enic->intr_count; i++)
 260                 vnic_intr_free(&enic->intr[i]);
 261 }
 262
 263 void enic_get_res_counts(struct enic *enic)
 264 {
 265         enic->conf_wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
 266         enic->conf_rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
 267         enic->conf_cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
 268         enic->conf_intr_count = vnic_dev_get_res_count(enic->vdev,
 269                 RES_TYPE_INTR_CTRL);
 270
 271         dev_info(enic_get_dev(enic),
 272                 "vNIC resources avail: wq %d rq %d cq %d intr %d\n",
 273                 enic->conf_wq_count, enic->conf_rq_count,
 274                 enic->conf_cq_count, enic->conf_intr_count);
 275 }