1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2008-2017 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
6 #include "enic_compat.h"
7 #include "rte_ethdev_driver.h"
8 #include "wq_enet_desc.h"
9 #include "rq_enet_desc.h"
10 #include "cq_enet_desc.h"
11 #include "vnic_resource.h"
12 #include "vnic_enet.h"
17 #include "vnic_intr.h"
18 #include "vnic_stats.h"
24 int enic_get_vnic_config(struct enic *enic)
26 struct vnic_enet_config *c = &enic->config;
29 err = vnic_dev_get_mac_addr(enic->vdev, enic->mac_addr);
31 dev_err(enic_get_dev(enic),
32 "Error getting MAC addr, %d\n", err);
37 #define GET_CONFIG(m) \
39 err = vnic_dev_spec(enic->vdev, \
40 offsetof(struct vnic_enet_config, m), \
41 sizeof(c->m), &c->m); \
43 dev_err(enic_get_dev(enic), \
44 "Error getting %s, %d\n", #m, err); \
50 GET_CONFIG(wq_desc_count);
51 GET_CONFIG(rq_desc_count);
53 GET_CONFIG(intr_timer_type);
54 GET_CONFIG(intr_mode);
55 GET_CONFIG(intr_timer_usec);
58 GET_CONFIG(max_pkt_size);
60 /* max packet size is only defined in newer VIC firmware
61 * and will be 0 for legacy firmware and VICs
63 if (c->max_pkt_size > ENIC_DEFAULT_RX_MAX_PKT_SIZE)
64 enic->max_mtu = c->max_pkt_size - (ETHER_HDR_LEN + 4);
66 enic->max_mtu = ENIC_DEFAULT_RX_MAX_PKT_SIZE
67 - (ETHER_HDR_LEN + 4);
71 enic->rte_dev->data->mtu = min_t(u16, enic->max_mtu,
72 max_t(u16, ENIC_MIN_MTU, c->mtu));
74 enic->adv_filters = vnic_dev_capable_adv_filters(enic->vdev);
75 dev_info(enic, "Advanced Filters %savailable\n", ((enic->adv_filters)
78 err = vnic_dev_capable_filter_mode(enic->vdev, &enic->flow_filter_mode,
79 &enic->filter_actions);
81 dev_err(enic_get_dev(enic),
82 "Error getting filter modes, %d\n", err);
86 dev_info(enic, "Flow api filter mode: %s Actions: %s%s%s\n",
87 ((enic->flow_filter_mode == FILTER_DPDK_1) ? "DPDK" :
88 ((enic->flow_filter_mode == FILTER_USNIC_IP) ? "USNIC" :
89 ((enic->flow_filter_mode == FILTER_IPV4_5TUPLE) ? "5TUPLE" :
91 ((enic->filter_actions & FILTER_ACTION_RQ_STEERING_FLAG) ?
93 ((enic->filter_actions & FILTER_ACTION_FILTER_ID_FLAG) ?
95 ((enic->filter_actions & FILTER_ACTION_DROP_FLAG) ?
99 min_t(u32, ENIC_MAX_WQ_DESCS,
100 max_t(u32, ENIC_MIN_WQ_DESCS,
102 c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
105 min_t(u32, ENIC_MAX_RQ_DESCS,
106 max_t(u32, ENIC_MIN_RQ_DESCS,
108 c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
110 c->intr_timer_usec = min_t(u32, c->intr_timer_usec,
111 vnic_dev_get_intr_coal_timer_max(enic->vdev));
113 dev_info(enic_get_dev(enic),
114 "vNIC MAC addr %02x:%02x:%02x:%02x:%02x:%02x "
115 "wq/rq %d/%d mtu %d, max mtu:%d\n",
116 enic->mac_addr[0], enic->mac_addr[1], enic->mac_addr[2],
117 enic->mac_addr[3], enic->mac_addr[4], enic->mac_addr[5],
118 c->wq_desc_count, c->rq_desc_count,
119 enic->rte_dev->data->mtu, enic->max_mtu);
120 dev_info(enic_get_dev(enic), "vNIC csum tx/rx %s/%s "
121 "rss %s intr mode %s type %s timer %d usec "
122 "loopback tag 0x%04x\n",
123 ENIC_SETTING(enic, TXCSUM) ? "yes" : "no",
124 ENIC_SETTING(enic, RXCSUM) ? "yes" : "no",
125 ENIC_SETTING(enic, RSS) ? "yes" : "no",
126 c->intr_mode == VENET_INTR_MODE_INTX ? "INTx" :
127 c->intr_mode == VENET_INTR_MODE_MSI ? "MSI" :
128 c->intr_mode == VENET_INTR_MODE_ANY ? "any" :
130 c->intr_timer_type == VENET_INTR_TYPE_MIN ? "min" :
131 c->intr_timer_type == VENET_INTR_TYPE_IDLE ? "idle" :
136 /* RSS settings from vNIC */
137 enic->reta_size = ENIC_RSS_RETA_SIZE;
138 enic->hash_key_size = ENIC_RSS_HASH_KEY_SIZE;
139 enic->flow_type_rss_offloads = 0;
140 if (ENIC_SETTING(enic, RSSHASH_IPV4))
141 enic->flow_type_rss_offloads |= ETH_RSS_IPV4;
142 if (ENIC_SETTING(enic, RSSHASH_TCPIPV4))
143 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV4_TCP;
144 if (ENIC_SETTING(enic, RSSHASH_IPV6))
145 enic->flow_type_rss_offloads |= ETH_RSS_IPV6;
146 if (ENIC_SETTING(enic, RSSHASH_TCPIPV6))
147 enic->flow_type_rss_offloads |= ETH_RSS_NONFRAG_IPV6_TCP;
148 if (ENIC_SETTING(enic, RSSHASH_IPV6_EX))
149 enic->flow_type_rss_offloads |= ETH_RSS_IPV6_EX;
150 if (ENIC_SETTING(enic, RSSHASH_TCPIPV6_EX))
151 enic->flow_type_rss_offloads |= ETH_RSS_IPV6_TCP_EX;
152 if (vnic_dev_capable_udp_rss(enic->vdev)) {
153 enic->flow_type_rss_offloads |=
154 ETH_RSS_NONFRAG_IPV4_UDP | ETH_RSS_NONFRAG_IPV6_UDP;
157 /* Zero offloads if RSS is not enabled */
158 if (!ENIC_SETTING(enic, RSS))
159 enic->flow_type_rss_offloads = 0;
161 enic->vxlan = ENIC_SETTING(enic, VXLAN) &&
162 vnic_dev_capable_vxlan(enic->vdev);
164 * Default hardware capabilities. enic_dev_init() may add additional
165 * flags if it enables overlay offloads.
167 enic->tx_offload_capa =
168 DEV_TX_OFFLOAD_VLAN_INSERT |
169 DEV_TX_OFFLOAD_IPV4_CKSUM |
170 DEV_TX_OFFLOAD_UDP_CKSUM |
171 DEV_TX_OFFLOAD_TCP_CKSUM |
172 DEV_TX_OFFLOAD_TCP_TSO;
173 enic->rx_offload_capa =
174 DEV_RX_OFFLOAD_VLAN_STRIP |
175 DEV_RX_OFFLOAD_IPV4_CKSUM |
176 DEV_RX_OFFLOAD_UDP_CKSUM |
177 DEV_RX_OFFLOAD_TCP_CKSUM;
178 enic->tx_offload_mask =
187 int enic_add_vlan(struct enic *enic, u16 vlanid)
189 u64 a0 = vlanid, a1 = 0;
193 err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
195 dev_err(enic_get_dev(enic), "Can't add vlan id, %d\n", err);
200 int enic_del_vlan(struct enic *enic, u16 vlanid)
202 u64 a0 = vlanid, a1 = 0;
206 err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
208 dev_err(enic_get_dev(enic), "Can't delete vlan id, %d\n", err);
213 int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
214 u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
221 vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
222 rss_hash_type, rss_hash_bits, rss_base_cpu,
223 rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
228 return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
231 int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
233 u64 a0 = (u64)key_pa, a1 = len;
236 return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
239 int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
241 u64 a0 = (u64)cpu_pa, a1 = len;
244 return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
247 void enic_free_vnic_resources(struct enic *enic)
251 for (i = 0; i < enic->wq_count; i++)
252 vnic_wq_free(&enic->wq[i]);
253 for (i = 0; i < enic_vnic_rq_count(enic); i++)
254 if (enic->rq[i].in_use)
255 vnic_rq_free(&enic->rq[i]);
256 for (i = 0; i < enic->cq_count; i++)
257 vnic_cq_free(&enic->cq[i]);
258 for (i = 0; i < enic->intr_count; i++)
259 vnic_intr_free(&enic->intr[i]);
262 void enic_get_res_counts(struct enic *enic)
264 enic->conf_wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);
265 enic->conf_rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);
266 enic->conf_cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);
267 enic->conf_intr_count = vnic_dev_get_res_count(enic->vdev,
270 dev_info(enic_get_dev(enic),
271 "vNIC resources avail: wq %d rq %d cq %d intr %d\n",
272 enic->conf_wq_count, enic->conf_rq_count,
273 enic->conf_cq_count, enic->conf_intr_count);