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3 Copyright (c) 2013-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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13 notice, this list of conditions and the following disclaimer in the
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32 ***************************************************************************/
34 #ifndef _FM10K_OSDEP_H_
35 #define _FM10K_OSDEP_H_
39 #include <rte_atomic.h>
40 #include <rte_byteorder.h>
41 #include <rte_cycles.h>
42 #include "../fm10k_logs.h"
44 /* TODO: this does not look like it should be used... */
45 #define ERROR_REPORT2(v1, v2, v3) do { } while (0)
47 #ifndef BOULDER_RAPIDS_HW
48 #define BOULDER_RAPIDS_HW
52 #define DEBUGFUNC(F) DEBUGOUT(F "\n");
53 #define DEBUGOUT(S, args...) PMD_DRV_LOG_RAW(DEBUG, S, ##args)
54 #define DEBUGOUT1(S, args...) DEBUGOUT(S, ##args)
55 #define DEBUGOUT2(S, args...) DEBUGOUT(S, ##args)
56 #define DEBUGOUT3(S, args...) DEBUGOUT(S, ##args)
57 #define DEBUGOUT6(S, args...) DEBUGOUT(S, ##args)
58 #define DEBUGOUT7(S, args...) DEBUGOUT(S, ##args)
90 /* offsets are WORD offsets, not BYTE offsets */
91 #define FM10K_WRITE_REG(hw, reg, val) \
92 ((((volatile uint32_t *)(hw)->hw_addr)[(reg)]) = ((uint32_t)(val)))
93 #define FM10K_READ_REG(hw, reg) \
94 (((volatile uint32_t *)(hw)->hw_addr)[(reg)])
95 #define FM10K_WRITE_FLUSH(a) FM10K_READ_REG(a, FM10K_CTRL)
97 #define FM10K_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
99 #define FM10K_PCI_REG_WRITE(reg, value) do { \
100 FM10K_PCI_REG((reg)) = (value); \
103 /* not implemented */
104 #define FM10K_READ_PCI_WORD(hw, reg) 0
106 #define FM10K_WRITE_MBX(hw, reg, value) FM10K_WRITE_REG(hw, reg, value)
107 #define FM10K_READ_MBX(hw, reg) FM10K_READ_REG(hw, reg)
109 #define FM10K_LE16_TO_CPU rte_le_to_cpu_16
110 #define FM10K_LE32_TO_CPU rte_le_to_cpu_32
111 #define FM10K_CPU_TO_LE32 rte_cpu_to_le_32
112 #define FM10K_CPU_TO_LE16 rte_cpu_to_le_16
113 #define le16_to_cpu rte_le_to_cpu_16
115 #define FM10K_RMB rte_rmb
116 #define FM10K_WMB rte_wmb
118 #define usec_delay rte_delay_us
120 #define FM10K_REMOVED(hw_addr) (!(hw_addr))
122 #ifndef FM10K_IS_ZERO_ETHER_ADDR
123 /* make certain address is not 0 */
124 #define FM10K_IS_ZERO_ETHER_ADDR(addr) \
125 (!((addr)[0] | (addr)[1] | (addr)[2] | (addr)[3] | (addr)[4] | (addr)[5]))
128 #ifndef FM10K_IS_MULTICAST_ETHER_ADDR
129 #define FM10K_IS_MULTICAST_ETHER_ADDR(addr) ((addr)[0] & 0x1)
132 #ifndef FM10K_IS_VALID_ETHER_ADDR
133 /* make certain address is not multicast or 0 */
134 #define FM10K_IS_VALID_ETHER_ADDR(addr) \
135 (!FM10K_IS_MULTICAST_ETHER_ADDR(addr) && !FM10K_IS_ZERO_ETHER_ADDR(addr))
139 #define do_div(n, base) ({\
144 /* DPDK can't access IOMEM directly */
145 #ifndef FM10K_WRITE_SW_REG
146 #define FM10K_WRITE_SW_REG(v1, v2, v3) do { } while (0)
149 #ifndef fm10k_read_reg
150 #define fm10k_read_reg FM10K_READ_REG
153 #define FM10K_TSO_MINMSS \
154 (FM10K_DMA_CTRL_MINMSS_64 >> FM10K_DMA_CTRL_MINMSS_SHIFT)
155 #define FM10K_TSO_MIN_HEADERLEN 54
156 #define FM10K_TSO_MAX_HEADERLEN 192
158 #endif /* _FM10K_OSDEP_H_ */