1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Huawei Technologies Co., Ltd
5 #ifndef _HINIC_COMPAT_H_
6 #define _HINIC_COMPAT_H_
12 #include <rte_common.h>
13 #include <rte_byteorder.h>
14 #include <rte_memzone.h>
15 #include <rte_memcpy.h>
16 #include <rte_malloc.h>
17 #include <rte_atomic.h>
18 #include <rte_spinlock.h>
19 #include <rte_cycles.h>
21 #include <rte_config.h>
31 typedef uint64_t dma_addr_t;
35 #define gfp_t unsigned
59 #define NULL ((void *)0)
62 #define HINIC_ERROR (-1)
66 #define BIT(n) (1 << (n))
69 #define upper_32_bits(n) ((u32)(((n) >> 16) >> 16))
70 #define lower_32_bits(n) ((u32)(n))
72 /* Returns X / Y, rounding up. X must be nonnegative to round correctly. */
73 #define DIV_ROUND_UP(X, Y) (((X) + ((Y) - 1)) / (Y))
75 /* Returns X rounded up to the nearest multiple of Y. */
76 #define ROUND_UP(X, Y) (DIV_ROUND_UP(X, Y) * (Y))
79 #define ALIGN(x, a) RTE_ALIGN(x, a)
81 #define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a)))
83 /* Reported driver name. */
84 #define HINIC_DRIVER_NAME "net_hinic"
86 extern int hinic_logtype;
88 #define PMD_DRV_LOG(level, fmt, args...) \
89 rte_log(RTE_LOG_ ## level, hinic_logtype, \
90 HINIC_DRIVER_NAME": " fmt "\n", ##args)
92 /* common definition */
98 #define VLAN_PRIO_SHIFT 13
99 #define VLAN_N_VID 4096
101 /* bit order interface */
102 #define cpu_to_be16(o) rte_cpu_to_be_16(o)
103 #define cpu_to_be32(o) rte_cpu_to_be_32(o)
104 #define cpu_to_be64(o) rte_cpu_to_be_64(o)
105 #define cpu_to_le32(o) rte_cpu_to_le_32(o)
106 #define be16_to_cpu(o) rte_be_to_cpu_16(o)
107 #define be32_to_cpu(o) rte_be_to_cpu_32(o)
108 #define be64_to_cpu(o) rte_be_to_cpu_64(o)
109 #define le32_to_cpu(o) rte_le_to_cpu_32(o)
111 /* virt memory and dma phy memory */
113 #define GFP_KERNEL RTE_MEMZONE_IOVA_CONTIG
114 #define HINIC_PAGE_SHIFT 12
115 #define HINIC_PAGE_SIZE RTE_PGSIZE_4K
116 #define HINIC_MEM_ALLOC_ALIGNE_MIN 8
118 #define HINIC_PAGE_SIZE_DPDK 6
120 static inline int hinic_test_bit(int nr, volatile unsigned long *addr)
125 res = ((*addr) & (1UL << nr)) != 0;
130 static inline void hinic_set_bit(unsigned int nr, volatile unsigned long *addr)
132 __sync_fetch_and_or(addr, (1UL << nr));
135 static inline void hinic_clear_bit(int nr, volatile unsigned long *addr)
137 __sync_fetch_and_and(addr, ~(1UL << nr));
140 static inline int hinic_test_and_clear_bit(int nr, volatile unsigned long *addr)
142 unsigned long mask = (1UL << nr);
144 return __sync_fetch_and_and(addr, ~mask) & mask;
147 static inline int hinic_test_and_set_bit(int nr, volatile unsigned long *addr)
149 unsigned long mask = (1UL << nr);
151 return __sync_fetch_and_or(addr, mask) & mask;
154 void *dma_zalloc_coherent(void *dev, size_t size, dma_addr_t *dma_handle,
156 void *dma_zalloc_coherent_aligned(void *dev, size_t size,
157 dma_addr_t *dma_handle, gfp_t flag);
158 void *dma_zalloc_coherent_aligned256k(void *dev, size_t size,
159 dma_addr_t *dma_handle, gfp_t flag);
160 void dma_free_coherent(void *dev, size_t size, void *virt, dma_addr_t phys);
162 /* dma pool alloc and free */
163 #define pci_pool dma_pool
164 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
165 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
167 struct dma_pool *dma_pool_create(const char *name, void *dev, size_t size,
168 size_t align, size_t boundary);
169 void dma_pool_destroy(struct dma_pool *pool);
170 void *dma_pool_alloc(struct pci_pool *pool, int flags, dma_addr_t *dma_addr);
171 void dma_pool_free(struct pci_pool *pool, void *vaddr, dma_addr_t dma);
173 #define kzalloc(size, flag) rte_zmalloc(NULL, size, HINIC_MEM_ALLOC_ALIGNE_MIN)
174 #define kzalloc_aligned(size, flag) rte_zmalloc(NULL, size, RTE_CACHE_LINE_SIZE)
175 #define kfree(ptr) rte_free(ptr)
178 static inline void writel(u32 value, volatile void *addr)
180 *(volatile u32 *)addr = value;
183 static inline u32 readl(const volatile void *addr)
185 return *(const volatile u32 *)addr;
188 #define __raw_writel(value, reg) writel((value), (reg))
189 #define __raw_readl(reg) readl((reg))
191 /* Spinlock related interface */
192 #define hinic_spinlock_t rte_spinlock_t
194 #define spinlock_t rte_spinlock_t
195 #define spin_lock_init(spinlock_prt) rte_spinlock_init(spinlock_prt)
196 #define spin_lock_deinit(lock)
197 #define spin_lock(spinlock_prt) rte_spinlock_lock(spinlock_prt)
198 #define spin_unlock(spinlock_prt) rte_spinlock_unlock(spinlock_prt)
200 static inline unsigned long get_timeofday_ms(void)
204 (void)gettimeofday(&tv, NULL);
206 return (unsigned long)tv.tv_sec * 1000 + tv.tv_usec / 1000;
209 #define jiffies get_timeofday_ms()
210 #define msecs_to_jiffies(ms) (ms)
211 #define time_before(now, end) ((now) < (end))
213 /* misc kernel utils */
214 static inline u16 ilog2(u32 n)
227 * hinic_cpu_to_be32 - convert data to big endian 32 bit format
228 * @data: the data to convert
229 * @len: length of data to convert, must be Multiple of 4B
231 static inline void hinic_cpu_to_be32(void *data, u32 len)
234 u32 *mem = (u32 *)data;
236 for (i = 0; i < (len >> 2); i++) {
237 *mem = cpu_to_be32(*mem);
243 * hinic_be32_to_cpu - convert data from big endian 32 bit format
244 * @data: the data to convert
245 * @len: length of data to convert, must be Multiple of 4B
247 static inline void hinic_be32_to_cpu(void *data, u32 len)
250 u32 *mem = (u32 *)data;
252 for (i = 0; i < (len >> 2); i++) {
253 *mem = be32_to_cpu(*mem);
258 static inline int hinic_mutex_init(pthread_mutex_t *pthreadmutex,
259 const pthread_mutexattr_t *mattr)
263 err = pthread_mutex_init(pthreadmutex, mattr);
265 PMD_DRV_LOG(ERR, "Fail to initialize mutex, error: %d", err);
270 static inline int hinic_mutex_destroy(pthread_mutex_t *pthreadmutex)
274 err = pthread_mutex_destroy(pthreadmutex);
276 PMD_DRV_LOG(ERR, "Fail to destroy mutex, error: %d", err);
281 #endif /* _HINIC_COMPAT_H_ */